From: Joshua Henderson <joshua.henderson@microchip.com> To: <linux-kernel@vger.kernel.org> Cc: <linux-mips@linux-mips.org>, <ralf@linux-mips.org>, Joshua Henderson <joshua.henderson@microchip.com>, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, <devicetree@vger.kernel.org> Subject: [PATCH v5 07/14] dt/bindings: Add bindings for PIC32 pin control and GPIO Date: Wed, 13 Jan 2016 18:15:40 -0700 [thread overview] Message-ID: <1452734299-460-8-git-send-email-joshua.henderson@microchip.com> (raw) In-Reply-To: <1452734299-460-1-git-send-email-joshua.henderson@microchip.com> Document the devicetree bindings for PINCTRL and GPIO found on Microchip PIC32 class devices. Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Cc: Ralf Baechle <ralf@linux-mips.org> Acked-by: Rob Herring <robh@kernel.org> --- Changes since v4: None Changes since v3: None Changes since v2: None Changes since v1: - Complete bindings API change to use standard bindings --- .../bindings/gpio/microchip,pic32-gpio.txt | 49 ++++++++++++++++ .../bindings/pinctrl/microchip,pic32-pinctrl.txt | 60 ++++++++++++++++++++ 2 files changed, 109 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt diff --git a/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt b/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt new file mode 100644 index 0000000..ef37528 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt @@ -0,0 +1,49 @@ +* Microchip PIC32 GPIO devices (PIO). + +Required properties: + - compatible: "microchip,pic32mzda-gpio" + - reg: Base address and length for the device. + - interrupts: The port interrupt shared by all pins. + - gpio-controller: Marks the port as GPIO controller. + - #gpio-cells: Two. The first cell is the pin number and + the second cell is used to specify the gpio polarity as defined in + defined in <dt-bindings/gpio/gpio.h>: + 0 = GPIO_ACTIVE_HIGH + 1 = GPIO_ACTIVE_LOW + 2 = GPIO_OPEN_DRAIN + - interrupt-controller: Marks the device node as an interrupt controller. + - #interrupt-cells: Two. The first cell is the GPIO number and second cell + is used to specify the trigger type as defined in + <dt-bindings/interrupt-controller/irq.h>: + IRQ_TYPE_EDGE_RISING + IRQ_TYPE_EDGE_FALLING + IRQ_TYPE_EDGE_BOTH + - clocks: Clock specifier (see clock bindings for details). + - microchip,gpio-bank: Specifies which bank a controller owns. + - gpio-ranges: Interaction with the PINCTRL subsystem. + +Example: + +/* PORTA */ +gpio0: gpio0@1f860000 { + compatible = "microchip,pic32mzda-gpio"; + reg = <0x1f860000 0x100>; + interrupts = <118 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&PBCLK4>; + microchip,gpio-bank = <0>; + gpio-ranges = <&pic32_pinctrl 0 0 16>; +}; + +keys { + ... + + button@sw1 { + label = "ESC"; + linux,code = <1>; + gpios = <&gpio0 12 0>; + }; +}; diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt new file mode 100644 index 0000000..4b5efa5 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt @@ -0,0 +1,60 @@ +* Microchip PIC32 Pin Controller + +Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and +../interrupt-controller/interrupts.txt for generic information regarding +pin controller, GPIO, and interrupt bindings. + +PIC32 'pin configuration node' is a node of a group of pins which can be +used for a specific device or function. This node represents configuraions of +pins, optional function, and optional mux related configuration. + +Required properties for pin controller node: + - compatible: "microchip,pic32mada-pinctrl" + - reg: Address range of the pinctrl registers. + - clocks: Clock specifier (see clock bindings for details) + +Required properties for pin configuration sub-nodes: + - pins: List of pins to which the configuration applies. + +Optional properties for pin configuration sub-nodes: +---------------------------------------------------- + - function: Mux function for the specified pins. + - bias-pull-up: Enable weak pull-up. + - bias-pull-down: Enable weak pull-down. + - input-enable: Set the pin as an input. + - output-low: Set the pin as an output level low. + - output-high: Set the pin as an output level high. + - microchip,digital: Enable digital I/O. + - microchip,analog: Enable analog I/O. + +Example: + +pic32_pinctrl: pinctrl@1f801400{ + #address-cells = <1>; + #size-cells = <1>; + compatible = "microchip,pic32mzda-pinctrl"; + reg = <0x1f801400 0x400>; + clocks = <&PBCLK1>; + + pinctrl_uart2: pinctrl_uart2 { + uart2-tx { + pins = "G9"; + function = "U2TX"; + microchip,digital; + output-low; + }; + uart2-rx { + pins = "B0"; + function = "U2RX"; + microchip,digital; + input-enable; + }; + }; +}; + +uart2: serial@1f822200 { + compatible = "microchip,pic32mzda-uart"; + reg = <0x1f822200 0x50>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; +}; -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: Joshua Henderson <joshua.henderson@microchip.com> To: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, Joshua Henderson <joshua.henderson@microchip.com>, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, devicetree@vger.kernel.org Subject: [PATCH v5 07/14] dt/bindings: Add bindings for PIC32 pin control and GPIO Date: Wed, 13 Jan 2016 18:15:40 -0700 [thread overview] Message-ID: <1452734299-460-8-git-send-email-joshua.henderson@microchip.com> (raw) In-Reply-To: <1452734299-460-1-git-send-email-joshua.henderson@microchip.com> Document the devicetree bindings for PINCTRL and GPIO found on Microchip PIC32 class devices. Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Cc: Ralf Baechle <ralf@linux-mips.org> Acked-by: Rob Herring <robh@kernel.org> --- Changes since v4: None Changes since v3: None Changes since v2: None Changes since v1: - Complete bindings API change to use standard bindings --- .../bindings/gpio/microchip,pic32-gpio.txt | 49 ++++++++++++++++ .../bindings/pinctrl/microchip,pic32-pinctrl.txt | 60 ++++++++++++++++++++ 2 files changed, 109 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt diff --git a/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt b/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt new file mode 100644 index 0000000..ef37528 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt @@ -0,0 +1,49 @@ +* Microchip PIC32 GPIO devices (PIO). + +Required properties: + - compatible: "microchip,pic32mzda-gpio" + - reg: Base address and length for the device. + - interrupts: The port interrupt shared by all pins. + - gpio-controller: Marks the port as GPIO controller. + - #gpio-cells: Two. The first cell is the pin number and + the second cell is used to specify the gpio polarity as defined in + defined in <dt-bindings/gpio/gpio.h>: + 0 = GPIO_ACTIVE_HIGH + 1 = GPIO_ACTIVE_LOW + 2 = GPIO_OPEN_DRAIN + - interrupt-controller: Marks the device node as an interrupt controller. + - #interrupt-cells: Two. The first cell is the GPIO number and second cell + is used to specify the trigger type as defined in + <dt-bindings/interrupt-controller/irq.h>: + IRQ_TYPE_EDGE_RISING + IRQ_TYPE_EDGE_FALLING + IRQ_TYPE_EDGE_BOTH + - clocks: Clock specifier (see clock bindings for details). + - microchip,gpio-bank: Specifies which bank a controller owns. + - gpio-ranges: Interaction with the PINCTRL subsystem. + +Example: + +/* PORTA */ +gpio0: gpio0@1f860000 { + compatible = "microchip,pic32mzda-gpio"; + reg = <0x1f860000 0x100>; + interrupts = <118 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&PBCLK4>; + microchip,gpio-bank = <0>; + gpio-ranges = <&pic32_pinctrl 0 0 16>; +}; + +keys { + ... + + button@sw1 { + label = "ESC"; + linux,code = <1>; + gpios = <&gpio0 12 0>; + }; +}; diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt new file mode 100644 index 0000000..4b5efa5 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt @@ -0,0 +1,60 @@ +* Microchip PIC32 Pin Controller + +Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and +../interrupt-controller/interrupts.txt for generic information regarding +pin controller, GPIO, and interrupt bindings. + +PIC32 'pin configuration node' is a node of a group of pins which can be +used for a specific device or function. This node represents configuraions of +pins, optional function, and optional mux related configuration. + +Required properties for pin controller node: + - compatible: "microchip,pic32mada-pinctrl" + - reg: Address range of the pinctrl registers. + - clocks: Clock specifier (see clock bindings for details) + +Required properties for pin configuration sub-nodes: + - pins: List of pins to which the configuration applies. + +Optional properties for pin configuration sub-nodes: +---------------------------------------------------- + - function: Mux function for the specified pins. + - bias-pull-up: Enable weak pull-up. + - bias-pull-down: Enable weak pull-down. + - input-enable: Set the pin as an input. + - output-low: Set the pin as an output level low. + - output-high: Set the pin as an output level high. + - microchip,digital: Enable digital I/O. + - microchip,analog: Enable analog I/O. + +Example: + +pic32_pinctrl: pinctrl@1f801400{ + #address-cells = <1>; + #size-cells = <1>; + compatible = "microchip,pic32mzda-pinctrl"; + reg = <0x1f801400 0x400>; + clocks = <&PBCLK1>; + + pinctrl_uart2: pinctrl_uart2 { + uart2-tx { + pins = "G9"; + function = "U2TX"; + microchip,digital; + output-low; + }; + uart2-rx { + pins = "B0"; + function = "U2RX"; + microchip,digital; + input-enable; + }; + }; +}; + +uart2: serial@1f822200 { + compatible = "microchip,pic32mzda-uart"; + reg = <0x1f822200 0x50>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; +}; -- 1.7.9.5
next prev parent reply other threads:[~2016-01-14 1:12 UTC|newest] Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-01-14 1:15 [PATCH v5 00/14] Initial Microchip PIC32MZDA Support Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 1:15 ` [PATCH v5 01/14] dt/bindings: Add bindings for PIC32 interrupt controller Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-17 3:57 ` Rob Herring 2016-01-14 1:15 ` [PATCH v5 02/14] irqchip: irq-pic32-evic: Add support " Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 8:10 ` Thomas Gleixner 2016-01-14 11:12 ` Ralf Baechle 2016-01-14 11:12 ` Ralf Baechle 2016-01-14 11:12 ` Ralf Baechle 2016-01-14 1:15 ` [PATCH v5 03/14] dt/bindings: Add PIC32 clock binding documentation Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 1:15 ` [PATCH v5 04/14] clk: clk-pic32: Add PIC32 clock driver Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-26 17:04 ` Joshua Henderson 2016-01-26 17:04 ` Joshua Henderson 2016-01-29 23:58 ` Stephen Boyd 2016-02-03 5:36 ` Purna Chandra Mandal 2016-02-03 5:36 ` Purna Chandra Mandal 2016-01-14 1:15 ` [PATCH v5 05/14] dt/bindings: Add bindings for PIC32/MZDA platforms Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 1:15 ` [PATCH v5 06/14] MIPS: Add support for PIC32MZDA platform Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson [this message] 2016-01-14 1:15 ` [PATCH v5 07/14] dt/bindings: Add bindings for PIC32 pin control and GPIO Joshua Henderson 2016-01-14 1:15 ` [PATCH v5 08/14] pinctrl: pinctrl-pic32: Add PIC32 pin control driver Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-26 17:04 ` Joshua Henderson 2016-01-26 17:04 ` Joshua Henderson 2016-01-27 13:49 ` Linus Walleij 2016-01-28 0:33 ` Joshua Henderson 2016-01-14 1:15 ` [PATCH v5 09/14] dt/bindings: Add bindings for PIC32 UART driver Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 1:15 ` [PATCH v5 10/14] serial: pic32_uart: Add " Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 13:55 ` One Thousand Gnomes 2016-01-14 13:55 ` One Thousand Gnomes 2016-01-14 13:55 ` One Thousand Gnomes 2016-01-26 17:04 ` Joshua Henderson 2016-01-26 17:04 ` Joshua Henderson 2016-01-26 17:33 ` Greg Kroah-Hartman 2016-01-26 17:33 ` Greg Kroah-Hartman 2016-01-27 15:55 ` Joshua Henderson 2016-01-27 15:55 ` Joshua Henderson 2016-01-27 15:55 ` Joshua Henderson 2016-02-07 7:04 ` Greg Kroah-Hartman 2016-02-07 7:04 ` Greg Kroah-Hartman 2016-04-15 17:28 ` Sudeep Holla 2016-04-15 17:28 ` Sudeep Holla 2016-04-16 16:09 ` Greg Kroah-Hartman 2016-01-14 1:15 ` [PATCH v5 11/14] dt/bindings: Add bindings for PIC32 SDHCI host controller Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-02-08 9:58 ` Ulf Hansson 2016-01-14 1:15 ` [PATCH v5 12/14] mmc: sdhci-pic32: Add PIC32 SDHCI host controller driver Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-26 17:04 ` Joshua Henderson 2016-01-26 17:04 ` Joshua Henderson 2016-02-08 9:59 ` Ulf Hansson 2016-02-08 9:59 ` Ulf Hansson 2016-01-14 1:15 ` [PATCH v5 13/14] MIPS: dts: Add initial DTS for the PIC32MZDA Starter Kit Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson 2016-01-14 1:15 ` [PATCH v5 14/14] MIPS: pic32mzda: Add initial PIC32MZDA Starter Kit defconfig Joshua Henderson 2016-01-14 1:15 ` Joshua Henderson
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1452734299-460-8-git-send-email-joshua.henderson@microchip.com \ --to=joshua.henderson@microchip.com \ --cc=devicetree@vger.kernel.org \ --cc=galak@codeaurora.org \ --cc=ijc+devicetree@hellion.org.uk \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mips@linux-mips.org \ --cc=mark.rutland@arm.com \ --cc=pawel.moll@arm.com \ --cc=ralf@linux-mips.org \ --cc=robh+dt@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.