* [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed
@ 2016-01-14 10:28 Jani Nikula
2016-01-14 10:28 ` [PATCH 2/2] drm/i915/dsi: start using enum mipi_dsi_pixel_format Jani Nikula
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Jani Nikula @ 2016-01-14 10:28 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
The enum mipi_dsi_pixel_format defines MIPI_DSI_FMT_RGB666 for the
"loose" 24 bpp format and MIPI_DSI_FMT_RGB666_PACKED for the 18 bpp
format. We have this the other way round, defining a loose version for
24 bpp.
Follow suit with what's in enum mipi_dsi_pixel_format to avoid future
confusion. Rename
VID_MODE_FORMAT_RGB666 -> VID_MODE_FORMAT_RGB666_PACKED
VID_MODE_FORMAT_RGB666_LOOSE -> VID_MODE_FORMAT_RGB666
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 2 +-
drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0a988895165f..379c61677334 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7849,8 +7849,8 @@ enum skl_disp_power_wells {
#define VID_MODE_FORMAT_MASK (0xf << 7)
#define VID_MODE_NOT_SUPPORTED (0 << 7)
#define VID_MODE_FORMAT_RGB565 (1 << 7)
-#define VID_MODE_FORMAT_RGB666 (2 << 7)
-#define VID_MODE_FORMAT_RGB666_LOOSE (3 << 7)
+#define VID_MODE_FORMAT_RGB666_PACKED (2 << 7)
+#define VID_MODE_FORMAT_RGB666 (3 << 7)
#define VID_MODE_FORMAT_RGB888 (4 << 7)
#define CMD_MODE_CHANNEL_NUMBER_SHIFT 5
#define CMD_MODE_CHANNEL_NUMBER_MASK (3 << 5)
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 1d43e6f37fc1..3f4b9712bffd 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -420,7 +420,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
intel_dsi->dual_link = mipi_config->dual_link;
intel_dsi->pixel_overlap = mipi_config->pixel_overlap;
- if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666)
+ if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666_PACKED)
bits_per_pixel = 18;
else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565)
bits_per_pixel = 16;
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index bb5e95a1a453..f70df2b42b23 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -37,10 +37,10 @@ static int dsi_pixel_format_bpp(int pixel_format)
switch (pixel_format) {
default:
case VID_MODE_FORMAT_RGB888:
- case VID_MODE_FORMAT_RGB666_LOOSE:
+ case VID_MODE_FORMAT_RGB666:
bpp = 24;
break;
- case VID_MODE_FORMAT_RGB666:
+ case VID_MODE_FORMAT_RGB666_PACKED:
bpp = 18;
break;
case VID_MODE_FORMAT_RGB565:
--
2.1.4
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^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/i915/dsi: start using enum mipi_dsi_pixel_format
2016-01-14 10:28 [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed Jani Nikula
@ 2016-01-14 10:28 ` Jani Nikula
2016-01-14 13:52 ` Mika Kahola
2016-01-14 11:49 ` ✗ warning: Fi.CI.BAT Patchwork
2016-01-14 13:51 ` [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed Mika Kahola
2 siblings, 1 reply; 8+ messages in thread
From: Jani Nikula @ 2016-01-14 10:28 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
A small step moving us closer to DRM MIPI DSI code. Use enum
mipi_dsi_pixel_format instead of our own. The first benefit is being
able to use common mipi_dsi_pixel_format_to_bpp().
There's a little back and forth conversion with the VBT -> enum ->
register, since we have just shoved the VBT value into the register
directly. Longer term, all the VBT parsing and deciphering should be
done in intel_bios.c, and abstracted there.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 19 +++++++++++++++-
drivers/gpu/drm/i915/intel_dsi.h | 8 +++++--
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 36 +++++++++++++++++++++---------
drivers/gpu/drm/i915/intel_dsi_pll.c | 30 +++++--------------------
4 files changed, 54 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 91cef3525c93..83f18791c009 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -840,6 +840,23 @@ static void set_dsi_timings(struct drm_encoder *encoder,
}
}
+static u32 pixel_format_to_reg(enum mipi_dsi_pixel_format fmt)
+{
+ switch (fmt) {
+ case MIPI_DSI_FMT_RGB888:
+ return VID_MODE_FORMAT_RGB888;
+ case MIPI_DSI_FMT_RGB666:
+ return VID_MODE_FORMAT_RGB666;
+ case MIPI_DSI_FMT_RGB666_PACKED:
+ return VID_MODE_FORMAT_RGB666_PACKED;
+ case MIPI_DSI_FMT_RGB565:
+ return VID_MODE_FORMAT_RGB565;
+ default:
+ MISSING_CASE(fmt);
+ return VID_MODE_FORMAT_RGB666;
+ }
+}
+
static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
{
struct drm_encoder *encoder = &intel_encoder->base;
@@ -910,7 +927,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
val |= intel_dsi->channel << VID_MODE_CHANNEL_NUMBER_SHIFT;
/* XXX: cross-check bpp vs. pixel format? */
- val |= intel_dsi->pixel_format;
+ val |= pixel_format_to_reg(intel_dsi->pixel_format);
}
tmp = 0;
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index de7be7f3fb42..54f072cd78f1 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -62,8 +62,12 @@ struct intel_dsi {
/* number of DSI lanes */
unsigned int lane_count;
- /* video mode pixel format for MIPI_DSI_FUNC_PRG register */
- u32 pixel_format;
+ /*
+ * video mode pixel format
+ *
+ * XXX: consolidate on .format in struct mipi_dsi_device.
+ */
+ enum mipi_dsi_pixel_format pixel_format;
/* video mode format for MIPI_VIDEO_MODE_FORMAT register */
u32 video_mode_format;
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 3f4b9712bffd..9a963fa3491c 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -392,6 +392,25 @@ static const struct drm_panel_funcs vbt_panel_funcs = {
.get_modes = vbt_panel_get_modes,
};
+/* XXX: This should be done when parsing the VBT in intel_bios.c */
+static enum mipi_dsi_pixel_format pixel_format_from_vbt(u32 fmt)
+{
+ /* It just so happens the VBT matches register contents. */
+ switch (fmt) {
+ case VID_MODE_FORMAT_RGB888:
+ return MIPI_DSI_FMT_RGB888;
+ case VID_MODE_FORMAT_RGB666:
+ return MIPI_DSI_FMT_RGB666;
+ case VID_MODE_FORMAT_RGB666_PACKED:
+ return MIPI_DSI_FMT_RGB666_PACKED;
+ case VID_MODE_FORMAT_RGB565:
+ return MIPI_DSI_FMT_RGB565;
+ default:
+ MISSING_CASE(fmt);
+ return MIPI_DSI_FMT_RGB666;
+ }
+}
+
struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
{
struct drm_device *dev = intel_dsi->base.base.dev;
@@ -400,7 +419,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps;
struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode;
struct vbt_panel *vbt_panel;
- u32 bits_per_pixel = 24;
+ u32 bpp;
u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui;
u32 ui_num, ui_den;
u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt;
@@ -416,15 +435,11 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
intel_dsi->eotp_pkt = mipi_config->eot_pkt_disabled ? 0 : 1;
intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0;
intel_dsi->lane_count = mipi_config->lane_cnt + 1;
- intel_dsi->pixel_format = mipi_config->videomode_color_format << 7;
+ intel_dsi->pixel_format = pixel_format_from_vbt(mipi_config->videomode_color_format << 7);
+ bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
+
intel_dsi->dual_link = mipi_config->dual_link;
intel_dsi->pixel_overlap = mipi_config->pixel_overlap;
-
- if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666_PACKED)
- bits_per_pixel = 18;
- else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565)
- bits_per_pixel = 16;
-
intel_dsi->operation_mode = mipi_config->is_cmd_mode;
intel_dsi->video_mode_format = mipi_config->video_transfer_mode;
intel_dsi->escape_clk_div = mipi_config->byte_clk_sel;
@@ -458,8 +473,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
*/
if (intel_dsi->video_mode_format == VIDEO_MODE_BURST) {
if (mipi_config->target_burst_mode_freq) {
- computed_ddr =
- (pclk * bits_per_pixel) / intel_dsi->lane_count;
+ computed_ddr = (pclk * bpp) / intel_dsi->lane_count;
if (mipi_config->target_burst_mode_freq <
computed_ddr) {
@@ -482,7 +496,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
intel_dsi->burst_mode_ratio = burst_mode_ratio;
intel_dsi->pclk = pclk;
- bitrate = (pclk * bits_per_pixel) / intel_dsi->lane_count;
+ bitrate = (pclk * bpp) / intel_dsi->lane_count;
switch (intel_dsi->escape_clk_div) {
case 0:
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index f70df2b42b23..5991c0520611 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -30,27 +30,6 @@
#include "i915_drv.h"
#include "intel_dsi.h"
-static int dsi_pixel_format_bpp(int pixel_format)
-{
- int bpp;
-
- switch (pixel_format) {
- default:
- case VID_MODE_FORMAT_RGB888:
- case VID_MODE_FORMAT_RGB666:
- bpp = 24;
- break;
- case VID_MODE_FORMAT_RGB666_PACKED:
- bpp = 18;
- break;
- case VID_MODE_FORMAT_RGB565:
- bpp = 16;
- break;
- }
-
- return bpp;
-}
-
struct dsi_mnp {
u32 dsi_pll_ctrl;
u32 dsi_pll_div;
@@ -64,10 +43,11 @@ static const u32 lfsr_converts[] = {
};
/* Get DSI clock from pixel clock */
-static u32 dsi_clk_from_pclk(u32 pclk, int pixel_format, int lane_count)
+static u32 dsi_clk_from_pclk(u32 pclk, enum mipi_dsi_pixel_format fmt,
+ int lane_count)
{
u32 dsi_clk_khz;
- u32 bpp = dsi_pixel_format_bpp(pixel_format);
+ u32 bpp = mipi_dsi_pixel_format_to_bpp(fmt);
/* DSI data rate = pixel clock * bits per pixel / lane count
pixel clock is converted from KHz to Hz */
@@ -232,9 +212,9 @@ static void bxt_disable_dsi_pll(struct intel_encoder *encoder)
DRM_ERROR("Timeout waiting for PLL lock deassertion\n");
}
-static void assert_bpp_mismatch(int pixel_format, int pipe_bpp)
+static void assert_bpp_mismatch(enum mipi_dsi_pixel_format fmt, int pipe_bpp)
{
- int bpp = dsi_pixel_format_bpp(pixel_format);
+ int bpp = mipi_dsi_pixel_format_to_bpp(fmt);
WARN(bpp != pipe_bpp,
"bpp match assertion failure (expected %d, current %d)\n",
--
2.1.4
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* ✗ warning: Fi.CI.BAT
2016-01-14 10:28 [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed Jani Nikula
2016-01-14 10:28 ` [PATCH 2/2] drm/i915/dsi: start using enum mipi_dsi_pixel_format Jani Nikula
@ 2016-01-14 11:49 ` Patchwork
2016-01-14 13:51 ` [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed Mika Kahola
2 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2016-01-14 11:49 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Summary ==
Built on 058740f8fced6851aeda34f366f5330322cd585f drm-intel-nightly: 2016y-01m-13d-17h-07m-44s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
pass -> DMESG-WARN (bdw-ultra)
bdw-ultra total:138 pass:131 dwarn:1 dfail:0 fail:0 skip:6
bsw-nuc-2 total:141 pass:115 dwarn:2 dfail:0 fail:0 skip:24
hsw-brixbox total:141 pass:134 dwarn:0 dfail:0 fail:0 skip:7
hsw-gt2 total:141 pass:137 dwarn:0 dfail:0 fail:0 skip:4
ilk-hp8440p total:141 pass:100 dwarn:4 dfail:0 fail:0 skip:37
ivb-t430s total:135 pass:122 dwarn:3 dfail:4 fail:0 skip:6
skl-i7k-2 total:141 pass:131 dwarn:2 dfail:0 fail:0 skip:8
snb-dellxps total:141 pass:122 dwarn:5 dfail:0 fail:0 skip:14
snb-x220t total:141 pass:122 dwarn:5 dfail:0 fail:1 skip:13
Results at /archive/results/CI_IGT_test/Patchwork_1183/
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed
2016-01-14 10:28 [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed Jani Nikula
2016-01-14 10:28 ` [PATCH 2/2] drm/i915/dsi: start using enum mipi_dsi_pixel_format Jani Nikula
2016-01-14 11:49 ` ✗ warning: Fi.CI.BAT Patchwork
@ 2016-01-14 13:51 ` Mika Kahola
2 siblings, 0 replies; 8+ messages in thread
From: Mika Kahola @ 2016-01-14 13:51 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Thu, 2016-01-14 at 12:28 +0200, Jani Nikula wrote:
> The enum mipi_dsi_pixel_format defines MIPI_DSI_FMT_RGB666 for the
> "loose" 24 bpp format and MIPI_DSI_FMT_RGB666_PACKED for the 18 bpp
> format. We have this the other way round, defining a loose version for
> 24 bpp.
>
> Follow suit with what's in enum mipi_dsi_pixel_format to avoid future
> confusion. Rename
>
> VID_MODE_FORMAT_RGB666 -> VID_MODE_FORMAT_RGB666_PACKED
> VID_MODE_FORMAT_RGB666_LOOSE -> VID_MODE_FORMAT_RGB666
>
Tested-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++--
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 2 +-
> drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
> 3 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 0a988895165f..379c61677334 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7849,8 +7849,8 @@ enum skl_disp_power_wells {
> #define VID_MODE_FORMAT_MASK (0xf << 7)
> #define VID_MODE_NOT_SUPPORTED (0 << 7)
> #define VID_MODE_FORMAT_RGB565 (1 << 7)
> -#define VID_MODE_FORMAT_RGB666 (2 << 7)
> -#define VID_MODE_FORMAT_RGB666_LOOSE (3 << 7)
> +#define VID_MODE_FORMAT_RGB666_PACKED (2 << 7)
> +#define VID_MODE_FORMAT_RGB666 (3 << 7)
> #define VID_MODE_FORMAT_RGB888 (4 << 7)
> #define CMD_MODE_CHANNEL_NUMBER_SHIFT 5
> #define CMD_MODE_CHANNEL_NUMBER_MASK (3 << 5)
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 1d43e6f37fc1..3f4b9712bffd 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -420,7 +420,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
> intel_dsi->dual_link = mipi_config->dual_link;
> intel_dsi->pixel_overlap = mipi_config->pixel_overlap;
>
> - if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666)
> + if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666_PACKED)
> bits_per_pixel = 18;
> else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565)
> bits_per_pixel = 16;
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index bb5e95a1a453..f70df2b42b23 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -37,10 +37,10 @@ static int dsi_pixel_format_bpp(int pixel_format)
> switch (pixel_format) {
> default:
> case VID_MODE_FORMAT_RGB888:
> - case VID_MODE_FORMAT_RGB666_LOOSE:
> + case VID_MODE_FORMAT_RGB666:
> bpp = 24;
> break;
> - case VID_MODE_FORMAT_RGB666:
> + case VID_MODE_FORMAT_RGB666_PACKED:
> bpp = 18;
> break;
> case VID_MODE_FORMAT_RGB565:
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/i915/dsi: start using enum mipi_dsi_pixel_format
2016-01-14 10:28 ` [PATCH 2/2] drm/i915/dsi: start using enum mipi_dsi_pixel_format Jani Nikula
@ 2016-01-14 13:52 ` Mika Kahola
0 siblings, 0 replies; 8+ messages in thread
From: Mika Kahola @ 2016-01-14 13:52 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Thu, 2016-01-14 at 12:28 +0200, Jani Nikula wrote:
> A small step moving us closer to DRM MIPI DSI code. Use enum
> mipi_dsi_pixel_format instead of our own. The first benefit is being
> able to use common mipi_dsi_pixel_format_to_bpp().
>
> There's a little back and forth conversion with the VBT -> enum ->
> register, since we have just shoved the VBT value into the register
> directly. Longer term, all the VBT parsing and deciphering should be
> done in intel_bios.c, and abstracted there.
>
Tested-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi.c | 19 +++++++++++++++-
> drivers/gpu/drm/i915/intel_dsi.h | 8 +++++--
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 36 +++++++++++++++++++++---------
> drivers/gpu/drm/i915/intel_dsi_pll.c | 30 +++++--------------------
> 4 files changed, 54 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 91cef3525c93..83f18791c009 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -840,6 +840,23 @@ static void set_dsi_timings(struct drm_encoder *encoder,
> }
> }
>
> +static u32 pixel_format_to_reg(enum mipi_dsi_pixel_format fmt)
> +{
> + switch (fmt) {
> + case MIPI_DSI_FMT_RGB888:
> + return VID_MODE_FORMAT_RGB888;
> + case MIPI_DSI_FMT_RGB666:
> + return VID_MODE_FORMAT_RGB666;
> + case MIPI_DSI_FMT_RGB666_PACKED:
> + return VID_MODE_FORMAT_RGB666_PACKED;
> + case MIPI_DSI_FMT_RGB565:
> + return VID_MODE_FORMAT_RGB565;
> + default:
> + MISSING_CASE(fmt);
> + return VID_MODE_FORMAT_RGB666;
> + }
> +}
> +
> static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
> {
> struct drm_encoder *encoder = &intel_encoder->base;
> @@ -910,7 +927,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
> val |= intel_dsi->channel << VID_MODE_CHANNEL_NUMBER_SHIFT;
>
> /* XXX: cross-check bpp vs. pixel format? */
> - val |= intel_dsi->pixel_format;
> + val |= pixel_format_to_reg(intel_dsi->pixel_format);
> }
>
> tmp = 0;
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index de7be7f3fb42..54f072cd78f1 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -62,8 +62,12 @@ struct intel_dsi {
> /* number of DSI lanes */
> unsigned int lane_count;
>
> - /* video mode pixel format for MIPI_DSI_FUNC_PRG register */
> - u32 pixel_format;
> + /*
> + * video mode pixel format
> + *
> + * XXX: consolidate on .format in struct mipi_dsi_device.
> + */
> + enum mipi_dsi_pixel_format pixel_format;
>
> /* video mode format for MIPI_VIDEO_MODE_FORMAT register */
> u32 video_mode_format;
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 3f4b9712bffd..9a963fa3491c 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -392,6 +392,25 @@ static const struct drm_panel_funcs vbt_panel_funcs = {
> .get_modes = vbt_panel_get_modes,
> };
>
> +/* XXX: This should be done when parsing the VBT in intel_bios.c */
> +static enum mipi_dsi_pixel_format pixel_format_from_vbt(u32 fmt)
> +{
> + /* It just so happens the VBT matches register contents. */
> + switch (fmt) {
> + case VID_MODE_FORMAT_RGB888:
> + return MIPI_DSI_FMT_RGB888;
> + case VID_MODE_FORMAT_RGB666:
> + return MIPI_DSI_FMT_RGB666;
> + case VID_MODE_FORMAT_RGB666_PACKED:
> + return MIPI_DSI_FMT_RGB666_PACKED;
> + case VID_MODE_FORMAT_RGB565:
> + return MIPI_DSI_FMT_RGB565;
> + default:
> + MISSING_CASE(fmt);
> + return MIPI_DSI_FMT_RGB666;
> + }
> +}
> +
> struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
> {
> struct drm_device *dev = intel_dsi->base.base.dev;
> @@ -400,7 +419,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
> struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps;
> struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode;
> struct vbt_panel *vbt_panel;
> - u32 bits_per_pixel = 24;
> + u32 bpp;
> u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui;
> u32 ui_num, ui_den;
> u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt;
> @@ -416,15 +435,11 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
> intel_dsi->eotp_pkt = mipi_config->eot_pkt_disabled ? 0 : 1;
> intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0;
> intel_dsi->lane_count = mipi_config->lane_cnt + 1;
> - intel_dsi->pixel_format = mipi_config->videomode_color_format << 7;
> + intel_dsi->pixel_format = pixel_format_from_vbt(mipi_config->videomode_color_format << 7);
> + bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
> +
> intel_dsi->dual_link = mipi_config->dual_link;
> intel_dsi->pixel_overlap = mipi_config->pixel_overlap;
> -
> - if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666_PACKED)
> - bits_per_pixel = 18;
> - else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565)
> - bits_per_pixel = 16;
> -
> intel_dsi->operation_mode = mipi_config->is_cmd_mode;
> intel_dsi->video_mode_format = mipi_config->video_transfer_mode;
> intel_dsi->escape_clk_div = mipi_config->byte_clk_sel;
> @@ -458,8 +473,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
> */
> if (intel_dsi->video_mode_format == VIDEO_MODE_BURST) {
> if (mipi_config->target_burst_mode_freq) {
> - computed_ddr =
> - (pclk * bits_per_pixel) / intel_dsi->lane_count;
> + computed_ddr = (pclk * bpp) / intel_dsi->lane_count;
>
> if (mipi_config->target_burst_mode_freq <
> computed_ddr) {
> @@ -482,7 +496,7 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
> intel_dsi->burst_mode_ratio = burst_mode_ratio;
> intel_dsi->pclk = pclk;
>
> - bitrate = (pclk * bits_per_pixel) / intel_dsi->lane_count;
> + bitrate = (pclk * bpp) / intel_dsi->lane_count;
>
> switch (intel_dsi->escape_clk_div) {
> case 0:
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index f70df2b42b23..5991c0520611 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -30,27 +30,6 @@
> #include "i915_drv.h"
> #include "intel_dsi.h"
>
> -static int dsi_pixel_format_bpp(int pixel_format)
> -{
> - int bpp;
> -
> - switch (pixel_format) {
> - default:
> - case VID_MODE_FORMAT_RGB888:
> - case VID_MODE_FORMAT_RGB666:
> - bpp = 24;
> - break;
> - case VID_MODE_FORMAT_RGB666_PACKED:
> - bpp = 18;
> - break;
> - case VID_MODE_FORMAT_RGB565:
> - bpp = 16;
> - break;
> - }
> -
> - return bpp;
> -}
> -
> struct dsi_mnp {
> u32 dsi_pll_ctrl;
> u32 dsi_pll_div;
> @@ -64,10 +43,11 @@ static const u32 lfsr_converts[] = {
> };
>
> /* Get DSI clock from pixel clock */
> -static u32 dsi_clk_from_pclk(u32 pclk, int pixel_format, int lane_count)
> +static u32 dsi_clk_from_pclk(u32 pclk, enum mipi_dsi_pixel_format fmt,
> + int lane_count)
> {
> u32 dsi_clk_khz;
> - u32 bpp = dsi_pixel_format_bpp(pixel_format);
> + u32 bpp = mipi_dsi_pixel_format_to_bpp(fmt);
>
> /* DSI data rate = pixel clock * bits per pixel / lane count
> pixel clock is converted from KHz to Hz */
> @@ -232,9 +212,9 @@ static void bxt_disable_dsi_pll(struct intel_encoder *encoder)
> DRM_ERROR("Timeout waiting for PLL lock deassertion\n");
> }
>
> -static void assert_bpp_mismatch(int pixel_format, int pipe_bpp)
> +static void assert_bpp_mismatch(enum mipi_dsi_pixel_format fmt, int pipe_bpp)
> {
> - int bpp = dsi_pixel_format_bpp(pixel_format);
> + int bpp = mipi_dsi_pixel_format_to_bpp(fmt);
>
> WARN(bpp != pipe_bpp,
> "bpp match assertion failure (expected %d, current %d)\n",
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed
2016-03-16 14:18 ` Ville Syrjälä
@ 2016-03-16 15:58 ` Jani Nikula
0 siblings, 0 replies; 8+ messages in thread
From: Jani Nikula @ 2016-03-16 15:58 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Wed, 16 Mar 2016, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> [ text/plain ]
> On Wed, Mar 16, 2016 at 12:21:39PM +0200, Jani Nikula wrote:
>> The enum mipi_dsi_pixel_format defines MIPI_DSI_FMT_RGB666 for the
>> "loose" 24 bpp format and MIPI_DSI_FMT_RGB666_PACKED for the 18 bpp
>> format. We have this the other way round, defining a loose version for
>> 24 bpp.
>>
>> Follow suit with what's in enum mipi_dsi_pixel_format to avoid future
>> confusion. Rename
>>
>> VID_MODE_FORMAT_RGB666 -> VID_MODE_FORMAT_RGB666_PACKED
>> VID_MODE_FORMAT_RGB666_LOOSE -> VID_MODE_FORMAT_RGB666
>
> This goes against our spec a bit, and the DSI spec calls these
> "packed" and "loosly packed". So I'm not entirely thrilled about the
> names used in the mipi_dsi_pixel_format either. I think the best
> option would be to call them something like 666_18 and 666_24 to
> avoid all the confusion.
Agreed, but for now I think conforming to mipi_dsi_pixel_format is the
least bad option.
> But patch looks sane anyway so
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Thanks, both pushed to drm-intel-next-queued.
BR,
Jani.
>
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_reg.h | 4 ++--
>> drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 7dfc4007f3fa..85ceec611412 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -7887,8 +7887,8 @@ enum skl_disp_power_wells {
>> #define VID_MODE_FORMAT_MASK (0xf << 7)
>> #define VID_MODE_NOT_SUPPORTED (0 << 7)
>> #define VID_MODE_FORMAT_RGB565 (1 << 7)
>> -#define VID_MODE_FORMAT_RGB666 (2 << 7)
>> -#define VID_MODE_FORMAT_RGB666_LOOSE (3 << 7)
>> +#define VID_MODE_FORMAT_RGB666_PACKED (2 << 7)
>> +#define VID_MODE_FORMAT_RGB666 (3 << 7)
>> #define VID_MODE_FORMAT_RGB888 (4 << 7)
>> #define CMD_MODE_CHANNEL_NUMBER_SHIFT 5
>> #define CMD_MODE_CHANNEL_NUMBER_MASK (3 << 5)
>> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
>> index 2451c84949bd..9ef0f7806e4a 100644
>> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
>> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
>> @@ -37,10 +37,10 @@ int dsi_pixel_format_bpp(int pixel_format)
>> switch (pixel_format) {
>> default:
>> case VID_MODE_FORMAT_RGB888:
>> - case VID_MODE_FORMAT_RGB666_LOOSE:
>> + case VID_MODE_FORMAT_RGB666:
>> bpp = 24;
>> break;
>> - case VID_MODE_FORMAT_RGB666:
>> + case VID_MODE_FORMAT_RGB666_PACKED:
>> bpp = 18;
>> break;
>> case VID_MODE_FORMAT_RGB565:
>> --
>> 2.1.4
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed
2016-03-16 10:21 Jani Nikula
@ 2016-03-16 14:18 ` Ville Syrjälä
2016-03-16 15:58 ` Jani Nikula
0 siblings, 1 reply; 8+ messages in thread
From: Ville Syrjälä @ 2016-03-16 14:18 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Wed, Mar 16, 2016 at 12:21:39PM +0200, Jani Nikula wrote:
> The enum mipi_dsi_pixel_format defines MIPI_DSI_FMT_RGB666 for the
> "loose" 24 bpp format and MIPI_DSI_FMT_RGB666_PACKED for the 18 bpp
> format. We have this the other way round, defining a loose version for
> 24 bpp.
>
> Follow suit with what's in enum mipi_dsi_pixel_format to avoid future
> confusion. Rename
>
> VID_MODE_FORMAT_RGB666 -> VID_MODE_FORMAT_RGB666_PACKED
> VID_MODE_FORMAT_RGB666_LOOSE -> VID_MODE_FORMAT_RGB666
This goes against our spec a bit, and the DSI spec calls these
"packed" and "loosly packed". So I'm not entirely thrilled about the
names used in the mipi_dsi_pixel_format either. I think the best
option would be to call them something like 666_18 and 666_24 to
avoid all the confusion.
But patch looks sane anyway so
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++--
> drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 7dfc4007f3fa..85ceec611412 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7887,8 +7887,8 @@ enum skl_disp_power_wells {
> #define VID_MODE_FORMAT_MASK (0xf << 7)
> #define VID_MODE_NOT_SUPPORTED (0 << 7)
> #define VID_MODE_FORMAT_RGB565 (1 << 7)
> -#define VID_MODE_FORMAT_RGB666 (2 << 7)
> -#define VID_MODE_FORMAT_RGB666_LOOSE (3 << 7)
> +#define VID_MODE_FORMAT_RGB666_PACKED (2 << 7)
> +#define VID_MODE_FORMAT_RGB666 (3 << 7)
> #define VID_MODE_FORMAT_RGB888 (4 << 7)
> #define CMD_MODE_CHANNEL_NUMBER_SHIFT 5
> #define CMD_MODE_CHANNEL_NUMBER_MASK (3 << 5)
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 2451c84949bd..9ef0f7806e4a 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -37,10 +37,10 @@ int dsi_pixel_format_bpp(int pixel_format)
> switch (pixel_format) {
> default:
> case VID_MODE_FORMAT_RGB888:
> - case VID_MODE_FORMAT_RGB666_LOOSE:
> + case VID_MODE_FORMAT_RGB666:
> bpp = 24;
> break;
> - case VID_MODE_FORMAT_RGB666:
> + case VID_MODE_FORMAT_RGB666_PACKED:
> bpp = 18;
> break;
> case VID_MODE_FORMAT_RGB565:
> --
> 2.1.4
--
Ville Syrjälä
Intel OTC
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed
@ 2016-03-16 10:21 Jani Nikula
2016-03-16 14:18 ` Ville Syrjälä
0 siblings, 1 reply; 8+ messages in thread
From: Jani Nikula @ 2016-03-16 10:21 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
The enum mipi_dsi_pixel_format defines MIPI_DSI_FMT_RGB666 for the
"loose" 24 bpp format and MIPI_DSI_FMT_RGB666_PACKED for the 18 bpp
format. We have this the other way round, defining a loose version for
24 bpp.
Follow suit with what's in enum mipi_dsi_pixel_format to avoid future
confusion. Rename
VID_MODE_FORMAT_RGB666 -> VID_MODE_FORMAT_RGB666_PACKED
VID_MODE_FORMAT_RGB666_LOOSE -> VID_MODE_FORMAT_RGB666
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7dfc4007f3fa..85ceec611412 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7887,8 +7887,8 @@ enum skl_disp_power_wells {
#define VID_MODE_FORMAT_MASK (0xf << 7)
#define VID_MODE_NOT_SUPPORTED (0 << 7)
#define VID_MODE_FORMAT_RGB565 (1 << 7)
-#define VID_MODE_FORMAT_RGB666 (2 << 7)
-#define VID_MODE_FORMAT_RGB666_LOOSE (3 << 7)
+#define VID_MODE_FORMAT_RGB666_PACKED (2 << 7)
+#define VID_MODE_FORMAT_RGB666 (3 << 7)
#define VID_MODE_FORMAT_RGB888 (4 << 7)
#define CMD_MODE_CHANNEL_NUMBER_SHIFT 5
#define CMD_MODE_CHANNEL_NUMBER_MASK (3 << 5)
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index 2451c84949bd..9ef0f7806e4a 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -37,10 +37,10 @@ int dsi_pixel_format_bpp(int pixel_format)
switch (pixel_format) {
default:
case VID_MODE_FORMAT_RGB888:
- case VID_MODE_FORMAT_RGB666_LOOSE:
+ case VID_MODE_FORMAT_RGB666:
bpp = 24;
break;
- case VID_MODE_FORMAT_RGB666:
+ case VID_MODE_FORMAT_RGB666_PACKED:
bpp = 18;
break;
case VID_MODE_FORMAT_RGB565:
--
2.1.4
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^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2016-03-16 15:58 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-01-14 10:28 [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed Jani Nikula
2016-01-14 10:28 ` [PATCH 2/2] drm/i915/dsi: start using enum mipi_dsi_pixel_format Jani Nikula
2016-01-14 13:52 ` Mika Kahola
2016-01-14 11:49 ` ✗ warning: Fi.CI.BAT Patchwork
2016-01-14 13:51 ` [PATCH 1/2] drm/i915/dsi: lose the loose 666 format name in favor of packed Mika Kahola
2016-03-16 10:21 Jani Nikula
2016-03-16 14:18 ` Ville Syrjälä
2016-03-16 15:58 ` Jani Nikula
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