* [PATCH 1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments
@ 2016-01-18 7:19 Jani Nikula
2016-01-18 7:19 ` [PATCH 2/3] drm/i915: turn some " Jani Nikula
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Jani Nikula @ 2016-01-18 7:19 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
The comments were never proper kernel-doc, but with SDVO it's not worth
the trouble to make them kernel-doc. Just turn them into normal
comments.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_sdvo_regs.h | 76 +++++++++++++++++-----------------
1 file changed, 38 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h
index 2e2d4eb4a00d..db0ed499268a 100644
--- a/drivers/gpu/drm/i915/intel_sdvo_regs.h
+++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h
@@ -24,8 +24,8 @@
* Eric Anholt <eric@anholt.net>
*/
-/**
- * @file SDVO command definitions and structures.
+/*
+ * SDVO command definitions and structures.
*/
#define SDVO_OUTPUT_FIRST (0)
@@ -66,39 +66,39 @@ struct intel_sdvo_caps {
#define DTD_FLAG_VSYNC_POSITIVE (1 << 2)
#define DTD_FLAG_INTERLACE (1 << 7)
-/** This matches the EDID DTD structure, more or less */
+/* This matches the EDID DTD structure, more or less */
struct intel_sdvo_dtd {
struct {
- u16 clock; /**< pixel clock, in 10kHz units */
- u8 h_active; /**< lower 8 bits (pixels) */
- u8 h_blank; /**< lower 8 bits (pixels) */
- u8 h_high; /**< upper 4 bits each h_active, h_blank */
- u8 v_active; /**< lower 8 bits (lines) */
- u8 v_blank; /**< lower 8 bits (lines) */
- u8 v_high; /**< upper 4 bits each v_active, v_blank */
+ u16 clock; /* pixel clock, in 10kHz units */
+ u8 h_active; /* lower 8 bits (pixels) */
+ u8 h_blank; /* lower 8 bits (pixels) */
+ u8 h_high; /* upper 4 bits each h_active, h_blank */
+ u8 v_active; /* lower 8 bits (lines) */
+ u8 v_blank; /* lower 8 bits (lines) */
+ u8 v_high; /* upper 4 bits each v_active, v_blank */
} part1;
struct {
- u8 h_sync_off; /**< lower 8 bits, from hblank start */
- u8 h_sync_width; /**< lower 8 bits (pixels) */
- /** lower 4 bits each vsync offset, vsync width */
+ u8 h_sync_off; /* lower 8 bits, from hblank start */
+ u8 h_sync_width; /* lower 8 bits (pixels) */
+ /* lower 4 bits each vsync offset, vsync width */
u8 v_sync_off_width;
- /**
+ /*
* 2 high bits of hsync offset, 2 high bits of hsync width,
* bits 4-5 of vsync offset, and 2 high bits of vsync width.
*/
u8 sync_off_width_high;
u8 dtd_flags;
u8 sdvo_flags;
- /** bits 6-7 of vsync offset at bits 6-7 */
+ /* bits 6-7 of vsync offset at bits 6-7 */
u8 v_sync_off_high;
u8 reserved;
} part2;
} __packed;
struct intel_sdvo_pixel_clock_range {
- u16 min; /**< pixel clock, in 10kHz units */
- u16 max; /**< pixel clock, in 10kHz units */
+ u16 min; /* pixel clock, in 10kHz units */
+ u16 max; /* pixel clock, in 10kHz units */
} __packed;
struct intel_sdvo_preferred_input_timing_args {
@@ -144,7 +144,7 @@ struct intel_sdvo_preferred_input_timing_args {
#define SDVO_CMD_RESET 0x01
-/** Returns a struct intel_sdvo_caps */
+/* Returns a struct intel_sdvo_caps */
#define SDVO_CMD_GET_DEVICE_CAPS 0x02
#define SDVO_CMD_GET_FIRMWARE_REV 0x86
@@ -152,7 +152,7 @@ struct intel_sdvo_preferred_input_timing_args {
# define SDVO_DEVICE_FIRMWARE_MAJOR SDVO_I2C_RETURN_1
# define SDVO_DEVICE_FIRMWARE_PATCH SDVO_I2C_RETURN_2
-/**
+/*
* Reports which inputs are trained (managed to sync).
*
* Devices must have trained within 2 vsyncs of a mode change.
@@ -164,10 +164,10 @@ struct intel_sdvo_get_trained_inputs_response {
unsigned int pad:6;
} __packed;
-/** Returns a struct intel_sdvo_output_flags of active outputs. */
+/* Returns a struct intel_sdvo_output_flags of active outputs. */
#define SDVO_CMD_GET_ACTIVE_OUTPUTS 0x04
-/**
+/*
* Sets the current set of active outputs.
*
* Takes a struct intel_sdvo_output_flags. Must be preceded by a SET_IN_OUT_MAP
@@ -175,7 +175,7 @@ struct intel_sdvo_get_trained_inputs_response {
*/
#define SDVO_CMD_SET_ACTIVE_OUTPUTS 0x05
-/**
+/*
* Returns the current mapping of SDVO inputs to outputs on the device.
*
* Returns two struct intel_sdvo_output_flags structures.
@@ -185,29 +185,29 @@ struct intel_sdvo_in_out_map {
u16 in0, in1;
};
-/**
+/*
* Sets the current mapping of SDVO inputs to outputs on the device.
*
* Takes two struct i380_sdvo_output_flags structures.
*/
#define SDVO_CMD_SET_IN_OUT_MAP 0x07
-/**
+/*
* Returns a struct intel_sdvo_output_flags of attached displays.
*/
#define SDVO_CMD_GET_ATTACHED_DISPLAYS 0x0b
-/**
+/*
* Returns a struct intel_sdvo_ouptut_flags of displays supporting hot plugging.
*/
#define SDVO_CMD_GET_HOT_PLUG_SUPPORT 0x0c
-/**
+/*
* Takes a struct intel_sdvo_output_flags.
*/
#define SDVO_CMD_SET_ACTIVE_HOT_PLUG 0x0d
-/**
+/*
* Returns a struct intel_sdvo_output_flags of displays with hot plug
* interrupts enabled.
*/
@@ -221,7 +221,7 @@ struct intel_sdvo_get_interrupt_event_source_response {
unsigned int pad:6;
} __packed;
-/**
+/*
* Selects which input is affected by future input commands.
*
* Commands affected include SET_INPUT_TIMINGS_PART[12],
@@ -234,7 +234,7 @@ struct intel_sdvo_set_target_input_args {
unsigned int pad:7;
} __packed;
-/**
+/*
* Takes a struct intel_sdvo_output_flags of which outputs are targeted by
* future output commands.
*
@@ -280,7 +280,7 @@ struct intel_sdvo_set_target_input_args {
# define SDVO_DTD_SDVO_FLAG_SCALING_SMOOTH (2 << 4)
# define SDVO_DTD_VSYNC_OFF_HIGH SDVO_I2C_ARG_6
-/**
+/*
* Generates a DTD based on the given width, height, and flags.
*
* This will be supported by any device supporting scaling or interlaced
@@ -300,24 +300,24 @@ struct intel_sdvo_set_target_input_args {
#define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1 0x1b
#define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2 0x1c
-/** Returns a struct intel_sdvo_pixel_clock_range */
+/* Returns a struct intel_sdvo_pixel_clock_range */
#define SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE 0x1d
-/** Returns a struct intel_sdvo_pixel_clock_range */
+/* Returns a struct intel_sdvo_pixel_clock_range */
#define SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE 0x1e
-/** Returns a byte bitfield containing SDVO_CLOCK_RATE_MULT_* flags */
+/* Returns a byte bitfield containing SDVO_CLOCK_RATE_MULT_* flags */
#define SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS 0x1f
-/** Returns a byte containing a SDVO_CLOCK_RATE_MULT_* flag */
+/* Returns a byte containing a SDVO_CLOCK_RATE_MULT_* flag */
#define SDVO_CMD_GET_CLOCK_RATE_MULT 0x20
-/** Takes a byte containing a SDVO_CLOCK_RATE_MULT_* flag */
+/* Takes a byte containing a SDVO_CLOCK_RATE_MULT_* flag */
#define SDVO_CMD_SET_CLOCK_RATE_MULT 0x21
# define SDVO_CLOCK_RATE_MULT_1X (1 << 0)
# define SDVO_CLOCK_RATE_MULT_2X (1 << 1)
# define SDVO_CLOCK_RATE_MULT_4X (1 << 3)
#define SDVO_CMD_GET_SUPPORTED_TV_FORMATS 0x27
-/** 6 bytes of bit flags for TV formats shared by all TV format functions */
+/* 6 bytes of bit flags for TV formats shared by all TV format functions */
struct intel_sdvo_tv_format {
unsigned int ntsc_m:1;
unsigned int ntsc_j:1;
@@ -376,7 +376,7 @@ struct intel_sdvo_tv_format {
#define SDVO_CMD_SET_TV_FORMAT 0x29
-/** Returns the resolutiosn that can be used with the given TV format */
+/* Returns the resolutiosn that can be used with the given TV format */
#define SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT 0x83
struct intel_sdvo_sdtv_resolution_request {
unsigned int ntsc_m:1;
@@ -539,7 +539,7 @@ struct intel_sdvo_hdtv_resolution_reply {
#define SDVO_CMD_GET_MAX_PANEL_POWER_SEQUENCING 0x2d
#define SDVO_CMD_GET_PANEL_POWER_SEQUENCING 0x2e
#define SDVO_CMD_SET_PANEL_POWER_SEQUENCING 0x2f
-/**
+/*
* The panel power sequencing parameters are in units of milliseconds.
* The high fields are bits 8:9 of the 10-bit values.
*/
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] drm/i915: turn some bogus kernel-doc comments to normal comments
2016-01-18 7:19 [PATCH 1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments Jani Nikula
@ 2016-01-18 7:19 ` Jani Nikula
2016-01-18 7:19 ` [PATCH 3/3] drm/i915: add DOC: headline to RC6 kernel-doc Jani Nikula
2016-01-18 7:49 ` ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments Patchwork
2 siblings, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2016-01-18 7:19 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Apparently accidental or misplaced /** kernel-doc comments, confusing
the tool. Turn them to normal comments.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6b2b3e331a09..7e6e70054d6a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4138,7 +4138,7 @@ void intel_update_watermarks(struct drm_crtc *crtc)
dev_priv->display.update_wm(crtc);
}
-/**
+/*
* Lock protecting IPS related data structures
*/
DEFINE_SPINLOCK(mchdev_lock);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 7349d9258191..2bd9db305227 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -407,7 +407,7 @@ intel_write_status_page(struct intel_engine_cs *ring,
ring->status_page.page_addr[reg] = value;
}
-/**
+/*
* Reads a dword out of the status page, which is written to from the command
* queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
* MI_STORE_DATA_IMM.
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] drm/i915: add DOC: headline to RC6 kernel-doc
2016-01-18 7:19 [PATCH 1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments Jani Nikula
2016-01-18 7:19 ` [PATCH 2/3] drm/i915: turn some " Jani Nikula
@ 2016-01-18 7:19 ` Jani Nikula
2016-01-19 20:09 ` Daniel Vetter
2016-01-18 7:49 ` ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments Patchwork
2 siblings, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2016-01-18 7:19 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Without the DOC:, kernel-doc confuses the documentation block for
something else.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7e6e70054d6a..180555553fa2 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -32,6 +32,8 @@
#include <linux/module.h>
/**
+ * DOC: RC6
+ *
* RC6 is a special power stage which allows the GPU to enter an very
* low-voltage mode when idle, using down to 0V while at this stage. This
* stage is entered automatically when the GPU is idle when RC6 support is
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments
2016-01-18 7:19 [PATCH 1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments Jani Nikula
2016-01-18 7:19 ` [PATCH 2/3] drm/i915: turn some " Jani Nikula
2016-01-18 7:19 ` [PATCH 3/3] drm/i915: add DOC: headline to RC6 kernel-doc Jani Nikula
@ 2016-01-18 7:49 ` Patchwork
2016-01-19 20:10 ` Daniel Vetter
2 siblings, 1 reply; 7+ messages in thread
From: Patchwork @ 2016-01-18 7:49 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Summary ==
Built on 9fe57aed43d1c3c9af66aae16ec511dd0357e13b drm-intel-nightly: 2016y-01m-18d-06h-56m-50s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
dmesg-warn -> PASS (skl-i7k-2) UNSTABLE
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-b-frame-sequence:
dmesg-warn -> PASS (bdw-ultra)
Subgroup read-crc-pipe-a-frame-sequence:
pass -> DMESG-WARN (byt-nuc)
bdw-nuci7 total:140 pass:131 dwarn:0 dfail:0 fail:0 skip:9
bdw-ultra total:140 pass:133 dwarn:0 dfail:1 fail:0 skip:6
byt-nuc total:143 pass:124 dwarn:4 dfail:0 fail:0 skip:15
hsw-brixbox total:143 pass:136 dwarn:0 dfail:0 fail:0 skip:7
hsw-gt2 total:143 pass:139 dwarn:0 dfail:0 fail:0 skip:4
ilk-hp8440p total:143 pass:102 dwarn:3 dfail:0 fail:0 skip:38
ivb-t430s total:137 pass:124 dwarn:3 dfail:4 fail:0 skip:6
skl-i5k-2 total:143 pass:134 dwarn:1 dfail:0 fail:0 skip:8
skl-i7k-2 total:143 pass:134 dwarn:1 dfail:0 fail:0 skip:8
snb-dellxps total:143 pass:124 dwarn:5 dfail:0 fail:0 skip:14
snb-x220t total:143 pass:124 dwarn:5 dfail:0 fail:1 skip:13
Results at /archive/results/CI_IGT_test/Patchwork_1206/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] drm/i915: add DOC: headline to RC6 kernel-doc
2016-01-18 7:19 ` [PATCH 3/3] drm/i915: add DOC: headline to RC6 kernel-doc Jani Nikula
@ 2016-01-19 20:09 ` Daniel Vetter
2016-01-20 9:38 ` Jani Nikula
0 siblings, 1 reply; 7+ messages in thread
From: Daniel Vetter @ 2016-01-19 20:09 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Mon, Jan 18, 2016 at 09:19:48AM +0200, Jani Nikula wrote:
> Without the DOC:, kernel-doc confuses the documentation block for
> something else.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Hm, we don't pull intel_pm.c into the gpu.tmpl at all, which means
kernel-CI won't test this for us. Care to throw a generic "PM stuff"
section in there for this? Otherwise the DOC: section here is a bit
pointless. Anyway for the series:
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 7e6e70054d6a..180555553fa2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -32,6 +32,8 @@
> #include <linux/module.h>
>
> /**
> + * DOC: RC6
> + *
> * RC6 is a special power stage which allows the GPU to enter an very
> * low-voltage mode when idle, using down to 0V while at this stage. This
> * stage is entered automatically when the GPU is idle when RC6 support is
> --
> 2.1.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments
2016-01-18 7:49 ` ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments Patchwork
@ 2016-01-19 20:10 ` Daniel Vetter
0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2016-01-19 20:10 UTC (permalink / raw)
To: Patchwork; +Cc: Jani Nikula, intel-gfx
On Mon, Jan 18, 2016 at 07:49:49AM -0000, Patchwork wrote:
> == Summary ==
>
> Built on 9fe57aed43d1c3c9af66aae16ec511dd0357e13b drm-intel-nightly: 2016y-01m-18d-06h-56m-50s UTC integration manifest
>
> Test gem_storedw_loop:
> Subgroup basic-render:
> dmesg-warn -> PASS (skl-i7k-2) UNSTABLE
> Test kms_pipe_crc_basic:
> Subgroup nonblocking-crc-pipe-b-frame-sequence:
> dmesg-warn -> PASS (bdw-ultra)
> Subgroup read-crc-pipe-a-frame-sequence:
> pass -> DMESG-WARN (byt-nuc)
This is the infamous "GT register access ..." noise on byt:
https://bugs.freedesktop.org/show_bug.cgi?id=93121
And since I'm fed up with dealing with that noise for as long as CI now
exists, I've sent out the patch to shut it up. Please r-b for me ;-)
Cheers, Daniel
>
> bdw-nuci7 total:140 pass:131 dwarn:0 dfail:0 fail:0 skip:9
> bdw-ultra total:140 pass:133 dwarn:0 dfail:1 fail:0 skip:6
> byt-nuc total:143 pass:124 dwarn:4 dfail:0 fail:0 skip:15
> hsw-brixbox total:143 pass:136 dwarn:0 dfail:0 fail:0 skip:7
> hsw-gt2 total:143 pass:139 dwarn:0 dfail:0 fail:0 skip:4
> ilk-hp8440p total:143 pass:102 dwarn:3 dfail:0 fail:0 skip:38
> ivb-t430s total:137 pass:124 dwarn:3 dfail:4 fail:0 skip:6
> skl-i5k-2 total:143 pass:134 dwarn:1 dfail:0 fail:0 skip:8
> skl-i7k-2 total:143 pass:134 dwarn:1 dfail:0 fail:0 skip:8
> snb-dellxps total:143 pass:124 dwarn:5 dfail:0 fail:0 skip:14
> snb-x220t total:143 pass:124 dwarn:5 dfail:0 fail:1 skip:13
>
> Results at /archive/results/CI_IGT_test/Patchwork_1206/
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] drm/i915: add DOC: headline to RC6 kernel-doc
2016-01-19 20:09 ` Daniel Vetter
@ 2016-01-20 9:38 ` Jani Nikula
0 siblings, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2016-01-20 9:38 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx
On Tue, 19 Jan 2016, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Mon, Jan 18, 2016 at 09:19:48AM +0200, Jani Nikula wrote:
>> Without the DOC:, kernel-doc confuses the documentation block for
>> something else.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Hm, we don't pull intel_pm.c into the gpu.tmpl at all, which means
> kernel-CI won't test this for us. Care to throw a generic "PM stuff"
> section in there for this? Otherwise the DOC: section here is a bit
> pointless.
Will do.
> Anyway for the series:
>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Thanks, pushed the lot.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/intel_pm.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 7e6e70054d6a..180555553fa2 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -32,6 +32,8 @@
>> #include <linux/module.h>
>>
>> /**
>> + * DOC: RC6
>> + *
>> * RC6 is a special power stage which allows the GPU to enter an very
>> * low-voltage mode when idle, using down to 0V while at this stage. This
>> * stage is entered automatically when the GPU is idle when RC6 support is
>> --
>> 2.1.4
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2016-01-20 9:38 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2016-01-18 7:19 [PATCH 1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments Jani Nikula
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2016-01-18 7:19 ` [PATCH 3/3] drm/i915: add DOC: headline to RC6 kernel-doc Jani Nikula
2016-01-19 20:09 ` Daniel Vetter
2016-01-20 9:38 ` Jani Nikula
2016-01-18 7:49 ` ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915/sdvo: revert bogus kernel-doc comments to normal comments Patchwork
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