* [RFC 0/9] Allow modifications of specific clocks via DT and more
@ 2016-01-19 14:51 ` kernel
0 siblings, 0 replies; 27+ messages in thread
From: kernel-TqfNSX0MhmxHKSADF0wUEw @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-clk-u79uwXL29TY76Z2rM5mHXA
Cc: Martin Sperl
From: Martin Sperl <kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
This patch series (which requires the patch-series-v4 of
"clk: bcm2835: add clocks and add MASH support") allows to configure
specific aspects (mostly with regards to clock selection) of individual
clocks to get configured via the device-tree.
Also - for debug purposes - a patch has been added that exposes the
raw clock registers read-only via debugfs.
Martin Sperl (9):
clk: bcm2835: add basic device tree support for per clock settings
clk: bcm2835: add support for parent selection in DT
clk: bcm2835: add ability to control mash level via device-tree
clk: bcm2835: reorganize bcm2835_clock_determine_rate
clk: bcm2835: prefer clocks that use integer dividers
clk: bcm2835: allow to define a minimum fractional divider in DT
clk: bcm2835: allow clock choosing mechanims to be selected in DT
dt-bindings: bcm2835: document optional per clock dt-nodes
clk: bcm2835: expose raw clock-registers via debugfs
.../bindings/clock/brcm,bcm2835-cprman.txt | 33 ++
drivers/clk/bcm/clk-bcm2835.c | 508 ++++++++++++++++++--
include/dt-bindings/clock/bcm2835.h | 15 +
3 files changed, 512 insertions(+), 44 deletions(-)
--
1.7.10.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 27+ messages in thread
* [RFC 0/9] Allow modifications of specific clocks via DT and more
@ 2016-01-19 14:51 ` kernel
0 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
This patch series (which requires the patch-series-v4 of
"clk: bcm2835: add clocks and add MASH support") allows to configure
specific aspects (mostly with regards to clock selection) of individual
clocks to get configured via the device-tree.
Also - for debug purposes - a patch has been added that exposes the
raw clock registers read-only via debugfs.
Martin Sperl (9):
clk: bcm2835: add basic device tree support for per clock settings
clk: bcm2835: add support for parent selection in DT
clk: bcm2835: add ability to control mash level via device-tree
clk: bcm2835: reorganize bcm2835_clock_determine_rate
clk: bcm2835: prefer clocks that use integer dividers
clk: bcm2835: allow to define a minimum fractional divider in DT
clk: bcm2835: allow clock choosing mechanims to be selected in DT
dt-bindings: bcm2835: document optional per clock dt-nodes
clk: bcm2835: expose raw clock-registers via debugfs
.../bindings/clock/brcm,bcm2835-cprman.txt | 33 ++
drivers/clk/bcm/clk-bcm2835.c | 508 ++++++++++++++++++--
include/dt-bindings/clock/bcm2835.h | 15 +
3 files changed, 512 insertions(+), 44 deletions(-)
--
1.7.10.4
^ permalink raw reply [flat|nested] 27+ messages in thread
* [RFC 0/9] Allow modifications of specific clocks via DT and more
@ 2016-01-19 14:51 ` kernel
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
This patch series (which requires the patch-series-v4 of
"clk: bcm2835: add clocks and add MASH support") allows to configure
specific aspects (mostly with regards to clock selection) of individual
clocks to get configured via the device-tree.
Also - for debug purposes - a patch has been added that exposes the
raw clock registers read-only via debugfs.
Martin Sperl (9):
clk: bcm2835: add basic device tree support for per clock settings
clk: bcm2835: add support for parent selection in DT
clk: bcm2835: add ability to control mash level via device-tree
clk: bcm2835: reorganize bcm2835_clock_determine_rate
clk: bcm2835: prefer clocks that use integer dividers
clk: bcm2835: allow to define a minimum fractional divider in DT
clk: bcm2835: allow clock choosing mechanims to be selected in DT
dt-bindings: bcm2835: document optional per clock dt-nodes
clk: bcm2835: expose raw clock-registers via debugfs
.../bindings/clock/brcm,bcm2835-cprman.txt | 33 ++
drivers/clk/bcm/clk-bcm2835.c | 508 ++++++++++++++++++--
include/dt-bindings/clock/bcm2835.h | 15 +
3 files changed, 512 insertions(+), 44 deletions(-)
--
1.7.10.4
^ permalink raw reply [flat|nested] 27+ messages in thread
* [RFC 1/9] clk: bcm2835: add basic device tree support for per clock settings
2016-01-19 14:51 ` kernel
(?)
@ 2016-01-19 14:51 ` kernel
-1 siblings, 0 replies; 27+ messages in thread
From: kernel-TqfNSX0MhmxHKSADF0wUEw @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-clk-u79uwXL29TY76Z2rM5mHXA
Cc: Martin Sperl
From: Martin Sperl <kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
Add basic device tree support for per clock settings taken from the
device tree.
Signed-off-by: Martin Sperl <kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
---
drivers/clk/bcm/clk-bcm2835.c | 72 +++++++++++++++++++++++++++++++++++++----
1 file changed, 66 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 637f8ae..1c714d0 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1757,8 +1757,38 @@ static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.get_parent = bcm2835_clock_get_parent,
};
+static struct device_node *bcm2835_find_dt_node(
+ struct bcm2835_cprman *cprman, int id)
+{
+ struct device *dev = cprman->dev;
+ struct device_node *nc, *ncp = dev->of_node;
+ u32 value;
+ int err;
+
+ /* if no dt, then use the constant version */
+ if (!ncp)
+ return NULL;
+
+ /* try to find the devicetree with the id */
+ for_each_available_child_of_node(ncp, nc) {
+ /* get reg value */
+ err = of_property_read_u32(nc, "reg", &value);
+ if (err) {
+ dev_err(dev, "%s has no valid 'reg' property (%d)\n",
+ nc->full_name, err);
+ } else {
+ if (value == id)
+ return nc;
+ }
+ }
+
+ /* not found */
+ return NULL;
+}
+
static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
- const struct bcm2835_pll_data *data)
+ const struct bcm2835_pll_data *data,
+ size_t id)
{
struct bcm2835_pll *pll;
struct clk_init_data init;
@@ -1785,7 +1815,8 @@ static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
static struct clk *
bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
- const struct bcm2835_pll_divider_data *data)
+ const struct bcm2835_pll_divider_data *data,
+ size_t id)
{
struct bcm2835_pll_divider *divider;
struct clk_init_data init;
@@ -1843,14 +1874,42 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
return clk;
}
+static const struct bcm2835_clock_data *bcm2835_register_clock_of(
+ struct bcm2835_cprman *cprman,
+ const struct bcm2835_clock_data *data_orig,
+ size_t id)
+{
+ struct device *dev = cprman->dev;
+ struct device_node *nc;
+ struct bcm2835_clock_data *data;
+
+ /* find the corresponding dt-node */
+ nc = bcm2835_find_dt_node(cprman, id);
+ if (!nc)
+ return data_orig;
+
+ /* create a copy of data */
+ data = devm_kmalloc(dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return data_orig;
+ memcpy(data, data_orig, sizeof(*data));
+
+ /* and return the result */
+ return data;
+}
+
static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
- const struct bcm2835_clock_data *data)
+ const struct bcm2835_clock_data *data,
+ size_t id)
{
struct bcm2835_clock *clock;
struct clk_init_data init;
const char *parents[1 << CM_SRC_BITS];
size_t i;
+ /* update default values from the device_tree */
+ data = bcm2835_register_clock_of(cprman, data, id);
+
/*
* Replace our "xosc" references with the oscillator's
* actual name.
@@ -1887,7 +1946,8 @@ static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
}
static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
- const struct bcm2835_gate_data *data)
+ const struct bcm2835_gate_data *data,
+ size_t id)
{
return clk_register_gate(cprman->dev, data->name, data->parent,
CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
@@ -1896,7 +1956,7 @@ static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
}
typedef struct clk *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
- const void *data);
+ const void *data, size_t id);
struct bcm2835_clk_desc {
bcm2835_clk_register clk_register;
const void *data;
@@ -2007,7 +2067,7 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
for (i = 0; i < asize; i++) {
desc = &clk_desc_array[i];
if (desc->clk_register && desc->data)
- clks[i] = desc->clk_register(cprman, desc->data);
+ clks[i] = desc->clk_register(cprman, desc->data, i);
}
return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
--
1.7.10.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 1/9] clk: bcm2835: add basic device tree support for per clock settings
@ 2016-01-19 14:51 ` kernel
0 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
Add basic device tree support for per clock settings taken from the
device tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 72 +++++++++++++++++++++++++++++++++++++----
1 file changed, 66 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 637f8ae..1c714d0 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1757,8 +1757,38 @@ static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.get_parent = bcm2835_clock_get_parent,
};
+static struct device_node *bcm2835_find_dt_node(
+ struct bcm2835_cprman *cprman, int id)
+{
+ struct device *dev = cprman->dev;
+ struct device_node *nc, *ncp = dev->of_node;
+ u32 value;
+ int err;
+
+ /* if no dt, then use the constant version */
+ if (!ncp)
+ return NULL;
+
+ /* try to find the devicetree with the id */
+ for_each_available_child_of_node(ncp, nc) {
+ /* get reg value */
+ err = of_property_read_u32(nc, "reg", &value);
+ if (err) {
+ dev_err(dev, "%s has no valid 'reg' property (%d)\n",
+ nc->full_name, err);
+ } else {
+ if (value == id)
+ return nc;
+ }
+ }
+
+ /* not found */
+ return NULL;
+}
+
static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
- const struct bcm2835_pll_data *data)
+ const struct bcm2835_pll_data *data,
+ size_t id)
{
struct bcm2835_pll *pll;
struct clk_init_data init;
@@ -1785,7 +1815,8 @@ static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
static struct clk *
bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
- const struct bcm2835_pll_divider_data *data)
+ const struct bcm2835_pll_divider_data *data,
+ size_t id)
{
struct bcm2835_pll_divider *divider;
struct clk_init_data init;
@@ -1843,14 +1874,42 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
return clk;
}
+static const struct bcm2835_clock_data *bcm2835_register_clock_of(
+ struct bcm2835_cprman *cprman,
+ const struct bcm2835_clock_data *data_orig,
+ size_t id)
+{
+ struct device *dev = cprman->dev;
+ struct device_node *nc;
+ struct bcm2835_clock_data *data;
+
+ /* find the corresponding dt-node */
+ nc = bcm2835_find_dt_node(cprman, id);
+ if (!nc)
+ return data_orig;
+
+ /* create a copy of data */
+ data = devm_kmalloc(dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return data_orig;
+ memcpy(data, data_orig, sizeof(*data));
+
+ /* and return the result */
+ return data;
+}
+
static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
- const struct bcm2835_clock_data *data)
+ const struct bcm2835_clock_data *data,
+ size_t id)
{
struct bcm2835_clock *clock;
struct clk_init_data init;
const char *parents[1 << CM_SRC_BITS];
size_t i;
+ /* update default values from the device_tree */
+ data = bcm2835_register_clock_of(cprman, data, id);
+
/*
* Replace our "xosc" references with the oscillator's
* actual name.
@@ -1887,7 +1946,8 @@ static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
}
static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
- const struct bcm2835_gate_data *data)
+ const struct bcm2835_gate_data *data,
+ size_t id)
{
return clk_register_gate(cprman->dev, data->name, data->parent,
CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
@@ -1896,7 +1956,7 @@ static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
}
typedef struct clk *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
- const void *data);
+ const void *data, size_t id);
struct bcm2835_clk_desc {
bcm2835_clk_register clk_register;
const void *data;
@@ -2007,7 +2067,7 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
for (i = 0; i < asize; i++) {
desc = &clk_desc_array[i];
if (desc->clk_register && desc->data)
- clks[i] = desc->clk_register(cprman, desc->data);
+ clks[i] = desc->clk_register(cprman, desc->data, i);
}
return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 1/9] clk: bcm2835: add basic device tree support for per clock settings
@ 2016-01-19 14:51 ` kernel
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
Add basic device tree support for per clock settings taken from the
device tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 72 +++++++++++++++++++++++++++++++++++++----
1 file changed, 66 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 637f8ae..1c714d0 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1757,8 +1757,38 @@ static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.get_parent = bcm2835_clock_get_parent,
};
+static struct device_node *bcm2835_find_dt_node(
+ struct bcm2835_cprman *cprman, int id)
+{
+ struct device *dev = cprman->dev;
+ struct device_node *nc, *ncp = dev->of_node;
+ u32 value;
+ int err;
+
+ /* if no dt, then use the constant version */
+ if (!ncp)
+ return NULL;
+
+ /* try to find the devicetree with the id */
+ for_each_available_child_of_node(ncp, nc) {
+ /* get reg value */
+ err = of_property_read_u32(nc, "reg", &value);
+ if (err) {
+ dev_err(dev, "%s has no valid 'reg' property (%d)\n",
+ nc->full_name, err);
+ } else {
+ if (value == id)
+ return nc;
+ }
+ }
+
+ /* not found */
+ return NULL;
+}
+
static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
- const struct bcm2835_pll_data *data)
+ const struct bcm2835_pll_data *data,
+ size_t id)
{
struct bcm2835_pll *pll;
struct clk_init_data init;
@@ -1785,7 +1815,8 @@ static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
static struct clk *
bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
- const struct bcm2835_pll_divider_data *data)
+ const struct bcm2835_pll_divider_data *data,
+ size_t id)
{
struct bcm2835_pll_divider *divider;
struct clk_init_data init;
@@ -1843,14 +1874,42 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
return clk;
}
+static const struct bcm2835_clock_data *bcm2835_register_clock_of(
+ struct bcm2835_cprman *cprman,
+ const struct bcm2835_clock_data *data_orig,
+ size_t id)
+{
+ struct device *dev = cprman->dev;
+ struct device_node *nc;
+ struct bcm2835_clock_data *data;
+
+ /* find the corresponding dt-node */
+ nc = bcm2835_find_dt_node(cprman, id);
+ if (!nc)
+ return data_orig;
+
+ /* create a copy of data */
+ data = devm_kmalloc(dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return data_orig;
+ memcpy(data, data_orig, sizeof(*data));
+
+ /* and return the result */
+ return data;
+}
+
static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
- const struct bcm2835_clock_data *data)
+ const struct bcm2835_clock_data *data,
+ size_t id)
{
struct bcm2835_clock *clock;
struct clk_init_data init;
const char *parents[1 << CM_SRC_BITS];
size_t i;
+ /* update default values from the device_tree */
+ data = bcm2835_register_clock_of(cprman, data, id);
+
/*
* Replace our "xosc" references with the oscillator's
* actual name.
@@ -1887,7 +1946,8 @@ static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
}
static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
- const struct bcm2835_gate_data *data)
+ const struct bcm2835_gate_data *data,
+ size_t id)
{
return clk_register_gate(cprman->dev, data->name, data->parent,
CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
@@ -1896,7 +1956,7 @@ static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
}
typedef struct clk *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
- const void *data);
+ const void *data, size_t id);
struct bcm2835_clk_desc {
bcm2835_clk_register clk_register;
const void *data;
@@ -2007,7 +2067,7 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
for (i = 0; i < asize; i++) {
desc = &clk_desc_array[i];
if (desc->clk_register && desc->data)
- clks[i] = desc->clk_register(cprman, desc->data);
+ clks[i] = desc->clk_register(cprman, desc->data, i);
}
return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 2/9] clk: bcm2835: add support for parent selection in DT
2016-01-19 14:51 ` kernel
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
-1 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
Allow for a per clock custom selection of clocks in the device tree.
Basic setup in dt looks like this:
clock@BCM2835_CLOCK_PCM {
reg = <BCM2835_CLOCK_PCM>;
parent-clock-names = "xosc", "plld_per", "plla_per", "pll_aux_per";
};
Special care had to be taken when only a single clock is assigned,
as then set_parent_rate is not called - so the register has to get
set up immediately.
To allow for custom order of the clocks (giving preference)
an additional mapping between IDs is required when handling
get/set parent.
The default parent clocks are assumed to be all available clocks
against which the "selected" parents are checked.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 124 +++++++++++++++++++++++++++++++++++++++--
1 file changed, 119 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 1c714d0..8fccbd3 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -702,6 +702,7 @@ struct bcm2835_clock_data {
const char *const *parents;
int num_mux_parents;
+ u8 *parents_idx;
u32 ctl_reg;
u32 div_reg;
@@ -1706,15 +1707,30 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
return 0;
}
+static int _bcm2835_clk_set_parent(struct bcm2835_cprman *cprman,
+ const struct bcm2835_clock_data *data,
+ u8 index)
+{
+ u8 src;
+
+ /* map the index if we got a map */
+ if (data->parents_idx)
+ index = data->parents_idx[index];
+
+ /* calc the source */
+ src = (index << CM_SRC_SHIFT) & CM_SRC_MASK;
+
+ cprman_write(cprman, data->ctl_reg, src);
+ return 0;
+}
+
static int bcm2835_clock_set_parent(struct clk_hw *hw, u8 index)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
- u8 src = (index << CM_SRC_SHIFT) & CM_SRC_MASK;
- cprman_write(cprman, data->ctl_reg, src);
- return 0;
+ return _bcm2835_clk_set_parent(cprman, data, index);
}
static u8 bcm2835_clock_get_parent(struct clk_hw *hw)
@@ -1723,10 +1739,23 @@ static u8 bcm2835_clock_get_parent(struct clk_hw *hw)
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
u32 src = cprman_read(cprman, data->ctl_reg);
+ int i;
- return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
-}
+ /* translate src to default index */
+ src = (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
+
+ /* without overrides overrides return the value */
+ if (!data->parents_idx)
+ return src;
+ /* otherwise iterate over fields to find it */
+ for (i = 0; i < data->num_mux_parents ; i++)
+ if (data->parents_idx[i] == src)
+ return i;
+
+ /* if not found */
+ return -EINVAL;
+}
static const struct clk_ops bcm2835_clock_clk_ops = {
.is_prepared = bcm2835_clock_is_on,
@@ -1874,6 +1903,88 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
return clk;
}
+static void bcm2835_register_clock_of_parents(
+ struct bcm2835_cprman *cprman,
+ struct bcm2835_clock_data *data,
+ struct device_node *nc)
+{
+ struct device *dev = cprman->dev;
+ u8 *parents_idx;
+ const char **parents;
+ const char *name;
+ int err, names, i, j;
+
+ /* check number of strings */
+ names = of_property_count_strings(nc, "parent-clock-names");
+ if (names < 0)
+ return;
+ if (names > data->num_mux_parents) {
+ dev_err(dev,
+ "%s: dt-property parent-clock-names has more entries (%d) than available parent clocks (%d)\n",
+ of_node_full_name(nc), names, data->num_mux_parents);
+ return;
+ }
+
+ /* allocate parents */
+ parents = devm_kzalloc(dev, sizeof(*parents) * names, GFP_KERNEL);
+ if (!parents)
+ return;
+
+ /* allocate parents index */
+ parents_idx = devm_kzalloc(dev, sizeof(*parents_idx) * names,
+ GFP_KERNEL);
+ if (!parents_idx) {
+ devm_kfree(dev, parents);
+ return;
+ }
+
+ /* and check the parents against list of allowed parents */
+ for (i = 0; i < names; i++) {
+ /* get the string */
+ err = of_property_read_string_index(nc, "parent-clock-names",
+ i, &name);
+ if (err) {
+ devm_kfree(dev, parents_idx);
+ devm_kfree(dev, parents);
+ dev_err(dev,
+ "%s: could not get parent-clock-names[%d] - %d\n",
+ of_node_full_name(nc), i, err);
+ return;
+ }
+ /* check against available parents - the default list */
+ for (j = 0; j < data->num_mux_parents; j++) {
+ if (strcmp(data->parents[j], name) == 0) {
+ parents[i] = data->parents[j];
+ parents_idx[i] = j;
+ break;
+ }
+ }
+ /* if there was no match */
+ if (!parents[i]) {
+ devm_kfree(dev, parents_idx);
+ devm_kfree(dev, parents);
+ dev_err(dev,
+ "%s: could not find %s in list of allowed parent clocks\n",
+ of_node_full_name(nc), name);
+ return;
+ }
+ }
+
+ /* finally assign it */
+ data->num_mux_parents = names;
+ data->parents = parents;
+ data->parents_idx = parents_idx;
+
+ /*
+ * if there is only one parent, then use that one immediately,
+ * as with only one parent clock_set_parent does not get called
+ * and it is assumed that everything is set up, so
+ * we need to do that before anything else...
+ */
+ if (names == 1)
+ _bcm2835_clk_set_parent(cprman, data, 0);
+}
+
static const struct bcm2835_clock_data *bcm2835_register_clock_of(
struct bcm2835_cprman *cprman,
const struct bcm2835_clock_data *data_orig,
@@ -1894,6 +2005,9 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
return data_orig;
memcpy(data, data_orig, sizeof(*data));
+ /* apply overrides */
+ bcm2835_register_clock_of_parents(cprman, data, nc);
+
/* and return the result */
return data;
}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 2/9] clk: bcm2835: add support for parent selection in DT
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
Allow for a per clock custom selection of clocks in the device tree.
Basic setup in dt looks like this:
clock at BCM2835_CLOCK_PCM {
reg = <BCM2835_CLOCK_PCM>;
parent-clock-names = "xosc", "plld_per", "plla_per", "pll_aux_per";
};
Special care had to be taken when only a single clock is assigned,
as then set_parent_rate is not called - so the register has to get
set up immediately.
To allow for custom order of the clocks (giving preference)
an additional mapping between IDs is required when handling
get/set parent.
The default parent clocks are assumed to be all available clocks
against which the "selected" parents are checked.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 124 +++++++++++++++++++++++++++++++++++++++--
1 file changed, 119 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 1c714d0..8fccbd3 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -702,6 +702,7 @@ struct bcm2835_clock_data {
const char *const *parents;
int num_mux_parents;
+ u8 *parents_idx;
u32 ctl_reg;
u32 div_reg;
@@ -1706,15 +1707,30 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
return 0;
}
+static int _bcm2835_clk_set_parent(struct bcm2835_cprman *cprman,
+ const struct bcm2835_clock_data *data,
+ u8 index)
+{
+ u8 src;
+
+ /* map the index if we got a map */
+ if (data->parents_idx)
+ index = data->parents_idx[index];
+
+ /* calc the source */
+ src = (index << CM_SRC_SHIFT) & CM_SRC_MASK;
+
+ cprman_write(cprman, data->ctl_reg, src);
+ return 0;
+}
+
static int bcm2835_clock_set_parent(struct clk_hw *hw, u8 index)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
- u8 src = (index << CM_SRC_SHIFT) & CM_SRC_MASK;
- cprman_write(cprman, data->ctl_reg, src);
- return 0;
+ return _bcm2835_clk_set_parent(cprman, data, index);
}
static u8 bcm2835_clock_get_parent(struct clk_hw *hw)
@@ -1723,10 +1739,23 @@ static u8 bcm2835_clock_get_parent(struct clk_hw *hw)
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
u32 src = cprman_read(cprman, data->ctl_reg);
+ int i;
- return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
-}
+ /* translate src to default index */
+ src = (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
+
+ /* without overrides overrides return the value */
+ if (!data->parents_idx)
+ return src;
+ /* otherwise iterate over fields to find it */
+ for (i = 0; i < data->num_mux_parents ; i++)
+ if (data->parents_idx[i] == src)
+ return i;
+
+ /* if not found */
+ return -EINVAL;
+}
static const struct clk_ops bcm2835_clock_clk_ops = {
.is_prepared = bcm2835_clock_is_on,
@@ -1874,6 +1903,88 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman,
return clk;
}
+static void bcm2835_register_clock_of_parents(
+ struct bcm2835_cprman *cprman,
+ struct bcm2835_clock_data *data,
+ struct device_node *nc)
+{
+ struct device *dev = cprman->dev;
+ u8 *parents_idx;
+ const char **parents;
+ const char *name;
+ int err, names, i, j;
+
+ /* check number of strings */
+ names = of_property_count_strings(nc, "parent-clock-names");
+ if (names < 0)
+ return;
+ if (names > data->num_mux_parents) {
+ dev_err(dev,
+ "%s: dt-property parent-clock-names has more entries (%d) than available parent clocks (%d)\n",
+ of_node_full_name(nc), names, data->num_mux_parents);
+ return;
+ }
+
+ /* allocate parents */
+ parents = devm_kzalloc(dev, sizeof(*parents) * names, GFP_KERNEL);
+ if (!parents)
+ return;
+
+ /* allocate parents index */
+ parents_idx = devm_kzalloc(dev, sizeof(*parents_idx) * names,
+ GFP_KERNEL);
+ if (!parents_idx) {
+ devm_kfree(dev, parents);
+ return;
+ }
+
+ /* and check the parents against list of allowed parents */
+ for (i = 0; i < names; i++) {
+ /* get the string */
+ err = of_property_read_string_index(nc, "parent-clock-names",
+ i, &name);
+ if (err) {
+ devm_kfree(dev, parents_idx);
+ devm_kfree(dev, parents);
+ dev_err(dev,
+ "%s: could not get parent-clock-names[%d] - %d\n",
+ of_node_full_name(nc), i, err);
+ return;
+ }
+ /* check against available parents - the default list */
+ for (j = 0; j < data->num_mux_parents; j++) {
+ if (strcmp(data->parents[j], name) == 0) {
+ parents[i] = data->parents[j];
+ parents_idx[i] = j;
+ break;
+ }
+ }
+ /* if there was no match */
+ if (!parents[i]) {
+ devm_kfree(dev, parents_idx);
+ devm_kfree(dev, parents);
+ dev_err(dev,
+ "%s: could not find %s in list of allowed parent clocks\n",
+ of_node_full_name(nc), name);
+ return;
+ }
+ }
+
+ /* finally assign it */
+ data->num_mux_parents = names;
+ data->parents = parents;
+ data->parents_idx = parents_idx;
+
+ /*
+ * if there is only one parent, then use that one immediately,
+ * as with only one parent clock_set_parent does not get called
+ * and it is assumed that everything is set up, so
+ * we need to do that before anything else...
+ */
+ if (names == 1)
+ _bcm2835_clk_set_parent(cprman, data, 0);
+}
+
static const struct bcm2835_clock_data *bcm2835_register_clock_of(
struct bcm2835_cprman *cprman,
const struct bcm2835_clock_data *data_orig,
@@ -1894,6 +2005,9 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
return data_orig;
memcpy(data, data_orig, sizeof(*data));
+ /* apply overrides */
+ bcm2835_register_clock_of_parents(cprman, data, nc);
+
/* and return the result */
return data;
}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 3/9] clk: bcm2835: add ability to control mash level via device-tree
2016-01-19 14:51 ` kernel
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
-1 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
Control maximum mash levels that can get used via the device tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 39 +++++++++++++++++++++++++++--------
include/dt-bindings/clock/bcm2835.h | 9 ++++++++
2 files changed, 39 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 8fccbd3..48c1ad0 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -303,10 +303,10 @@
#define BCM2835_MASH_MAX_FREQ 25000000u
enum bcm2835_clock_mash_type {
- MASH_NONE = 0,
- MASH_FRAC = 1,
- MASH_2ND_ORDER = 2,
- MASH_3RD_ORDER = 3
+ MASH_NONE = BCM2835_MASH_NONE,
+ MASH_FRAC = BCM2835_MASH_FRAC,
+ MASH_ORDER_2 = BCM2835_MASH_ORDER_2,
+ MASH_ORDER_3 = BCM2835_MASH_ORDER_3
};
/*
@@ -713,6 +713,7 @@ struct bcm2835_clock_data {
u32 frac_bits;
/* the mash value to use - see CM_MASH */
enum bcm2835_clock_mash_type mash;
+ bool mash_forced;
bool is_vpu_clock;
};
@@ -1508,7 +1509,7 @@ static divmash bcm2835_clock_choose_div(struct clk_hw *hw,
/* select mash mode */
if (data->frac_bits && divf)
- mash = data->mash ? data->mash : MASH_FRAC;
+ mash = data->mash_forced ? data->mash : MASH_FRAC;
/*
* handle possible limits for different mash levels with fall-tru
@@ -1517,17 +1518,17 @@ static divmash bcm2835_clock_choose_div(struct clk_hw *hw,
* http://elinux.org/BCM2835_datasheet_errata#p105_table
*/
switch (mash) {
- case MASH_3RD_ORDER:
+ case MASH_ORDER_3:
if ((divi >= divi_min + 3) &&
(divi + 4 <= divi_max) &&
(parent_rate / (divi - 3) <= BCM2835_MASH_MAX_FREQ))
- return divmash_calc(MASH_3RD_ORDER, div);
+ return divmash_calc(MASH_ORDER_3, div);
/* fall tru if not in bounds */
- case MASH_2ND_ORDER:
+ case MASH_ORDER_2:
if ((divi >= divi_min + 1) &&
(divi + 2 <= divi_max) &&
(parent_rate / (divi - 1) <= BCM2835_MASH_MAX_FREQ))
- return divmash_calc(MASH_2ND_ORDER, div);
+ return divmash_calc(MASH_ORDER_2, div);
/* fall tru if not in bounds */
case MASH_FRAC:
if ((divi >= divi_min) &&
@@ -1993,6 +1994,8 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
struct device *dev = cprman->dev;
struct device_node *nc;
struct bcm2835_clock_data *data;
+ int err;
+ u32 value;
/* find the corresponding dt-node */
nc = bcm2835_find_dt_node(cprman, id);
@@ -2008,6 +2011,24 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
/* apply overrides */
bcm2835_register_clock_of_parents(cprman, data, nc);
+ /* check for mash */
+ err = of_property_read_u32(nc, "brcm,mash-max-order", &value);
+ if (!err) {
+ switch (value) {
+ case MASH_NONE:
+ case MASH_FRAC:
+ case MASH_ORDER_2:
+ case MASH_ORDER_3:
+ data->mash = value;
+ data->mash_forced = 1;
+ break;
+ default:
+ dev_err(dev, "clock %s: undefined mash type: %d\n",
+ data->name, value);
+ break;
+ }
+ }
+
/* and return the result */
return data;
}
diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h
index d29f181..eb73380 100644
--- a/include/dt-bindings/clock/bcm2835.h
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -67,3 +67,12 @@
#define BCM2835_CLOCK_TD0 51
#define BCM2835_CLOCK_TD1 52
#define BCM2835_CLOCK_TEC 53
+
+/* the mash divider options */
+#define BCM2835_MASH_NONE 0
+#define BCM2835_MASH_ORDER_1 1
+#define BCM2835_MASH_ORDER_2 2
+#define BCM2835_MASH_ORDER_3 3
+
+#define BCM2835_MASH_INTEGER BCM2835_MASH_NONE
+#define BCM2835_MASH_FRAC BCM2835_MASH_ORDER_1
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 3/9] clk: bcm2835: add ability to control mash level via device-tree
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
Control maximum mash levels that can get used via the device tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 39 +++++++++++++++++++++++++++--------
include/dt-bindings/clock/bcm2835.h | 9 ++++++++
2 files changed, 39 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 8fccbd3..48c1ad0 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -303,10 +303,10 @@
#define BCM2835_MASH_MAX_FREQ 25000000u
enum bcm2835_clock_mash_type {
- MASH_NONE = 0,
- MASH_FRAC = 1,
- MASH_2ND_ORDER = 2,
- MASH_3RD_ORDER = 3
+ MASH_NONE = BCM2835_MASH_NONE,
+ MASH_FRAC = BCM2835_MASH_FRAC,
+ MASH_ORDER_2 = BCM2835_MASH_ORDER_2,
+ MASH_ORDER_3 = BCM2835_MASH_ORDER_3
};
/*
@@ -713,6 +713,7 @@ struct bcm2835_clock_data {
u32 frac_bits;
/* the mash value to use - see CM_MASH */
enum bcm2835_clock_mash_type mash;
+ bool mash_forced;
bool is_vpu_clock;
};
@@ -1508,7 +1509,7 @@ static divmash bcm2835_clock_choose_div(struct clk_hw *hw,
/* select mash mode */
if (data->frac_bits && divf)
- mash = data->mash ? data->mash : MASH_FRAC;
+ mash = data->mash_forced ? data->mash : MASH_FRAC;
/*
* handle possible limits for different mash levels with fall-tru
@@ -1517,17 +1518,17 @@ static divmash bcm2835_clock_choose_div(struct clk_hw *hw,
* http://elinux.org/BCM2835_datasheet_errata#p105_table
*/
switch (mash) {
- case MASH_3RD_ORDER:
+ case MASH_ORDER_3:
if ((divi >= divi_min + 3) &&
(divi + 4 <= divi_max) &&
(parent_rate / (divi - 3) <= BCM2835_MASH_MAX_FREQ))
- return divmash_calc(MASH_3RD_ORDER, div);
+ return divmash_calc(MASH_ORDER_3, div);
/* fall tru if not in bounds */
- case MASH_2ND_ORDER:
+ case MASH_ORDER_2:
if ((divi >= divi_min + 1) &&
(divi + 2 <= divi_max) &&
(parent_rate / (divi - 1) <= BCM2835_MASH_MAX_FREQ))
- return divmash_calc(MASH_2ND_ORDER, div);
+ return divmash_calc(MASH_ORDER_2, div);
/* fall tru if not in bounds */
case MASH_FRAC:
if ((divi >= divi_min) &&
@@ -1993,6 +1994,8 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
struct device *dev = cprman->dev;
struct device_node *nc;
struct bcm2835_clock_data *data;
+ int err;
+ u32 value;
/* find the corresponding dt-node */
nc = bcm2835_find_dt_node(cprman, id);
@@ -2008,6 +2011,24 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
/* apply overrides */
bcm2835_register_clock_of_parents(cprman, data, nc);
+ /* check for mash */
+ err = of_property_read_u32(nc, "brcm,mash-max-order", &value);
+ if (!err) {
+ switch (value) {
+ case MASH_NONE:
+ case MASH_FRAC:
+ case MASH_ORDER_2:
+ case MASH_ORDER_3:
+ data->mash = value;
+ data->mash_forced = 1;
+ break;
+ default:
+ dev_err(dev, "clock %s: undefined mash type: %d\n",
+ data->name, value);
+ break;
+ }
+ }
+
/* and return the result */
return data;
}
diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h
index d29f181..eb73380 100644
--- a/include/dt-bindings/clock/bcm2835.h
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -67,3 +67,12 @@
#define BCM2835_CLOCK_TD0 51
#define BCM2835_CLOCK_TD1 52
#define BCM2835_CLOCK_TEC 53
+
+/* the mash divider options */
+#define BCM2835_MASH_NONE 0
+#define BCM2835_MASH_ORDER_1 1
+#define BCM2835_MASH_ORDER_2 2
+#define BCM2835_MASH_ORDER_3 3
+
+#define BCM2835_MASH_INTEGER BCM2835_MASH_NONE
+#define BCM2835_MASH_FRAC BCM2835_MASH_ORDER_1
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 4/9] clk: bcm2835: reorganize bcm2835_clock_determine_rate
2016-01-19 14:51 ` kernel
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
-1 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
Reorganize bcm2835_clock_determine_rate so that the per
clock frequency calculation is separated from the
selection logic.
This allows for different clock selection policies
to be use while keeping code common.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 98 +++++++++++++++++++++++++++++------------
1 file changed, 70 insertions(+), 28 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 48c1ad0..f1ab525 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1668,44 +1668,86 @@ unlock_exit:
return 0;
}
-static int bcm2835_clock_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
+struct bcm2835_rates {
+ struct clk_hw *parent;
+ unsigned long rate;
+ unsigned long prate;
+ u32 div;
+ divmash dmash;
+};
+
+static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
+ struct bcm2835_rates *best)
{
- struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
- struct clk_hw *parent, *best_parent = NULL;
- unsigned long rate, best_rate = 0;
- unsigned long prate, best_prate = 0;
+ req->best_parent_hw = best->parent;
+ req->best_parent_rate = best->prate;
+ req->rate = best->rate;
+
+ return 0;
+}
+
+static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
+{
+ struct bcm2835_rates *best = NULL;
size_t i;
- divmash dm;
- u32 div;
- /*
- * Select parent clock that results in the closest but lower rate
- */
- for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
- parent = clk_hw_get_parent_by_index(hw, i);
- if (!parent)
+ /* find best matching */
+ for (i = 0; i < rate_cnt; i++) {
+ if (rates[i].rate > req->rate)
+ continue;
+ if (!best) {
+ best = &rates[i];
+ continue;
+ }
+ /* find the closest */
+ if (rates[i].rate > best->rate) {
+ best = &rates[i];
+ continue;
+ }
+ /* if identical then use highest divider */
+ if ((rates[i].rate == best->rate) &&
+ (rates[i].div > best->div)) {
+ best = &rates[i];
continue;
- prate = clk_hw_get_rate(parent);
- dm = bcm2835_clock_choose_div(hw, req->rate, prate, true);
- div = divmash_get_div(dm);
- rate = bcm2835_clock_rate_from_divisor(clock, prate, div);
- if (rate > best_rate && rate <= req->rate) {
- best_parent = parent;
- best_prate = prate;
- best_rate = rate;
}
}
- if (!best_parent)
- return -EINVAL;
+ if (best)
+ return bcm2835_clock_determine_rate_set(req, best);
+
+ /* nothing found */
+ return -EINVAL;
+}
- req->best_parent_hw = best_parent;
- req->best_parent_rate = best_prate;
+static int bcm2835_clock_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
+{
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ struct bcm2835_rates rates[BIT(CM_SRC_BITS)];
+ size_t i, rate_cnt = 0;
+ divmash dm;
- req->rate = best_rate;
+ /* fill in rates */
+ for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
+ rates[rate_cnt].parent = clk_hw_get_parent_by_index(hw, i);
+ if (!rates[rate_cnt].parent)
+ continue;
+ rates[rate_cnt].prate = clk_hw_get_rate(
+ rates[rate_cnt].parent);
+ dm = bcm2835_clock_choose_div(
+ hw, req->rate, rates[rate_cnt].prate, true);
+ rates[rate_cnt].div = divmash_get_div(dm);
+ rates[rate_cnt].rate = bcm2835_clock_rate_from_divisor(
+ clock, rates[rate_cnt].prate, rates[rate_cnt].div);
+ rate_cnt++;
+ }
- return 0;
+ /* choose the "closest" one */
+ return bcm2835_clock_determine_closest_rate(hw, req, rates,
+ rate_cnt);
}
static int _bcm2835_clk_set_parent(struct bcm2835_cprman *cprman,
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 4/9] clk: bcm2835: reorganize bcm2835_clock_determine_rate
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
Reorganize bcm2835_clock_determine_rate so that the per
clock frequency calculation is separated from the
selection logic.
This allows for different clock selection policies
to be use while keeping code common.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 98 +++++++++++++++++++++++++++++------------
1 file changed, 70 insertions(+), 28 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 48c1ad0..f1ab525 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1668,44 +1668,86 @@ unlock_exit:
return 0;
}
-static int bcm2835_clock_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
+struct bcm2835_rates {
+ struct clk_hw *parent;
+ unsigned long rate;
+ unsigned long prate;
+ u32 div;
+ divmash dmash;
+};
+
+static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
+ struct bcm2835_rates *best)
{
- struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
- struct clk_hw *parent, *best_parent = NULL;
- unsigned long rate, best_rate = 0;
- unsigned long prate, best_prate = 0;
+ req->best_parent_hw = best->parent;
+ req->best_parent_rate = best->prate;
+ req->rate = best->rate;
+
+ return 0;
+}
+
+static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
+{
+ struct bcm2835_rates *best = NULL;
size_t i;
- divmash dm;
- u32 div;
- /*
- * Select parent clock that results in the closest but lower rate
- */
- for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
- parent = clk_hw_get_parent_by_index(hw, i);
- if (!parent)
+ /* find best matching */
+ for (i = 0; i < rate_cnt; i++) {
+ if (rates[i].rate > req->rate)
+ continue;
+ if (!best) {
+ best = &rates[i];
+ continue;
+ }
+ /* find the closest */
+ if (rates[i].rate > best->rate) {
+ best = &rates[i];
+ continue;
+ }
+ /* if identical then use highest divider */
+ if ((rates[i].rate == best->rate) &&
+ (rates[i].div > best->div)) {
+ best = &rates[i];
continue;
- prate = clk_hw_get_rate(parent);
- dm = bcm2835_clock_choose_div(hw, req->rate, prate, true);
- div = divmash_get_div(dm);
- rate = bcm2835_clock_rate_from_divisor(clock, prate, div);
- if (rate > best_rate && rate <= req->rate) {
- best_parent = parent;
- best_prate = prate;
- best_rate = rate;
}
}
- if (!best_parent)
- return -EINVAL;
+ if (best)
+ return bcm2835_clock_determine_rate_set(req, best);
+
+ /* nothing found */
+ return -EINVAL;
+}
- req->best_parent_hw = best_parent;
- req->best_parent_rate = best_prate;
+static int bcm2835_clock_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
+{
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ struct bcm2835_rates rates[BIT(CM_SRC_BITS)];
+ size_t i, rate_cnt = 0;
+ divmash dm;
- req->rate = best_rate;
+ /* fill in rates */
+ for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
+ rates[rate_cnt].parent = clk_hw_get_parent_by_index(hw, i);
+ if (!rates[rate_cnt].parent)
+ continue;
+ rates[rate_cnt].prate = clk_hw_get_rate(
+ rates[rate_cnt].parent);
+ dm = bcm2835_clock_choose_div(
+ hw, req->rate, rates[rate_cnt].prate, true);
+ rates[rate_cnt].div = divmash_get_div(dm);
+ rates[rate_cnt].rate = bcm2835_clock_rate_from_divisor(
+ clock, rates[rate_cnt].prate, rates[rate_cnt].div);
+ rate_cnt++;
+ }
- return 0;
+ /* choose the "closest" one */
+ return bcm2835_clock_determine_closest_rate(hw, req, rates,
+ rate_cnt);
}
static int _bcm2835_clk_set_parent(struct bcm2835_cprman *cprman,
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 5/9] clk: bcm2835: prefer clocks that use integer dividers
2016-01-19 14:51 ` kernel
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
-1 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
To reduce possible jitter prefer integer dividers over
fractional dividers.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index f1ab525..e5313ba 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1686,6 +1686,24 @@ static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
return 0;
}
+static int bcm2835_clock_determine_integer_rate(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
+{
+ size_t i;
+
+ /* find first matching */
+ for (i = 0; i < rate_cnt; i++) {
+ if (!divmash_get_divf(rates[i].dmash))
+ return bcm2835_clock_determine_rate_set(req,
+ &rates[i]);
+ }
+
+ /* nothing found */
+ return -EINVAL;
+}
+
static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
struct clk_rate_request *req,
struct bcm2835_rates *rates,
@@ -1729,6 +1747,7 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
struct bcm2835_rates rates[BIT(CM_SRC_BITS)];
size_t i, rate_cnt = 0;
divmash dm;
+ int err;
/* fill in rates */
for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
@@ -1745,7 +1764,12 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
rate_cnt++;
}
- /* choose the "closest" one */
+ /* find integer rates with preference */
+ err = bcm2835_clock_determine_integer_rate(hw, req, rates, rate_cnt);
+ if (!err)
+ return 0;
+
+ /* otherwise choose the "closest" one */
return bcm2835_clock_determine_closest_rate(hw, req, rates,
rate_cnt);
}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 5/9] clk: bcm2835: prefer clocks that use integer dividers
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
To reduce possible jitter prefer integer dividers over
fractional dividers.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index f1ab525..e5313ba 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1686,6 +1686,24 @@ static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
return 0;
}
+static int bcm2835_clock_determine_integer_rate(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
+{
+ size_t i;
+
+ /* find first matching */
+ for (i = 0; i < rate_cnt; i++) {
+ if (!divmash_get_divf(rates[i].dmash))
+ return bcm2835_clock_determine_rate_set(req,
+ &rates[i]);
+ }
+
+ /* nothing found */
+ return -EINVAL;
+}
+
static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
struct clk_rate_request *req,
struct bcm2835_rates *rates,
@@ -1729,6 +1747,7 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
struct bcm2835_rates rates[BIT(CM_SRC_BITS)];
size_t i, rate_cnt = 0;
divmash dm;
+ int err;
/* fill in rates */
for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
@@ -1745,7 +1764,12 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
rate_cnt++;
}
- /* choose the "closest" one */
+ /* find integer rates with preference */
+ err = bcm2835_clock_determine_integer_rate(hw, req, rates, rate_cnt);
+ if (!err)
+ return 0;
+
+ /* otherwise choose the "closest" one */
return bcm2835_clock_determine_closest_rate(hw, req, rates,
rate_cnt);
}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 6/9] clk: bcm2835: allow to define a minimum fractional divider in DT
2016-01-19 14:51 ` kernel
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
-1 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
Allow to define a minimum fractional divider to use
in the devicetree.
This is primarily used to reduce clock-jitter introduced
by the fractional/MASH divider.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index e5313ba..7048ca5 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -711,6 +711,8 @@ struct bcm2835_clock_data {
u32 int_bits;
/* Number of fractional bits in the divider */
u32 frac_bits;
+ /* the minimum divider to allow when fractional */
+ u32 min_frac_div;
/* the mash value to use - see CM_MASH */
enum bcm2835_clock_mash_type mash;
bool mash_forced;
@@ -1709,13 +1711,21 @@ static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
struct bcm2835_rates *rates,
size_t rate_cnt)
{
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ const struct bcm2835_clock_data *data = clock->data;
struct bcm2835_rates *best = NULL;
size_t i;
/* find best matching */
for (i = 0; i < rate_cnt; i++) {
+ /* do not look at anything above the requested rate */
if (rates[i].rate > req->rate)
continue;
+ /* if we have a divider that is not "safe", then ignore */
+ if (divmash_get_divf(rates[i].dmash) &&
+ (rates[i].div < data->min_frac_div))
+ continue;
+ /* if we are the first */
if (!best) {
best = &rates[i];
continue;
@@ -2094,6 +2104,10 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
break;
}
}
+ /* add support for min fractional divider */
+ err = of_property_read_u32(nc, "brcm,min-fract-div", &value);
+ if (!err)
+ data->min_frac_div = value << CM_DIV_FRAC_BITS;
/* and return the result */
return data;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 6/9] clk: bcm2835: allow to define a minimum fractional divider in DT
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
Allow to define a minimum fractional divider to use
in the devicetree.
This is primarily used to reduce clock-jitter introduced
by the fractional/MASH divider.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index e5313ba..7048ca5 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -711,6 +711,8 @@ struct bcm2835_clock_data {
u32 int_bits;
/* Number of fractional bits in the divider */
u32 frac_bits;
+ /* the minimum divider to allow when fractional */
+ u32 min_frac_div;
/* the mash value to use - see CM_MASH */
enum bcm2835_clock_mash_type mash;
bool mash_forced;
@@ -1709,13 +1711,21 @@ static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
struct bcm2835_rates *rates,
size_t rate_cnt)
{
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ const struct bcm2835_clock_data *data = clock->data;
struct bcm2835_rates *best = NULL;
size_t i;
/* find best matching */
for (i = 0; i < rate_cnt; i++) {
+ /* do not look@anything above the requested rate */
if (rates[i].rate > req->rate)
continue;
+ /* if we have a divider that is not "safe", then ignore */
+ if (divmash_get_divf(rates[i].dmash) &&
+ (rates[i].div < data->min_frac_div))
+ continue;
+ /* if we are the first */
if (!best) {
best = &rates[i];
continue;
@@ -2094,6 +2104,10 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
break;
}
}
+ /* add support for min fractional divider */
+ err = of_property_read_u32(nc, "brcm,min-fract-div", &value);
+ if (!err)
+ data->min_frac_div = value << CM_DIV_FRAC_BITS;
/* and return the result */
return data;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 7/9] clk: bcm2835: allow clock choosing mechanims to be selected in DT
2016-01-19 14:51 ` kernel
(?)
@ 2016-01-19 14:51 ` kernel
-1 siblings, 0 replies; 27+ messages in thread
From: kernel-TqfNSX0MhmxHKSADF0wUEw @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-clk-u79uwXL29TY76Z2rM5mHXA
Cc: Martin Sperl
From: Martin Sperl <kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
Allow the clock choosing mechanism to be selected in the
devicetree.
There are 3 options that can get selected right now:
* BCM2835_CHOOSE_CLOCK_INTEGER
- only integer dividers are used (fails otherwise)
* BCM2835_CHOOSE_CLOCK_CLOSEST
- choose the clock that is closest to the target rate
* BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC
- integer dividers are preferred,
otherwise uses the clock that is closest to
the target rate
- this is the default implementation used
If there is a need for a different policy, then that can
get implemented and selected using this mechanism.
Signed-off-by: Martin Sperl <kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
---
drivers/clk/bcm/clk-bcm2835.c | 92 ++++++++++++++++++++++++++---------
include/dt-bindings/clock/bcm2835.h | 6 +++
2 files changed, 74 insertions(+), 24 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 7048ca5..c381cb1 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -697,6 +697,14 @@ static const struct bcm2835_pll_divider_data bcm2835_pllh_pix_data = {
.fixed_divider = 10,
};
+struct bcm2835_rates {
+ struct clk_hw *parent;
+ unsigned long rate;
+ unsigned long prate;
+ u32 div;
+ divmash dmash;
+};
+
struct bcm2835_clock_data {
const char *name;
@@ -718,6 +726,12 @@ struct bcm2835_clock_data {
bool mash_forced;
bool is_vpu_clock;
+
+ /* the determine rate function */
+ int (*choose_clock)(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt);
};
static const char *const bcm2835_clock_per_parents[] = {
@@ -1670,14 +1684,6 @@ unlock_exit:
return 0;
}
-struct bcm2835_rates {
- struct clk_hw *parent;
- unsigned long rate;
- unsigned long prate;
- u32 div;
- divmash dmash;
-};
-
static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
struct bcm2835_rates *best)
{
@@ -1688,10 +1694,10 @@ static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
return 0;
}
-static int bcm2835_clock_determine_integer_rate(struct clk_hw *hw,
- struct clk_rate_request *req,
- struct bcm2835_rates *rates,
- size_t rate_cnt)
+static int bcm2835_clock_choose_integer_div(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
{
size_t i;
@@ -1706,10 +1712,10 @@ static int bcm2835_clock_determine_integer_rate(struct clk_hw *hw,
return -EINVAL;
}
-static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
- struct clk_rate_request *req,
- struct bcm2835_rates *rates,
- size_t rate_cnt)
+static int bcm2835_clock_choose_closest_rate(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
const struct bcm2835_clock_data *data = clock->data;
@@ -1750,14 +1756,30 @@ static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
return -EINVAL;
}
+static int bcm2835_clock_choose_int_then_frac(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
+{
+ int err;
+
+ /* find integer rates with preference */
+ err = bcm2835_clock_choose_integer_div(hw, req, rates, rate_cnt);
+ if (!err)
+ return 0;
+
+ /* find the closest rate */
+ return bcm2835_clock_choose_closest_rate(hw, req, rates, rate_cnt);
+}
+
static int bcm2835_clock_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ const struct bcm2835_clock_data *data = clock->data;
struct bcm2835_rates rates[BIT(CM_SRC_BITS)];
size_t i, rate_cnt = 0;
divmash dm;
- int err;
/* fill in rates */
for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
@@ -1774,14 +1796,12 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
rate_cnt++;
}
- /* find integer rates with preference */
- err = bcm2835_clock_determine_integer_rate(hw, req, rates, rate_cnt);
- if (!err)
- return 0;
+ /* if we have a custom rate selection , then use that one */
+ if (data->choose_clock)
+ return data->choose_clock(hw, req, rates, rate_cnt);
- /* otherwise choose the "closest" one */
- return bcm2835_clock_determine_closest_rate(hw, req, rates,
- rate_cnt);
+ /* otherwise choose the "int-then-frac" one */
+ return bcm2835_clock_choose_int_then_frac(hw, req, rates, rate_cnt);
}
static int _bcm2835_clk_set_parent(struct bcm2835_cprman *cprman,
@@ -2108,6 +2128,30 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
err = of_property_read_u32(nc, "brcm,min-fract-div", &value);
if (!err)
data->min_frac_div = value << CM_DIV_FRAC_BITS;
+ /* choose alternate clock selector */
+ err = of_property_read_u32(nc, "brcm,clock-selector", &value);
+ if (!err) {
+ switch (value) {
+ case BCM2835_CHOOSE_CLOCK_DEFAULT:
+ case BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC:
+ data->choose_clock =
+ bcm2835_clock_choose_int_then_frac;
+ break;
+ case BCM2835_CHOOSE_CLOCK_INTEGER:
+ data->choose_clock =
+ bcm2835_clock_choose_integer_div;
+ break;
+ case BCM2835_CHOOSE_CLOCK_CLOSEST:
+ data->choose_clock =
+ bcm2835_clock_choose_closest_rate;
+ break;
+ default:
+ dev_err(dev,
+ "clock %s: undefined clock-selector: %d\n",
+ data->name, value);
+ break;
+ }
+ }
/* and return the result */
return data;
diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h
index eb73380..b00880e 100644
--- a/include/dt-bindings/clock/bcm2835.h
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -76,3 +76,9 @@
#define BCM2835_MASH_INTEGER BCM2835_MASH_NONE
#define BCM2835_MASH_FRAC BCM2835_MASH_ORDER_1
+
+/* the possible clock selectors */
+#define BCM2835_CHOOSE_CLOCK_DEFAULT 0
+#define BCM2835_CHOOSE_CLOCK_INTEGER 1
+#define BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC 2
+#define BCM2835_CHOOSE_CLOCK_CLOSEST 3
--
1.7.10.4
--
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^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 7/9] clk: bcm2835: allow clock choosing mechanims to be selected in DT
@ 2016-01-19 14:51 ` kernel
0 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
Allow the clock choosing mechanism to be selected in the
devicetree.
There are 3 options that can get selected right now:
* BCM2835_CHOOSE_CLOCK_INTEGER
- only integer dividers are used (fails otherwise)
* BCM2835_CHOOSE_CLOCK_CLOSEST
- choose the clock that is closest to the target rate
* BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC
- integer dividers are preferred,
otherwise uses the clock that is closest to
the target rate
- this is the default implementation used
If there is a need for a different policy, then that can
get implemented and selected using this mechanism.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 92 ++++++++++++++++++++++++++---------
include/dt-bindings/clock/bcm2835.h | 6 +++
2 files changed, 74 insertions(+), 24 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 7048ca5..c381cb1 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -697,6 +697,14 @@ static const struct bcm2835_pll_divider_data bcm2835_pllh_pix_data = {
.fixed_divider = 10,
};
+struct bcm2835_rates {
+ struct clk_hw *parent;
+ unsigned long rate;
+ unsigned long prate;
+ u32 div;
+ divmash dmash;
+};
+
struct bcm2835_clock_data {
const char *name;
@@ -718,6 +726,12 @@ struct bcm2835_clock_data {
bool mash_forced;
bool is_vpu_clock;
+
+ /* the determine rate function */
+ int (*choose_clock)(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt);
};
static const char *const bcm2835_clock_per_parents[] = {
@@ -1670,14 +1684,6 @@ unlock_exit:
return 0;
}
-struct bcm2835_rates {
- struct clk_hw *parent;
- unsigned long rate;
- unsigned long prate;
- u32 div;
- divmash dmash;
-};
-
static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
struct bcm2835_rates *best)
{
@@ -1688,10 +1694,10 @@ static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
return 0;
}
-static int bcm2835_clock_determine_integer_rate(struct clk_hw *hw,
- struct clk_rate_request *req,
- struct bcm2835_rates *rates,
- size_t rate_cnt)
+static int bcm2835_clock_choose_integer_div(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
{
size_t i;
@@ -1706,10 +1712,10 @@ static int bcm2835_clock_determine_integer_rate(struct clk_hw *hw,
return -EINVAL;
}
-static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
- struct clk_rate_request *req,
- struct bcm2835_rates *rates,
- size_t rate_cnt)
+static int bcm2835_clock_choose_closest_rate(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
const struct bcm2835_clock_data *data = clock->data;
@@ -1750,14 +1756,30 @@ static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
return -EINVAL;
}
+static int bcm2835_clock_choose_int_then_frac(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
+{
+ int err;
+
+ /* find integer rates with preference */
+ err = bcm2835_clock_choose_integer_div(hw, req, rates, rate_cnt);
+ if (!err)
+ return 0;
+
+ /* find the closest rate */
+ return bcm2835_clock_choose_closest_rate(hw, req, rates, rate_cnt);
+}
+
static int bcm2835_clock_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ const struct bcm2835_clock_data *data = clock->data;
struct bcm2835_rates rates[BIT(CM_SRC_BITS)];
size_t i, rate_cnt = 0;
divmash dm;
- int err;
/* fill in rates */
for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
@@ -1774,14 +1796,12 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
rate_cnt++;
}
- /* find integer rates with preference */
- err = bcm2835_clock_determine_integer_rate(hw, req, rates, rate_cnt);
- if (!err)
- return 0;
+ /* if we have a custom rate selection , then use that one */
+ if (data->choose_clock)
+ return data->choose_clock(hw, req, rates, rate_cnt);
- /* otherwise choose the "closest" one */
- return bcm2835_clock_determine_closest_rate(hw, req, rates,
- rate_cnt);
+ /* otherwise choose the "int-then-frac" one */
+ return bcm2835_clock_choose_int_then_frac(hw, req, rates, rate_cnt);
}
static int _bcm2835_clk_set_parent(struct bcm2835_cprman *cprman,
@@ -2108,6 +2128,30 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
err = of_property_read_u32(nc, "brcm,min-fract-div", &value);
if (!err)
data->min_frac_div = value << CM_DIV_FRAC_BITS;
+ /* choose alternate clock selector */
+ err = of_property_read_u32(nc, "brcm,clock-selector", &value);
+ if (!err) {
+ switch (value) {
+ case BCM2835_CHOOSE_CLOCK_DEFAULT:
+ case BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC:
+ data->choose_clock =
+ bcm2835_clock_choose_int_then_frac;
+ break;
+ case BCM2835_CHOOSE_CLOCK_INTEGER:
+ data->choose_clock =
+ bcm2835_clock_choose_integer_div;
+ break;
+ case BCM2835_CHOOSE_CLOCK_CLOSEST:
+ data->choose_clock =
+ bcm2835_clock_choose_closest_rate;
+ break;
+ default:
+ dev_err(dev,
+ "clock %s: undefined clock-selector: %d\n",
+ data->name, value);
+ break;
+ }
+ }
/* and return the result */
return data;
diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h
index eb73380..b00880e 100644
--- a/include/dt-bindings/clock/bcm2835.h
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -76,3 +76,9 @@
#define BCM2835_MASH_INTEGER BCM2835_MASH_NONE
#define BCM2835_MASH_FRAC BCM2835_MASH_ORDER_1
+
+/* the possible clock selectors */
+#define BCM2835_CHOOSE_CLOCK_DEFAULT 0
+#define BCM2835_CHOOSE_CLOCK_INTEGER 1
+#define BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC 2
+#define BCM2835_CHOOSE_CLOCK_CLOSEST 3
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 7/9] clk: bcm2835: allow clock choosing mechanims to be selected in DT
@ 2016-01-19 14:51 ` kernel
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
Allow the clock choosing mechanism to be selected in the
devicetree.
There are 3 options that can get selected right now:
* BCM2835_CHOOSE_CLOCK_INTEGER
- only integer dividers are used (fails otherwise)
* BCM2835_CHOOSE_CLOCK_CLOSEST
- choose the clock that is closest to the target rate
* BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC
- integer dividers are preferred,
otherwise uses the clock that is closest to
the target rate
- this is the default implementation used
If there is a need for a different policy, then that can
get implemented and selected using this mechanism.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 92 ++++++++++++++++++++++++++---------
include/dt-bindings/clock/bcm2835.h | 6 +++
2 files changed, 74 insertions(+), 24 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 7048ca5..c381cb1 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -697,6 +697,14 @@ static const struct bcm2835_pll_divider_data bcm2835_pllh_pix_data = {
.fixed_divider = 10,
};
+struct bcm2835_rates {
+ struct clk_hw *parent;
+ unsigned long rate;
+ unsigned long prate;
+ u32 div;
+ divmash dmash;
+};
+
struct bcm2835_clock_data {
const char *name;
@@ -718,6 +726,12 @@ struct bcm2835_clock_data {
bool mash_forced;
bool is_vpu_clock;
+
+ /* the determine rate function */
+ int (*choose_clock)(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt);
};
static const char *const bcm2835_clock_per_parents[] = {
@@ -1670,14 +1684,6 @@ unlock_exit:
return 0;
}
-struct bcm2835_rates {
- struct clk_hw *parent;
- unsigned long rate;
- unsigned long prate;
- u32 div;
- divmash dmash;
-};
-
static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
struct bcm2835_rates *best)
{
@@ -1688,10 +1694,10 @@ static int bcm2835_clock_determine_rate_set(struct clk_rate_request *req,
return 0;
}
-static int bcm2835_clock_determine_integer_rate(struct clk_hw *hw,
- struct clk_rate_request *req,
- struct bcm2835_rates *rates,
- size_t rate_cnt)
+static int bcm2835_clock_choose_integer_div(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
{
size_t i;
@@ -1706,10 +1712,10 @@ static int bcm2835_clock_determine_integer_rate(struct clk_hw *hw,
return -EINVAL;
}
-static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
- struct clk_rate_request *req,
- struct bcm2835_rates *rates,
- size_t rate_cnt)
+static int bcm2835_clock_choose_closest_rate(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
const struct bcm2835_clock_data *data = clock->data;
@@ -1750,14 +1756,30 @@ static int bcm2835_clock_determine_closest_rate(struct clk_hw *hw,
return -EINVAL;
}
+static int bcm2835_clock_choose_int_then_frac(struct clk_hw *hw,
+ struct clk_rate_request *req,
+ struct bcm2835_rates *rates,
+ size_t rate_cnt)
+{
+ int err;
+
+ /* find integer rates with preference */
+ err = bcm2835_clock_choose_integer_div(hw, req, rates, rate_cnt);
+ if (!err)
+ return 0;
+
+ /* find the closest rate */
+ return bcm2835_clock_choose_closest_rate(hw, req, rates, rate_cnt);
+}
+
static int bcm2835_clock_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ const struct bcm2835_clock_data *data = clock->data;
struct bcm2835_rates rates[BIT(CM_SRC_BITS)];
size_t i, rate_cnt = 0;
divmash dm;
- int err;
/* fill in rates */
for (i = 0; i < clk_hw_get_num_parents(hw); ++i) {
@@ -1774,14 +1796,12 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
rate_cnt++;
}
- /* find integer rates with preference */
- err = bcm2835_clock_determine_integer_rate(hw, req, rates, rate_cnt);
- if (!err)
- return 0;
+ /* if we have a custom rate selection , then use that one */
+ if (data->choose_clock)
+ return data->choose_clock(hw, req, rates, rate_cnt);
- /* otherwise choose the "closest" one */
- return bcm2835_clock_determine_closest_rate(hw, req, rates,
- rate_cnt);
+ /* otherwise choose the "int-then-frac" one */
+ return bcm2835_clock_choose_int_then_frac(hw, req, rates, rate_cnt);
}
static int _bcm2835_clk_set_parent(struct bcm2835_cprman *cprman,
@@ -2108,6 +2128,30 @@ static const struct bcm2835_clock_data *bcm2835_register_clock_of(
err = of_property_read_u32(nc, "brcm,min-fract-div", &value);
if (!err)
data->min_frac_div = value << CM_DIV_FRAC_BITS;
+ /* choose alternate clock selector */
+ err = of_property_read_u32(nc, "brcm,clock-selector", &value);
+ if (!err) {
+ switch (value) {
+ case BCM2835_CHOOSE_CLOCK_DEFAULT:
+ case BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC:
+ data->choose_clock =
+ bcm2835_clock_choose_int_then_frac;
+ break;
+ case BCM2835_CHOOSE_CLOCK_INTEGER:
+ data->choose_clock =
+ bcm2835_clock_choose_integer_div;
+ break;
+ case BCM2835_CHOOSE_CLOCK_CLOSEST:
+ data->choose_clock =
+ bcm2835_clock_choose_closest_rate;
+ break;
+ default:
+ dev_err(dev,
+ "clock %s: undefined clock-selector: %d\n",
+ data->name, value);
+ break;
+ }
+ }
/* and return the result */
return data;
diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h
index eb73380..b00880e 100644
--- a/include/dt-bindings/clock/bcm2835.h
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -76,3 +76,9 @@
#define BCM2835_MASH_INTEGER BCM2835_MASH_NONE
#define BCM2835_MASH_FRAC BCM2835_MASH_ORDER_1
+
+/* the possible clock selectors */
+#define BCM2835_CHOOSE_CLOCK_DEFAULT 0
+#define BCM2835_CHOOSE_CLOCK_INTEGER 1
+#define BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC 2
+#define BCM2835_CHOOSE_CLOCK_CLOSEST 3
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 8/9] dt-bindings: bcm2835: document optional per clock dt-nodes
2016-01-19 14:51 ` kernel
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
-1 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
Document how to modify per clock default behaviour
via the device-tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
.../bindings/clock/brcm,bcm2835-cprman.txt | 33 ++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
index e56a1df..794c4ac 100644
--- a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
@@ -17,6 +17,26 @@ Required properties:
found in include/dt-bindings/clock/bcm2835.h
- reg: Specifies base physical address and size of the registers
- clocks: The external oscillator clock phandle
+- #address-cells number of cells required to define a clock
+- #size-cells Should be 0
+
+Subnodes:
+
+It is possible to apply optional settings per clock to modify clock
+selection behaviour.
+For each clock there may be a subnode that may contain the following:
+
+Required properties:
+- reg - clock id
+
+Optional properties:
+- parent-clock-names - list of parrent-clock names
+ this list is validated againt the default list
+ of parent clocks and is used in this order.
+- brcm,clock-selector - the clock selector to use
+- brcm,mash-max-order - the maximum order of the fractional divider
+- brcm,min-fract-div - the minimum divider required when using
+ the fractional divider
Example:
@@ -33,6 +53,19 @@ Example:
#clock-cells = <1>;
reg = <0x7e101000 0x2000>;
clocks = <&clk_osc>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* custom settings for the PCM clock */
+ clock@BCM2835_CLOCK_PCM {
+ reg = <BCM2835_CLOCK_PCM>;
+ parent-clock-names = "xosc", "plld_per";
+ brcm,clock-selector =
+ <BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC>;
+ brcm,mash-max-order = <BCM2835_MASH_ORDER_3>;
+ brcm,min-fract-div = <20>;
+ };
};
i2c0: i2c@7e205000 {
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 8/9] dt-bindings: bcm2835: document optional per clock dt-nodes
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
Document how to modify per clock default behaviour
via the device-tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
.../bindings/clock/brcm,bcm2835-cprman.txt | 33 ++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
index e56a1df..794c4ac 100644
--- a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
@@ -17,6 +17,26 @@ Required properties:
found in include/dt-bindings/clock/bcm2835.h
- reg: Specifies base physical address and size of the registers
- clocks: The external oscillator clock phandle
+- #address-cells number of cells required to define a clock
+- #size-cells Should be 0
+
+Subnodes:
+
+It is possible to apply optional settings per clock to modify clock
+selection behaviour.
+For each clock there may be a subnode that may contain the following:
+
+Required properties:
+- reg - clock id
+
+Optional properties:
+- parent-clock-names - list of parrent-clock names
+ this list is validated againt the default list
+ of parent clocks and is used in this order.
+- brcm,clock-selector - the clock selector to use
+- brcm,mash-max-order - the maximum order of the fractional divider
+- brcm,min-fract-div - the minimum divider required when using
+ the fractional divider
Example:
@@ -33,6 +53,19 @@ Example:
#clock-cells = <1>;
reg = <0x7e101000 0x2000>;
clocks = <&clk_osc>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* custom settings for the PCM clock */
+ clock at BCM2835_CLOCK_PCM {
+ reg = <BCM2835_CLOCK_PCM>;
+ parent-clock-names = "xosc", "plld_per";
+ brcm,clock-selector =
+ <BCM2835_CHOOSE_CLOCK_INTEGER_THEN_FRAC>;
+ brcm,mash-max-order = <BCM2835_MASH_ORDER_3>;
+ brcm,min-fract-div = <20>;
+ };
};
i2c0: i2c at 7e205000 {
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 9/9] clk: bcm2835: expose raw clock-registers via debugfs
2016-01-19 14:51 ` kernel
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
-1 siblings, 0 replies; 27+ messages in thread
From: kernel @ 2016-01-19 14:51 UTC (permalink / raw)
To: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Cc: Martin Sperl
From: Martin Sperl <kernel@martin.sperl.org>
For debugging purposes under some circumstance
it helps to be able to see the actual clock registers.
E.g: when looking at the clock divider it is helpful to
see what the actual clock divider is.
This patch exposes all the clock registers specific to each
clock/pll/pll-divider via debugfs.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 101 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 101 insertions(+)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index c381cb1..29abae6 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -40,6 +40,7 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/clk/bcm2835.h>
+#include <linux/debugfs.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
@@ -379,6 +380,27 @@ static inline u32 cprman_read(struct bcm2835_cprman *cprman, u32 reg)
return readl(cprman->regs + reg);
}
+static int bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base,
+ struct debugfs_reg32 *regs, size_t nregs,
+ struct dentry *dentry)
+{
+ struct dentry *regdump;
+ struct debugfs_regset32 *regset;
+
+ regset = devm_kzalloc(cprman->dev, sizeof(*regset), GFP_KERNEL);
+ if (!regset)
+ return -ENOMEM;
+
+ regset->regs = regs;
+ regset->nregs = nregs;
+ regset->base = cprman->regs + base;
+
+ regdump = debugfs_create_regset32("regdump", S_IRUGO, dentry,
+ regset);
+
+ return regdump ? 0 : -ENOMEM;
+}
+
/*
* These are fixed clocks. They're probably not all root clocks and it may
* be possible to turn them on and off but until this is mapped out better
@@ -1360,6 +1382,36 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
return 0;
}
+static int bcm2835_pll_debug_init(struct clk_hw *hw,
+ struct dentry *dentry)
+{
+ struct bcm2835_pll *pll = container_of(hw, struct bcm2835_pll, hw);
+ struct bcm2835_cprman *cprman = pll->cprman;
+ const struct bcm2835_pll_data *data = pll->data;
+ struct debugfs_reg32 *regs;
+
+ regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
+ if (!regs)
+ return -ENOMEM;
+
+ regs[0].name = "cm_ctrl";
+ regs[0].offset = data->cm_ctrl_reg;
+ regs[1].name = "a2w_ctrl";
+ regs[1].offset = data->a2w_ctrl_reg;
+ regs[2].name = "frac";
+ regs[2].offset = data->frac_reg;
+ regs[3].name = "ana0";
+ regs[3].offset = data->ana_reg_base + 0 * 4;
+ regs[4].name = "ana1";
+ regs[4].offset = data->ana_reg_base + 1 * 4;
+ regs[5].name = "ana2";
+ regs[5].offset = data->ana_reg_base + 2 * 4;
+ regs[6].name = "ana3";
+ regs[6].offset = data->ana_reg_base + 3 * 4;
+
+ return bcm2835_debugfs_regset(cprman, 0, regs, 7, dentry);
+}
+
static const struct clk_ops bcm2835_pll_clk_ops = {
.is_prepared = bcm2835_pll_is_on,
.prepare = bcm2835_pll_on,
@@ -1367,6 +1419,7 @@ static const struct clk_ops bcm2835_pll_clk_ops = {
.recalc_rate = bcm2835_pll_get_rate,
.set_rate = bcm2835_pll_set_rate,
.round_rate = bcm2835_pll_round_rate,
+ .debug_init = bcm2835_pll_debug_init,
};
struct bcm2835_pll_divider {
@@ -1461,6 +1514,26 @@ static int bcm2835_pll_divider_set_rate(struct clk_hw *hw,
return 0;
}
+static int bcm2835_pll_divider_debug_init(struct clk_hw *hw,
+ struct dentry *dentry)
+{
+ struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw);
+ struct bcm2835_cprman *cprman = divider->cprman;
+ const struct bcm2835_pll_divider_data *data = divider->data;
+ struct debugfs_reg32 *regs;
+
+ regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
+ if (!regs)
+ return -ENOMEM;
+
+ regs[0].name = "cm";
+ regs[0].offset = data->cm_reg;
+ regs[1].name = "a2w";
+ regs[1].offset = data->a2w_reg;
+
+ return bcm2835_debugfs_regset(cprman, 0, regs, 2, dentry);
+}
+
static const struct clk_ops bcm2835_pll_divider_clk_ops = {
.is_prepared = bcm2835_pll_divider_is_on,
.prepare = bcm2835_pll_divider_on,
@@ -1468,6 +1541,7 @@ static const struct clk_ops bcm2835_pll_divider_clk_ops = {
.recalc_rate = bcm2835_pll_divider_get_rate,
.set_rate = bcm2835_pll_divider_set_rate,
.round_rate = bcm2835_pll_divider_round_rate,
+ .debug_init = bcm2835_pll_divider_debug_init,
};
/*
@@ -1854,6 +1928,31 @@ static u8 bcm2835_clock_get_parent(struct clk_hw *hw)
return -EINVAL;
}
+static struct debugfs_reg32 bcm2835_debugfs_clock_reg32[] = {
+ {
+ .name = "ctl",
+ .offset = 0,
+ },
+ {
+ .name = "div",
+ .offset = 4,
+ },
+};
+
+static int bcm2835_clock_debug_init(struct clk_hw *hw,
+ struct dentry *dentry)
+{
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ struct bcm2835_cprman *cprman = clock->cprman;
+ const struct bcm2835_clock_data *data = clock->data;
+
+ return bcm2835_debugfs_regset(
+ cprman, data->ctl_reg,
+ bcm2835_debugfs_clock_reg32,
+ ARRAY_SIZE(bcm2835_debugfs_clock_reg32),
+ dentry);
+}
+
static const struct clk_ops bcm2835_clock_clk_ops = {
.is_prepared = bcm2835_clock_is_on,
.prepare = bcm2835_clock_on,
@@ -1863,6 +1962,7 @@ static const struct clk_ops bcm2835_clock_clk_ops = {
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
+ .debug_init = bcm2835_clock_debug_init,
};
static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
@@ -1881,6 +1981,7 @@ static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
+ .debug_init = bcm2835_clock_debug_init,
};
static struct device_node *bcm2835_find_dt_node(
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [RFC 9/9] clk: bcm2835: expose raw clock-registers via debugfs
@ 2016-01-19 14:51 ` kernel at martin.sperl.org
0 siblings, 0 replies; 27+ messages in thread
From: kernel at martin.sperl.org @ 2016-01-19 14:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Martin Sperl <kernel@martin.sperl.org>
For debugging purposes under some circumstance
it helps to be able to see the actual clock registers.
E.g: when looking at the clock divider it is helpful to
see what the actual clock divider is.
This patch exposes all the clock registers specific to each
clock/pll/pll-divider via debugfs.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/clk/bcm/clk-bcm2835.c | 101 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 101 insertions(+)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index c381cb1..29abae6 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -40,6 +40,7 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/clk/bcm2835.h>
+#include <linux/debugfs.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
@@ -379,6 +380,27 @@ static inline u32 cprman_read(struct bcm2835_cprman *cprman, u32 reg)
return readl(cprman->regs + reg);
}
+static int bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base,
+ struct debugfs_reg32 *regs, size_t nregs,
+ struct dentry *dentry)
+{
+ struct dentry *regdump;
+ struct debugfs_regset32 *regset;
+
+ regset = devm_kzalloc(cprman->dev, sizeof(*regset), GFP_KERNEL);
+ if (!regset)
+ return -ENOMEM;
+
+ regset->regs = regs;
+ regset->nregs = nregs;
+ regset->base = cprman->regs + base;
+
+ regdump = debugfs_create_regset32("regdump", S_IRUGO, dentry,
+ regset);
+
+ return regdump ? 0 : -ENOMEM;
+}
+
/*
* These are fixed clocks. They're probably not all root clocks and it may
* be possible to turn them on and off but until this is mapped out better
@@ -1360,6 +1382,36 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
return 0;
}
+static int bcm2835_pll_debug_init(struct clk_hw *hw,
+ struct dentry *dentry)
+{
+ struct bcm2835_pll *pll = container_of(hw, struct bcm2835_pll, hw);
+ struct bcm2835_cprman *cprman = pll->cprman;
+ const struct bcm2835_pll_data *data = pll->data;
+ struct debugfs_reg32 *regs;
+
+ regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
+ if (!regs)
+ return -ENOMEM;
+
+ regs[0].name = "cm_ctrl";
+ regs[0].offset = data->cm_ctrl_reg;
+ regs[1].name = "a2w_ctrl";
+ regs[1].offset = data->a2w_ctrl_reg;
+ regs[2].name = "frac";
+ regs[2].offset = data->frac_reg;
+ regs[3].name = "ana0";
+ regs[3].offset = data->ana_reg_base + 0 * 4;
+ regs[4].name = "ana1";
+ regs[4].offset = data->ana_reg_base + 1 * 4;
+ regs[5].name = "ana2";
+ regs[5].offset = data->ana_reg_base + 2 * 4;
+ regs[6].name = "ana3";
+ regs[6].offset = data->ana_reg_base + 3 * 4;
+
+ return bcm2835_debugfs_regset(cprman, 0, regs, 7, dentry);
+}
+
static const struct clk_ops bcm2835_pll_clk_ops = {
.is_prepared = bcm2835_pll_is_on,
.prepare = bcm2835_pll_on,
@@ -1367,6 +1419,7 @@ static const struct clk_ops bcm2835_pll_clk_ops = {
.recalc_rate = bcm2835_pll_get_rate,
.set_rate = bcm2835_pll_set_rate,
.round_rate = bcm2835_pll_round_rate,
+ .debug_init = bcm2835_pll_debug_init,
};
struct bcm2835_pll_divider {
@@ -1461,6 +1514,26 @@ static int bcm2835_pll_divider_set_rate(struct clk_hw *hw,
return 0;
}
+static int bcm2835_pll_divider_debug_init(struct clk_hw *hw,
+ struct dentry *dentry)
+{
+ struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw);
+ struct bcm2835_cprman *cprman = divider->cprman;
+ const struct bcm2835_pll_divider_data *data = divider->data;
+ struct debugfs_reg32 *regs;
+
+ regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
+ if (!regs)
+ return -ENOMEM;
+
+ regs[0].name = "cm";
+ regs[0].offset = data->cm_reg;
+ regs[1].name = "a2w";
+ regs[1].offset = data->a2w_reg;
+
+ return bcm2835_debugfs_regset(cprman, 0, regs, 2, dentry);
+}
+
static const struct clk_ops bcm2835_pll_divider_clk_ops = {
.is_prepared = bcm2835_pll_divider_is_on,
.prepare = bcm2835_pll_divider_on,
@@ -1468,6 +1541,7 @@ static const struct clk_ops bcm2835_pll_divider_clk_ops = {
.recalc_rate = bcm2835_pll_divider_get_rate,
.set_rate = bcm2835_pll_divider_set_rate,
.round_rate = bcm2835_pll_divider_round_rate,
+ .debug_init = bcm2835_pll_divider_debug_init,
};
/*
@@ -1854,6 +1928,31 @@ static u8 bcm2835_clock_get_parent(struct clk_hw *hw)
return -EINVAL;
}
+static struct debugfs_reg32 bcm2835_debugfs_clock_reg32[] = {
+ {
+ .name = "ctl",
+ .offset = 0,
+ },
+ {
+ .name = "div",
+ .offset = 4,
+ },
+};
+
+static int bcm2835_clock_debug_init(struct clk_hw *hw,
+ struct dentry *dentry)
+{
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ struct bcm2835_cprman *cprman = clock->cprman;
+ const struct bcm2835_clock_data *data = clock->data;
+
+ return bcm2835_debugfs_regset(
+ cprman, data->ctl_reg,
+ bcm2835_debugfs_clock_reg32,
+ ARRAY_SIZE(bcm2835_debugfs_clock_reg32),
+ dentry);
+}
+
static const struct clk_ops bcm2835_clock_clk_ops = {
.is_prepared = bcm2835_clock_is_on,
.prepare = bcm2835_clock_on,
@@ -1863,6 +1962,7 @@ static const struct clk_ops bcm2835_clock_clk_ops = {
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
+ .debug_init = bcm2835_clock_debug_init,
};
static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
@@ -1881,6 +1981,7 @@ static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
+ .debug_init = bcm2835_clock_debug_init,
};
static struct device_node *bcm2835_find_dt_node(
--
1.7.10.4
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [RFC 2/9] clk: bcm2835: add support for parent selection in DT
2016-01-19 14:51 ` kernel at martin.sperl.org
@ 2016-01-21 8:26 ` Sascha Hauer
-1 siblings, 0 replies; 27+ messages in thread
From: Sascha Hauer @ 2016-01-21 8:26 UTC (permalink / raw)
To: kernel
Cc: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
Martin,
On Tue, Jan 19, 2016 at 02:51:33PM +0000, kernel@martin.sperl.org wrote:
> From: Martin Sperl <kernel@martin.sperl.org>
>
> Allow for a per clock custom selection of clocks in the device tree.
>
> Basic setup in dt looks like this:
> clock@BCM2835_CLOCK_PCM {
> reg = <BCM2835_CLOCK_PCM>;
> parent-clock-names = "xosc", "plld_per", "plla_per", "pll_aux_per";
> };
Isn't this the same as the already existing assigned-clock-parents property?
If yes, that should be used.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 27+ messages in thread
* [RFC 2/9] clk: bcm2835: add support for parent selection in DT
@ 2016-01-21 8:26 ` Sascha Hauer
0 siblings, 0 replies; 27+ messages in thread
From: Sascha Hauer @ 2016-01-21 8:26 UTC (permalink / raw)
To: linux-arm-kernel
Martin,
On Tue, Jan 19, 2016 at 02:51:33PM +0000, kernel at martin.sperl.org wrote:
> From: Martin Sperl <kernel@martin.sperl.org>
>
> Allow for a per clock custom selection of clocks in the device tree.
>
> Basic setup in dt looks like this:
> clock at BCM2835_CLOCK_PCM {
> reg = <BCM2835_CLOCK_PCM>;
> parent-clock-names = "xosc", "plld_per", "plla_per", "pll_aux_per";
> };
Isn't this the same as the already existing assigned-clock-parents property?
If yes, that should be used.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [RFC 2/9] clk: bcm2835: add support for parent selection in DT
2016-01-21 8:26 ` Sascha Hauer
@ 2016-02-08 13:30 ` Martin Sperl
-1 siblings, 0 replies; 27+ messages in thread
From: Martin Sperl @ 2016-02-08 13:30 UTC (permalink / raw)
To: Sascha Hauer
Cc: Rob Herring, Stephen Warren, Lee Jones, Eric Anholt,
Michael Turquette, Stephen Boyd, Remi Pommarel, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-clk
On 21.01.2016 09:26, Sascha Hauer wrote:
> Martin,
>
> On Tue, Jan 19, 2016 at 02:51:33PM +0000, kernel@martin.sperl.org wrote:
>> From: Martin Sperl <kernel@martin.sperl.org>
>>
>> Allow for a per clock custom selection of clocks in the device tree.
>>
>> Basic setup in dt looks like this:
>> clock@BCM2835_CLOCK_PCM {
>> reg = <BCM2835_CLOCK_PCM>;
>> parent-clock-names = "xosc", "plld_per", "plla_per", "pll_aux_per";
>> };
>
> Isn't this the same as the already existing assigned-clock-parents property?
> If yes, that should be used.
It is not 100% identical, as the parent-clock-names do provide ordering
of clocks to be selected, which - under some circumstances may be
beneficial - e.g: when having a parent clock with 500MHz and 1000MHz,
then the higher clock could get given preference by switching ordering...
Also when using:
assigned-clock-parents = <&clk_osc 0>, <&clocks BCM2835_PLLD_PER>;
I get strange indexes passed when calling set_parent - so this would
need to get rewritten to support assigned-clock-parents correctly -
calculating the index on the fly...
^ permalink raw reply [flat|nested] 27+ messages in thread
* [RFC 2/9] clk: bcm2835: add support for parent selection in DT
@ 2016-02-08 13:30 ` Martin Sperl
0 siblings, 0 replies; 27+ messages in thread
From: Martin Sperl @ 2016-02-08 13:30 UTC (permalink / raw)
To: linux-arm-kernel
On 21.01.2016 09:26, Sascha Hauer wrote:
> Martin,
>
> On Tue, Jan 19, 2016 at 02:51:33PM +0000, kernel at martin.sperl.org wrote:
>> From: Martin Sperl <kernel@martin.sperl.org>
>>
>> Allow for a per clock custom selection of clocks in the device tree.
>>
>> Basic setup in dt looks like this:
>> clock at BCM2835_CLOCK_PCM {
>> reg = <BCM2835_CLOCK_PCM>;
>> parent-clock-names = "xosc", "plld_per", "plla_per", "pll_aux_per";
>> };
>
> Isn't this the same as the already existing assigned-clock-parents property?
> If yes, that should be used.
It is not 100% identical, as the parent-clock-names do provide ordering
of clocks to be selected, which - under some circumstances may be
beneficial - e.g: when having a parent clock with 500MHz and 1000MHz,
then the higher clock could get given preference by switching ordering...
Also when using:
assigned-clock-parents = <&clk_osc 0>, <&clocks BCM2835_PLLD_PER>;
I get strange indexes passed when calling set_parent - so this would
need to get rewritten to support assigned-clock-parents correctly -
calculating the index on the fly...
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2016-02-08 13:30 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-01-19 14:51 [RFC 0/9] Allow modifications of specific clocks via DT and more kernel-TqfNSX0MhmxHKSADF0wUEw
2016-01-19 14:51 ` kernel at martin.sperl.org
2016-01-19 14:51 ` kernel
2016-01-19 14:51 ` [RFC 2/9] clk: bcm2835: add support for parent selection in DT kernel
2016-01-19 14:51 ` kernel at martin.sperl.org
2016-01-21 8:26 ` Sascha Hauer
2016-01-21 8:26 ` Sascha Hauer
2016-02-08 13:30 ` Martin Sperl
2016-02-08 13:30 ` Martin Sperl
2016-01-19 14:51 ` [RFC 3/9] clk: bcm2835: add ability to control mash level via device-tree kernel
2016-01-19 14:51 ` kernel at martin.sperl.org
2016-01-19 14:51 ` [RFC 4/9] clk: bcm2835: reorganize bcm2835_clock_determine_rate kernel
2016-01-19 14:51 ` kernel at martin.sperl.org
2016-01-19 14:51 ` [RFC 5/9] clk: bcm2835: prefer clocks that use integer dividers kernel
2016-01-19 14:51 ` kernel at martin.sperl.org
2016-01-19 14:51 ` [RFC 6/9] clk: bcm2835: allow to define a minimum fractional divider in DT kernel
2016-01-19 14:51 ` kernel at martin.sperl.org
[not found] ` <1453215100-2382-1-git-send-email-kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
2016-01-19 14:51 ` [RFC 1/9] clk: bcm2835: add basic device tree support for per clock settings kernel-TqfNSX0MhmxHKSADF0wUEw
2016-01-19 14:51 ` kernel at martin.sperl.org
2016-01-19 14:51 ` kernel
2016-01-19 14:51 ` [RFC 7/9] clk: bcm2835: allow clock choosing mechanims to be selected in DT kernel-TqfNSX0MhmxHKSADF0wUEw
2016-01-19 14:51 ` kernel at martin.sperl.org
2016-01-19 14:51 ` kernel
2016-01-19 14:51 ` [RFC 8/9] dt-bindings: bcm2835: document optional per clock dt-nodes kernel
2016-01-19 14:51 ` kernel at martin.sperl.org
2016-01-19 14:51 ` [RFC 9/9] clk: bcm2835: expose raw clock-registers via debugfs kernel
2016-01-19 14:51 ` kernel at martin.sperl.org
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all data and code used by this external index.