[PATCH V3 00/11] soc: mediatek: PMIC wrap: add MT6323/2701/7623 support

[PATCH V3 00/11] soc: mediatek: PMIC wrap: add MT6323/2701/7623 support

[John Crispin]

Changes in V3:
* I accidentially sent a V2 about 15 minutes ago. Unfortunatley the time
  inside the VM that i used was wrong and lagged by 6 days. V3 is the same
  as V2 but with the correct time.

Changes in V2:
* rebase the code on the MTK internal driver

John Crispin (11):
  dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC
    wrapper doc
  soc: mediatek: PMIC wrap: don't duplicate the wrapper data
  soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clock
  soc: mediatek: PMIC wrap: split SoC specific init into callback
  soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for
    MT2701/7623
  soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for
    MT2701/7623
  soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type
    struct
  soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and
    pwrap_is_mt8173()
  soc: mediatek: PMIC wrap: add a slave specific struct
  soc: mediatek: PMIC wrap: add mt6323 slave support
  soc: mediatek: PMIC wrap: add MT2701/7623 support

 .../devicetree/bindings/soc/mediatek/pwrap.txt     |    1 +
 drivers/soc/mediatek/mtk-pmic-wrap.c               |  560 +++++++++++++++-----
 2 files changed, 430 insertions(+), 131 deletions(-)

-- 
1.7.10.4

[PATCH V3 00/11] soc: mediatek: PMIC wrap: add MT6323/2701/7623 support

[John Crispin]

Changes in V3:
* I accidentially sent a V2 about 15 minutes ago. Unfortunatley the time
  inside the VM that i used was wrong and lagged by 6 days. V3 is the same
  as V2 but with the correct time.

Changes in V2:
* rebase the code on the MTK internal driver

John Crispin (11):
  dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC
    wrapper doc
  soc: mediatek: PMIC wrap: don't duplicate the wrapper data
  soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clock
  soc: mediatek: PMIC wrap: split SoC specific init into callback
  soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for
    MT2701/7623
  soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for
    MT2701/7623
  soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type
    struct
  soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and
    pwrap_is_mt8173()
  soc: mediatek: PMIC wrap: add a slave specific struct
  soc: mediatek: PMIC wrap: add mt6323 slave support
  soc: mediatek: PMIC wrap: add MT2701/7623 support

 .../devicetree/bindings/soc/mediatek/pwrap.txt     |    1 +
 drivers/soc/mediatek/mtk-pmic-wrap.c               |  560 +++++++++++++++-----
 2 files changed, 430 insertions(+), 131 deletions(-)

-- 
1.7.10.4

[PATCH V3 01/11] dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC wrapper doc

[John Crispin]

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: devicetree@vger.kernel.org
---
 Documentation/devicetree/bindings/soc/mediatek/pwrap.txt |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index ddeb5b6..107700d 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -18,6 +18,7 @@ IP Pairing
 
 Required properties in pwrap device node.
 - compatible:
+	"mediatek,mt2701-pwrap" for MT2701/7623 SoCs
 	"mediatek,mt8135-pwrap" for MT8135 SoCs
 	"mediatek,mt8173-pwrap" for MT8173 SoCs
 - interrupts: IRQ for pwrap in SOC
-- 
1.7.10.4

[PATCH V3 01/11] dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC wrapper doc

[John Crispin]

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: devicetree at vger.kernel.org
---
 Documentation/devicetree/bindings/soc/mediatek/pwrap.txt |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index ddeb5b6..107700d 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -18,6 +18,7 @@ IP Pairing
 
 Required properties in pwrap device node.
 - compatible:
+	"mediatek,mt2701-pwrap" for MT2701/7623 SoCs
 	"mediatek,mt8135-pwrap" for MT8135 SoCs
 	"mediatek,mt8173-pwrap" for MT8173 SoCs
 - interrupts: IRQ for pwrap in SOC
-- 
1.7.10.4

Re: [PATCH V3 01/11] dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC wrapper doc

[Rob Herring]

On Mon, Jan 25, 2016 at 10:53:14AM +0100, John Crispin wrote:
> Signed-off-by: John Crispin <blogic@openwrt.org>
> Cc: devicetree@vger.kernel.org
> ---
>  Documentation/devicetree/bindings/soc/mediatek/pwrap.txt |    1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring robh@kernel.org>

[PATCH V3 01/11] dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC wrapper doc

[Rob Herring]

On Mon, Jan 25, 2016 at 10:53:14AM +0100, John Crispin wrote:
> Signed-off-by: John Crispin <blogic@openwrt.org>
> Cc: devicetree at vger.kernel.org
> ---
>  Documentation/devicetree/bindings/soc/mediatek/pwrap.txt |    1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring robh at kernel.org>

Re: [PATCH V3 01/11] dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC wrapper doc

[Rob Herring]

On Mon, Jan 25, 2016 at 10:53:14AM +0100, John Crispin wrote:
> Signed-off-by: John Crispin <blogic-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> ---
>  Documentation/devicetree/bindings/soc/mediatek/pwrap.txt |    1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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[PATCH V3 02/11] soc: mediatek: PMIC wrap: don't duplicate the wrapper data

[John Crispin]

As we add support for more devices struct pmic_wrapper_type will grow and
we do not really want to start duplicating all the elements in
struct pmic_wrapper.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   22 ++++++++--------------
 1 file changed, 8 insertions(+), 14 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 0d9b19a..340c4b5 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -376,9 +376,7 @@ struct pmic_wrapper {
 	struct device *dev;
 	void __iomem *base;
 	struct regmap *regmap;
-	int *regs;
-	enum pwrap_type type;
-	u32 arb_en_all;
+	const struct pmic_wrapper_type *master;
 	struct clk *clk_spi;
 	struct clk *clk_wrap;
 	struct reset_control *rstc;
@@ -389,22 +387,22 @@ struct pmic_wrapper {
 
 static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
 {
-	return wrp->type == PWRAP_MT8135;
+	return wrp->master->type == PWRAP_MT8135;
 }
 
 static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
 {
-	return wrp->type == PWRAP_MT8173;
+	return wrp->master->type == PWRAP_MT8173;
 }
 
 static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
 {
-	return readl(wrp->base + wrp->regs[reg]);
+	return readl(wrp->base + wrp->master->regs[reg]);
 }
 
 static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
 {
-	writel(val, wrp->base + wrp->regs[reg]);
+	writel(val, wrp->base + wrp->master->regs[reg]);
 }
 
 static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
@@ -697,7 +695,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 
 	pwrap_writel(wrp, 1, PWRAP_WRAP_EN);
 
-	pwrap_writel(wrp, wrp->arb_en_all, PWRAP_HIPRIO_ARB_EN);
+	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 
 	pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
 
@@ -742,7 +740,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 0x1, PWRAP_CRC_EN);
 	pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE);
 	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
-	pwrap_writel(wrp, wrp->arb_en_all, PWRAP_HIPRIO_ARB_EN);
+	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 
 	if (pwrap_is_mt8135(wrp))
 		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
@@ -836,7 +834,6 @@ static int pwrap_probe(struct platform_device *pdev)
 	struct device_node *np = pdev->dev.of_node;
 	const struct of_device_id *of_id =
 		of_match_device(of_pwrap_match_tbl, &pdev->dev);
-	const struct pmic_wrapper_type *type;
 	struct resource *res;
 
 	wrp = devm_kzalloc(&pdev->dev, sizeof(*wrp), GFP_KERNEL);
@@ -845,10 +842,7 @@ static int pwrap_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, wrp);
 
-	type = of_id->data;
-	wrp->regs = type->regs;
-	wrp->type = type->type;
-	wrp->arb_en_all = type->arb_en_all;
+	wrp->master = of_id->data;
 	wrp->dev = &pdev->dev;
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwrap");
-- 
1.7.10.4

[PATCH V3 02/11] soc: mediatek: PMIC wrap: don't duplicate the wrapper data

[John Crispin]

As we add support for more devices struct pmic_wrapper_type will grow and
we do not really want to start duplicating all the elements in
struct pmic_wrapper.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   22 ++++++++--------------
 1 file changed, 8 insertions(+), 14 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 0d9b19a..340c4b5 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -376,9 +376,7 @@ struct pmic_wrapper {
 	struct device *dev;
 	void __iomem *base;
 	struct regmap *regmap;
-	int *regs;
-	enum pwrap_type type;
-	u32 arb_en_all;
+	const struct pmic_wrapper_type *master;
 	struct clk *clk_spi;
 	struct clk *clk_wrap;
 	struct reset_control *rstc;
@@ -389,22 +387,22 @@ struct pmic_wrapper {
 
 static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
 {
-	return wrp->type == PWRAP_MT8135;
+	return wrp->master->type == PWRAP_MT8135;
 }
 
 static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
 {
-	return wrp->type == PWRAP_MT8173;
+	return wrp->master->type == PWRAP_MT8173;
 }
 
 static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
 {
-	return readl(wrp->base + wrp->regs[reg]);
+	return readl(wrp->base + wrp->master->regs[reg]);
 }
 
 static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
 {
-	writel(val, wrp->base + wrp->regs[reg]);
+	writel(val, wrp->base + wrp->master->regs[reg]);
 }
 
 static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
@@ -697,7 +695,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 
 	pwrap_writel(wrp, 1, PWRAP_WRAP_EN);
 
-	pwrap_writel(wrp, wrp->arb_en_all, PWRAP_HIPRIO_ARB_EN);
+	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 
 	pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
 
@@ -742,7 +740,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 0x1, PWRAP_CRC_EN);
 	pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE);
 	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
-	pwrap_writel(wrp, wrp->arb_en_all, PWRAP_HIPRIO_ARB_EN);
+	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 
 	if (pwrap_is_mt8135(wrp))
 		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
@@ -836,7 +834,6 @@ static int pwrap_probe(struct platform_device *pdev)
 	struct device_node *np = pdev->dev.of_node;
 	const struct of_device_id *of_id =
 		of_match_device(of_pwrap_match_tbl, &pdev->dev);
-	const struct pmic_wrapper_type *type;
 	struct resource *res;
 
 	wrp = devm_kzalloc(&pdev->dev, sizeof(*wrp), GFP_KERNEL);
@@ -845,10 +842,7 @@ static int pwrap_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, wrp);
 
-	type = of_id->data;
-	wrp->regs = type->regs;
-	wrp->type = type->type;
-	wrp->arb_en_all = type->arb_en_all;
+	wrp->master = of_id->data;
 	wrp->dev = &pdev->dev;
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwrap");
-- 
1.7.10.4

[PATCH V3 03/11] soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clock

[John Crispin]

Split init_reg_clock up into SoC specific callbacks. The patch also
reorders the code to avoid the need for callback function prototypes.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   70 ++++++++++++++++++----------------
 1 file changed, 38 insertions(+), 32 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 340c4b5..b22b664 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -354,24 +354,6 @@ enum pwrap_type {
 	PWRAP_MT8173,
 };
 
-struct pmic_wrapper_type {
-	int *regs;
-	enum pwrap_type type;
-	u32 arb_en_all;
-};
-
-static struct pmic_wrapper_type pwrap_mt8135 = {
-	.regs = mt8135_regs,
-	.type = PWRAP_MT8135,
-	.arb_en_all = 0x1ff,
-};
-
-static struct pmic_wrapper_type pwrap_mt8173 = {
-	.regs = mt8173_regs,
-	.type = PWRAP_MT8173,
-	.arb_en_all = 0x3f,
-};
-
 struct pmic_wrapper {
 	struct device *dev;
 	void __iomem *base;
@@ -385,6 +367,13 @@ struct pmic_wrapper {
 	void __iomem *bridge_base;
 };
 
+struct pmic_wrapper_type {
+	int *regs;
+	enum pwrap_type type;
+	u32 arb_en_all;
+	int (*init_reg_clock)(struct pmic_wrapper *wrp);
+};
+
 static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
 {
 	return wrp->master->type == PWRAP_MT8135;
@@ -578,20 +567,23 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
 	return 0;
 }
 
-static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
+static int pwrap_mt8135_init_reg_clock(struct pmic_wrapper *wrp)
 {
-	if (pwrap_is_mt8135(wrp)) {
-		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
-		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
-		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
-		pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
-		pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
-	} else {
-		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
-		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
-		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
-		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
-	}
+	pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
+	pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
+	pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
+	pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
+	pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
+
+	return 0;
+}
+
+static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
+{
+	pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
+	pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
+	pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
+	pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
 
 	return 0;
 }
@@ -699,7 +691,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 
 	pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
 
-	ret = pwrap_init_reg_clock(wrp);
+	ret = wrp->master->init_reg_clock(wrp);
 	if (ret)
 		return ret;
 
@@ -814,6 +806,20 @@ static const struct regmap_config pwrap_regmap_config = {
 	.max_register = 0xffff,
 };
 
+static struct pmic_wrapper_type pwrap_mt8135 = {
+	.regs = mt8135_regs,
+	.type = PWRAP_MT8135,
+	.arb_en_all = 0x1ff,
+	.init_reg_clock = pwrap_mt8135_init_reg_clock,
+};
+
+static struct pmic_wrapper_type pwrap_mt8173 = {
+	.regs = mt8173_regs,
+	.type = PWRAP_MT8173,
+	.arb_en_all = 0x3f,
+	.init_reg_clock = pwrap_mt8173_init_reg_clock,
+};
+
 static struct of_device_id of_pwrap_match_tbl[] = {
 	{
 		.compatible = "mediatek,mt8135-pwrap",
-- 
1.7.10.4

[PATCH V3 03/11] soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clock

[John Crispin]

Split init_reg_clock up into SoC specific callbacks. The patch also
reorders the code to avoid the need for callback function prototypes.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   70 ++++++++++++++++++----------------
 1 file changed, 38 insertions(+), 32 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 340c4b5..b22b664 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -354,24 +354,6 @@ enum pwrap_type {
 	PWRAP_MT8173,
 };
 
-struct pmic_wrapper_type {
-	int *regs;
-	enum pwrap_type type;
-	u32 arb_en_all;
-};
-
-static struct pmic_wrapper_type pwrap_mt8135 = {
-	.regs = mt8135_regs,
-	.type = PWRAP_MT8135,
-	.arb_en_all = 0x1ff,
-};
-
-static struct pmic_wrapper_type pwrap_mt8173 = {
-	.regs = mt8173_regs,
-	.type = PWRAP_MT8173,
-	.arb_en_all = 0x3f,
-};
-
 struct pmic_wrapper {
 	struct device *dev;
 	void __iomem *base;
@@ -385,6 +367,13 @@ struct pmic_wrapper {
 	void __iomem *bridge_base;
 };
 
+struct pmic_wrapper_type {
+	int *regs;
+	enum pwrap_type type;
+	u32 arb_en_all;
+	int (*init_reg_clock)(struct pmic_wrapper *wrp);
+};
+
 static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
 {
 	return wrp->master->type == PWRAP_MT8135;
@@ -578,20 +567,23 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
 	return 0;
 }
 
-static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
+static int pwrap_mt8135_init_reg_clock(struct pmic_wrapper *wrp)
 {
-	if (pwrap_is_mt8135(wrp)) {
-		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
-		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
-		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
-		pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
-		pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
-	} else {
-		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
-		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
-		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
-		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
-	}
+	pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
+	pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
+	pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
+	pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
+	pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
+
+	return 0;
+}
+
+static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
+{
+	pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
+	pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
+	pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
+	pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
 
 	return 0;
 }
@@ -699,7 +691,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 
 	pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
 
-	ret = pwrap_init_reg_clock(wrp);
+	ret = wrp->master->init_reg_clock(wrp);
 	if (ret)
 		return ret;
 
@@ -814,6 +806,20 @@ static const struct regmap_config pwrap_regmap_config = {
 	.max_register = 0xffff,
 };
 
+static struct pmic_wrapper_type pwrap_mt8135 = {
+	.regs = mt8135_regs,
+	.type = PWRAP_MT8135,
+	.arb_en_all = 0x1ff,
+	.init_reg_clock = pwrap_mt8135_init_reg_clock,
+};
+
+static struct pmic_wrapper_type pwrap_mt8173 = {
+	.regs = mt8173_regs,
+	.type = PWRAP_MT8173,
+	.arb_en_all = 0x3f,
+	.init_reg_clock = pwrap_mt8173_init_reg_clock,
+};
+
 static struct of_device_id of_pwrap_match_tbl[] = {
 	{
 		.compatible = "mediatek,mt8135-pwrap",
-- 
1.7.10.4

[PATCH V3 04/11] soc: mediatek: PMIC wrap: split SoC specific init into callback

[John Crispin]

This patch moves the SoC specific wrapper init code into separate callback
to avoid pwrap_init() getting too large.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   68 +++++++++++++++++++++-------------
 1 file changed, 42 insertions(+), 26 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index b22b664..ab2202d 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -372,6 +372,7 @@ struct pmic_wrapper_type {
 	enum pwrap_type type;
 	u32 arb_en_all;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
+	int (*init_special)(struct pmic_wrapper *wrp);
 };
 
 static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
@@ -665,6 +666,41 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	return 0;
 }
 
+static int pwrap_mt8135_init_special(struct pmic_wrapper *wrp)
+{
+	/* enable pwrap events and pwrap bridge in AP side */
+	pwrap_writel(wrp, 0x1, PWRAP_EVENT_IN_EN);
+	pwrap_writel(wrp, 0xffff, PWRAP_EVENT_DST_EN);
+	writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
+	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
+	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
+	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
+	writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
+	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
+	writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
+
+	/* enable PMIC event out and sources */
+	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
+		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
+		dev_err(wrp->dev, "enable dewrap fail\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+static int pwrap_mt8173_init_special(struct pmic_wrapper *wrp)
+{
+	/* PMIC_DEWRAP enables */
+	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
+		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
+		dev_err(wrp->dev, "enable dewrap fail\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
 static int pwrap_init(struct pmic_wrapper *wrp)
 {
 	int ret;
@@ -743,32 +779,10 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 0x5, PWRAP_STAUPD_PRD);
 	pwrap_writel(wrp, 0xff, PWRAP_STAUPD_GRPEN);
 
-	if (pwrap_is_mt8135(wrp)) {
-		/* enable pwrap events and pwrap bridge in AP side */
-		pwrap_writel(wrp, 0x1, PWRAP_EVENT_IN_EN);
-		pwrap_writel(wrp, 0xffff, PWRAP_EVENT_DST_EN);
-		writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
-		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
-		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
-		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
-		writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
-		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
-		writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
-
-		/* enable PMIC event out and sources */
-		if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
-				pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
-			dev_err(wrp->dev, "enable dewrap fail\n");
-			return -EFAULT;
-		}
-	} else {
-		/* PMIC_DEWRAP enables */
-		if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
-				pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
-			dev_err(wrp->dev, "enable dewrap fail\n");
-			return -EFAULT;
-		}
-	}
+	if (wrp->master->init_special)
+		ret = wrp->master->init_special(wrp);
+	if (ret)
+		return ret;
 
 	/* Setup the init done registers */
 	pwrap_writel(wrp, 1, PWRAP_INIT_DONE2);
@@ -811,6 +825,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.type = PWRAP_MT8135,
 	.arb_en_all = 0x1ff,
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
+	.init_special = pwrap_mt8135_init_special,
 };
 
 static struct pmic_wrapper_type pwrap_mt8173 = {
@@ -818,6 +833,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 	.type = PWRAP_MT8173,
 	.arb_en_all = 0x3f,
 	.init_reg_clock = pwrap_mt8173_init_reg_clock,
+	.init_special = pwrap_mt8173_init_special,
 };
 
 static struct of_device_id of_pwrap_match_tbl[] = {
-- 
1.7.10.4

[PATCH V3 04/11] soc: mediatek: PMIC wrap: split SoC specific init into callback

[John Crispin]

This patch moves the SoC specific wrapper init code into separate callback
to avoid pwrap_init() getting too large.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   68 +++++++++++++++++++++-------------
 1 file changed, 42 insertions(+), 26 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index b22b664..ab2202d 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -372,6 +372,7 @@ struct pmic_wrapper_type {
 	enum pwrap_type type;
 	u32 arb_en_all;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
+	int (*init_special)(struct pmic_wrapper *wrp);
 };
 
 static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
@@ -665,6 +666,41 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	return 0;
 }
 
+static int pwrap_mt8135_init_special(struct pmic_wrapper *wrp)
+{
+	/* enable pwrap events and pwrap bridge in AP side */
+	pwrap_writel(wrp, 0x1, PWRAP_EVENT_IN_EN);
+	pwrap_writel(wrp, 0xffff, PWRAP_EVENT_DST_EN);
+	writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
+	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
+	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
+	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
+	writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
+	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
+	writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
+
+	/* enable PMIC event out and sources */
+	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
+		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
+		dev_err(wrp->dev, "enable dewrap fail\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+static int pwrap_mt8173_init_special(struct pmic_wrapper *wrp)
+{
+	/* PMIC_DEWRAP enables */
+	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
+		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
+		dev_err(wrp->dev, "enable dewrap fail\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
 static int pwrap_init(struct pmic_wrapper *wrp)
 {
 	int ret;
@@ -743,32 +779,10 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 0x5, PWRAP_STAUPD_PRD);
 	pwrap_writel(wrp, 0xff, PWRAP_STAUPD_GRPEN);
 
-	if (pwrap_is_mt8135(wrp)) {
-		/* enable pwrap events and pwrap bridge in AP side */
-		pwrap_writel(wrp, 0x1, PWRAP_EVENT_IN_EN);
-		pwrap_writel(wrp, 0xffff, PWRAP_EVENT_DST_EN);
-		writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
-		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
-		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
-		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
-		writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
-		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
-		writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
-
-		/* enable PMIC event out and sources */
-		if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
-				pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
-			dev_err(wrp->dev, "enable dewrap fail\n");
-			return -EFAULT;
-		}
-	} else {
-		/* PMIC_DEWRAP enables */
-		if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
-				pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
-			dev_err(wrp->dev, "enable dewrap fail\n");
-			return -EFAULT;
-		}
-	}
+	if (wrp->master->init_special)
+		ret = wrp->master->init_special(wrp);
+	if (ret)
+		return ret;
 
 	/* Setup the init done registers */
 	pwrap_writel(wrp, 1, PWRAP_INIT_DONE2);
@@ -811,6 +825,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.type = PWRAP_MT8135,
 	.arb_en_all = 0x1ff,
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
+	.init_special = pwrap_mt8135_init_special,
 };
 
 static struct pmic_wrapper_type pwrap_mt8173 = {
@@ -818,6 +833,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 	.type = PWRAP_MT8173,
 	.arb_en_all = 0x3f,
 	.init_reg_clock = pwrap_mt8173_init_reg_clock,
+	.init_special = pwrap_mt8173_init_special,
 };
 
 static struct of_device_id of_pwrap_match_tbl[] = {
-- 
1.7.10.4

Re: [PATCH V3 04/11] soc: mediatek: PMIC wrap: split SoC specific init into callback

[Matthias Brugger]

On 25/01/16 10:53, John Crispin wrote:
> This patch moves the SoC specific wrapper init code into separate callback
> to avoid pwrap_init() getting too large.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c |   68 +++++++++++++++++++++-------------
>   1 file changed, 42 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index b22b664..ab2202d 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -372,6 +372,7 @@ struct pmic_wrapper_type {
>   	enum pwrap_type type;
>   	u32 arb_en_all;
>   	int (*init_reg_clock)(struct pmic_wrapper *wrp);
> +	int (*init_special)(struct pmic_wrapper *wrp);
>   };
>
>   static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
> @@ -665,6 +666,41 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
>   	return 0;
>   }
>
> +static int pwrap_mt8135_init_special(struct pmic_wrapper *wrp)
> +{
> +	/* enable pwrap events and pwrap bridge in AP side */
> +	pwrap_writel(wrp, 0x1, PWRAP_EVENT_IN_EN);
> +	pwrap_writel(wrp, 0xffff, PWRAP_EVENT_DST_EN);
> +	writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
> +	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
> +	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
> +	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
> +	writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
> +	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
> +	writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
> +
> +	/* enable PMIC event out and sources */
> +	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
> +		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
> +		dev_err(wrp->dev, "enable dewrap fail\n");
> +		return -EFAULT;
> +	}
> +
> +	return 0;
> +}
> +
> +static int pwrap_mt8173_init_special(struct pmic_wrapper *wrp)
> +{
> +	/* PMIC_DEWRAP enables */
> +	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
> +		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
> +		dev_err(wrp->dev, "enable dewrap fail\n");
> +		return -EFAULT;
> +	}
> +
> +	return 0;
> +}
> +
>   static int pwrap_init(struct pmic_wrapper *wrp)
>   {
>   	int ret;
> @@ -743,32 +779,10 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>   	pwrap_writel(wrp, 0x5, PWRAP_STAUPD_PRD);
>   	pwrap_writel(wrp, 0xff, PWRAP_STAUPD_GRPEN);
>
> -	if (pwrap_is_mt8135(wrp)) {
> -		/* enable pwrap events and pwrap bridge in AP side */
> -		pwrap_writel(wrp, 0x1, PWRAP_EVENT_IN_EN);
> -		pwrap_writel(wrp, 0xffff, PWRAP_EVENT_DST_EN);
> -		writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
> -		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
> -		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
> -		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
> -		writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
> -		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
> -		writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
> -
> -		/* enable PMIC event out and sources */
> -		if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
> -				pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
> -			dev_err(wrp->dev, "enable dewrap fail\n");
> -			return -EFAULT;
> -		}
> -	} else {
> -		/* PMIC_DEWRAP enables */
> -		if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
> -				pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
> -			dev_err(wrp->dev, "enable dewrap fail\n");
> -			return -EFAULT;
> -		}
> -	}
> +	if (wrp->master->init_special)
> +		ret = wrp->master->init_special(wrp);
> +	if (ret)
> +		return ret;
>

Check ret only if you have called init_special before.

Apart from that the patch look fine.

[PATCH V3 04/11] soc: mediatek: PMIC wrap: split SoC specific init into callback

[Matthias Brugger]

On 25/01/16 10:53, John Crispin wrote:
> This patch moves the SoC specific wrapper init code into separate callback
> to avoid pwrap_init() getting too large.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c |   68 +++++++++++++++++++++-------------
>   1 file changed, 42 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index b22b664..ab2202d 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -372,6 +372,7 @@ struct pmic_wrapper_type {
>   	enum pwrap_type type;
>   	u32 arb_en_all;
>   	int (*init_reg_clock)(struct pmic_wrapper *wrp);
> +	int (*init_special)(struct pmic_wrapper *wrp);
>   };
>
>   static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
> @@ -665,6 +666,41 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
>   	return 0;
>   }
>
> +static int pwrap_mt8135_init_special(struct pmic_wrapper *wrp)
> +{
> +	/* enable pwrap events and pwrap bridge in AP side */
> +	pwrap_writel(wrp, 0x1, PWRAP_EVENT_IN_EN);
> +	pwrap_writel(wrp, 0xffff, PWRAP_EVENT_DST_EN);
> +	writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
> +	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
> +	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
> +	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
> +	writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
> +	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
> +	writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
> +
> +	/* enable PMIC event out and sources */
> +	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
> +		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
> +		dev_err(wrp->dev, "enable dewrap fail\n");
> +		return -EFAULT;
> +	}
> +
> +	return 0;
> +}
> +
> +static int pwrap_mt8173_init_special(struct pmic_wrapper *wrp)
> +{
> +	/* PMIC_DEWRAP enables */
> +	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
> +		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
> +		dev_err(wrp->dev, "enable dewrap fail\n");
> +		return -EFAULT;
> +	}
> +
> +	return 0;
> +}
> +
>   static int pwrap_init(struct pmic_wrapper *wrp)
>   {
>   	int ret;
> @@ -743,32 +779,10 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>   	pwrap_writel(wrp, 0x5, PWRAP_STAUPD_PRD);
>   	pwrap_writel(wrp, 0xff, PWRAP_STAUPD_GRPEN);
>
> -	if (pwrap_is_mt8135(wrp)) {
> -		/* enable pwrap events and pwrap bridge in AP side */
> -		pwrap_writel(wrp, 0x1, PWRAP_EVENT_IN_EN);
> -		pwrap_writel(wrp, 0xffff, PWRAP_EVENT_DST_EN);
> -		writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
> -		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
> -		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
> -		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
> -		writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
> -		writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
> -		writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
> -
> -		/* enable PMIC event out and sources */
> -		if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
> -				pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
> -			dev_err(wrp->dev, "enable dewrap fail\n");
> -			return -EFAULT;
> -		}
> -	} else {
> -		/* PMIC_DEWRAP enables */
> -		if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
> -				pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
> -			dev_err(wrp->dev, "enable dewrap fail\n");
> -			return -EFAULT;
> -		}
> -	}
> +	if (wrp->master->init_special)
> +		ret = wrp->master->init_special(wrp);
> +	if (ret)
> +		return ret;
>

Check ret only if you have called init_special before.

Apart from that the patch look fine.

[PATCH V3 05/11] soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623

[John Crispin]

MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index ab2202d..948fc73 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -371,6 +371,7 @@ struct pmic_wrapper_type {
 	int *regs;
 	enum pwrap_type type;
 	u32 arb_en_all;
+	u32 int_en_all;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
 	int (*init_special)(struct pmic_wrapper *wrp);
 };
@@ -824,6 +825,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.regs = mt8135_regs,
 	.type = PWRAP_MT8135,
 	.arb_en_all = 0x1ff,
+	.int_en_all = BIT(31) | BIT(1),
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
 	.init_special = pwrap_mt8135_init_special,
 };
@@ -832,6 +834,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 	.regs = mt8173_regs,
 	.type = PWRAP_MT8173,
 	.arb_en_all = 0x3f,
+	.int_en_all = BIT(31) | BIT(1),
 	.init_reg_clock = pwrap_mt8173_init_reg_clock,
 	.init_special = pwrap_mt8173_init_special,
 };
@@ -945,7 +948,7 @@ static int pwrap_probe(struct platform_device *pdev)
 			PWRAP_WDT_SRC_MASK_NO_STAUPD : PWRAP_WDT_SRC_MASK_ALL;
 	pwrap_writel(wrp, wdt_src, PWRAP_WDT_SRC_EN);
 	pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
-	pwrap_writel(wrp, ~((1 << 31) | (1 << 1)), PWRAP_INT_EN);
+	pwrap_writel(wrp, ~wrp->master->int_en_all, PWRAP_INT_EN);
 
 	irq = platform_get_irq(pdev, 0);
 	ret = devm_request_irq(wrp->dev, irq, pwrap_interrupt, IRQF_TRIGGER_HIGH,
-- 
1.7.10.4

[PATCH V3 05/11] soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623

[John Crispin]

MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index ab2202d..948fc73 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -371,6 +371,7 @@ struct pmic_wrapper_type {
 	int *regs;
 	enum pwrap_type type;
 	u32 arb_en_all;
+	u32 int_en_all;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
 	int (*init_special)(struct pmic_wrapper *wrp);
 };
@@ -824,6 +825,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.regs = mt8135_regs,
 	.type = PWRAP_MT8135,
 	.arb_en_all = 0x1ff,
+	.int_en_all = BIT(31) | BIT(1),
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
 	.init_special = pwrap_mt8135_init_special,
 };
@@ -832,6 +834,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 	.regs = mt8173_regs,
 	.type = PWRAP_MT8173,
 	.arb_en_all = 0x3f,
+	.int_en_all = BIT(31) | BIT(1),
 	.init_reg_clock = pwrap_mt8173_init_reg_clock,
 	.init_special = pwrap_mt8173_init_special,
 };
@@ -945,7 +948,7 @@ static int pwrap_probe(struct platform_device *pdev)
 			PWRAP_WDT_SRC_MASK_NO_STAUPD : PWRAP_WDT_SRC_MASK_ALL;
 	pwrap_writel(wrp, wdt_src, PWRAP_WDT_SRC_EN);
 	pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
-	pwrap_writel(wrp, ~((1 << 31) | (1 << 1)), PWRAP_INT_EN);
+	pwrap_writel(wrp, ~wrp->master->int_en_all, PWRAP_INT_EN);
 
 	irq = platform_get_irq(pdev, 0);
 	ret = devm_request_irq(wrp->dev, irq, pwrap_interrupt, IRQF_TRIGGER_HIGH,
-- 
1.7.10.4

Re: [PATCH V3 05/11] soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623

[Matthias Brugger]

On 25/01/16 10:53, John Crispin wrote:
> MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c |    5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index ab2202d..948fc73 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -371,6 +371,7 @@ struct pmic_wrapper_type {
>   	int *regs;
>   	enum pwrap_type type;
>   	u32 arb_en_all;
> +	u32 int_en_all;
>   	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>   	int (*init_special)(struct pmic_wrapper *wrp);
>   };
> @@ -824,6 +825,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>   	.regs = mt8135_regs,
>   	.type = PWRAP_MT8135,
>   	.arb_en_all = 0x1ff,
> +	.int_en_all = BIT(31) | BIT(1),
>   	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>   	.init_special = pwrap_mt8135_init_special,
>   };
> @@ -832,6 +834,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
>   	.regs = mt8173_regs,
>   	.type = PWRAP_MT8173,
>   	.arb_en_all = 0x3f,
> +	.int_en_all = BIT(31) | BIT(1),
>   	.init_reg_clock = pwrap_mt8173_init_reg_clock,
>   	.init_special = pwrap_mt8173_init_special,
>   };
> @@ -945,7 +948,7 @@ static int pwrap_probe(struct platform_device *pdev)
>   			PWRAP_WDT_SRC_MASK_NO_STAUPD : PWRAP_WDT_SRC_MASK_ALL;
>   	pwrap_writel(wrp, wdt_src, PWRAP_WDT_SRC_EN);
>   	pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> -	pwrap_writel(wrp, ~((1 << 31) | (1 << 1)), PWRAP_INT_EN);
> +	pwrap_writel(wrp, ~wrp->master->int_en_all, PWRAP_INT_EN);
>

Set the right value in int_en_all instead of use the bitwise not in 
pwrap_writel.

[PATCH V3 05/11] soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623

[Matthias Brugger]

On 25/01/16 10:53, John Crispin wrote:
> MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c |    5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index ab2202d..948fc73 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -371,6 +371,7 @@ struct pmic_wrapper_type {
>   	int *regs;
>   	enum pwrap_type type;
>   	u32 arb_en_all;
> +	u32 int_en_all;
>   	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>   	int (*init_special)(struct pmic_wrapper *wrp);
>   };
> @@ -824,6 +825,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>   	.regs = mt8135_regs,
>   	.type = PWRAP_MT8135,
>   	.arb_en_all = 0x1ff,
> +	.int_en_all = BIT(31) | BIT(1),
>   	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>   	.init_special = pwrap_mt8135_init_special,
>   };
> @@ -832,6 +834,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
>   	.regs = mt8173_regs,
>   	.type = PWRAP_MT8173,
>   	.arb_en_all = 0x3f,
> +	.int_en_all = BIT(31) | BIT(1),
>   	.init_reg_clock = pwrap_mt8173_init_reg_clock,
>   	.init_special = pwrap_mt8173_init_special,
>   };
> @@ -945,7 +948,7 @@ static int pwrap_probe(struct platform_device *pdev)
>   			PWRAP_WDT_SRC_MASK_NO_STAUPD : PWRAP_WDT_SRC_MASK_ALL;
>   	pwrap_writel(wrp, wdt_src, PWRAP_WDT_SRC_EN);
>   	pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> -	pwrap_writel(wrp, ~((1 << 31) | (1 << 1)), PWRAP_INT_EN);
> +	pwrap_writel(wrp, ~wrp->master->int_en_all, PWRAP_INT_EN);
>

Set the right value in int_en_all instead of use the bitwise not in 
pwrap_writel.

[PATCH V3 06/11] soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for MT2701/7623

[John Crispin]

MT2701 and MT7623 use a different bitmask for the SPI_WRITE command.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 948fc73..ba7b6b5 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -372,6 +372,7 @@ struct pmic_wrapper_type {
 	enum pwrap_type type;
 	u32 arb_en_all;
 	u32 int_en_all;
+	u32 spi_w;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
 	int (*init_special)(struct pmic_wrapper *wrp);
 };
@@ -511,15 +512,15 @@ static int pwrap_reset_spislave(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 1, PWRAP_MAN_EN);
 	pwrap_writel(wrp, 0, PWRAP_DIO_EN);
 
-	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSL,
+	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSL,
 			PWRAP_MAN_CMD);
-	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
+	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
 			PWRAP_MAN_CMD);
-	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSH,
+	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSH,
 			PWRAP_MAN_CMD);
 
 	for (i = 0; i < 4; i++)
-		pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
+		pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
 				PWRAP_MAN_CMD);
 
 	ret = pwrap_wait_for_state(wrp, pwrap_is_sync_idle);
@@ -826,6 +827,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.type = PWRAP_MT8135,
 	.arb_en_all = 0x1ff,
 	.int_en_all = BIT(31) | BIT(1),
+	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
 	.init_special = pwrap_mt8135_init_special,
 };
@@ -835,6 +837,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 	.type = PWRAP_MT8173,
 	.arb_en_all = 0x3f,
 	.int_en_all = BIT(31) | BIT(1),
+	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
 	.init_reg_clock = pwrap_mt8173_init_reg_clock,
 	.init_special = pwrap_mt8173_init_special,
 };
-- 
1.7.10.4

[PATCH V3 06/11] soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for MT2701/7623

[John Crispin]

MT2701 and MT7623 use a different bitmask for the SPI_WRITE command.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 948fc73..ba7b6b5 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -372,6 +372,7 @@ struct pmic_wrapper_type {
 	enum pwrap_type type;
 	u32 arb_en_all;
 	u32 int_en_all;
+	u32 spi_w;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
 	int (*init_special)(struct pmic_wrapper *wrp);
 };
@@ -511,15 +512,15 @@ static int pwrap_reset_spislave(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 1, PWRAP_MAN_EN);
 	pwrap_writel(wrp, 0, PWRAP_DIO_EN);
 
-	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSL,
+	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSL,
 			PWRAP_MAN_CMD);
-	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
+	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
 			PWRAP_MAN_CMD);
-	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSH,
+	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSH,
 			PWRAP_MAN_CMD);
 
 	for (i = 0; i < 4; i++)
-		pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
+		pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
 				PWRAP_MAN_CMD);
 
 	ret = pwrap_wait_for_state(wrp, pwrap_is_sync_idle);
@@ -826,6 +827,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.type = PWRAP_MT8135,
 	.arb_en_all = 0x1ff,
 	.int_en_all = BIT(31) | BIT(1),
+	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
 	.init_special = pwrap_mt8135_init_special,
 };
@@ -835,6 +837,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 	.type = PWRAP_MT8173,
 	.arb_en_all = 0x3f,
 	.int_en_all = BIT(31) | BIT(1),
+	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
 	.init_reg_clock = pwrap_mt8173_init_reg_clock,
 	.init_special = pwrap_mt8173_init_special,
 };
-- 
1.7.10.4

Re: [PATCH V3 06/11] soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for MT2701/7623

[Yingjoe Chen]

nit for the subject:

soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for
MT2701/7623
                        ^^ extra : here.

Otherwise the patch looks good to me.

Joe.C

On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> MT2701 and MT7623 use a different bitmask for the SPI_WRITE command.
> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |   11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 948fc73..ba7b6b5 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -372,6 +372,7 @@ struct pmic_wrapper_type {
>  	enum pwrap_type type;
>  	u32 arb_en_all;
>  	u32 int_en_all;
> +	u32 spi_w;
>  	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>  	int (*init_special)(struct pmic_wrapper *wrp);
>  };
> @@ -511,15 +512,15 @@ static int pwrap_reset_spislave(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 1, PWRAP_MAN_EN);
>  	pwrap_writel(wrp, 0, PWRAP_DIO_EN);
>  
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSL,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSL,
>  			PWRAP_MAN_CMD);
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
>  			PWRAP_MAN_CMD);
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSH,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSH,
>  			PWRAP_MAN_CMD);
>  
>  	for (i = 0; i < 4; i++)
> -		pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
> +		pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
>  				PWRAP_MAN_CMD);
>  
>  	ret = pwrap_wait_for_state(wrp, pwrap_is_sync_idle);
> @@ -826,6 +827,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>  	.type = PWRAP_MT8135,
>  	.arb_en_all = 0x1ff,
>  	.int_en_all = BIT(31) | BIT(1),
> +	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>  	.init_special = pwrap_mt8135_init_special,
>  };
> @@ -835,6 +837,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
>  	.type = PWRAP_MT8173,
>  	.arb_en_all = 0x3f,
>  	.int_en_all = BIT(31) | BIT(1),
> +	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.init_reg_clock = pwrap_mt8173_init_reg_clock,
>  	.init_special = pwrap_mt8173_init_special,
>  };

[PATCH V3 06/11] soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for MT2701/7623

[Yingjoe Chen]

nit for the subject:

soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for
MT2701/7623
                        ^^ extra : here.

Otherwise the patch looks good to me.

Joe.C

On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> MT2701 and MT7623 use a different bitmask for the SPI_WRITE command.
> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |   11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 948fc73..ba7b6b5 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -372,6 +372,7 @@ struct pmic_wrapper_type {
>  	enum pwrap_type type;
>  	u32 arb_en_all;
>  	u32 int_en_all;
> +	u32 spi_w;
>  	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>  	int (*init_special)(struct pmic_wrapper *wrp);
>  };
> @@ -511,15 +512,15 @@ static int pwrap_reset_spislave(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 1, PWRAP_MAN_EN);
>  	pwrap_writel(wrp, 0, PWRAP_DIO_EN);
>  
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSL,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSL,
>  			PWRAP_MAN_CMD);
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
>  			PWRAP_MAN_CMD);
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSH,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSH,
>  			PWRAP_MAN_CMD);
>  
>  	for (i = 0; i < 4; i++)
> -		pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
> +		pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
>  				PWRAP_MAN_CMD);
>  
>  	ret = pwrap_wait_for_state(wrp, pwrap_is_sync_idle);
> @@ -826,6 +827,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>  	.type = PWRAP_MT8135,
>  	.arb_en_all = 0x1ff,
>  	.int_en_all = BIT(31) | BIT(1),
> +	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>  	.init_special = pwrap_mt8135_init_special,
>  };
> @@ -835,6 +837,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
>  	.type = PWRAP_MT8173,
>  	.arb_en_all = 0x3f,
>  	.int_en_all = BIT(31) | BIT(1),
> +	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.init_reg_clock = pwrap_mt8173_init_reg_clock,
>  	.init_special = pwrap_mt8173_init_special,
>  };

Re: [PATCH V3 06/11] soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for MT2701/7623

[Yingjoe Chen]

nit for the subject:

soc: mediatek: PMIC wrap:: SPI_WRITE needs a different bitmask for
MT2701/7623
                        ^^ extra : here.

Otherwise the patch looks good to me.

Joe.C

On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> MT2701 and MT7623 use a different bitmask for the SPI_WRITE command.
> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |   11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 948fc73..ba7b6b5 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -372,6 +372,7 @@ struct pmic_wrapper_type {
>  	enum pwrap_type type;
>  	u32 arb_en_all;
>  	u32 int_en_all;
> +	u32 spi_w;
>  	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>  	int (*init_special)(struct pmic_wrapper *wrp);
>  };
> @@ -511,15 +512,15 @@ static int pwrap_reset_spislave(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 1, PWRAP_MAN_EN);
>  	pwrap_writel(wrp, 0, PWRAP_DIO_EN);
>  
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSL,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSL,
>  			PWRAP_MAN_CMD);
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
>  			PWRAP_MAN_CMD);
> -	pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSH,
> +	pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSH,
>  			PWRAP_MAN_CMD);
>  
>  	for (i = 0; i < 4; i++)
> -		pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS,
> +		pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
>  				PWRAP_MAN_CMD);
>  
>  	ret = pwrap_wait_for_state(wrp, pwrap_is_sync_idle);
> @@ -826,6 +827,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>  	.type = PWRAP_MT8135,
>  	.arb_en_all = 0x1ff,
>  	.int_en_all = BIT(31) | BIT(1),
> +	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>  	.init_special = pwrap_mt8135_init_special,
>  };
> @@ -835,6 +837,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
>  	.type = PWRAP_MT8173,
>  	.arb_en_all = 0x3f,
>  	.int_en_all = BIT(31) | BIT(1),
> +	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.init_reg_clock = pwrap_mt8173_init_reg_clock,
>  	.init_special = pwrap_mt8173_init_special,
>  };

[PATCH V3 07/11] soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type struct

[John Crispin]

Make the handling of wdt_src consitent with the rest of the code.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index ba7b6b5..8bb091b 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -373,6 +373,7 @@ struct pmic_wrapper_type {
 	u32 arb_en_all;
 	u32 int_en_all;
 	u32 spi_w;
+	u32 wdt_src;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
 	int (*init_special)(struct pmic_wrapper *wrp);
 };
@@ -828,6 +829,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.arb_en_all = 0x1ff,
 	.int_en_all = BIT(31) | BIT(1),
 	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
 	.init_special = pwrap_mt8135_init_special,
 };
@@ -838,6 +840,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 	.arb_en_all = 0x3f,
 	.int_en_all = BIT(31) | BIT(1),
 	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+	.wdt_src = PWRAP_WDT_SRC_MASK_NO_STAUPD,
 	.init_reg_clock = pwrap_mt8173_init_reg_clock,
 	.init_special = pwrap_mt8173_init_special,
 };
@@ -857,7 +860,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
 
 static int pwrap_probe(struct platform_device *pdev)
 {
-	int ret, irq, wdt_src;
+	int ret, irq;
 	struct pmic_wrapper *wrp;
 	struct device_node *np = pdev->dev.of_node;
 	const struct of_device_id *of_id =
@@ -947,9 +950,7 @@ static int pwrap_probe(struct platform_device *pdev)
 	 * Since STAUPD was not used on mt8173 platform,
 	 * so STAUPD of WDT_SRC which should be turned off
 	 */
-	wdt_src = pwrap_is_mt8173(wrp) ?
-			PWRAP_WDT_SRC_MASK_NO_STAUPD : PWRAP_WDT_SRC_MASK_ALL;
-	pwrap_writel(wrp, wdt_src, PWRAP_WDT_SRC_EN);
+	pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN);
 	pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
 	pwrap_writel(wrp, ~wrp->master->int_en_all, PWRAP_INT_EN);
 
-- 
1.7.10.4

[PATCH V3 07/11] soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type struct

[John Crispin]

Make the handling of wdt_src consitent with the rest of the code.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index ba7b6b5..8bb091b 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -373,6 +373,7 @@ struct pmic_wrapper_type {
 	u32 arb_en_all;
 	u32 int_en_all;
 	u32 spi_w;
+	u32 wdt_src;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
 	int (*init_special)(struct pmic_wrapper *wrp);
 };
@@ -828,6 +829,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.arb_en_all = 0x1ff,
 	.int_en_all = BIT(31) | BIT(1),
 	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
 	.init_special = pwrap_mt8135_init_special,
 };
@@ -838,6 +840,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 	.arb_en_all = 0x3f,
 	.int_en_all = BIT(31) | BIT(1),
 	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+	.wdt_src = PWRAP_WDT_SRC_MASK_NO_STAUPD,
 	.init_reg_clock = pwrap_mt8173_init_reg_clock,
 	.init_special = pwrap_mt8173_init_special,
 };
@@ -857,7 +860,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
 
 static int pwrap_probe(struct platform_device *pdev)
 {
-	int ret, irq, wdt_src;
+	int ret, irq;
 	struct pmic_wrapper *wrp;
 	struct device_node *np = pdev->dev.of_node;
 	const struct of_device_id *of_id =
@@ -947,9 +950,7 @@ static int pwrap_probe(struct platform_device *pdev)
 	 * Since STAUPD was not used on mt8173 platform,
 	 * so STAUPD of WDT_SRC which should be turned off
 	 */
-	wdt_src = pwrap_is_mt8173(wrp) ?
-			PWRAP_WDT_SRC_MASK_NO_STAUPD : PWRAP_WDT_SRC_MASK_ALL;
-	pwrap_writel(wrp, wdt_src, PWRAP_WDT_SRC_EN);
+	pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN);
 	pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
 	pwrap_writel(wrp, ~wrp->master->int_en_all, PWRAP_INT_EN);
 
-- 
1.7.10.4

[PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[John Crispin]

With ore SoCs being added the list of helper functions like these would
grow. While at it also add a new flag "bridge" and use that insted of
pwrap_is_mt8173() where appropriate.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   27 +++++++++++----------------
 1 file changed, 11 insertions(+), 16 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 8bb091b..54553b4 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -374,20 +374,11 @@ struct pmic_wrapper_type {
 	u32 int_en_all;
 	u32 spi_w;
 	u32 wdt_src;
+	int has_bridge;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
 	int (*init_special)(struct pmic_wrapper *wrp);
 };
 
-static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
-{
-	return wrp->master->type == PWRAP_MT8135;
-}
-
-static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
-{
-	return wrp->master->type == PWRAP_MT8173;
-}
-
 static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
 {
 	return readl(wrp->base + wrp->master->regs[reg]);
@@ -619,11 +610,14 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 0x1, PWRAP_CIPHER_KEY_SEL);
 	pwrap_writel(wrp, 0x2, PWRAP_CIPHER_IV_SEL);
 
-	if (pwrap_is_mt8135(wrp)) {
+	switch (wrp->master->type) {
+	case PWRAP_MT8135:
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
-	} else {
+		break;
+	case PWRAP_MT8173:
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
+		break;
 	}
 
 	/* Config cipher mode @PMIC */
@@ -713,7 +707,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	if (wrp->rstc_bridge)
 		reset_control_reset(wrp->rstc_bridge);
 
-	if (pwrap_is_mt8173(wrp)) {
+	if (wrp->master->type == PWRAP_MT8173) {
 		/* Enable DCM */
 		pwrap_writel(wrp, 3, PWRAP_DCM_EN);
 		pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD);
@@ -773,7 +767,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
 	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 
-	if (pwrap_is_mt8135(wrp))
+	if (wrp->master->type == PWRAP_MT8135)
 		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
 
 	pwrap_writel(wrp, 0x1, PWRAP_WACS0_EN);
@@ -792,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
 	pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
 
-	if (pwrap_is_mt8135(wrp)) {
+	if (wrp->master->has_bridge) {
 		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
 		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
 	}
@@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.int_en_all = BIT(31) | BIT(1),
 	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
 	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+	.has_bridge = 1,
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
 	.init_special = pwrap_mt8135_init_special,
 };
@@ -888,7 +883,7 @@ static int pwrap_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	if (pwrap_is_mt8135(wrp)) {
+	if (wrp->master->has_bridge) {
 		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 				"pwrap-bridge");
 		wrp->bridge_base = devm_ioremap_resource(wrp->dev, res);
-- 
1.7.10.4

[PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[John Crispin]

With ore SoCs being added the list of helper functions like these would
grow. While at it also add a new flag "bridge" and use that insted of
pwrap_is_mt8173() where appropriate.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   27 +++++++++++----------------
 1 file changed, 11 insertions(+), 16 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 8bb091b..54553b4 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -374,20 +374,11 @@ struct pmic_wrapper_type {
 	u32 int_en_all;
 	u32 spi_w;
 	u32 wdt_src;
+	int has_bridge;
 	int (*init_reg_clock)(struct pmic_wrapper *wrp);
 	int (*init_special)(struct pmic_wrapper *wrp);
 };
 
-static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
-{
-	return wrp->master->type == PWRAP_MT8135;
-}
-
-static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
-{
-	return wrp->master->type == PWRAP_MT8173;
-}
-
 static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
 {
 	return readl(wrp->base + wrp->master->regs[reg]);
@@ -619,11 +610,14 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 0x1, PWRAP_CIPHER_KEY_SEL);
 	pwrap_writel(wrp, 0x2, PWRAP_CIPHER_IV_SEL);
 
-	if (pwrap_is_mt8135(wrp)) {
+	switch (wrp->master->type) {
+	case PWRAP_MT8135:
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
-	} else {
+		break;
+	case PWRAP_MT8173:
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
+		break;
 	}
 
 	/* Config cipher mode @PMIC */
@@ -713,7 +707,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	if (wrp->rstc_bridge)
 		reset_control_reset(wrp->rstc_bridge);
 
-	if (pwrap_is_mt8173(wrp)) {
+	if (wrp->master->type == PWRAP_MT8173) {
 		/* Enable DCM */
 		pwrap_writel(wrp, 3, PWRAP_DCM_EN);
 		pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD);
@@ -773,7 +767,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
 	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 
-	if (pwrap_is_mt8135(wrp))
+	if (wrp->master->type == PWRAP_MT8135)
 		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
 
 	pwrap_writel(wrp, 0x1, PWRAP_WACS0_EN);
@@ -792,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
 	pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
 
-	if (pwrap_is_mt8135(wrp)) {
+	if (wrp->master->has_bridge) {
 		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
 		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
 	}
@@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
 	.int_en_all = BIT(31) | BIT(1),
 	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
 	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+	.has_bridge = 1,
 	.init_reg_clock = pwrap_mt8135_init_reg_clock,
 	.init_special = pwrap_mt8135_init_special,
 };
@@ -888,7 +883,7 @@ static int pwrap_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	if (pwrap_is_mt8135(wrp)) {
+	if (wrp->master->has_bridge) {
 		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 				"pwrap-bridge");
 		wrp->bridge_base = devm_ioremap_resource(wrp->dev, res);
-- 
1.7.10.4

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Yingjoe Chen]

On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> With ore SoCs being added the list of helper functions like these would
> grow. While at it also add a new flag "bridge" and use that insted of
> pwrap_is_mt8173() where appropriate.


typos?
s/ore/more/
s/insted/instead/

I think you mean "has_bridge" flag?


> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |   27 +++++++++++----------------
>  1 file changed, 11 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 8bb091b..54553b4 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -374,20 +374,11 @@ struct pmic_wrapper_type {
>  	u32 int_en_all;
>  	u32 spi_w;
>  	u32 wdt_src;
> +	int has_bridge;

How about using :1 for flag?

Joe.C

>  	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>  	int (*init_special)(struct pmic_wrapper *wrp);
>  };
>  
> -static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8135;
> -}
> -
> -static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8173;
> -}
> -
>  static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
>  {
>  	return readl(wrp->base + wrp->master->regs[reg]);
> @@ -619,11 +610,14 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 0x1, PWRAP_CIPHER_KEY_SEL);
>  	pwrap_writel(wrp, 0x2, PWRAP_CIPHER_IV_SEL);
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	switch (wrp->master->type) {
> +	case PWRAP_MT8135:
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
> -	} else {
> +		break;
> +	case PWRAP_MT8173:
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
> +		break;
>  	}
>  
>  	/* Config cipher mode @PMIC */
> @@ -713,7 +707,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	if (wrp->rstc_bridge)
>  		reset_control_reset(wrp->rstc_bridge);
>  
> -	if (pwrap_is_mt8173(wrp)) {
> +	if (wrp->master->type == PWRAP_MT8173) {
>  		/* Enable DCM */
>  		pwrap_writel(wrp, 3, PWRAP_DCM_EN);
>  		pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD);
> @@ -773,7 +767,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
>  	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
>  
> -	if (pwrap_is_mt8135(wrp))
> +	if (wrp->master->type == PWRAP_MT8135)
>  		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
>  
>  	pwrap_writel(wrp, 0x1, PWRAP_WACS0_EN);
> @@ -792,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
>  	pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	if (wrp->master->has_bridge) {
>  		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
>  		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
>  	}
> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>  	.int_en_all = BIT(31) | BIT(1),
>  	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> +	.has_bridge = 1,
>  	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>  	.init_special = pwrap_mt8135_init_special,
>  };
> @@ -888,7 +883,7 @@ static int pwrap_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	if (wrp->master->has_bridge) {
>  		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
>  				"pwrap-bridge");
>  		wrp->bridge_base = devm_ioremap_resource(wrp->dev, res);

[PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Yingjoe Chen]

On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> With ore SoCs being added the list of helper functions like these would
> grow. While at it also add a new flag "bridge" and use that insted of
> pwrap_is_mt8173() where appropriate.


typos?
s/ore/more/
s/insted/instead/

I think you mean "has_bridge" flag?


> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |   27 +++++++++++----------------
>  1 file changed, 11 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 8bb091b..54553b4 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -374,20 +374,11 @@ struct pmic_wrapper_type {
>  	u32 int_en_all;
>  	u32 spi_w;
>  	u32 wdt_src;
> +	int has_bridge;

How about using :1 for flag?

Joe.C

>  	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>  	int (*init_special)(struct pmic_wrapper *wrp);
>  };
>  
> -static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8135;
> -}
> -
> -static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8173;
> -}
> -
>  static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
>  {
>  	return readl(wrp->base + wrp->master->regs[reg]);
> @@ -619,11 +610,14 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 0x1, PWRAP_CIPHER_KEY_SEL);
>  	pwrap_writel(wrp, 0x2, PWRAP_CIPHER_IV_SEL);
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	switch (wrp->master->type) {
> +	case PWRAP_MT8135:
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
> -	} else {
> +		break;
> +	case PWRAP_MT8173:
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
> +		break;
>  	}
>  
>  	/* Config cipher mode @PMIC */
> @@ -713,7 +707,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	if (wrp->rstc_bridge)
>  		reset_control_reset(wrp->rstc_bridge);
>  
> -	if (pwrap_is_mt8173(wrp)) {
> +	if (wrp->master->type == PWRAP_MT8173) {
>  		/* Enable DCM */
>  		pwrap_writel(wrp, 3, PWRAP_DCM_EN);
>  		pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD);
> @@ -773,7 +767,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
>  	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
>  
> -	if (pwrap_is_mt8135(wrp))
> +	if (wrp->master->type == PWRAP_MT8135)
>  		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
>  
>  	pwrap_writel(wrp, 0x1, PWRAP_WACS0_EN);
> @@ -792,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
>  	pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	if (wrp->master->has_bridge) {
>  		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
>  		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
>  	}
> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>  	.int_en_all = BIT(31) | BIT(1),
>  	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> +	.has_bridge = 1,
>  	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>  	.init_special = pwrap_mt8135_init_special,
>  };
> @@ -888,7 +883,7 @@ static int pwrap_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	if (wrp->master->has_bridge) {
>  		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
>  				"pwrap-bridge");
>  		wrp->bridge_base = devm_ioremap_resource(wrp->dev, res);

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Yingjoe Chen]

On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> With ore SoCs being added the list of helper functions like these would
> grow. While at it also add a new flag "bridge" and use that insted of
> pwrap_is_mt8173() where appropriate.


typos?
s/ore/more/
s/insted/instead/

I think you mean "has_bridge" flag?


> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |   27 +++++++++++----------------
>  1 file changed, 11 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 8bb091b..54553b4 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -374,20 +374,11 @@ struct pmic_wrapper_type {
>  	u32 int_en_all;
>  	u32 spi_w;
>  	u32 wdt_src;
> +	int has_bridge;

How about using :1 for flag?

Joe.C

>  	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>  	int (*init_special)(struct pmic_wrapper *wrp);
>  };
>  
> -static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8135;
> -}
> -
> -static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8173;
> -}
> -
>  static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
>  {
>  	return readl(wrp->base + wrp->master->regs[reg]);
> @@ -619,11 +610,14 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 0x1, PWRAP_CIPHER_KEY_SEL);
>  	pwrap_writel(wrp, 0x2, PWRAP_CIPHER_IV_SEL);
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	switch (wrp->master->type) {
> +	case PWRAP_MT8135:
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
> -	} else {
> +		break;
> +	case PWRAP_MT8173:
>  		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
> +		break;
>  	}
>  
>  	/* Config cipher mode @PMIC */
> @@ -713,7 +707,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	if (wrp->rstc_bridge)
>  		reset_control_reset(wrp->rstc_bridge);
>  
> -	if (pwrap_is_mt8173(wrp)) {
> +	if (wrp->master->type == PWRAP_MT8173) {
>  		/* Enable DCM */
>  		pwrap_writel(wrp, 3, PWRAP_DCM_EN);
>  		pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD);
> @@ -773,7 +767,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
>  	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
>  
> -	if (pwrap_is_mt8135(wrp))
> +	if (wrp->master->type == PWRAP_MT8135)
>  		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
>  
>  	pwrap_writel(wrp, 0x1, PWRAP_WACS0_EN);
> @@ -792,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>  	pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
>  	pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	if (wrp->master->has_bridge) {
>  		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
>  		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
>  	}
> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>  	.int_en_all = BIT(31) | BIT(1),
>  	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>  	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> +	.has_bridge = 1,
>  	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>  	.init_special = pwrap_mt8135_init_special,
>  };
> @@ -888,7 +883,7 @@ static int pwrap_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> -	if (pwrap_is_mt8135(wrp)) {
> +	if (wrp->master->has_bridge) {
>  		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
>  				"pwrap-bridge");
>  		wrp->bridge_base = devm_ioremap_resource(wrp->dev, res);

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Matthias Brugger]

On 25/01/16 10:53, John Crispin wrote:
> With ore SoCs being added the list of helper functions like these would

The commit message is something strange:
"With every new SoC being added..." maybe?

> grow. While at it also add a new flag "bridge" and use that insted of

s/insted/instead

> pwrap_is_mt8173() where appropriate.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c |   27 +++++++++++----------------
>   1 file changed, 11 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 8bb091b..54553b4 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -374,20 +374,11 @@ struct pmic_wrapper_type {
>   	u32 int_en_all;
>   	u32 spi_w;
>   	u32 wdt_src;
> +	int has_bridge;
>   	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>   	int (*init_special)(struct pmic_wrapper *wrp);
>   };
>
> -static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8135;
> -}
> -
> -static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8173;
> -}
> -
>   static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
>   {
>   	return readl(wrp->base + wrp->master->regs[reg]);
> @@ -619,11 +610,14 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
>   	pwrap_writel(wrp, 0x1, PWRAP_CIPHER_KEY_SEL);
>   	pwrap_writel(wrp, 0x2, PWRAP_CIPHER_IV_SEL);
>
> -	if (pwrap_is_mt8135(wrp)) {
> +	switch (wrp->master->type) {
> +	case PWRAP_MT8135:
>   		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
>   		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
> -	} else {
> +		break;
> +	case PWRAP_MT8173:
>   		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
> +		break;
>   	}
>
>   	/* Config cipher mode @PMIC */
> @@ -713,7 +707,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>   	if (wrp->rstc_bridge)
>   		reset_control_reset(wrp->rstc_bridge);
>
> -	if (pwrap_is_mt8173(wrp)) {
> +	if (wrp->master->type == PWRAP_MT8173) {
>   		/* Enable DCM */
>   		pwrap_writel(wrp, 3, PWRAP_DCM_EN);
>   		pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD);
> @@ -773,7 +767,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>   	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
>   	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
>
> -	if (pwrap_is_mt8135(wrp))
> +	if (wrp->master->type == PWRAP_MT8135)
>   		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
>
>   	pwrap_writel(wrp, 0x1, PWRAP_WACS0_EN);
> @@ -792,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>   	pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
>   	pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
>
> -	if (pwrap_is_mt8135(wrp)) {
> +	if (wrp->master->has_bridge) {
>   		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
>   		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
>   	}
> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>   	.int_en_all = BIT(31) | BIT(1),
>   	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>   	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> +	.has_bridge = 1,
>   	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>   	.init_special = pwrap_mt8135_init_special,
>   };

Please set has_bridge explicitly for mt8173.

[PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Matthias Brugger]

On 25/01/16 10:53, John Crispin wrote:
> With ore SoCs being added the list of helper functions like these would

The commit message is something strange:
"With every new SoC being added..." maybe?

> grow. While at it also add a new flag "bridge" and use that insted of

s/insted/instead

> pwrap_is_mt8173() where appropriate.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c |   27 +++++++++++----------------
>   1 file changed, 11 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 8bb091b..54553b4 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -374,20 +374,11 @@ struct pmic_wrapper_type {
>   	u32 int_en_all;
>   	u32 spi_w;
>   	u32 wdt_src;
> +	int has_bridge;
>   	int (*init_reg_clock)(struct pmic_wrapper *wrp);
>   	int (*init_special)(struct pmic_wrapper *wrp);
>   };
>
> -static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8135;
> -}
> -
> -static inline int pwrap_is_mt8173(struct pmic_wrapper *wrp)
> -{
> -	return wrp->master->type == PWRAP_MT8173;
> -}
> -
>   static u32 pwrap_readl(struct pmic_wrapper *wrp, enum pwrap_regs reg)
>   {
>   	return readl(wrp->base + wrp->master->regs[reg]);
> @@ -619,11 +610,14 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
>   	pwrap_writel(wrp, 0x1, PWRAP_CIPHER_KEY_SEL);
>   	pwrap_writel(wrp, 0x2, PWRAP_CIPHER_IV_SEL);
>
> -	if (pwrap_is_mt8135(wrp)) {
> +	switch (wrp->master->type) {
> +	case PWRAP_MT8135:
>   		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
>   		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
> -	} else {
> +		break;
> +	case PWRAP_MT8173:
>   		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
> +		break;
>   	}
>
>   	/* Config cipher mode @PMIC */
> @@ -713,7 +707,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>   	if (wrp->rstc_bridge)
>   		reset_control_reset(wrp->rstc_bridge);
>
> -	if (pwrap_is_mt8173(wrp)) {
> +	if (wrp->master->type == PWRAP_MT8173) {
>   		/* Enable DCM */
>   		pwrap_writel(wrp, 3, PWRAP_DCM_EN);
>   		pwrap_writel(wrp, 0, PWRAP_DCM_DBC_PRD);
> @@ -773,7 +767,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>   	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
>   	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
>
> -	if (pwrap_is_mt8135(wrp))
> +	if (wrp->master->type == PWRAP_MT8135)
>   		pwrap_writel(wrp, 0x7, PWRAP_RRARB_EN);
>
>   	pwrap_writel(wrp, 0x1, PWRAP_WACS0_EN);
> @@ -792,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
>   	pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
>   	pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
>
> -	if (pwrap_is_mt8135(wrp)) {
> +	if (wrp->master->has_bridge) {
>   		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
>   		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
>   	}
> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>   	.int_en_all = BIT(31) | BIT(1),
>   	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>   	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> +	.has_bridge = 1,
>   	.init_reg_clock = pwrap_mt8135_init_reg_clock,
>   	.init_special = pwrap_mt8135_init_special,
>   };

Please set has_bridge explicitly for mt8173.

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[John Crispin]

On 01/02/2016 11:55, Matthias Brugger wrote:
> 
> 
> On 25/01/16 10:53, John Crispin wrote:
>> With ore SoCs being added the list of helper functions like these would
> 
> The commit message is something strange:
> "With every new SoC being added..." maybe?
> 
>> grow. While at it also add a new flag "bridge" and use that insted of
> 
> s/insted/instead
> 
>> pwrap_is_mt8173() where appropriate.

you are lookign at V3 of the series, V4 has this fix done already

[...]


>>       }
>> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>>       .int_en_all = BIT(31) | BIT(1),
>>       .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>>       .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
>> +    .has_bridge = 1,
>>       .init_reg_clock = pwrap_mt8135_init_reg_clock,
>>       .init_special = pwrap_mt8135_init_special,
>>   };
> 
> Please set has_bridge explicitly for mt8173.

I dont get it. the original code never did that.

	John

> 
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Matthias Brugger]

On 01/02/16 12:00, John Crispin wrote:
>
>
> On 01/02/2016 11:55, Matthias Brugger wrote:
>>
>>
>> On 25/01/16 10:53, John Crispin wrote:
>>> With ore SoCs being added the list of helper functions like these would
>>
>> The commit message is something strange:
>> "With every new SoC being added..." maybe?
>>
>>> grow. While at it also add a new flag "bridge" and use that insted of
>>
>> s/insted/instead
>>
>>> pwrap_is_mt8173() where appropriate.
>
> you are lookign at V3 of the series, V4 has this fix done already
>
> [...]
>
>
>>>        }
>>> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>>>        .int_en_all = BIT(31) | BIT(1),
>>>        .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>>>        .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
>>> +    .has_bridge = 1,
>>>        .init_reg_clock = pwrap_mt8135_init_reg_clock,
>>>        .init_special = pwrap_mt8135_init_special,
>>>    };
>>
>> Please set has_bridge explicitly for mt8173.
>
> I dont get it. the original code never did that.
>

has_bridge was introduced by this patch, but you don't set it explicitly 
to 0 in pwrap_mt8173.

Just as I see it, please try to write a summary to every new version of 
a patch set which explains what you changed between one version and 
another. This will help a lot making the review easier.

Thanks,
Matthias

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[John Crispin]

On 01/02/2016 12:11, Matthias Brugger wrote:
> 
> 
> On 01/02/16 12:00, John Crispin wrote:
>>
>>
>> On 01/02/2016 11:55, Matthias Brugger wrote:
>>>
>>>
>>> On 25/01/16 10:53, John Crispin wrote:
>>>> With ore SoCs being added the list of helper functions like these would
>>>
>>> The commit message is something strange:
>>> "With every new SoC being added..." maybe?
>>>
>>>> grow. While at it also add a new flag "bridge" and use that insted of
>>>
>>> s/insted/instead
>>>
>>>> pwrap_is_mt8173() where appropriate.
>>
>> you are lookign at V3 of the series, V4 has this fix done already
>>
>> [...]
>>
>>
>>>>        }
>>>> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>>>>        .int_en_all = BIT(31) | BIT(1),
>>>>        .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>>>>        .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
>>>> +    .has_bridge = 1,
>>>>        .init_reg_clock = pwrap_mt8135_init_reg_clock,
>>>>        .init_special = pwrap_mt8135_init_special,
>>>>    };
>>>
>>> Please set has_bridge explicitly for mt8173.
>>
>> I dont get it. the original code never did that.
>>
> 
> has_bridge was introduced by this patch, but you don't set it explicitly
> to 0 in pwrap_mt8173.
> 
> Just as I see it, please try to write a summary to every new version of
> a patch set which explains what you changed between one version and
> another. This will help a lot making the review easier.
> 
> Thanks,
> Matthias
> 


You missed the "to zero" part before. now the comment makes sense. I can
set it to 0 if it is more obvious for you in that case.

general consent is to not declare statics to 0. check_patch.pl will
actually complain about those declarations. that is why i was confused.

	John

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Matthias Brugger]

On 01/02/16 12:15, John Crispin wrote:
>
>
> On 01/02/2016 12:11, Matthias Brugger wrote:
>>
>>
>> On 01/02/16 12:00, John Crispin wrote:
>>>
>>>
>>> On 01/02/2016 11:55, Matthias Brugger wrote:
>>>>
>>>>
>>>> On 25/01/16 10:53, John Crispin wrote:
>>>>> With ore SoCs being added the list of helper functions like these would
>>>>
>>>> The commit message is something strange:
>>>> "With every new SoC being added..." maybe?
>>>>
>>>>> grow. While at it also add a new flag "bridge" and use that insted of
>>>>
>>>> s/insted/instead
>>>>
>>>>> pwrap_is_mt8173() where appropriate.
>>>
>>> you are lookign at V3 of the series, V4 has this fix done already
>>>
>>> [...]
>>>
>>>
>>>>>         }
>>>>> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>>>>>         .int_en_all = BIT(31) | BIT(1),
>>>>>         .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>>>>>         .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
>>>>> +    .has_bridge = 1,
>>>>>         .init_reg_clock = pwrap_mt8135_init_reg_clock,
>>>>>         .init_special = pwrap_mt8135_init_special,
>>>>>     };
>>>>
>>>> Please set has_bridge explicitly for mt8173.
>>>
>>> I dont get it. the original code never did that.
>>>
>>
>> has_bridge was introduced by this patch, but you don't set it explicitly
>> to 0 in pwrap_mt8173.
>>
>> Just as I see it, please try to write a summary to every new version of
>> a patch set which explains what you changed between one version and
>> another. This will help a lot making the review easier.
>>
>> Thanks,
>> Matthias
>>
>
>
> You missed the "to zero" part before. now the comment makes sense. I can
> set it to 0 if it is more obvious for you in that case.
>
> general consent is to not declare statics to 0. check_patch.pl will
> actually complain about those declarations. that is why i was confused.

If that's the case, then we accept the authority of check_patch.pl ;)
I didn't know that, so just leave has_bridge as it was.

Regards,
Matthias

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Yingjoe Chen]

On Mon, 2016-02-01 at 12:27 +0100, Matthias Brugger wrote:
> 
> On 01/02/16 12:15, John Crispin wrote:
> >
> >
> > On 01/02/2016 12:11, Matthias Brugger wrote:
> >>
> >>
> >> On 01/02/16 12:00, John Crispin wrote:
> >>>
> >>>
> >>> On 01/02/2016 11:55, Matthias Brugger wrote:
> >>>>
> >>>>
> >>>> On 25/01/16 10:53, John Crispin wrote:
> >>>>> With ore SoCs being added the list of helper functions like these would
> >>>>
> >>>> The commit message is something strange:
> >>>> "With every new SoC being added..." maybe?
> >>>>
> >>>>> grow. While at it also add a new flag "bridge" and use that insted of
> >>>>
> >>>> s/insted/instead
> >>>>
> >>>>> pwrap_is_mt8173() where appropriate.
> >>>
> >>> you are lookign at V3 of the series, V4 has this fix done already
> >>>
> >>> [...]
> >>>
> >>>
> >>>>>         }
> >>>>> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
> >>>>>         .int_en_all = BIT(31) | BIT(1),
> >>>>>         .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> >>>>>         .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> >>>>> +    .has_bridge = 1,
> >>>>>         .init_reg_clock = pwrap_mt8135_init_reg_clock,
> >>>>>         .init_special = pwrap_mt8135_init_special,
> >>>>>     };
> >>>>
> >>>> Please set has_bridge explicitly for mt8173.
> >>>
> >>> I dont get it. the original code never did that.
> >>>
> >>
> >> has_bridge was introduced by this patch, but you don't set it explicitly
> >> to 0 in pwrap_mt8173.
> >>
> >> Just as I see it, please try to write a summary to every new version of
> >> a patch set which explains what you changed between one version and
> >> another. This will help a lot making the review easier.
> >>
> >> Thanks,
> >> Matthias
> >>
> >
> >
> > You missed the "to zero" part before. now the comment makes sense. I can
> > set it to 0 if it is more obvious for you in that case.
> >
> > general consent is to not declare statics to 0. check_patch.pl will
> > actually complain about those declarations. that is why i was confused.
> 
> If that's the case, then we accept the authority of check_patch.pl ;)
> I didn't know that, so just leave has_bridge as it was.

I believe checkpatch only complain for global/static variables
initializers, not inside a struct initializers even when they are
global.

In MTK i2c drivers drivers/i2c/busses/i2c-mt65xx.c, we always explicitly
init flags in compatible struct, IMHO it make support feature for each
IC more clearly. This does not trigger any warning from checkpatch.

Joe.C

Re: [PATCH V3 08/11] soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()

[Matthias Brugger]

On 04/02/16 10:36, Yingjoe Chen wrote:
> On Mon, 2016-02-01 at 12:27 +0100, Matthias Brugger wrote:
>>
>> On 01/02/16 12:15, John Crispin wrote:
>>>
>>>
>>> On 01/02/2016 12:11, Matthias Brugger wrote:
>>>>
>>>>
>>>> On 01/02/16 12:00, John Crispin wrote:
>>>>>
>>>>>
>>>>> On 01/02/2016 11:55, Matthias Brugger wrote:
>>>>>>
>>>>>>
>>>>>> On 25/01/16 10:53, John Crispin wrote:
>>>>>>> With ore SoCs being added the list of helper functions like these would
>>>>>>
>>>>>> The commit message is something strange:
>>>>>> "With every new SoC being added..." maybe?
>>>>>>
>>>>>>> grow. While at it also add a new flag "bridge" and use that insted of
>>>>>>
>>>>>> s/insted/instead
>>>>>>
>>>>>>> pwrap_is_mt8173() where appropriate.
>>>>>
>>>>> you are lookign at V3 of the series, V4 has this fix done already
>>>>>
>>>>> [...]
>>>>>
>>>>>
>>>>>>>          }
>>>>>>> @@ -830,6 +824,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
>>>>>>>          .int_en_all = BIT(31) | BIT(1),
>>>>>>>          .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
>>>>>>>          .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
>>>>>>> +    .has_bridge = 1,
>>>>>>>          .init_reg_clock = pwrap_mt8135_init_reg_clock,
>>>>>>>          .init_special = pwrap_mt8135_init_special,
>>>>>>>      };
>>>>>>
>>>>>> Please set has_bridge explicitly for mt8173.
>>>>>
>>>>> I dont get it. the original code never did that.
>>>>>
>>>>
>>>> has_bridge was introduced by this patch, but you don't set it explicitly
>>>> to 0 in pwrap_mt8173.
>>>>
>>>> Just as I see it, please try to write a summary to every new version of
>>>> a patch set which explains what you changed between one version and
>>>> another. This will help a lot making the review easier.
>>>>
>>>> Thanks,
>>>> Matthias
>>>>
>>>
>>>
>>> You missed the "to zero" part before. now the comment makes sense. I can
>>> set it to 0 if it is more obvious for you in that case.
>>>
>>> general consent is to not declare statics to 0. check_patch.pl will
>>> actually complain about those declarations. that is why i was confused.
>>
>> If that's the case, then we accept the authority of check_patch.pl ;)
>> I didn't know that, so just leave has_bridge as it was.
>
> I believe checkpatch only complain for global/static variables
> initializers, not inside a struct initializers even when they are
> global.
>
> In MTK i2c drivers drivers/i2c/busses/i2c-mt65xx.c, we always explicitly
> init flags in compatible struct, IMHO it make support feature for each
> IC more clearly. This does not trigger any warning from checkpatch.
>

Ok, thanks for clarification.

[PATCH V3 09/11] soc: mediatek: PMIC wrap: add a slave specific struct

[John Crispin]

This patch adds a new struct pwrap_slv_type that we use to store the slave
specific data. The patch adds 2 new helper functions to access the dew
registers. The slave type is looked up via the wrappers child node.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |  170 +++++++++++++++++++++++++---------
 1 file changed, 124 insertions(+), 46 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 54553b4..21d8e5a 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -69,33 +69,64 @@
 					  PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
 					  PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
 
-/* macro for slave device wrapper registers */
-#define PWRAP_DEW_BASE			0xbc00
-#define PWRAP_DEW_EVENT_OUT_EN		(PWRAP_DEW_BASE + 0x0)
-#define PWRAP_DEW_DIO_EN		(PWRAP_DEW_BASE + 0x2)
-#define PWRAP_DEW_EVENT_SRC_EN		(PWRAP_DEW_BASE + 0x4)
-#define PWRAP_DEW_EVENT_SRC		(PWRAP_DEW_BASE + 0x6)
-#define PWRAP_DEW_EVENT_FLAG		(PWRAP_DEW_BASE + 0x8)
-#define PWRAP_DEW_READ_TEST		(PWRAP_DEW_BASE + 0xa)
-#define PWRAP_DEW_WRITE_TEST		(PWRAP_DEW_BASE + 0xc)
-#define PWRAP_DEW_CRC_EN		(PWRAP_DEW_BASE + 0xe)
-#define PWRAP_DEW_CRC_VAL		(PWRAP_DEW_BASE + 0x10)
-#define PWRAP_DEW_MON_GRP_SEL		(PWRAP_DEW_BASE + 0x12)
-#define PWRAP_DEW_MON_FLAG_SEL		(PWRAP_DEW_BASE + 0x14)
-#define PWRAP_DEW_EVENT_TEST		(PWRAP_DEW_BASE + 0x16)
-#define PWRAP_DEW_CIPHER_KEY_SEL	(PWRAP_DEW_BASE + 0x18)
-#define PWRAP_DEW_CIPHER_IV_SEL		(PWRAP_DEW_BASE + 0x1a)
-#define PWRAP_DEW_CIPHER_LOAD		(PWRAP_DEW_BASE + 0x1c)
-#define PWRAP_DEW_CIPHER_START		(PWRAP_DEW_BASE + 0x1e)
-#define PWRAP_DEW_CIPHER_RDY		(PWRAP_DEW_BASE + 0x20)
-#define PWRAP_DEW_CIPHER_MODE		(PWRAP_DEW_BASE + 0x22)
-#define PWRAP_DEW_CIPHER_SWRST		(PWRAP_DEW_BASE + 0x24)
-#define PWRAP_MT8173_DEW_CIPHER_IV0	(PWRAP_DEW_BASE + 0x26)
-#define PWRAP_MT8173_DEW_CIPHER_IV1	(PWRAP_DEW_BASE + 0x28)
-#define PWRAP_MT8173_DEW_CIPHER_IV2	(PWRAP_DEW_BASE + 0x2a)
-#define PWRAP_MT8173_DEW_CIPHER_IV3	(PWRAP_DEW_BASE + 0x2c)
-#define PWRAP_MT8173_DEW_CIPHER_IV4	(PWRAP_DEW_BASE + 0x2e)
-#define PWRAP_MT8173_DEW_CIPHER_IV5	(PWRAP_DEW_BASE + 0x30)
+/* defines for slave device wrapper registers */
+enum dew_regs {
+	PWRAP_DEW_BASE,
+	PWRAP_DEW_EVENT_OUT_EN,
+	PWRAP_DEW_DIO_EN,
+	PWRAP_DEW_EVENT_SRC_EN,
+	PWRAP_DEW_EVENT_SRC,
+	PWRAP_DEW_EVENT_FLAG,
+	PWRAP_DEW_READ_TEST,
+	PWRAP_DEW_WRITE_TEST,
+	PWRAP_DEW_CRC_EN,
+	PWRAP_DEW_CRC_VAL,
+	PWRAP_DEW_MON_GRP_SEL,
+	PWRAP_DEW_MON_FLAG_SEL,
+	PWRAP_DEW_EVENT_TEST,
+	PWRAP_DEW_CIPHER_KEY_SEL,
+	PWRAP_DEW_CIPHER_IV_SEL,
+	PWRAP_DEW_CIPHER_LOAD,
+	PWRAP_DEW_CIPHER_START,
+	PWRAP_DEW_CIPHER_RDY,
+	PWRAP_DEW_CIPHER_MODE,
+	PWRAP_DEW_CIPHER_SWRST,
+	PWRAP_MT8173_DEW_CIPHER_IV0,
+	PWRAP_MT8173_DEW_CIPHER_IV1,
+	PWRAP_MT8173_DEW_CIPHER_IV2,
+	PWRAP_MT8173_DEW_CIPHER_IV3,
+	PWRAP_MT8173_DEW_CIPHER_IV4,
+	PWRAP_MT8173_DEW_CIPHER_IV5,
+};
+
+static const u32 mt6397_regs[] = {
+	[PWRAP_DEW_BASE] =		0xbc00,
+	[PWRAP_DEW_EVENT_OUT_EN] =	0xbc00,
+	[PWRAP_DEW_DIO_EN] =		0xbc02,
+	[PWRAP_DEW_EVENT_SRC_EN] =	0xbc04,
+	[PWRAP_DEW_EVENT_SRC] =		0xbc06,
+	[PWRAP_DEW_EVENT_FLAG] =	0xbc08,
+	[PWRAP_DEW_READ_TEST] =		0xbc0a,
+	[PWRAP_DEW_WRITE_TEST] =	0xbc0c,
+	[PWRAP_DEW_CRC_EN] =		0xbc0e,
+	[PWRAP_DEW_CRC_VAL] =		0xbc10,
+	[PWRAP_DEW_MON_GRP_SEL] =	0xbc12,
+	[PWRAP_DEW_MON_FLAG_SEL] =	0xbc14,
+	[PWRAP_DEW_EVENT_TEST] =	0xbc16,
+	[PWRAP_DEW_CIPHER_KEY_SEL] =	0xbc18,
+	[PWRAP_DEW_CIPHER_IV_SEL] =	0xbc1a,
+	[PWRAP_DEW_CIPHER_LOAD] =	0xbc1c,
+	[PWRAP_DEW_CIPHER_START] =	0xbc1e,
+	[PWRAP_DEW_CIPHER_RDY] =	0xbc20,
+	[PWRAP_DEW_CIPHER_MODE] =	0xbc22,
+	[PWRAP_DEW_CIPHER_SWRST] =	0xbc24,
+	[PWRAP_MT8173_DEW_CIPHER_IV0] = 0xbc26,
+	[PWRAP_MT8173_DEW_CIPHER_IV1] = 0xbc28,
+	[PWRAP_MT8173_DEW_CIPHER_IV2] = 0xbc2a,
+	[PWRAP_MT8173_DEW_CIPHER_IV3] = 0xbc2c,
+	[PWRAP_MT8173_DEW_CIPHER_IV4] = 0xbc2e,
+	[PWRAP_MT8173_DEW_CIPHER_IV5] = 0xbc30,
+};
 
 enum pwrap_regs {
 	PWRAP_MUX_SEL,
@@ -349,16 +380,26 @@ static int mt8135_regs[] = {
 	[PWRAP_DCM_DBC_PRD] =		0x160,
 };
 
+enum pmic_type {
+	PMIC_MT6397,
+};
+
 enum pwrap_type {
 	PWRAP_MT8135,
 	PWRAP_MT8173,
 };
 
+struct pwrap_slv_type {
+	const u32 *dew_regs;
+	enum pmic_type type;
+};
+
 struct pmic_wrapper {
 	struct device *dev;
 	void __iomem *base;
 	struct regmap *regmap;
 	const struct pmic_wrapper_type *master;
+	const struct pwrap_slv_type *slave;
 	struct clk *clk_spi;
 	struct clk *clk_wrap;
 	struct reset_control *rstc;
@@ -484,6 +525,16 @@ static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
 	return 0;
 }
 
+static int pwrap_dew_write(struct pmic_wrapper *wrp, u32 reg, u32 wdata)
+{
+	return pwrap_write(wrp, wrp->slave->dew_regs[reg], wdata);
+}
+
+static int pwrap_dew_read(struct pmic_wrapper *wrp, u32 reg, u32 *rdata)
+{
+	return pwrap_read(wrp, wrp->slave->dew_regs[reg], rdata);
+}
+
 static int pwrap_regmap_read(void *context, u32 adr, u32 *rdata)
 {
 	return pwrap_read(context, adr, rdata);
@@ -544,7 +595,7 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
 
 	for (i = 0; i < 4; i++) {
 		pwrap_writel(wrp, i, PWRAP_SIDLY);
-		pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
+		pwrap_dew_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 		if (rdata == PWRAP_DEW_READ_TEST_VAL) {
 			dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=%x\n", i);
 			pass |= 1 << i;
@@ -593,7 +644,7 @@ static bool pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp)
 	u32 rdata;
 	int ret;
 
-	ret = pwrap_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata);
+	ret = pwrap_dew_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata);
 	if (ret)
 		return 0;
 
@@ -621,12 +672,12 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	}
 
 	/* Config cipher mode @PMIC */
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
 
 	/* wait for cipher data ready@AP */
 	ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
@@ -643,7 +694,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	}
 
 	/* wait for cipher mode idle */
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1);
 	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
 	if (ret) {
 		dev_err(wrp->dev, "cipher mode idle fail, ret=%d\n", ret);
@@ -653,8 +704,9 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 1, PWRAP_CIPHER_MODE);
 
 	/* Write Test */
-	if (pwrap_write(wrp, PWRAP_DEW_WRITE_TEST, PWRAP_DEW_WRITE_TEST_VAL) ||
-	    pwrap_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) ||
+	if (pwrap_dew_write(wrp, PWRAP_DEW_WRITE_TEST,
+			    PWRAP_DEW_WRITE_TEST_VAL) ||
+	    pwrap_dew_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) ||
 			(rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
 		dev_err(wrp->dev, "rdata=0x%04X\n", rdata);
 		return -EFAULT;
@@ -677,8 +729,8 @@ static int pwrap_mt8135_init_special(struct pmic_wrapper *wrp)
 	writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
 
 	/* enable PMIC event out and sources */
-	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
-		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
+	if (pwrap_dew_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
+		pwrap_dew_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 		dev_err(wrp->dev, "enable dewrap fail\n");
 		return -EFAULT;
 	}
@@ -689,8 +741,8 @@ static int pwrap_mt8135_init_special(struct pmic_wrapper *wrp)
 static int pwrap_mt8173_init_special(struct pmic_wrapper *wrp)
 {
 	/* PMIC_DEWRAP enables */
-	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
-		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
+	if (pwrap_dew_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
+		pwrap_dew_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 		dev_err(wrp->dev, "enable dewrap fail\n");
 		return -EFAULT;
 	}
@@ -734,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 		return ret;
 
 	/* Enable dual IO mode */
-	pwrap_write(wrp, PWRAP_DEW_DIO_EN, 1);
+	pwrap_dew_write(wrp, PWRAP_DEW_DIO_EN, 1);
 
 	/* Check IDLE & INIT_DONE in advance */
 	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
@@ -746,7 +798,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 1, PWRAP_DIO_EN);
 
 	/* Read Test */
-	pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
+	pwrap_dew_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 	if (rdata != PWRAP_DEW_READ_TEST_VAL) {
 		dev_err(wrp->dev, "Read test failed after switch to DIO mode: 0x%04x != 0x%04x\n",
 				PWRAP_DEW_READ_TEST_VAL, rdata);
@@ -759,12 +811,13 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 		return ret;
 
 	/* Signature checking - using CRC */
-	if (pwrap_write(wrp, PWRAP_DEW_CRC_EN, 0x1))
+	if (pwrap_dew_write(wrp, PWRAP_DEW_CRC_EN, 0x1))
 		return -EFAULT;
 
 	pwrap_writel(wrp, 0x1, PWRAP_CRC_EN);
 	pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE);
-	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
+	pwrap_writel(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_VAL],
+		     PWRAP_SIG_ADR);
 	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 
 	if (wrp->master->type == PWRAP_MT8135)
@@ -817,6 +870,21 @@ static const struct regmap_config pwrap_regmap_config = {
 	.max_register = 0xffff,
 };
 
+static const struct pwrap_slv_type pmic_mt6397 = {
+	.dew_regs = mt6397_regs,
+	.type = PMIC_MT6397,
+};
+
+static const struct of_device_id of_slave_match_tbl[] = {
+	{
+		.compatible = "mediatek,mt6397",
+		.data = &pmic_mt6397,
+	}, {
+		/* sentinel */
+	}
+};
+MODULE_DEVICE_TABLE(of, of_slave_match_tbl);
+
 static struct pmic_wrapper_type pwrap_mt8135 = {
 	.regs = mt8135_regs,
 	.type = PWRAP_MT8135,
@@ -860,8 +928,17 @@ static int pwrap_probe(struct platform_device *pdev)
 	struct device_node *np = pdev->dev.of_node;
 	const struct of_device_id *of_id =
 		of_match_device(of_pwrap_match_tbl, &pdev->dev);
+	const struct of_device_id *of_slave_id = NULL;
 	struct resource *res;
 
+	if (pdev->dev.of_node->child)
+		of_slave_id = of_match_node(of_slave_match_tbl,
+					    pdev->dev.of_node->child);
+	if (!of_slave_id) {
+		dev_dbg(&pdev->dev, "slave pmic should be defined in dts\n");
+		return -EINVAL;
+	}
+
 	wrp = devm_kzalloc(&pdev->dev, sizeof(*wrp), GFP_KERNEL);
 	if (!wrp)
 		return -ENOMEM;
@@ -869,6 +946,7 @@ static int pwrap_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, wrp);
 
 	wrp->master = of_id->data;
+	wrp->slave = of_slave_id->data;
 	wrp->dev = &pdev->dev;
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwrap");
-- 
1.7.10.4

[PATCH V3 09/11] soc: mediatek: PMIC wrap: add a slave specific struct

[John Crispin]

This patch adds a new struct pwrap_slv_type that we use to store the slave
specific data. The patch adds 2 new helper functions to access the dew
registers. The slave type is looked up via the wrappers child node.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |  170 +++++++++++++++++++++++++---------
 1 file changed, 124 insertions(+), 46 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 54553b4..21d8e5a 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -69,33 +69,64 @@
 					  PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
 					  PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
 
-/* macro for slave device wrapper registers */
-#define PWRAP_DEW_BASE			0xbc00
-#define PWRAP_DEW_EVENT_OUT_EN		(PWRAP_DEW_BASE + 0x0)
-#define PWRAP_DEW_DIO_EN		(PWRAP_DEW_BASE + 0x2)
-#define PWRAP_DEW_EVENT_SRC_EN		(PWRAP_DEW_BASE + 0x4)
-#define PWRAP_DEW_EVENT_SRC		(PWRAP_DEW_BASE + 0x6)
-#define PWRAP_DEW_EVENT_FLAG		(PWRAP_DEW_BASE + 0x8)
-#define PWRAP_DEW_READ_TEST		(PWRAP_DEW_BASE + 0xa)
-#define PWRAP_DEW_WRITE_TEST		(PWRAP_DEW_BASE + 0xc)
-#define PWRAP_DEW_CRC_EN		(PWRAP_DEW_BASE + 0xe)
-#define PWRAP_DEW_CRC_VAL		(PWRAP_DEW_BASE + 0x10)
-#define PWRAP_DEW_MON_GRP_SEL		(PWRAP_DEW_BASE + 0x12)
-#define PWRAP_DEW_MON_FLAG_SEL		(PWRAP_DEW_BASE + 0x14)
-#define PWRAP_DEW_EVENT_TEST		(PWRAP_DEW_BASE + 0x16)
-#define PWRAP_DEW_CIPHER_KEY_SEL	(PWRAP_DEW_BASE + 0x18)
-#define PWRAP_DEW_CIPHER_IV_SEL		(PWRAP_DEW_BASE + 0x1a)
-#define PWRAP_DEW_CIPHER_LOAD		(PWRAP_DEW_BASE + 0x1c)
-#define PWRAP_DEW_CIPHER_START		(PWRAP_DEW_BASE + 0x1e)
-#define PWRAP_DEW_CIPHER_RDY		(PWRAP_DEW_BASE + 0x20)
-#define PWRAP_DEW_CIPHER_MODE		(PWRAP_DEW_BASE + 0x22)
-#define PWRAP_DEW_CIPHER_SWRST		(PWRAP_DEW_BASE + 0x24)
-#define PWRAP_MT8173_DEW_CIPHER_IV0	(PWRAP_DEW_BASE + 0x26)
-#define PWRAP_MT8173_DEW_CIPHER_IV1	(PWRAP_DEW_BASE + 0x28)
-#define PWRAP_MT8173_DEW_CIPHER_IV2	(PWRAP_DEW_BASE + 0x2a)
-#define PWRAP_MT8173_DEW_CIPHER_IV3	(PWRAP_DEW_BASE + 0x2c)
-#define PWRAP_MT8173_DEW_CIPHER_IV4	(PWRAP_DEW_BASE + 0x2e)
-#define PWRAP_MT8173_DEW_CIPHER_IV5	(PWRAP_DEW_BASE + 0x30)
+/* defines for slave device wrapper registers */
+enum dew_regs {
+	PWRAP_DEW_BASE,
+	PWRAP_DEW_EVENT_OUT_EN,
+	PWRAP_DEW_DIO_EN,
+	PWRAP_DEW_EVENT_SRC_EN,
+	PWRAP_DEW_EVENT_SRC,
+	PWRAP_DEW_EVENT_FLAG,
+	PWRAP_DEW_READ_TEST,
+	PWRAP_DEW_WRITE_TEST,
+	PWRAP_DEW_CRC_EN,
+	PWRAP_DEW_CRC_VAL,
+	PWRAP_DEW_MON_GRP_SEL,
+	PWRAP_DEW_MON_FLAG_SEL,
+	PWRAP_DEW_EVENT_TEST,
+	PWRAP_DEW_CIPHER_KEY_SEL,
+	PWRAP_DEW_CIPHER_IV_SEL,
+	PWRAP_DEW_CIPHER_LOAD,
+	PWRAP_DEW_CIPHER_START,
+	PWRAP_DEW_CIPHER_RDY,
+	PWRAP_DEW_CIPHER_MODE,
+	PWRAP_DEW_CIPHER_SWRST,
+	PWRAP_MT8173_DEW_CIPHER_IV0,
+	PWRAP_MT8173_DEW_CIPHER_IV1,
+	PWRAP_MT8173_DEW_CIPHER_IV2,
+	PWRAP_MT8173_DEW_CIPHER_IV3,
+	PWRAP_MT8173_DEW_CIPHER_IV4,
+	PWRAP_MT8173_DEW_CIPHER_IV5,
+};
+
+static const u32 mt6397_regs[] = {
+	[PWRAP_DEW_BASE] =		0xbc00,
+	[PWRAP_DEW_EVENT_OUT_EN] =	0xbc00,
+	[PWRAP_DEW_DIO_EN] =		0xbc02,
+	[PWRAP_DEW_EVENT_SRC_EN] =	0xbc04,
+	[PWRAP_DEW_EVENT_SRC] =		0xbc06,
+	[PWRAP_DEW_EVENT_FLAG] =	0xbc08,
+	[PWRAP_DEW_READ_TEST] =		0xbc0a,
+	[PWRAP_DEW_WRITE_TEST] =	0xbc0c,
+	[PWRAP_DEW_CRC_EN] =		0xbc0e,
+	[PWRAP_DEW_CRC_VAL] =		0xbc10,
+	[PWRAP_DEW_MON_GRP_SEL] =	0xbc12,
+	[PWRAP_DEW_MON_FLAG_SEL] =	0xbc14,
+	[PWRAP_DEW_EVENT_TEST] =	0xbc16,
+	[PWRAP_DEW_CIPHER_KEY_SEL] =	0xbc18,
+	[PWRAP_DEW_CIPHER_IV_SEL] =	0xbc1a,
+	[PWRAP_DEW_CIPHER_LOAD] =	0xbc1c,
+	[PWRAP_DEW_CIPHER_START] =	0xbc1e,
+	[PWRAP_DEW_CIPHER_RDY] =	0xbc20,
+	[PWRAP_DEW_CIPHER_MODE] =	0xbc22,
+	[PWRAP_DEW_CIPHER_SWRST] =	0xbc24,
+	[PWRAP_MT8173_DEW_CIPHER_IV0] = 0xbc26,
+	[PWRAP_MT8173_DEW_CIPHER_IV1] = 0xbc28,
+	[PWRAP_MT8173_DEW_CIPHER_IV2] = 0xbc2a,
+	[PWRAP_MT8173_DEW_CIPHER_IV3] = 0xbc2c,
+	[PWRAP_MT8173_DEW_CIPHER_IV4] = 0xbc2e,
+	[PWRAP_MT8173_DEW_CIPHER_IV5] = 0xbc30,
+};
 
 enum pwrap_regs {
 	PWRAP_MUX_SEL,
@@ -349,16 +380,26 @@ static int mt8135_regs[] = {
 	[PWRAP_DCM_DBC_PRD] =		0x160,
 };
 
+enum pmic_type {
+	PMIC_MT6397,
+};
+
 enum pwrap_type {
 	PWRAP_MT8135,
 	PWRAP_MT8173,
 };
 
+struct pwrap_slv_type {
+	const u32 *dew_regs;
+	enum pmic_type type;
+};
+
 struct pmic_wrapper {
 	struct device *dev;
 	void __iomem *base;
 	struct regmap *regmap;
 	const struct pmic_wrapper_type *master;
+	const struct pwrap_slv_type *slave;
 	struct clk *clk_spi;
 	struct clk *clk_wrap;
 	struct reset_control *rstc;
@@ -484,6 +525,16 @@ static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
 	return 0;
 }
 
+static int pwrap_dew_write(struct pmic_wrapper *wrp, u32 reg, u32 wdata)
+{
+	return pwrap_write(wrp, wrp->slave->dew_regs[reg], wdata);
+}
+
+static int pwrap_dew_read(struct pmic_wrapper *wrp, u32 reg, u32 *rdata)
+{
+	return pwrap_read(wrp, wrp->slave->dew_regs[reg], rdata);
+}
+
 static int pwrap_regmap_read(void *context, u32 adr, u32 *rdata)
 {
 	return pwrap_read(context, adr, rdata);
@@ -544,7 +595,7 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
 
 	for (i = 0; i < 4; i++) {
 		pwrap_writel(wrp, i, PWRAP_SIDLY);
-		pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
+		pwrap_dew_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 		if (rdata == PWRAP_DEW_READ_TEST_VAL) {
 			dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=%x\n", i);
 			pass |= 1 << i;
@@ -593,7 +644,7 @@ static bool pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp)
 	u32 rdata;
 	int ret;
 
-	ret = pwrap_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata);
+	ret = pwrap_dew_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata);
 	if (ret)
 		return 0;
 
@@ -621,12 +672,12 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	}
 
 	/* Config cipher mode @PMIC */
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
 
 	/* wait for cipher data ready@AP */
 	ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
@@ -643,7 +694,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	}
 
 	/* wait for cipher mode idle */
-	pwrap_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1);
+	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1);
 	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
 	if (ret) {
 		dev_err(wrp->dev, "cipher mode idle fail, ret=%d\n", ret);
@@ -653,8 +704,9 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 1, PWRAP_CIPHER_MODE);
 
 	/* Write Test */
-	if (pwrap_write(wrp, PWRAP_DEW_WRITE_TEST, PWRAP_DEW_WRITE_TEST_VAL) ||
-	    pwrap_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) ||
+	if (pwrap_dew_write(wrp, PWRAP_DEW_WRITE_TEST,
+			    PWRAP_DEW_WRITE_TEST_VAL) ||
+	    pwrap_dew_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) ||
 			(rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
 		dev_err(wrp->dev, "rdata=0x%04X\n", rdata);
 		return -EFAULT;
@@ -677,8 +729,8 @@ static int pwrap_mt8135_init_special(struct pmic_wrapper *wrp)
 	writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
 
 	/* enable PMIC event out and sources */
-	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
-		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
+	if (pwrap_dew_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
+		pwrap_dew_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 		dev_err(wrp->dev, "enable dewrap fail\n");
 		return -EFAULT;
 	}
@@ -689,8 +741,8 @@ static int pwrap_mt8135_init_special(struct pmic_wrapper *wrp)
 static int pwrap_mt8173_init_special(struct pmic_wrapper *wrp)
 {
 	/* PMIC_DEWRAP enables */
-	if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
-		pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
+	if (pwrap_dew_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
+		pwrap_dew_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 		dev_err(wrp->dev, "enable dewrap fail\n");
 		return -EFAULT;
 	}
@@ -734,7 +786,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 		return ret;
 
 	/* Enable dual IO mode */
-	pwrap_write(wrp, PWRAP_DEW_DIO_EN, 1);
+	pwrap_dew_write(wrp, PWRAP_DEW_DIO_EN, 1);
 
 	/* Check IDLE & INIT_DONE in advance */
 	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
@@ -746,7 +798,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 	pwrap_writel(wrp, 1, PWRAP_DIO_EN);
 
 	/* Read Test */
-	pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
+	pwrap_dew_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 	if (rdata != PWRAP_DEW_READ_TEST_VAL) {
 		dev_err(wrp->dev, "Read test failed after switch to DIO mode: 0x%04x != 0x%04x\n",
 				PWRAP_DEW_READ_TEST_VAL, rdata);
@@ -759,12 +811,13 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 		return ret;
 
 	/* Signature checking - using CRC */
-	if (pwrap_write(wrp, PWRAP_DEW_CRC_EN, 0x1))
+	if (pwrap_dew_write(wrp, PWRAP_DEW_CRC_EN, 0x1))
 		return -EFAULT;
 
 	pwrap_writel(wrp, 0x1, PWRAP_CRC_EN);
 	pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE);
-	pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
+	pwrap_writel(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_VAL],
+		     PWRAP_SIG_ADR);
 	pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 
 	if (wrp->master->type == PWRAP_MT8135)
@@ -817,6 +870,21 @@ static const struct regmap_config pwrap_regmap_config = {
 	.max_register = 0xffff,
 };
 
+static const struct pwrap_slv_type pmic_mt6397 = {
+	.dew_regs = mt6397_regs,
+	.type = PMIC_MT6397,
+};
+
+static const struct of_device_id of_slave_match_tbl[] = {
+	{
+		.compatible = "mediatek,mt6397",
+		.data = &pmic_mt6397,
+	}, {
+		/* sentinel */
+	}
+};
+MODULE_DEVICE_TABLE(of, of_slave_match_tbl);
+
 static struct pmic_wrapper_type pwrap_mt8135 = {
 	.regs = mt8135_regs,
 	.type = PWRAP_MT8135,
@@ -860,8 +928,17 @@ static int pwrap_probe(struct platform_device *pdev)
 	struct device_node *np = pdev->dev.of_node;
 	const struct of_device_id *of_id =
 		of_match_device(of_pwrap_match_tbl, &pdev->dev);
+	const struct of_device_id *of_slave_id = NULL;
 	struct resource *res;
 
+	if (pdev->dev.of_node->child)
+		of_slave_id = of_match_node(of_slave_match_tbl,
+					    pdev->dev.of_node->child);
+	if (!of_slave_id) {
+		dev_dbg(&pdev->dev, "slave pmic should be defined in dts\n");
+		return -EINVAL;
+	}
+
 	wrp = devm_kzalloc(&pdev->dev, sizeof(*wrp), GFP_KERNEL);
 	if (!wrp)
 		return -ENOMEM;
@@ -869,6 +946,7 @@ static int pwrap_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, wrp);
 
 	wrp->master = of_id->data;
+	wrp->slave = of_slave_id->data;
 	wrp->dev = &pdev->dev;
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwrap");
-- 
1.7.10.4

Re: [PATCH V3 09/11] soc: mediatek: PMIC wrap: add a slave specific struct

[Yingjoe Chen]

Hi John,

Thanks for preparing the patch.



On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> This patch adds a new struct pwrap_slv_type that we use to store the slave
> specific data. The patch adds 2 new helper functions to access the dew
> registers. The slave type is looked up via the wrappers child node.
> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |  170 +++++++++++++++++++++++++---------
>  1 file changed, 124 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 54553b4..21d8e5a 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
<...>

> +/* defines for slave device wrapper registers */
> +enum dew_regs {
> +	PWRAP_DEW_BASE,
> +	PWRAP_DEW_EVENT_OUT_EN,
> +	PWRAP_DEW_DIO_EN,
> +	PWRAP_DEW_EVENT_SRC_EN,
> +	PWRAP_DEW_EVENT_SRC,
> +	PWRAP_DEW_EVENT_FLAG,
> +	PWRAP_DEW_READ_TEST,
> +	PWRAP_DEW_WRITE_TEST,
> +	PWRAP_DEW_CRC_EN,
> +	PWRAP_DEW_CRC_VAL,
> +	PWRAP_DEW_MON_GRP_SEL,
> +	PWRAP_DEW_MON_FLAG_SEL,
> +	PWRAP_DEW_EVENT_TEST,
> +	PWRAP_DEW_CIPHER_KEY_SEL,
> +	PWRAP_DEW_CIPHER_IV_SEL,
> +	PWRAP_DEW_CIPHER_LOAD,
> +	PWRAP_DEW_CIPHER_START,
> +	PWRAP_DEW_CIPHER_RDY,
> +	PWRAP_DEW_CIPHER_MODE,
> +	PWRAP_DEW_CIPHER_SWRST,
> +	PWRAP_MT8173_DEW_CIPHER_IV0,
> +	PWRAP_MT8173_DEW_CIPHER_IV1,
> +	PWRAP_MT8173_DEW_CIPHER_IV2,
> +	PWRAP_MT8173_DEW_CIPHER_IV3,
> +	PWRAP_MT8173_DEW_CIPHER_IV4,
> +	PWRAP_MT8173_DEW_CIPHER_IV5,


For PWRAP_MT8173_DEW_*, since they exist on pmic mt6397, it seems
strange to name them with MT8173 name. I guess we got this name because
MTK internal code base try to support them in MT8173.

On the other hand, these are not used in current code, maybe we can just
remove them?

Joe.C

[PATCH V3 09/11] soc: mediatek: PMIC wrap: add a slave specific struct

[Yingjoe Chen]

Hi John,

Thanks for preparing the patch.



On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> This patch adds a new struct pwrap_slv_type that we use to store the slave
> specific data. The patch adds 2 new helper functions to access the dew
> registers. The slave type is looked up via the wrappers child node.
> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |  170 +++++++++++++++++++++++++---------
>  1 file changed, 124 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 54553b4..21d8e5a 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
<...>

> +/* defines for slave device wrapper registers */
> +enum dew_regs {
> +	PWRAP_DEW_BASE,
> +	PWRAP_DEW_EVENT_OUT_EN,
> +	PWRAP_DEW_DIO_EN,
> +	PWRAP_DEW_EVENT_SRC_EN,
> +	PWRAP_DEW_EVENT_SRC,
> +	PWRAP_DEW_EVENT_FLAG,
> +	PWRAP_DEW_READ_TEST,
> +	PWRAP_DEW_WRITE_TEST,
> +	PWRAP_DEW_CRC_EN,
> +	PWRAP_DEW_CRC_VAL,
> +	PWRAP_DEW_MON_GRP_SEL,
> +	PWRAP_DEW_MON_FLAG_SEL,
> +	PWRAP_DEW_EVENT_TEST,
> +	PWRAP_DEW_CIPHER_KEY_SEL,
> +	PWRAP_DEW_CIPHER_IV_SEL,
> +	PWRAP_DEW_CIPHER_LOAD,
> +	PWRAP_DEW_CIPHER_START,
> +	PWRAP_DEW_CIPHER_RDY,
> +	PWRAP_DEW_CIPHER_MODE,
> +	PWRAP_DEW_CIPHER_SWRST,
> +	PWRAP_MT8173_DEW_CIPHER_IV0,
> +	PWRAP_MT8173_DEW_CIPHER_IV1,
> +	PWRAP_MT8173_DEW_CIPHER_IV2,
> +	PWRAP_MT8173_DEW_CIPHER_IV3,
> +	PWRAP_MT8173_DEW_CIPHER_IV4,
> +	PWRAP_MT8173_DEW_CIPHER_IV5,


For PWRAP_MT8173_DEW_*, since they exist on pmic mt6397, it seems
strange to name them with MT8173 name. I guess we got this name because
MTK internal code base try to support them in MT8173.

On the other hand, these are not used in current code, maybe we can just
remove them?

Joe.C

Re: [PATCH V3 09/11] soc: mediatek: PMIC wrap: add a slave specific struct

[Yingjoe Chen]

Hi John,

Thanks for preparing the patch.



On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
> This patch adds a new struct pwrap_slv_type that we use to store the slave
> specific data. The patch adds 2 new helper functions to access the dew
> registers. The slave type is looked up via the wrappers child node.
> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c |  170 +++++++++++++++++++++++++---------
>  1 file changed, 124 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 54553b4..21d8e5a 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
<...>

> +/* defines for slave device wrapper registers */
> +enum dew_regs {
> +	PWRAP_DEW_BASE,
> +	PWRAP_DEW_EVENT_OUT_EN,
> +	PWRAP_DEW_DIO_EN,
> +	PWRAP_DEW_EVENT_SRC_EN,
> +	PWRAP_DEW_EVENT_SRC,
> +	PWRAP_DEW_EVENT_FLAG,
> +	PWRAP_DEW_READ_TEST,
> +	PWRAP_DEW_WRITE_TEST,
> +	PWRAP_DEW_CRC_EN,
> +	PWRAP_DEW_CRC_VAL,
> +	PWRAP_DEW_MON_GRP_SEL,
> +	PWRAP_DEW_MON_FLAG_SEL,
> +	PWRAP_DEW_EVENT_TEST,
> +	PWRAP_DEW_CIPHER_KEY_SEL,
> +	PWRAP_DEW_CIPHER_IV_SEL,
> +	PWRAP_DEW_CIPHER_LOAD,
> +	PWRAP_DEW_CIPHER_START,
> +	PWRAP_DEW_CIPHER_RDY,
> +	PWRAP_DEW_CIPHER_MODE,
> +	PWRAP_DEW_CIPHER_SWRST,
> +	PWRAP_MT8173_DEW_CIPHER_IV0,
> +	PWRAP_MT8173_DEW_CIPHER_IV1,
> +	PWRAP_MT8173_DEW_CIPHER_IV2,
> +	PWRAP_MT8173_DEW_CIPHER_IV3,
> +	PWRAP_MT8173_DEW_CIPHER_IV4,
> +	PWRAP_MT8173_DEW_CIPHER_IV5,


For PWRAP_MT8173_DEW_*, since they exist on pmic mt6397, it seems
strange to name them with MT8173 name. I guess we got this name because
MTK internal code base try to support them in MT8173.

On the other hand, these are not used in current code, maybe we can just
remove them?

Joe.C

Re: [PATCH V3 09/11] soc: mediatek: PMIC wrap: add a slave specific struct

[John Crispin]

On 26/01/2016 10:31, Yingjoe Chen wrote:
> 
> Hi John,
> 
> Thanks for preparing the patch.
> 
> 
> 
> On Mon, 2016-01-25 at 10:53 +0100, John Crispin wrote:
>> This patch adds a new struct pwrap_slv_type that we use to store the slave
>> specific data. The patch adds 2 new helper functions to access the dew
>> registers. The slave type is looked up via the wrappers child node.
>>
>> Signed-off-by: John Crispin <blogic-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>
>> ---
>>  drivers/soc/mediatek/mtk-pmic-wrap.c |  170 +++++++++++++++++++++++++---------
>>  1 file changed, 124 insertions(+), 46 deletions(-)
>>
>> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
>> index 54553b4..21d8e5a 100644
>> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
>> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> <...>
> 
>> +/* defines for slave device wrapper registers */
>> +enum dew_regs {
>> +	PWRAP_DEW_BASE,
>> +	PWRAP_DEW_EVENT_OUT_EN,
>> +	PWRAP_DEW_DIO_EN,
>> +	PWRAP_DEW_EVENT_SRC_EN,
>> +	PWRAP_DEW_EVENT_SRC,
>> +	PWRAP_DEW_EVENT_FLAG,
>> +	PWRAP_DEW_READ_TEST,
>> +	PWRAP_DEW_WRITE_TEST,
>> +	PWRAP_DEW_CRC_EN,
>> +	PWRAP_DEW_CRC_VAL,
>> +	PWRAP_DEW_MON_GRP_SEL,
>> +	PWRAP_DEW_MON_FLAG_SEL,
>> +	PWRAP_DEW_EVENT_TEST,
>> +	PWRAP_DEW_CIPHER_KEY_SEL,
>> +	PWRAP_DEW_CIPHER_IV_SEL,
>> +	PWRAP_DEW_CIPHER_LOAD,
>> +	PWRAP_DEW_CIPHER_START,
>> +	PWRAP_DEW_CIPHER_RDY,
>> +	PWRAP_DEW_CIPHER_MODE,
>> +	PWRAP_DEW_CIPHER_SWRST,
>> +	PWRAP_MT8173_DEW_CIPHER_IV0,
>> +	PWRAP_MT8173_DEW_CIPHER_IV1,
>> +	PWRAP_MT8173_DEW_CIPHER_IV2,
>> +	PWRAP_MT8173_DEW_CIPHER_IV3,
>> +	PWRAP_MT8173_DEW_CIPHER_IV4,
>> +	PWRAP_MT8173_DEW_CIPHER_IV5,
> 
> 
> For PWRAP_MT8173_DEW_*, since they exist on pmic mt6397, it seems
> strange to name them with MT8173 name. I guess we got this name because
> MTK internal code base try to support them in MT8173.
> 
> On the other hand, these are not used in current code, maybe we can just
> remove them?
> 
> Joe.C

Hi Joe,

correct, i kept them as they are in the mtk internal driver. i'll
happily drop them.

	John

Re: [PATCH V3 09/11] soc: mediatek: PMIC wrap: add a slave specific struct

[Matthias Brugger]

On 25/01/16 10:53, John Crispin wrote:
> This patch adds a new struct pwrap_slv_type that we use to store the slave
> specific data. The patch adds 2 new helper functions to access the dew
> registers. The slave type is looked up via the wrappers child node.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c |  170 +++++++++++++++++++++++++---------
>   1 file changed, 124 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 54553b4..21d8e5a 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -69,33 +69,64 @@
>   					  PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
>   					  PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
>
> -/* macro for slave device wrapper registers */
> -#define PWRAP_DEW_BASE			0xbc00
> -#define PWRAP_DEW_EVENT_OUT_EN		(PWRAP_DEW_BASE + 0x0)
> -#define PWRAP_DEW_DIO_EN		(PWRAP_DEW_BASE + 0x2)
> -#define PWRAP_DEW_EVENT_SRC_EN		(PWRAP_DEW_BASE + 0x4)
> -#define PWRAP_DEW_EVENT_SRC		(PWRAP_DEW_BASE + 0x6)
> -#define PWRAP_DEW_EVENT_FLAG		(PWRAP_DEW_BASE + 0x8)
> -#define PWRAP_DEW_READ_TEST		(PWRAP_DEW_BASE + 0xa)
> -#define PWRAP_DEW_WRITE_TEST		(PWRAP_DEW_BASE + 0xc)
> -#define PWRAP_DEW_CRC_EN		(PWRAP_DEW_BASE + 0xe)
> -#define PWRAP_DEW_CRC_VAL		(PWRAP_DEW_BASE + 0x10)
> -#define PWRAP_DEW_MON_GRP_SEL		(PWRAP_DEW_BASE + 0x12)
> -#define PWRAP_DEW_MON_FLAG_SEL		(PWRAP_DEW_BASE + 0x14)
> -#define PWRAP_DEW_EVENT_TEST		(PWRAP_DEW_BASE + 0x16)
> -#define PWRAP_DEW_CIPHER_KEY_SEL	(PWRAP_DEW_BASE + 0x18)
> -#define PWRAP_DEW_CIPHER_IV_SEL		(PWRAP_DEW_BASE + 0x1a)
> -#define PWRAP_DEW_CIPHER_LOAD		(PWRAP_DEW_BASE + 0x1c)
> -#define PWRAP_DEW_CIPHER_START		(PWRAP_DEW_BASE + 0x1e)
> -#define PWRAP_DEW_CIPHER_RDY		(PWRAP_DEW_BASE + 0x20)
> -#define PWRAP_DEW_CIPHER_MODE		(PWRAP_DEW_BASE + 0x22)
> -#define PWRAP_DEW_CIPHER_SWRST		(PWRAP_DEW_BASE + 0x24)
> -#define PWRAP_MT8173_DEW_CIPHER_IV0	(PWRAP_DEW_BASE + 0x26)
> -#define PWRAP_MT8173_DEW_CIPHER_IV1	(PWRAP_DEW_BASE + 0x28)
> -#define PWRAP_MT8173_DEW_CIPHER_IV2	(PWRAP_DEW_BASE + 0x2a)
> -#define PWRAP_MT8173_DEW_CIPHER_IV3	(PWRAP_DEW_BASE + 0x2c)
> -#define PWRAP_MT8173_DEW_CIPHER_IV4	(PWRAP_DEW_BASE + 0x2e)
> -#define PWRAP_MT8173_DEW_CIPHER_IV5	(PWRAP_DEW_BASE + 0x30)
> +/* defines for slave device wrapper registers */
> +enum dew_regs {
> +	PWRAP_DEW_BASE,
> +	PWRAP_DEW_EVENT_OUT_EN,
> +	PWRAP_DEW_DIO_EN,
> +	PWRAP_DEW_EVENT_SRC_EN,
> +	PWRAP_DEW_EVENT_SRC,
> +	PWRAP_DEW_EVENT_FLAG,
> +	PWRAP_DEW_READ_TEST,
> +	PWRAP_DEW_WRITE_TEST,
> +	PWRAP_DEW_CRC_EN,
> +	PWRAP_DEW_CRC_VAL,
> +	PWRAP_DEW_MON_GRP_SEL,
> +	PWRAP_DEW_MON_FLAG_SEL,
> +	PWRAP_DEW_EVENT_TEST,
> +	PWRAP_DEW_CIPHER_KEY_SEL,
> +	PWRAP_DEW_CIPHER_IV_SEL,
> +	PWRAP_DEW_CIPHER_LOAD,
> +	PWRAP_DEW_CIPHER_START,
> +	PWRAP_DEW_CIPHER_RDY,
> +	PWRAP_DEW_CIPHER_MODE,
> +	PWRAP_DEW_CIPHER_SWRST,
> +	PWRAP_MT8173_DEW_CIPHER_IV0,
> +	PWRAP_MT8173_DEW_CIPHER_IV1,
> +	PWRAP_MT8173_DEW_CIPHER_IV2,
> +	PWRAP_MT8173_DEW_CIPHER_IV3,
> +	PWRAP_MT8173_DEW_CIPHER_IV4,
> +	PWRAP_MT8173_DEW_CIPHER_IV5,
> +};
> +
> +static const u32 mt6397_regs[] = {
> +	[PWRAP_DEW_BASE] =		0xbc00,
> +	[PWRAP_DEW_EVENT_OUT_EN] =	0xbc00,
> +	[PWRAP_DEW_DIO_EN] =		0xbc02,
> +	[PWRAP_DEW_EVENT_SRC_EN] =	0xbc04,
> +	[PWRAP_DEW_EVENT_SRC] =		0xbc06,
> +	[PWRAP_DEW_EVENT_FLAG] =	0xbc08,
> +	[PWRAP_DEW_READ_TEST] =		0xbc0a,
> +	[PWRAP_DEW_WRITE_TEST] =	0xbc0c,
> +	[PWRAP_DEW_CRC_EN] =		0xbc0e,
> +	[PWRAP_DEW_CRC_VAL] =		0xbc10,
> +	[PWRAP_DEW_MON_GRP_SEL] =	0xbc12,
> +	[PWRAP_DEW_MON_FLAG_SEL] =	0xbc14,
> +	[PWRAP_DEW_EVENT_TEST] =	0xbc16,
> +	[PWRAP_DEW_CIPHER_KEY_SEL] =	0xbc18,
> +	[PWRAP_DEW_CIPHER_IV_SEL] =	0xbc1a,
> +	[PWRAP_DEW_CIPHER_LOAD] =	0xbc1c,
> +	[PWRAP_DEW_CIPHER_START] =	0xbc1e,
> +	[PWRAP_DEW_CIPHER_RDY] =	0xbc20,
> +	[PWRAP_DEW_CIPHER_MODE] =	0xbc22,
> +	[PWRAP_DEW_CIPHER_SWRST] =	0xbc24,
> +	[PWRAP_MT8173_DEW_CIPHER_IV0] = 0xbc26,
> +	[PWRAP_MT8173_DEW_CIPHER_IV1] = 0xbc28,
> +	[PWRAP_MT8173_DEW_CIPHER_IV2] = 0xbc2a,
> +	[PWRAP_MT8173_DEW_CIPHER_IV3] = 0xbc2c,
> +	[PWRAP_MT8173_DEW_CIPHER_IV4] = 0xbc2e,
> +	[PWRAP_MT8173_DEW_CIPHER_IV5] = 0xbc30,
> +};
>
>   enum pwrap_regs {
>   	PWRAP_MUX_SEL,
> @@ -349,16 +380,26 @@ static int mt8135_regs[] = {
>   	[PWRAP_DCM_DBC_PRD] =		0x160,
>   };
>
> +enum pmic_type {
> +	PMIC_MT6397,
> +};
> +
>   enum pwrap_type {
>   	PWRAP_MT8135,
>   	PWRAP_MT8173,
>   };
>
> +struct pwrap_slv_type {
> +	const u32 *dew_regs;
> +	enum pmic_type type;
> +};
> +
>   struct pmic_wrapper {
>   	struct device *dev;
>   	void __iomem *base;
>   	struct regmap *regmap;
>   	const struct pmic_wrapper_type *master;
> +	const struct pwrap_slv_type *slave;
>   	struct clk *clk_spi;
>   	struct clk *clk_wrap;
>   	struct reset_control *rstc;
> @@ -484,6 +525,16 @@ static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
>   	return 0;
>   }
>
> +static int pwrap_dew_write(struct pmic_wrapper *wrp, u32 reg, u32 wdata)
> +{
> +	return pwrap_write(wrp, wrp->slave->dew_regs[reg], wdata);
> +}
> +
> +static int pwrap_dew_read(struct pmic_wrapper *wrp, u32 reg, u32 *rdata)
> +{
> +	return pwrap_read(wrp, wrp->slave->dew_regs[reg], rdata);
> +}
> +

I would prefer to use pwrap_[read,write] directly instead of adding 
another indirection.

[PATCH V3 09/11] soc: mediatek: PMIC wrap: add a slave specific struct

[Matthias Brugger]

On 25/01/16 10:53, John Crispin wrote:
> This patch adds a new struct pwrap_slv_type that we use to store the slave
> specific data. The patch adds 2 new helper functions to access the dew
> registers. The slave type is looked up via the wrappers child node.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c |  170 +++++++++++++++++++++++++---------
>   1 file changed, 124 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 54553b4..21d8e5a 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -69,33 +69,64 @@
>   					  PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
>   					  PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
>
> -/* macro for slave device wrapper registers */
> -#define PWRAP_DEW_BASE			0xbc00
> -#define PWRAP_DEW_EVENT_OUT_EN		(PWRAP_DEW_BASE + 0x0)
> -#define PWRAP_DEW_DIO_EN		(PWRAP_DEW_BASE + 0x2)
> -#define PWRAP_DEW_EVENT_SRC_EN		(PWRAP_DEW_BASE + 0x4)
> -#define PWRAP_DEW_EVENT_SRC		(PWRAP_DEW_BASE + 0x6)
> -#define PWRAP_DEW_EVENT_FLAG		(PWRAP_DEW_BASE + 0x8)
> -#define PWRAP_DEW_READ_TEST		(PWRAP_DEW_BASE + 0xa)
> -#define PWRAP_DEW_WRITE_TEST		(PWRAP_DEW_BASE + 0xc)
> -#define PWRAP_DEW_CRC_EN		(PWRAP_DEW_BASE + 0xe)
> -#define PWRAP_DEW_CRC_VAL		(PWRAP_DEW_BASE + 0x10)
> -#define PWRAP_DEW_MON_GRP_SEL		(PWRAP_DEW_BASE + 0x12)
> -#define PWRAP_DEW_MON_FLAG_SEL		(PWRAP_DEW_BASE + 0x14)
> -#define PWRAP_DEW_EVENT_TEST		(PWRAP_DEW_BASE + 0x16)
> -#define PWRAP_DEW_CIPHER_KEY_SEL	(PWRAP_DEW_BASE + 0x18)
> -#define PWRAP_DEW_CIPHER_IV_SEL		(PWRAP_DEW_BASE + 0x1a)
> -#define PWRAP_DEW_CIPHER_LOAD		(PWRAP_DEW_BASE + 0x1c)
> -#define PWRAP_DEW_CIPHER_START		(PWRAP_DEW_BASE + 0x1e)
> -#define PWRAP_DEW_CIPHER_RDY		(PWRAP_DEW_BASE + 0x20)
> -#define PWRAP_DEW_CIPHER_MODE		(PWRAP_DEW_BASE + 0x22)
> -#define PWRAP_DEW_CIPHER_SWRST		(PWRAP_DEW_BASE + 0x24)
> -#define PWRAP_MT8173_DEW_CIPHER_IV0	(PWRAP_DEW_BASE + 0x26)
> -#define PWRAP_MT8173_DEW_CIPHER_IV1	(PWRAP_DEW_BASE + 0x28)
> -#define PWRAP_MT8173_DEW_CIPHER_IV2	(PWRAP_DEW_BASE + 0x2a)
> -#define PWRAP_MT8173_DEW_CIPHER_IV3	(PWRAP_DEW_BASE + 0x2c)
> -#define PWRAP_MT8173_DEW_CIPHER_IV4	(PWRAP_DEW_BASE + 0x2e)
> -#define PWRAP_MT8173_DEW_CIPHER_IV5	(PWRAP_DEW_BASE + 0x30)
> +/* defines for slave device wrapper registers */
> +enum dew_regs {
> +	PWRAP_DEW_BASE,
> +	PWRAP_DEW_EVENT_OUT_EN,
> +	PWRAP_DEW_DIO_EN,
> +	PWRAP_DEW_EVENT_SRC_EN,
> +	PWRAP_DEW_EVENT_SRC,
> +	PWRAP_DEW_EVENT_FLAG,
> +	PWRAP_DEW_READ_TEST,
> +	PWRAP_DEW_WRITE_TEST,
> +	PWRAP_DEW_CRC_EN,
> +	PWRAP_DEW_CRC_VAL,
> +	PWRAP_DEW_MON_GRP_SEL,
> +	PWRAP_DEW_MON_FLAG_SEL,
> +	PWRAP_DEW_EVENT_TEST,
> +	PWRAP_DEW_CIPHER_KEY_SEL,
> +	PWRAP_DEW_CIPHER_IV_SEL,
> +	PWRAP_DEW_CIPHER_LOAD,
> +	PWRAP_DEW_CIPHER_START,
> +	PWRAP_DEW_CIPHER_RDY,
> +	PWRAP_DEW_CIPHER_MODE,
> +	PWRAP_DEW_CIPHER_SWRST,
> +	PWRAP_MT8173_DEW_CIPHER_IV0,
> +	PWRAP_MT8173_DEW_CIPHER_IV1,
> +	PWRAP_MT8173_DEW_CIPHER_IV2,
> +	PWRAP_MT8173_DEW_CIPHER_IV3,
> +	PWRAP_MT8173_DEW_CIPHER_IV4,
> +	PWRAP_MT8173_DEW_CIPHER_IV5,
> +};
> +
> +static const u32 mt6397_regs[] = {
> +	[PWRAP_DEW_BASE] =		0xbc00,
> +	[PWRAP_DEW_EVENT_OUT_EN] =	0xbc00,
> +	[PWRAP_DEW_DIO_EN] =		0xbc02,
> +	[PWRAP_DEW_EVENT_SRC_EN] =	0xbc04,
> +	[PWRAP_DEW_EVENT_SRC] =		0xbc06,
> +	[PWRAP_DEW_EVENT_FLAG] =	0xbc08,
> +	[PWRAP_DEW_READ_TEST] =		0xbc0a,
> +	[PWRAP_DEW_WRITE_TEST] =	0xbc0c,
> +	[PWRAP_DEW_CRC_EN] =		0xbc0e,
> +	[PWRAP_DEW_CRC_VAL] =		0xbc10,
> +	[PWRAP_DEW_MON_GRP_SEL] =	0xbc12,
> +	[PWRAP_DEW_MON_FLAG_SEL] =	0xbc14,
> +	[PWRAP_DEW_EVENT_TEST] =	0xbc16,
> +	[PWRAP_DEW_CIPHER_KEY_SEL] =	0xbc18,
> +	[PWRAP_DEW_CIPHER_IV_SEL] =	0xbc1a,
> +	[PWRAP_DEW_CIPHER_LOAD] =	0xbc1c,
> +	[PWRAP_DEW_CIPHER_START] =	0xbc1e,
> +	[PWRAP_DEW_CIPHER_RDY] =	0xbc20,
> +	[PWRAP_DEW_CIPHER_MODE] =	0xbc22,
> +	[PWRAP_DEW_CIPHER_SWRST] =	0xbc24,
> +	[PWRAP_MT8173_DEW_CIPHER_IV0] = 0xbc26,
> +	[PWRAP_MT8173_DEW_CIPHER_IV1] = 0xbc28,
> +	[PWRAP_MT8173_DEW_CIPHER_IV2] = 0xbc2a,
> +	[PWRAP_MT8173_DEW_CIPHER_IV3] = 0xbc2c,
> +	[PWRAP_MT8173_DEW_CIPHER_IV4] = 0xbc2e,
> +	[PWRAP_MT8173_DEW_CIPHER_IV5] = 0xbc30,
> +};
>
>   enum pwrap_regs {
>   	PWRAP_MUX_SEL,
> @@ -349,16 +380,26 @@ static int mt8135_regs[] = {
>   	[PWRAP_DCM_DBC_PRD] =		0x160,
>   };
>
> +enum pmic_type {
> +	PMIC_MT6397,
> +};
> +
>   enum pwrap_type {
>   	PWRAP_MT8135,
>   	PWRAP_MT8173,
>   };
>
> +struct pwrap_slv_type {
> +	const u32 *dew_regs;
> +	enum pmic_type type;
> +};
> +
>   struct pmic_wrapper {
>   	struct device *dev;
>   	void __iomem *base;
>   	struct regmap *regmap;
>   	const struct pmic_wrapper_type *master;
> +	const struct pwrap_slv_type *slave;
>   	struct clk *clk_spi;
>   	struct clk *clk_wrap;
>   	struct reset_control *rstc;
> @@ -484,6 +525,16 @@ static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
>   	return 0;
>   }
>
> +static int pwrap_dew_write(struct pmic_wrapper *wrp, u32 reg, u32 wdata)
> +{
> +	return pwrap_write(wrp, wrp->slave->dew_regs[reg], wdata);
> +}
> +
> +static int pwrap_dew_read(struct pmic_wrapper *wrp, u32 reg, u32 *rdata)
> +{
> +	return pwrap_read(wrp, wrp->slave->dew_regs[reg], rdata);
> +}
> +

I would prefer to use pwrap_[read,write] directly instead of adding 
another indirection.

[PATCH V3 10/11] soc: mediatek: PMIC wrap: add mt6323 slave support

[John Crispin]

Add support for MT6323 slaves. This PMIC can be found on MT2701 and MT7623
EVB. The only function that we need to touch is pwrap_init_cipher().

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   46 ++++++++++++++++++++++++++++++++--
 1 file changed, 44 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 21d8e5a..85c4314 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -97,6 +97,31 @@ enum dew_regs {
 	PWRAP_MT8173_DEW_CIPHER_IV3,
 	PWRAP_MT8173_DEW_CIPHER_IV4,
 	PWRAP_MT8173_DEW_CIPHER_IV5,
+
+	/* MT6323 only regs */
+	PWRAP_DEW_CRC_SWRST,
+	PWRAP_DEW_CIPHER_EN,
+	PWRAP_DEW_RDDMY_NO,
+	PWRAP_DEW_RDATA_DLY_SEL,
+};
+
+static const u32 mt6323_regs[] = {
+	[PWRAP_DEW_BASE] =		0x0000,
+	[PWRAP_DEW_DIO_EN] =		0x018a,
+	[PWRAP_DEW_READ_TEST] =		0x018c,
+	[PWRAP_DEW_WRITE_TEST] =	0x018e,
+	[PWRAP_DEW_CRC_SWRST] =		0x0190,
+	[PWRAP_DEW_CRC_EN] =		0x0192,
+	[PWRAP_DEW_CRC_VAL] =		0x0194,
+	[PWRAP_DEW_MON_GRP_SEL] =	0x0196,
+	[PWRAP_DEW_CIPHER_KEY_SEL] =	0x0198,
+	[PWRAP_DEW_CIPHER_IV_SEL] =	0x019a,
+	[PWRAP_DEW_CIPHER_EN] =		0x019c,
+	[PWRAP_DEW_CIPHER_RDY] =	0x019e,
+	[PWRAP_DEW_CIPHER_MODE] =	0x01a0,
+	[PWRAP_DEW_CIPHER_SWRST] =	0x01a2,
+	[PWRAP_DEW_RDDMY_NO] =		0x01a4,
+	[PWRAP_DEW_RDATA_DLY_SEL] =	0x01a6,
 };
 
 static const u32 mt6397_regs[] = {
@@ -381,6 +406,7 @@ static int mt8135_regs[] = {
 };
 
 enum pmic_type {
+	PMIC_MT6323,
 	PMIC_MT6397,
 };
 
@@ -676,8 +702,16 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
 	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
 	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
-	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
-	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
+
+	switch (wrp->slave->type) {
+	case PMIC_MT6397:
+		pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
+		pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
+		break;
+	case PMIC_MT6323:
+		pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_EN, 0x1);
+		break;
+	}
 
 	/* wait for cipher data ready@AP */
 	ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
@@ -870,6 +904,11 @@ static const struct regmap_config pwrap_regmap_config = {
 	.max_register = 0xffff,
 };
 
+static const struct pwrap_slv_type pmic_mt6323 = {
+	.dew_regs = mt6323_regs,
+	.type = PMIC_MT6323,
+};
+
 static const struct pwrap_slv_type pmic_mt6397 = {
 	.dew_regs = mt6397_regs,
 	.type = PMIC_MT6397,
@@ -877,6 +916,9 @@ static const struct pwrap_slv_type pmic_mt6397 = {
 
 static const struct of_device_id of_slave_match_tbl[] = {
 	{
+		.compatible = "mediatek,mt6323",
+		.data = &pmic_mt6323,
+	}, {
 		.compatible = "mediatek,mt6397",
 		.data = &pmic_mt6397,
 	}, {
-- 
1.7.10.4

[PATCH V3 10/11] soc: mediatek: PMIC wrap: add mt6323 slave support

[John Crispin]

Add support for MT6323 slaves. This PMIC can be found on MT2701 and MT7623
EVB. The only function that we need to touch is pwrap_init_cipher().

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |   46 ++++++++++++++++++++++++++++++++--
 1 file changed, 44 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 21d8e5a..85c4314 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -97,6 +97,31 @@ enum dew_regs {
 	PWRAP_MT8173_DEW_CIPHER_IV3,
 	PWRAP_MT8173_DEW_CIPHER_IV4,
 	PWRAP_MT8173_DEW_CIPHER_IV5,
+
+	/* MT6323 only regs */
+	PWRAP_DEW_CRC_SWRST,
+	PWRAP_DEW_CIPHER_EN,
+	PWRAP_DEW_RDDMY_NO,
+	PWRAP_DEW_RDATA_DLY_SEL,
+};
+
+static const u32 mt6323_regs[] = {
+	[PWRAP_DEW_BASE] =		0x0000,
+	[PWRAP_DEW_DIO_EN] =		0x018a,
+	[PWRAP_DEW_READ_TEST] =		0x018c,
+	[PWRAP_DEW_WRITE_TEST] =	0x018e,
+	[PWRAP_DEW_CRC_SWRST] =		0x0190,
+	[PWRAP_DEW_CRC_EN] =		0x0192,
+	[PWRAP_DEW_CRC_VAL] =		0x0194,
+	[PWRAP_DEW_MON_GRP_SEL] =	0x0196,
+	[PWRAP_DEW_CIPHER_KEY_SEL] =	0x0198,
+	[PWRAP_DEW_CIPHER_IV_SEL] =	0x019a,
+	[PWRAP_DEW_CIPHER_EN] =		0x019c,
+	[PWRAP_DEW_CIPHER_RDY] =	0x019e,
+	[PWRAP_DEW_CIPHER_MODE] =	0x01a0,
+	[PWRAP_DEW_CIPHER_SWRST] =	0x01a2,
+	[PWRAP_DEW_RDDMY_NO] =		0x01a4,
+	[PWRAP_DEW_RDATA_DLY_SEL] =	0x01a6,
 };
 
 static const u32 mt6397_regs[] = {
@@ -381,6 +406,7 @@ static int mt8135_regs[] = {
 };
 
 enum pmic_type {
+	PMIC_MT6323,
 	PMIC_MT6397,
 };
 
@@ -676,8 +702,16 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
 	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
 	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
-	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
-	pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
+
+	switch (wrp->slave->type) {
+	case PMIC_MT6397:
+		pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
+		pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
+		break;
+	case PMIC_MT6323:
+		pwrap_dew_write(wrp, PWRAP_DEW_CIPHER_EN, 0x1);
+		break;
+	}
 
 	/* wait for cipher data ready at AP */
 	ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
@@ -870,6 +904,11 @@ static const struct regmap_config pwrap_regmap_config = {
 	.max_register = 0xffff,
 };
 
+static const struct pwrap_slv_type pmic_mt6323 = {
+	.dew_regs = mt6323_regs,
+	.type = PMIC_MT6323,
+};
+
 static const struct pwrap_slv_type pmic_mt6397 = {
 	.dew_regs = mt6397_regs,
 	.type = PMIC_MT6397,
@@ -877,6 +916,9 @@ static const struct pwrap_slv_type pmic_mt6397 = {
 
 static const struct of_device_id of_slave_match_tbl[] = {
 	{
+		.compatible = "mediatek,mt6323",
+		.data = &pmic_mt6323,
+	}, {
 		.compatible = "mediatek,mt6397",
 		.data = &pmic_mt6397,
 	}, {
-- 
1.7.10.4

[PATCH V3 11/11] soc: mediatek: PMIC wrap: add MT2701/7623 support

[John Crispin]

Add the registers, callbacks and data structures required to make the
wrapper work on MT2701 and MT7623.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |  160 ++++++++++++++++++++++++++++++++++
 1 file changed, 160 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 85c4314..7e0d159 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -52,6 +52,7 @@
 #define PWRAP_DEW_WRITE_TEST_VAL	0xa55a
 
 /* macro for manual command */
+#define PWRAP_MAN_CMD_SPI_WRITE_NEW	(1 << 14)
 #define PWRAP_MAN_CMD_SPI_WRITE		(1 << 13)
 #define PWRAP_MAN_CMD_OP_CSH		(0x0 << 8)
 #define PWRAP_MAN_CMD_OP_CSL		(0x1 << 8)
@@ -214,6 +215,17 @@ enum pwrap_regs {
 	PWRAP_DCM_EN,
 	PWRAP_DCM_DBC_PRD,
 
+	/* MT2701 only regs */
+	PWRAP_OP_TYPE,
+	PWRAP_MSB_FIRST,
+	PWRAP_GPS_STA,
+	PWRAP_ADC_CMD_ADDR,
+	PWRAP_PWRAP_ADC_CMD,
+	PWRAP_ADC_RDY_ADDR,
+	PWRAP_ADC_RDATA_ADDR1,
+	PWRAP_ADC_RDATA_ADDR2,
+	PWRAP_ADC_WRAP_SEL,
+
 	/* MT8135 only regs */
 	PWRAP_CSHEXT,
 	PWRAP_EVENT_IN_EN,
@@ -250,6 +262,96 @@ enum pwrap_regs {
 	PWRAP_CIPHER_EN,
 };
 
+static int mt2701_regs[] = {
+	[PWRAP_MUX_SEL] =		0x0,
+	[PWRAP_WRAP_EN] =		0x4,
+	[PWRAP_DIO_EN] =		0x8,
+	[PWRAP_SIDLY] =			0xc,
+	[PWRAP_OP_TYPE] =		0x10,
+	[PWRAP_MSB_FIRST] =		0x14,
+	[PWRAP_RDDMY] =			0x18,
+	[PWRAP_SI_CK_CON] =		0x1c,
+	[PWRAP_CSHEXT_WRITE] =		0x20,
+	[PWRAP_CSHEXT_READ] =		0x24,
+	[PWRAP_CSLEXT_START] =		0x28,
+	[PWRAP_CSLEXT_END] =		0x2c,
+	[PWRAP_STAUPD_PRD] =		0x30,
+	[PWRAP_STAUPD_GRPEN] =		0x34,
+	[PWRAP_STAUPD_MAN_TRIG] =	0x38,
+	[PWRAP_STAUPD_STA] =		0x3c,
+	[PWRAP_GPS_STA] =		0x40,
+	[PWRAP_WRAP_STA] =		0x44,
+	[PWRAP_HARB_INIT] =		0x48,
+	[PWRAP_HARB_HPRIO] =		0x4c,
+	[PWRAP_HIPRIO_ARB_EN] =		0x50,
+	[PWRAP_HARB_STA0] =		0x54,
+	[PWRAP_HARB_STA1] =		0x58,
+	[PWRAP_MAN_EN] =		0x5c,
+	[PWRAP_MAN_CMD] =		0x60,
+	[PWRAP_MAN_RDATA] =		0x64,
+	[PWRAP_MAN_VLDCLR] =		0x68,
+	[PWRAP_WACS0_EN] =		0x6c,
+	[PWRAP_INIT_DONE0] =		0x70,
+	[PWRAP_WACS0_CMD] =		0x74,
+	[PWRAP_WACS0_RDATA] =		0x78,
+	[PWRAP_WACS0_VLDCLR] =		0x7c,
+	[PWRAP_WACS1_EN] =		0x80,
+	[PWRAP_INIT_DONE1] =		0x84,
+	[PWRAP_WACS1_CMD] =		0x88,
+	[PWRAP_WACS1_RDATA] =		0x8c,
+	[PWRAP_WACS1_VLDCLR] =		0x90,
+	[PWRAP_WACS2_EN] =		0x94,
+	[PWRAP_INIT_DONE2] =		0x98,
+	[PWRAP_WACS2_CMD] =		0x9c,
+	[PWRAP_WACS2_RDATA] =		0xa0,
+	[PWRAP_WACS2_VLDCLR] =		0xa4,
+	[PWRAP_INT_EN] =		0xa8,
+	[PWRAP_INT_FLG_RAW] =		0xac,
+	[PWRAP_INT_FLG] =		0xb0,
+	[PWRAP_INT_CLR] =		0xb4,
+	[PWRAP_SIG_ADR] =		0xb8,
+	[PWRAP_SIG_MODE] =		0xbc,
+	[PWRAP_SIG_VALUE] =		0xc0,
+	[PWRAP_SIG_ERRVAL] =		0xc4,
+	[PWRAP_CRC_EN] =		0xc8,
+	[PWRAP_TIMER_EN] =		0xcc,
+	[PWRAP_TIMER_STA] =		0xd0,
+	[PWRAP_WDT_UNIT] =		0xd4,
+	[PWRAP_WDT_SRC_EN] =		0xd8,
+	[PWRAP_WDT_FLG] =		0xdc,
+	[PWRAP_DEBUG_INT_SEL] =		0xe0,
+	[PWRAP_DVFS_ADR0] =		0xe4,
+	[PWRAP_DVFS_WDATA0] =		0xe8,
+	[PWRAP_DVFS_ADR1] =		0xec,
+	[PWRAP_DVFS_WDATA1] =		0xf0,
+	[PWRAP_DVFS_ADR2] =		0xf4,
+	[PWRAP_DVFS_WDATA2] =		0xf8,
+	[PWRAP_DVFS_ADR3] =		0xfc,
+	[PWRAP_DVFS_WDATA3] =		0x100,
+	[PWRAP_DVFS_ADR4] =		0x104,
+	[PWRAP_DVFS_WDATA4] =		0x108,
+	[PWRAP_DVFS_ADR5] =		0x10c,
+	[PWRAP_DVFS_WDATA5] =		0x110,
+	[PWRAP_DVFS_ADR6] =		0x114,
+	[PWRAP_DVFS_WDATA6] =		0x118,
+	[PWRAP_DVFS_ADR7] =		0x11c,
+	[PWRAP_DVFS_WDATA7] =		0x120,
+	[PWRAP_CIPHER_KEY_SEL] =	0x124,
+	[PWRAP_CIPHER_IV_SEL] =		0x128,
+	[PWRAP_CIPHER_EN] =		0x12c,
+	[PWRAP_CIPHER_RDY] =		0x130,
+	[PWRAP_CIPHER_MODE] =		0x134,
+	[PWRAP_CIPHER_SWRST] =		0x138,
+	[PWRAP_DCM_EN] =		0x13c,
+	[PWRAP_DCM_DBC_PRD] =		0x140,
+	[PWRAP_ADC_CMD_ADDR] =		0x144,
+	[PWRAP_PWRAP_ADC_CMD] =		0x148,
+	[PWRAP_ADC_RDY_ADDR] =		0x14c,
+	[PWRAP_ADC_RDATA_ADDR1] =	0x150,
+	[PWRAP_ADC_RDATA_ADDR2] =	0x154,
+	[PWRAP_ADC_WRAP_SEL] =		0x184,
+};
+
 static int mt8173_regs[] = {
 	[PWRAP_MUX_SEL] =		0x0,
 	[PWRAP_WRAP_EN] =		0x4,
@@ -411,6 +513,7 @@ enum pmic_type {
 };
 
 enum pwrap_type {
+	PWRAP_MT2701,
 	PWRAP_MT8135,
 	PWRAP_MT8173,
 };
@@ -660,6 +763,30 @@ static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
 	return 0;
 }
 
+static int pwrap_mt2701_init_reg_clock(struct pmic_wrapper *wrp)
+{
+	switch (wrp->slave->type) {
+	case PMIC_MT6397:
+		pwrap_writel(wrp, 0xc, PWRAP_RDDMY);
+		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_WRITE);
+		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_READ);
+		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
+		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
+		break;
+
+	case PMIC_MT6323:
+		pwrap_writel(wrp, 0x8, PWRAP_RDDMY);
+		pwrap_dew_write(wrp, PWRAP_DEW_RDDMY_NO, 0x8);
+		pwrap_writel(wrp, 0x5, PWRAP_CSHEXT_WRITE);
+		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_READ);
+		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
+		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
+		break;
+	}
+
+	return 0;
+}
+
 static bool pwrap_is_cipher_ready(struct pmic_wrapper *wrp)
 {
 	return pwrap_readl(wrp, PWRAP_CIPHER_RDY) & 1;
@@ -692,6 +819,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
 		break;
+	case PWRAP_MT2701:
 	case PWRAP_MT8173:
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
 		break;
@@ -784,6 +912,24 @@ static int pwrap_mt8173_init_special(struct pmic_wrapper *wrp)
 	return 0;
 }
 
+static int pwrap_mt2701_init_special(struct pmic_wrapper *wrp)
+{
+	/* GPS_INTF initialization */
+	switch (wrp->slave->type) {
+	case PMIC_MT6323:
+		pwrap_writel(wrp, 0x076c, PWRAP_ADC_CMD_ADDR);
+		pwrap_writel(wrp, 0x8000, PWRAP_PWRAP_ADC_CMD);
+		pwrap_writel(wrp, 0x072c, PWRAP_ADC_RDY_ADDR);
+		pwrap_writel(wrp, 0x072e, PWRAP_ADC_RDATA_ADDR1);
+		pwrap_writel(wrp, 0x0730, PWRAP_ADC_RDATA_ADDR2);
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
 static int pwrap_init(struct pmic_wrapper *wrp)
 {
 	int ret;
@@ -927,6 +1073,17 @@ static const struct of_device_id of_slave_match_tbl[] = {
 };
 MODULE_DEVICE_TABLE(of, of_slave_match_tbl);
 
+static const struct pmic_wrapper_type pwrap_mt2701 = {
+	.regs = mt2701_regs,
+	.type = PWRAP_MT2701,
+	.arb_en_all = 0x3f,
+	.int_en_all = BIT(31) | BIT(2),
+	.spi_w = PWRAP_MAN_CMD_SPI_WRITE_NEW,
+	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+	.init_reg_clock = pwrap_mt2701_init_reg_clock,
+	.init_special = pwrap_mt2701_init_special,
+};
+
 static struct pmic_wrapper_type pwrap_mt8135 = {
 	.regs = mt8135_regs,
 	.type = PWRAP_MT8135,
@@ -952,6 +1109,9 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 
 static struct of_device_id of_pwrap_match_tbl[] = {
 	{
+		.compatible = "mediatek,mt2701-pwrap",
+		.data = &pwrap_mt2701,
+	}, {
 		.compatible = "mediatek,mt8135-pwrap",
 		.data = &pwrap_mt8135,
 	}, {
-- 
1.7.10.4

[PATCH V3 11/11] soc: mediatek: PMIC wrap: add MT2701/7623 support

[John Crispin]

Add the registers, callbacks and data structures required to make the
wrapper work on MT2701 and MT7623.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c |  160 ++++++++++++++++++++++++++++++++++
 1 file changed, 160 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 85c4314..7e0d159 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -52,6 +52,7 @@
 #define PWRAP_DEW_WRITE_TEST_VAL	0xa55a
 
 /* macro for manual command */
+#define PWRAP_MAN_CMD_SPI_WRITE_NEW	(1 << 14)
 #define PWRAP_MAN_CMD_SPI_WRITE		(1 << 13)
 #define PWRAP_MAN_CMD_OP_CSH		(0x0 << 8)
 #define PWRAP_MAN_CMD_OP_CSL		(0x1 << 8)
@@ -214,6 +215,17 @@ enum pwrap_regs {
 	PWRAP_DCM_EN,
 	PWRAP_DCM_DBC_PRD,
 
+	/* MT2701 only regs */
+	PWRAP_OP_TYPE,
+	PWRAP_MSB_FIRST,
+	PWRAP_GPS_STA,
+	PWRAP_ADC_CMD_ADDR,
+	PWRAP_PWRAP_ADC_CMD,
+	PWRAP_ADC_RDY_ADDR,
+	PWRAP_ADC_RDATA_ADDR1,
+	PWRAP_ADC_RDATA_ADDR2,
+	PWRAP_ADC_WRAP_SEL,
+
 	/* MT8135 only regs */
 	PWRAP_CSHEXT,
 	PWRAP_EVENT_IN_EN,
@@ -250,6 +262,96 @@ enum pwrap_regs {
 	PWRAP_CIPHER_EN,
 };
 
+static int mt2701_regs[] = {
+	[PWRAP_MUX_SEL] =		0x0,
+	[PWRAP_WRAP_EN] =		0x4,
+	[PWRAP_DIO_EN] =		0x8,
+	[PWRAP_SIDLY] =			0xc,
+	[PWRAP_OP_TYPE] =		0x10,
+	[PWRAP_MSB_FIRST] =		0x14,
+	[PWRAP_RDDMY] =			0x18,
+	[PWRAP_SI_CK_CON] =		0x1c,
+	[PWRAP_CSHEXT_WRITE] =		0x20,
+	[PWRAP_CSHEXT_READ] =		0x24,
+	[PWRAP_CSLEXT_START] =		0x28,
+	[PWRAP_CSLEXT_END] =		0x2c,
+	[PWRAP_STAUPD_PRD] =		0x30,
+	[PWRAP_STAUPD_GRPEN] =		0x34,
+	[PWRAP_STAUPD_MAN_TRIG] =	0x38,
+	[PWRAP_STAUPD_STA] =		0x3c,
+	[PWRAP_GPS_STA] =		0x40,
+	[PWRAP_WRAP_STA] =		0x44,
+	[PWRAP_HARB_INIT] =		0x48,
+	[PWRAP_HARB_HPRIO] =		0x4c,
+	[PWRAP_HIPRIO_ARB_EN] =		0x50,
+	[PWRAP_HARB_STA0] =		0x54,
+	[PWRAP_HARB_STA1] =		0x58,
+	[PWRAP_MAN_EN] =		0x5c,
+	[PWRAP_MAN_CMD] =		0x60,
+	[PWRAP_MAN_RDATA] =		0x64,
+	[PWRAP_MAN_VLDCLR] =		0x68,
+	[PWRAP_WACS0_EN] =		0x6c,
+	[PWRAP_INIT_DONE0] =		0x70,
+	[PWRAP_WACS0_CMD] =		0x74,
+	[PWRAP_WACS0_RDATA] =		0x78,
+	[PWRAP_WACS0_VLDCLR] =		0x7c,
+	[PWRAP_WACS1_EN] =		0x80,
+	[PWRAP_INIT_DONE1] =		0x84,
+	[PWRAP_WACS1_CMD] =		0x88,
+	[PWRAP_WACS1_RDATA] =		0x8c,
+	[PWRAP_WACS1_VLDCLR] =		0x90,
+	[PWRAP_WACS2_EN] =		0x94,
+	[PWRAP_INIT_DONE2] =		0x98,
+	[PWRAP_WACS2_CMD] =		0x9c,
+	[PWRAP_WACS2_RDATA] =		0xa0,
+	[PWRAP_WACS2_VLDCLR] =		0xa4,
+	[PWRAP_INT_EN] =		0xa8,
+	[PWRAP_INT_FLG_RAW] =		0xac,
+	[PWRAP_INT_FLG] =		0xb0,
+	[PWRAP_INT_CLR] =		0xb4,
+	[PWRAP_SIG_ADR] =		0xb8,
+	[PWRAP_SIG_MODE] =		0xbc,
+	[PWRAP_SIG_VALUE] =		0xc0,
+	[PWRAP_SIG_ERRVAL] =		0xc4,
+	[PWRAP_CRC_EN] =		0xc8,
+	[PWRAP_TIMER_EN] =		0xcc,
+	[PWRAP_TIMER_STA] =		0xd0,
+	[PWRAP_WDT_UNIT] =		0xd4,
+	[PWRAP_WDT_SRC_EN] =		0xd8,
+	[PWRAP_WDT_FLG] =		0xdc,
+	[PWRAP_DEBUG_INT_SEL] =		0xe0,
+	[PWRAP_DVFS_ADR0] =		0xe4,
+	[PWRAP_DVFS_WDATA0] =		0xe8,
+	[PWRAP_DVFS_ADR1] =		0xec,
+	[PWRAP_DVFS_WDATA1] =		0xf0,
+	[PWRAP_DVFS_ADR2] =		0xf4,
+	[PWRAP_DVFS_WDATA2] =		0xf8,
+	[PWRAP_DVFS_ADR3] =		0xfc,
+	[PWRAP_DVFS_WDATA3] =		0x100,
+	[PWRAP_DVFS_ADR4] =		0x104,
+	[PWRAP_DVFS_WDATA4] =		0x108,
+	[PWRAP_DVFS_ADR5] =		0x10c,
+	[PWRAP_DVFS_WDATA5] =		0x110,
+	[PWRAP_DVFS_ADR6] =		0x114,
+	[PWRAP_DVFS_WDATA6] =		0x118,
+	[PWRAP_DVFS_ADR7] =		0x11c,
+	[PWRAP_DVFS_WDATA7] =		0x120,
+	[PWRAP_CIPHER_KEY_SEL] =	0x124,
+	[PWRAP_CIPHER_IV_SEL] =		0x128,
+	[PWRAP_CIPHER_EN] =		0x12c,
+	[PWRAP_CIPHER_RDY] =		0x130,
+	[PWRAP_CIPHER_MODE] =		0x134,
+	[PWRAP_CIPHER_SWRST] =		0x138,
+	[PWRAP_DCM_EN] =		0x13c,
+	[PWRAP_DCM_DBC_PRD] =		0x140,
+	[PWRAP_ADC_CMD_ADDR] =		0x144,
+	[PWRAP_PWRAP_ADC_CMD] =		0x148,
+	[PWRAP_ADC_RDY_ADDR] =		0x14c,
+	[PWRAP_ADC_RDATA_ADDR1] =	0x150,
+	[PWRAP_ADC_RDATA_ADDR2] =	0x154,
+	[PWRAP_ADC_WRAP_SEL] =		0x184,
+};
+
 static int mt8173_regs[] = {
 	[PWRAP_MUX_SEL] =		0x0,
 	[PWRAP_WRAP_EN] =		0x4,
@@ -411,6 +513,7 @@ enum pmic_type {
 };
 
 enum pwrap_type {
+	PWRAP_MT2701,
 	PWRAP_MT8135,
 	PWRAP_MT8173,
 };
@@ -660,6 +763,30 @@ static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
 	return 0;
 }
 
+static int pwrap_mt2701_init_reg_clock(struct pmic_wrapper *wrp)
+{
+	switch (wrp->slave->type) {
+	case PMIC_MT6397:
+		pwrap_writel(wrp, 0xc, PWRAP_RDDMY);
+		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_WRITE);
+		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_READ);
+		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
+		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
+		break;
+
+	case PMIC_MT6323:
+		pwrap_writel(wrp, 0x8, PWRAP_RDDMY);
+		pwrap_dew_write(wrp, PWRAP_DEW_RDDMY_NO, 0x8);
+		pwrap_writel(wrp, 0x5, PWRAP_CSHEXT_WRITE);
+		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_READ);
+		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
+		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
+		break;
+	}
+
+	return 0;
+}
+
 static bool pwrap_is_cipher_ready(struct pmic_wrapper *wrp)
 {
 	return pwrap_readl(wrp, PWRAP_CIPHER_RDY) & 1;
@@ -692,6 +819,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_LOAD);
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_START);
 		break;
+	case PWRAP_MT2701:
 	case PWRAP_MT8173:
 		pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
 		break;
@@ -784,6 +912,24 @@ static int pwrap_mt8173_init_special(struct pmic_wrapper *wrp)
 	return 0;
 }
 
+static int pwrap_mt2701_init_special(struct pmic_wrapper *wrp)
+{
+	/* GPS_INTF initialization */
+	switch (wrp->slave->type) {
+	case PMIC_MT6323:
+		pwrap_writel(wrp, 0x076c, PWRAP_ADC_CMD_ADDR);
+		pwrap_writel(wrp, 0x8000, PWRAP_PWRAP_ADC_CMD);
+		pwrap_writel(wrp, 0x072c, PWRAP_ADC_RDY_ADDR);
+		pwrap_writel(wrp, 0x072e, PWRAP_ADC_RDATA_ADDR1);
+		pwrap_writel(wrp, 0x0730, PWRAP_ADC_RDATA_ADDR2);
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
 static int pwrap_init(struct pmic_wrapper *wrp)
 {
 	int ret;
@@ -927,6 +1073,17 @@ static const struct of_device_id of_slave_match_tbl[] = {
 };
 MODULE_DEVICE_TABLE(of, of_slave_match_tbl);
 
+static const struct pmic_wrapper_type pwrap_mt2701 = {
+	.regs = mt2701_regs,
+	.type = PWRAP_MT2701,
+	.arb_en_all = 0x3f,
+	.int_en_all = BIT(31) | BIT(2),
+	.spi_w = PWRAP_MAN_CMD_SPI_WRITE_NEW,
+	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+	.init_reg_clock = pwrap_mt2701_init_reg_clock,
+	.init_special = pwrap_mt2701_init_special,
+};
+
 static struct pmic_wrapper_type pwrap_mt8135 = {
 	.regs = mt8135_regs,
 	.type = PWRAP_MT8135,
@@ -952,6 +1109,9 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
 
 static struct of_device_id of_pwrap_match_tbl[] = {
 	{
+		.compatible = "mediatek,mt2701-pwrap",
+		.data = &pwrap_mt2701,
+	}, {
 		.compatible = "mediatek,mt8135-pwrap",
 		.data = &pwrap_mt8135,
 	}, {
-- 
1.7.10.4