Re: [Qemu-devel] [vfio-users] [PATCH v3 00/11] igd passthrough chipset tweaks

[Alex Williamson <alex.williamson@redhat.com>]

On Tue, 2016-01-05 at 12:41 +0100, Gerd Hoffmann wrote:
>   Hi,
> 
> We have some code in our tree to support pci passthrough of intel
> graphics devices (igd) on xen, which requires some chipset tweaks
> for (a) the host bridge and (b) the lpc/isa-bridge to meat the
> expectations of the guest driver.
> 
> For kvm we need pretty much the same, also the requirements for vgpu
> (xengt/kvmgt) are very simliar.  This patch wires up the existing
> support for kvm.  It also brings a bunch of bugfixes and cleanups.
> 
> Unfortunaly the oldish laptop I had planned to use for testing turned
> out to have no working iommu support for igd, so this patch series
> still has seen very light testing only.  Any testing feedback is very
> welcome.
> 

Hi Gerd,

I believe I have working code for getting the IGD OpRegion from the host
into QEMU using a vfio device specific region, but now comes the part of
how do we expose it into the VM and I'm looking for suggestions.
Effectively in vfio-pci I have a MemoryRegion that can access the host
OpRegion.  We can map that directly into the guest, map it read-only
into the guest, or we can read out the contents and have our own virtual
version of it.  So let me throw out the options, some of which come from
you, and we can hammer out which way to go.

1) The OpRegion MemoryRegion is mapped into system_memory through
programming of the 0xFC config space register.
 a) vfio-pci could pick an address to do this as it is realized.
 b) SeaBIOS/OVMF could program this.

Discussion: 1.a) Avoids any BIOS dependency, but vfio-pci would need to
pick an address and mark it as e820 reserved.  I'm not sure how to pick
that address.  We'd probably want to make the 0xFC config register
read-only.  1.b) has the issue you mentioned where in most cases the
OpRegion will be 8k, but the BIOS won't know how much address space it's
mapping into system memory when it writes the 0xFC register.  I don't
know how much of a problem this is since the BIOS can easily determine
the size once mapped and re-map it somewhere there's sufficient space.
Practically, it seems like it's always going to be 8K.  This of course
requires modification to every BIOS.  It also leaves the 0xFC register
as a mapping control rather than a pointer to the OpRegion in RAM, which
doesn't really match real hardware.  The BIOS would need to pick an
address in this case.

2) Read-only mappings version of 1)

Discussion: Really nothing changes from the issues above, just prevents
any possibility of the guest modifying anything in the host.  Xen
apparently allows write access to the host page already.

3) Copy OpRegion contents into buffer and do either 1) or 2) above.

Discussion: No benefit that I can see over above other than maybe
allowing write access that doesn't affect the host.

4) Copy contents into a guest RAM location, mark it reserved, point to
it via 0xFC config as scratch register.
 a) Done by QEMU (vfio-pci)
 b) Done by SeaBIOS/OVMF

Discussion: This is the most like real hardware.  4.a) has the usual
issue of how to pick an address, but the benefit of not requiring BIOS
changes (simply mark the RAM reserved via existing methods).  4.b) would
require passing a buffer containing the contents of the OpRegion via
fw_cfg and letting the BIOS do the setup.  The latter of course requires
modifying each BIOS for this support.

Of course none of these support hotplug nor really can they since
reserved memory regions are not dynamic in the architecture.

In all cases, some piece of software needs to know where it can place
the OpRegion in guest memory.  It seems like there are advantages or
disadvantages whether that's done by QEMU or the BIOS, but we only need
to do it once if it's QEMU.  Suggestions, comments, preferences?


Another thing I notice in this series is the access to PCI config space
of both the host bridge and the LPC bridge.  This prevents unprivileged
use cases and is a barrier to libvirt support since it will need to
provide access to the pci-sysfs files for the process.  Should vfio add
additional device specific regions to expose the config space of these
other devices?  I don't see that there's any write access necessary, so
these would be read-only.  The comment in the kernel regarding why an
unprivileged user can only access standard config space indicates that
some devices lockup if unimplemented config space is accessed.  It seems
like that's probably not an issue for recent-ish Intel host bridges and
LPC devices.  If OpRegion, host bridge config, and LPC config were all
provided through vfio, would there be any need for igd-passthrough
switches on the machine type?  It seems like the QEMU vfio-pci driver
could enable the necessary features and pre-fill the host and LPC bridge
config items on demand when parsing an IGD device.  Thanks,

Alex