[PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Ramalingam C]

We need to enable DSI PLL before configuring the DSI registers.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 91cef35..378f879 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
 
 	DRM_DEBUG_KMS("\n");
 
-	intel_dsi_prepare(encoder);
 	intel_enable_dsi_pll(encoder);
+	intel_dsi_prepare(encoder);
 
 	/* Panel Enable over CRC PMIC */
 	if (intel_dsi->gpio_panel)
-- 
1.7.9.5

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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Thulasimani, Sivakumar]

just realized that intel_dsi_init is not called from setup outputs for 
BXT. is this expected ?
if so when is it expected to be added ?

Again, the current code in intel_setup_outputs calls intel_dsi_init from
vlv/chv section so please confirm if this is needed for all platforms
or just in BXT.

On 2/2/2016 11:21 PM, Ramalingam C wrote:
> We need to enable DSI PLL before configuring the DSI registers.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_dsi.c |    2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 91cef35..378f879 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
>   
>   	DRM_DEBUG_KMS("\n");
>   
> -	intel_dsi_prepare(encoder);
>   	intel_enable_dsi_pll(encoder);
> +	intel_dsi_prepare(encoder);
>   
>   	/* Panel Enable over CRC PMIC */
>   	if (intel_dsi->gpio_panel)

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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Mika Kahola]

This change is needed to enable DSI/MIPI display on BXT

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

On Tue, 2016-02-02 at 23:21 +0530, Ramalingam C wrote:
> We need to enable DSI PLL before configuring the DSI registers.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 91cef35..378f879 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
>  
>  	DRM_DEBUG_KMS("\n");
>  
> -	intel_dsi_prepare(encoder);
>  	intel_enable_dsi_pll(encoder);
> +	intel_dsi_prepare(encoder);
>  
>  	/* Panel Enable over CRC PMIC */
>  	if (intel_dsi->gpio_panel)


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✗ Fi.CI.BAT: warning for drm/i915/BXT: Configure DSI after enabling DSI pll

[Patchwork]

== Summary ==

Series 3016v1 drm/i915/BXT: Configure DSI after enabling DSI pll
http://patchwork.freedesktop.org/api/1.0/series/3016/revisions/1/mbox/

Test kms_flip:
        Subgroup basic-flip-vs-dpms:
                pass       -> DMESG-WARN (ilk-hp8440p) UNSTABLE
Test kms_force_connector_basic:
        Subgroup prune-stale-modes:
                pass       -> SKIP       (ilk-hp8440p)
Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-b-frame-sequence:
                pass       -> DMESG-WARN (ilk-hp8440p)
        Subgroup suspend-read-crc-pipe-c:
                incomplete -> PASS       (hsw-gt2)

bdw-ultra        total:159  pass:147  dwarn:0   dfail:0   fail:0   skip:12 
bsw-nuc-2        total:159  pass:131  dwarn:0   dfail:0   fail:0   skip:28 
hsw-brixbox      total:159  pass:146  dwarn:0   dfail:0   fail:0   skip:13 
hsw-gt2          total:159  pass:149  dwarn:0   dfail:0   fail:0   skip:10 
ilk-hp8440p      total:159  pass:108  dwarn:2   dfail:0   fail:0   skip:49 
ivb-t430s        total:159  pass:145  dwarn:0   dfail:0   fail:0   skip:14 
skl-i5k-2        total:159  pass:144  dwarn:1   dfail:0   fail:0   skip:14 
snb-dellxps      total:159  pass:137  dwarn:0   dfail:0   fail:0   skip:22 
snb-x220t        total:159  pass:137  dwarn:0   dfail:0   fail:1   skip:21 

Results at /archive/results/CI_IGT_test/Patchwork_1344/

02932377a975a59ccd83095816d5b23183107d79 drm-intel-nightly: 2016y-02m-03d-01h-54m-27s UTC integration manifest
e085e58d6b33fe8985a83a1bf2bca5da1530264a drm/i915/BXT: Configure DSI after enabling DSI pll

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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Jani Nikula]

On Wed, 03 Feb 2016, "Thulasimani, Sivakumar" <sivakumar.thulasimani@intel.com> wrote:
> just realized that intel_dsi_init is not called from setup outputs for 
> BXT. is this expected ?
> if so when is it expected to be added ?
>
> Again, the current code in intel_setup_outputs calls intel_dsi_init from
> vlv/chv section so please confirm if this is needed for all platforms
> or just in BXT.

Good (and embarrassing) catch!

This may uncover more problems, since apparently we haven't been truly
controlling DSI ourselves, but it's just what's set up by the GOP. Ugh.

Do you have it in your tree?

Mika, please try adding intel_dsi_init() call to the IS_BROXTON() branch
of intel_setup_outputs(). It shouldn't matter whether it's before or
after the ddi init calls, as the VBT should (fingers crossed) contain
the right port info.


BR,
Jani.




>
> On 2/2/2016 11:21 PM, Ramalingam C wrote:
>> We need to enable DSI PLL before configuring the DSI registers.
>>
>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_dsi.c |    2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
>> index 91cef35..378f879 100644
>> --- a/drivers/gpu/drm/i915/intel_dsi.c
>> +++ b/drivers/gpu/drm/i915/intel_dsi.c
>> @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
>>   
>>   	DRM_DEBUG_KMS("\n");
>>   
>> -	intel_dsi_prepare(encoder);
>>   	intel_enable_dsi_pll(encoder);
>> +	intel_dsi_prepare(encoder);
>>   
>>   	/* Panel Enable over CRC PMIC */
>>   	if (intel_dsi->gpio_panel)
>

-- 
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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Jani Nikula]

On Tue, 02 Feb 2016, Ramalingam C <ramalingam.c@intel.com> wrote:
> We need to enable DSI PLL before configuring the DSI registers.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 91cef35..378f879 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
>  
>  	DRM_DEBUG_KMS("\n");
>  
> -	intel_dsi_prepare(encoder);
>  	intel_enable_dsi_pll(encoder);
> +	intel_dsi_prepare(encoder);

I'd really like to have this tested on BYT/CHV DSI to ensure we're not
breaking anything.

BR,
Jani.



>  
>  	/* Panel Enable over CRC PMIC */
>  	if (intel_dsi->gpio_panel)

-- 
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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Mika Kahola]

On Wed, 2016-02-03 at 11:27 +0200, Jani Nikula wrote:
> On Wed, 03 Feb 2016, "Thulasimani, Sivakumar" <sivakumar.thulasimani@intel.com> wrote:
> > just realized that intel_dsi_init is not called from setup outputs for 
> > BXT. is this expected ?
> > if so when is it expected to be added ?
> >
> > Again, the current code in intel_setup_outputs calls intel_dsi_init from
> > vlv/chv section so please confirm if this is needed for all platforms
> > or just in BXT.
> 
> Good (and embarrassing) catch!
> 
> This may uncover more problems, since apparently we haven't been truly
> controlling DSI ourselves, but it's just what's set up by the GOP. Ugh.
> 
> Do you have it in your tree?
> 
> Mika, please try adding intel_dsi_init() call to the IS_BROXTON() branch
> of intel_setup_outputs(). It shouldn't matter whether it's before or
> after the ddi init calls, as the VBT should (fingers crossed) contain
> the right port info.
> 
I have this in my tree. I assume that you are referring to this patch?

https://patchwork.freedesktop.org/patch/58446/

-Mika-

> 
> BR,
> Jani.
> 
> 
> 
> 
> >
> > On 2/2/2016 11:21 PM, Ramalingam C wrote:
> >> We need to enable DSI PLL before configuring the DSI registers.
> >>
> >> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/intel_dsi.c |    2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> >> index 91cef35..378f879 100644
> >> --- a/drivers/gpu/drm/i915/intel_dsi.c
> >> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> >> @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
> >>   
> >>   	DRM_DEBUG_KMS("\n");
> >>   
> >> -	intel_dsi_prepare(encoder);
> >>   	intel_enable_dsi_pll(encoder);
> >> +	intel_dsi_prepare(encoder);
> >>   
> >>   	/* Panel Enable over CRC PMIC */
> >>   	if (intel_dsi->gpio_panel)
> >
> 


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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Jani Nikula]

On Wed, 03 Feb 2016, Mika Kahola <mika.kahola@intel.com> wrote:
> On Wed, 2016-02-03 at 11:27 +0200, Jani Nikula wrote:
>> On Wed, 03 Feb 2016, "Thulasimani, Sivakumar" <sivakumar.thulasimani@intel.com> wrote:
>> > just realized that intel_dsi_init is not called from setup outputs for 
>> > BXT. is this expected ?
>> > if so when is it expected to be added ?
>> >
>> > Again, the current code in intel_setup_outputs calls intel_dsi_init from
>> > vlv/chv section so please confirm if this is needed for all platforms
>> > or just in BXT.
>> 
>> Good (and embarrassing) catch!
>> 
>> This may uncover more problems, since apparently we haven't been truly
>> controlling DSI ourselves, but it's just what's set up by the GOP. Ugh.
>> 
>> Do you have it in your tree?
>> 
>> Mika, please try adding intel_dsi_init() call to the IS_BROXTON() branch
>> of intel_setup_outputs(). It shouldn't matter whether it's before or
>> after the ddi init calls, as the VBT should (fingers crossed) contain
>> the right port info.
>> 
> I have this in my tree. I assume that you are referring to this patch?
>
> https://patchwork.freedesktop.org/patch/58446/

That's the one. Thanks.

BR,
Jani.

>
> -Mika-
>
>> 
>> BR,
>> Jani.
>> 
>> 
>> 
>> 
>> >
>> > On 2/2/2016 11:21 PM, Ramalingam C wrote:
>> >> We need to enable DSI PLL before configuring the DSI registers.
>> >>
>> >> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>> >> ---
>> >>   drivers/gpu/drm/i915/intel_dsi.c |    2 +-
>> >>   1 file changed, 1 insertion(+), 1 deletion(-)
>> >>
>> >> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
>> >> index 91cef35..378f879 100644
>> >> --- a/drivers/gpu/drm/i915/intel_dsi.c
>> >> +++ b/drivers/gpu/drm/i915/intel_dsi.c
>> >> @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
>> >>   
>> >>   	DRM_DEBUG_KMS("\n");
>> >>   
>> >> -	intel_dsi_prepare(encoder);
>> >>   	intel_enable_dsi_pll(encoder);
>> >> +	intel_dsi_prepare(encoder);
>> >>   
>> >>   	/* Panel Enable over CRC PMIC */
>> >>   	if (intel_dsi->gpio_panel)
>> >
>> 
>
>

-- 
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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Jani Nikula]

On Wed, 03 Feb 2016, Jani Nikula <jani.nikula@intel.com> wrote:
> On Wed, 03 Feb 2016, Mika Kahola <mika.kahola@intel.com> wrote:
>> On Wed, 2016-02-03 at 11:27 +0200, Jani Nikula wrote:
>>> On Wed, 03 Feb 2016, "Thulasimani, Sivakumar" <sivakumar.thulasimani@intel.com> wrote:
>>> > just realized that intel_dsi_init is not called from setup outputs for 
>>> > BXT. is this expected ?
>>> > if so when is it expected to be added ?
>>> >
>>> > Again, the current code in intel_setup_outputs calls intel_dsi_init from
>>> > vlv/chv section so please confirm if this is needed for all platforms
>>> > or just in BXT.
>>> 
>>> Good (and embarrassing) catch!
>>> 
>>> This may uncover more problems, since apparently we haven't been truly
>>> controlling DSI ourselves, but it's just what's set up by the GOP. Ugh.
>>> 
>>> Do you have it in your tree?
>>> 
>>> Mika, please try adding intel_dsi_init() call to the IS_BROXTON() branch
>>> of intel_setup_outputs(). It shouldn't matter whether it's before or
>>> after the ddi init calls, as the VBT should (fingers crossed) contain
>>> the right port info.
>>> 
>> I have this in my tree. I assume that you are referring to this patch?
>>
>> https://patchwork.freedesktop.org/patch/58446/
>
> That's the one. Thanks.

BTW, please repost the patches so we get a CI result.

BR,
Jani.

>
> BR,
> Jani.
>
>>
>> -Mika-
>>
>>> 
>>> BR,
>>> Jani.
>>> 
>>> 
>>> 
>>> 
>>> >
>>> > On 2/2/2016 11:21 PM, Ramalingam C wrote:
>>> >> We need to enable DSI PLL before configuring the DSI registers.
>>> >>
>>> >> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>>> >> ---
>>> >>   drivers/gpu/drm/i915/intel_dsi.c |    2 +-
>>> >>   1 file changed, 1 insertion(+), 1 deletion(-)
>>> >>
>>> >> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
>>> >> index 91cef35..378f879 100644
>>> >> --- a/drivers/gpu/drm/i915/intel_dsi.c
>>> >> +++ b/drivers/gpu/drm/i915/intel_dsi.c
>>> >> @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
>>> >>   
>>> >>   	DRM_DEBUG_KMS("\n");
>>> >>   
>>> >> -	intel_dsi_prepare(encoder);
>>> >>   	intel_enable_dsi_pll(encoder);
>>> >> +	intel_dsi_prepare(encoder);
>>> >>   
>>> >>   	/* Panel Enable over CRC PMIC */
>>> >>   	if (intel_dsi->gpio_panel)
>>> >
>>> 
>>
>>

-- 
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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Ramalingam C]

On Wednesday 03 February 2016 05:25 PM, Jani Nikula wrote:
> On Wed, 03 Feb 2016, Jani Nikula <jani.nikula@intel.com> wrote:
>> On Wed, 03 Feb 2016, Mika Kahola <mika.kahola@intel.com> wrote:
>>> On Wed, 2016-02-03 at 11:27 +0200, Jani Nikula wrote:
>>>> On Wed, 03 Feb 2016, "Thulasimani, Sivakumar" <sivakumar.thulasimani@intel.com> wrote:
>>>>> just realized that intel_dsi_init is not called from setup outputs for
>>>>> BXT. is this expected ?
>>>>> if so when is it expected to be added ?
>>>>>
>>>>> Again, the current code in intel_setup_outputs calls intel_dsi_init from
>>>>> vlv/chv section so please confirm if this is needed for all platforms
>>>>> or just in BXT.
>>>> Good (and embarrassing) catch!
>>>>
>>>> This may uncover more problems, since apparently we haven't been truly
>>>> controlling DSI ourselves, but it's just what's set up by the GOP. Ugh.
>>>>
>>>> Do you have it in your tree?
>>>>
>>>> Mika, please try adding intel_dsi_init() call to the IS_BROXTON() branch
>>>> of intel_setup_outputs(). It shouldn't matter whether it's before or
>>>> after the ddi init calls, as the VBT should (fingers crossed) contain
>>>> the right port info.
>>>>
>>> I have this in my tree. I assume that you are referring to this patch?
>>>
>>> https://patchwork.freedesktop.org/patch/58446/
>> That's the one. Thanks.
> BTW, please repost the patches so we get a CI result.
should I repost in the same thread? or as a new patch?
>
> BR,
> Jani.
>
>> BR,
>> Jani.
>>
>>> -Mika-
>>>
>>>> BR,
>>>> Jani.
>>>>
>>>>
>>>>
>>>>
>>>>> On 2/2/2016 11:21 PM, Ramalingam C wrote:
>>>>>> We need to enable DSI PLL before configuring the DSI registers.
>>>>>>
>>>>>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>>>>>> ---
>>>>>>    drivers/gpu/drm/i915/intel_dsi.c |    2 +-
>>>>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
>>>>>> index 91cef35..378f879 100644
>>>>>> --- a/drivers/gpu/drm/i915/intel_dsi.c
>>>>>> +++ b/drivers/gpu/drm/i915/intel_dsi.c
>>>>>> @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
>>>>>>    
>>>>>>    	DRM_DEBUG_KMS("\n");
>>>>>>    
>>>>>> -	intel_dsi_prepare(encoder);
>>>>>>    	intel_enable_dsi_pll(encoder);
>>>>>> +	intel_dsi_prepare(encoder);
>>>>>>    
>>>>>>    	/* Panel Enable over CRC PMIC */
>>>>>>    	if (intel_dsi->gpio_panel)
>>>

-- 
Thanks,
--Ram

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[PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Ramalingam C]

We need to enable DSI PLL before configuring the DSI registers.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 91cef35..378f879 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
 
 	DRM_DEBUG_KMS("\n");
 
-	intel_dsi_prepare(encoder);
 	intel_enable_dsi_pll(encoder);
+	intel_dsi_prepare(encoder);
 
 	/* Panel Enable over CRC PMIC */
 	if (intel_dsi->gpio_panel)
-- 
1.7.9.5

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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Mika Kahola]

On Wed, 2016-02-03 at 11:28 +0200, Jani Nikula wrote:
> On Tue, 02 Feb 2016, Ramalingam C <ramalingam.c@intel.com> wrote:
> > We need to enable DSI PLL before configuring the DSI registers.
> >
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dsi.c |    2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> > index 91cef35..378f879 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi.c
> > +++ b/drivers/gpu/drm/i915/intel_dsi.c
> > @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
> >  
> >  	DRM_DEBUG_KMS("\n");
> >  
> > -	intel_dsi_prepare(encoder);
> >  	intel_enable_dsi_pll(encoder);
> > +	intel_dsi_prepare(encoder);
> 
> I'd really like to have this tested on BYT/CHV DSI to ensure we're not
> breaking anything.
> 
> BR,
> Jani.
> 
We have CI results for this. Should we be worried about CPU fifo
underrun?

http://benchsrv.fi.intel.com/archive/results/CI_IGT_test/Patchwork_1344/


> 
> 
> >  
> >  	/* Panel Enable over CRC PMIC */
> >  	if (intel_dsi->gpio_panel)
> 


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✗ Fi.CI.BAT: failure for drm/i915/BXT: Configure DSI after enabling DSI pll (rev2)

[Patchwork]

== Summary ==

Series 3016v2 drm/i915/BXT: Configure DSI after enabling DSI pll
http://patchwork.freedesktop.org/api/1.0/series/3016/revisions/2/mbox/

Test kms_pipe_crc_basic:
        Subgroup nonblocking-crc-pipe-b:
                pass       -> INCOMPLETE (hsw-gt2)
        Subgroup read-crc-pipe-a:
                pass       -> DMESG-WARN (ilk-hp8440p)

bdw-nuci7        total:156  pass:147  dwarn:0   dfail:0   fail:0   skip:9  
bdw-ultra        total:159  pass:147  dwarn:0   dfail:0   fail:0   skip:12 
bsw-nuc-2        total:159  pass:131  dwarn:0   dfail:0   fail:0   skip:28 
byt-nuc          total:159  pass:136  dwarn:0   dfail:0   fail:0   skip:23 
hsw-brixbox      total:159  pass:146  dwarn:0   dfail:0   fail:0   skip:13 
hsw-gt2          total:47   pass:41   dwarn:0   dfail:0   fail:0   skip:5  
ilk-hp8440p      total:159  pass:110  dwarn:1   dfail:0   fail:0   skip:48 
ivb-t430s        total:159  pass:145  dwarn:0   dfail:0   fail:0   skip:14 
skl-i5k-2        total:159  pass:144  dwarn:1   dfail:0   fail:0   skip:14 
snb-dellxps      total:159  pass:137  dwarn:0   dfail:0   fail:0   skip:22 
snb-x220t        total:159  pass:137  dwarn:0   dfail:0   fail:1   skip:21 

Results at /archive/results/CI_IGT_test/Patchwork_1354/

02932377a975a59ccd83095816d5b23183107d79 drm-intel-nightly: 2016y-02m-03d-01h-54m-27s UTC integration manifest
f9bffeec0b1d9dfa93dbb89fadf0033de006f441 drm/i915/BXT: Configure DSI after enabling DSI pll

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Re: ✗ Fi.CI.BAT: failure for drm/i915/BXT: Configure DSI after enabling DSI pll (rev2)

[Jani Nikula]

On Wed, 03 Feb 2016, Patchwork <patchwork@annarchy.freedesktop.org> wrote:
> == Summary ==
>
> Series 3016v2 drm/i915/BXT: Configure DSI after enabling DSI pll
> http://patchwork.freedesktop.org/api/1.0/series/3016/revisions/2/mbox/
>
> Test kms_pipe_crc_basic:
>         Subgroup nonblocking-crc-pipe-b:
>                 pass       -> INCOMPLETE (hsw-gt2)
>         Subgroup read-crc-pipe-a:
>                 pass       -> DMESG-WARN (ilk-hp8440p)

The code being changed is not run on ilk/hsw. Mika has tested this on
BXT, and I tested this on BYT.

Pushed to drm-intel-next-queued, thanks for the patch and review.

BR,
Jani.


>
> bdw-nuci7        total:156  pass:147  dwarn:0   dfail:0   fail:0   skip:9  
> bdw-ultra        total:159  pass:147  dwarn:0   dfail:0   fail:0   skip:12 
> bsw-nuc-2        total:159  pass:131  dwarn:0   dfail:0   fail:0   skip:28 
> byt-nuc          total:159  pass:136  dwarn:0   dfail:0   fail:0   skip:23 
> hsw-brixbox      total:159  pass:146  dwarn:0   dfail:0   fail:0   skip:13 
> hsw-gt2          total:47   pass:41   dwarn:0   dfail:0   fail:0   skip:5  
> ilk-hp8440p      total:159  pass:110  dwarn:1   dfail:0   fail:0   skip:48 
> ivb-t430s        total:159  pass:145  dwarn:0   dfail:0   fail:0   skip:14 
> skl-i5k-2        total:159  pass:144  dwarn:1   dfail:0   fail:0   skip:14 
> snb-dellxps      total:159  pass:137  dwarn:0   dfail:0   fail:0   skip:22 
> snb-x220t        total:159  pass:137  dwarn:0   dfail:0   fail:1   skip:21 
>
> Results at /archive/results/CI_IGT_test/Patchwork_1354/
>
> 02932377a975a59ccd83095816d5b23183107d79 drm-intel-nightly: 2016y-02m-03d-01h-54m-27s UTC integration manifest
> f9bffeec0b1d9dfa93dbb89fadf0033de006f441 drm/i915/BXT: Configure DSI after enabling DSI pll
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH] drm/i915/BXT: Configure DSI after enabling DSI pll

[Daniel Vetter]

On Wed, Feb 03, 2016 at 02:59:11PM +0200, Mika Kahola wrote:
> On Wed, 2016-02-03 at 11:28 +0200, Jani Nikula wrote:
> > On Tue, 02 Feb 2016, Ramalingam C <ramalingam.c@intel.com> wrote:
> > > We need to enable DSI PLL before configuring the DSI registers.
> > >
> > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_dsi.c |    2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> > > index 91cef35..378f879 100644
> > > --- a/drivers/gpu/drm/i915/intel_dsi.c
> > > +++ b/drivers/gpu/drm/i915/intel_dsi.c
> > > @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
> > >  
> > >  	DRM_DEBUG_KMS("\n");
> > >  
> > > -	intel_dsi_prepare(encoder);
> > >  	intel_enable_dsi_pll(encoder);
> > > +	intel_dsi_prepare(encoder);
> > 
> > I'd really like to have this tested on BYT/CHV DSI to ensure we're not
> > breaking anything.
> > 
> > BR,
> > Jani.
> > 
> We have CI results for this. Should we be worried about CPU fifo
> underrun?
> 
> http://benchsrv.fi.intel.com/archive/results/CI_IGT_test/Patchwork_1344/

Known issue on ilk: https://bugs.freedesktop.org/show_bug.cgi?id=93787

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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