[PATCH 0/7] Minor Arizona MFD Cleanups

[PATCH 0/7] Minor Arizona MFD Cleanups

[Charles Keepax]

Hi,

This series fixes up a bunch of register defaults in the Arizona
devices and sorts a few Kconfig options.

Thanks,
Charles

Charles Keepax (7):
  mfd: wm5110: Fix defaults array based on testing
  mfd: wm5102: Fix defaults array based on testing
  mfd: wm8998: Fix defaults array based on testing
  mfd: cs47l24: Fix defaults array based on testing
  mfd: arizona: Remove duplicate select of MFD_CORE
  mfd: arizona: Update small typo in Arizona SPI Kconfig
  mfd: arizona: Allow building Arizona MFD as a module

 drivers/mfd/Kconfig          |  6 ++--
 drivers/mfd/Makefile         | 18 +++++-----
 drivers/mfd/arizona-core.c   |  4 +++
 drivers/mfd/cs47l24-tables.c | 10 +-----
 drivers/mfd/wm5102-tables.c  | 16 +++------
 drivers/mfd/wm5110-tables.c  | 82 ++++++++++++++++++++------------------------
 drivers/mfd/wm8998-tables.c  | 12 ++-----
 7 files changed, 59 insertions(+), 89 deletions(-)

-- 
2.1.4

[PATCH RESEND 1/7] mfd: wm5110: Fix defaults array based on testing

[Charles Keepax]

My automated test is back and now can check defaults against the actual
hardware. This patch updates the defaults array for the differences
detected and removes a couple of completely unused registers.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
---
 drivers/mfd/wm5110-tables.c | 82 ++++++++++++++++++++-------------------------
 1 file changed, 37 insertions(+), 45 deletions(-)

diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c
index c18e11f..8e74e71 100644
--- a/drivers/mfd/wm5110-tables.c
+++ b/drivers/mfd/wm5110-tables.c
@@ -676,8 +676,8 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x00000008, 0x0019 },    /* R8     - Ctrl IF SPI CFG 1 */
 	{ 0x00000009, 0x0001 },    /* R9     - Ctrl IF I2C1 CFG 1 */
 	{ 0x0000000A, 0x0001 },    /* R10    - Ctrl IF I2C2 CFG 1 */
-	{ 0x0000000B, 0x0036 },    /* R11    - Ctrl IF I2C1 CFG 2 */
-	{ 0x0000000C, 0x0036 },    /* R12    - Ctrl IF I2C2 CFG 2 */
+	{ 0x0000000B, 0x001A },    /* R11    - Ctrl IF I2C1 CFG 2 */
+	{ 0x0000000C, 0x001A },    /* R12    - Ctrl IF I2C2 CFG 2 */
 	{ 0x00000020, 0x0000 },    /* R32    - Tone Generator 1 */
 	{ 0x00000021, 0x1000 },    /* R33    - Tone Generator 2 */
 	{ 0x00000022, 0x0000 },    /* R34    - Tone Generator 3 */
@@ -723,14 +723,12 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x00000154, 0x0000 },    /* R340   - Rate Estimator 3 */
 	{ 0x00000155, 0x0000 },    /* R341   - Rate Estimator 4 */
 	{ 0x00000156, 0x0000 },    /* R342   - Rate Estimator 5 */
-	{ 0x00000171, 0x0000 },    /* R369   - FLL1 Control 1 */
+	{ 0x00000171, 0x0002 },    /* R369   - FLL1 Control 1 */
 	{ 0x00000172, 0x0008 },    /* R370   - FLL1 Control 2 */
 	{ 0x00000173, 0x0018 },    /* R371   - FLL1 Control 3 */
 	{ 0x00000174, 0x007D },    /* R372   - FLL1 Control 4 */
 	{ 0x00000175, 0x0006 },    /* R373   - FLL1 Control 5 */
 	{ 0x00000176, 0x0000 },    /* R374   - FLL1 Control 6 */
-	{ 0x00000177, 0x0281 },    /* R375   - FLL1 Loop Filter Test 1 */
-	{ 0x00000178, 0x0000 },    /* R376   - FLL1 NCO Test 0 */
 	{ 0x00000179, 0x0000 },    /* R376   - FLL1 Control 7 */
 	{ 0x00000181, 0x0000 },    /* R385   - FLL1 Synchroniser 1 */
 	{ 0x00000182, 0x0000 },    /* R386   - FLL1 Synchroniser 2 */
@@ -740,15 +738,13 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x00000186, 0x0000 },    /* R390   - FLL1 Synchroniser 6 */
 	{ 0x00000187, 0x0001 },    /* R390   - FLL1 Synchroniser 7 */
 	{ 0x00000189, 0x0000 },    /* R393   - FLL1 Spread Spectrum */
-	{ 0x0000018A, 0x0004 },    /* R394   - FLL1 GPIO Clock */
-	{ 0x00000191, 0x0000 },    /* R401   - FLL2 Control 1 */
+	{ 0x0000018A, 0x000C },    /* R394   - FLL1 GPIO Clock */
+	{ 0x00000191, 0x0002 },    /* R401   - FLL2 Control 1 */
 	{ 0x00000192, 0x0008 },    /* R402   - FLL2 Control 2 */
 	{ 0x00000193, 0x0018 },    /* R403   - FLL2 Control 3 */
 	{ 0x00000194, 0x007D },    /* R404   - FLL2 Control 4 */
 	{ 0x00000195, 0x000C },    /* R405   - FLL2 Control 5 */
 	{ 0x00000196, 0x0000 },    /* R406   - FLL2 Control 6 */
-	{ 0x00000197, 0x0000 },    /* R407   - FLL2 Loop Filter Test 1 */
-	{ 0x00000198, 0x0000 },    /* R408   - FLL2 NCO Test 0 */
 	{ 0x00000199, 0x0000 },    /* R408   - FLL2 Control 7 */
 	{ 0x000001A1, 0x0000 },    /* R417   - FLL2 Synchroniser 1 */
 	{ 0x000001A2, 0x0000 },    /* R418   - FLL2 Synchroniser 2 */
@@ -758,7 +754,7 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x000001A6, 0x0000 },    /* R422   - FLL2 Synchroniser 6 */
 	{ 0x000001A7, 0x0001 },    /* R422   - FLL2 Synchroniser 7 */
 	{ 0x000001A9, 0x0000 },    /* R425   - FLL2 Spread Spectrum */
-	{ 0x000001AA, 0x0004 },    /* R426   - FLL2 GPIO Clock */
+	{ 0x000001AA, 0x000C },    /* R426   - FLL2 GPIO Clock */
 	{ 0x00000200, 0x0006 },    /* R512   - Mic Charge Pump 1 */
 	{ 0x00000210, 0x0184 },    /* R528   - LDO1 Control 1 */
 	{ 0x00000213, 0x03E4 },    /* R531   - LDO2 Control 1 */
@@ -771,9 +767,9 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x000002A3, 0x1102 },    /* R675   - Mic Detect 1 */
 	{ 0x000002A4, 0x009F },    /* R676   - Mic Detect 2 */
 	{ 0x000002A6, 0x3737 },    /* R678   - Mic Detect Level 1 */
-	{ 0x000002A7, 0x372C },    /* R679   - Mic Detect Level 2 */
+	{ 0x000002A7, 0x2C37 },    /* R679   - Mic Detect Level 2 */
 	{ 0x000002A8, 0x1422 },    /* R680   - Mic Detect Level 3 */
-	{ 0x000002A9, 0x300A },    /* R681   - Mic Detect Level 4 */
+	{ 0x000002A9, 0x030A },    /* R681   - Mic Detect Level 4 */
 	{ 0x000002C3, 0x0000 },    /* R707   - Mic noise mix control 1 */
 	{ 0x000002CB, 0x0000 },    /* R715   - Isolation control */
 	{ 0x000002D3, 0x0000 },    /* R723   - Jack detect analogue */
@@ -810,53 +806,53 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x00000409, 0x0022 },    /* R1033  - Output Volume Ramp */
 	{ 0x00000410, 0x0080 },    /* R1040  - Output Path Config 1L */
 	{ 0x00000411, 0x0180 },    /* R1041  - DAC Digital Volume 1L */
-	{ 0x00000412, 0x0080 },    /* R1042  - DAC Volume Limit 1L */
+	{ 0x00000412, 0x0081 },    /* R1042  - DAC Volume Limit 1L */
 	{ 0x00000413, 0x0001 },    /* R1043  - Noise Gate Select 1L */
 	{ 0x00000414, 0x0080 },    /* R1044  - Output Path Config 1R */
 	{ 0x00000415, 0x0180 },    /* R1045  - DAC Digital Volume 1R */
-	{ 0x00000416, 0x0080 },    /* R1046  - DAC Volume Limit 1R */
+	{ 0x00000416, 0x0081 },    /* R1046  - DAC Volume Limit 1R */
 	{ 0x00000417, 0x0002 },    /* R1047  - Noise Gate Select 1R */
 	{ 0x00000418, 0x0080 },    /* R1048  - Output Path Config 2L */
 	{ 0x00000419, 0x0180 },    /* R1049  - DAC Digital Volume 2L */
-	{ 0x0000041A, 0x0080 },    /* R1050  - DAC Volume Limit 2L */
+	{ 0x0000041A, 0x0081 },    /* R1050  - DAC Volume Limit 2L */
 	{ 0x0000041B, 0x0004 },    /* R1051  - Noise Gate Select 2L */
 	{ 0x0000041C, 0x0080 },    /* R1052  - Output Path Config 2R */
 	{ 0x0000041D, 0x0180 },    /* R1053  - DAC Digital Volume 2R */
-	{ 0x0000041E, 0x0080 },    /* R1054  - DAC Volume Limit 2R */
+	{ 0x0000041E, 0x0081 },    /* R1054  - DAC Volume Limit 2R */
 	{ 0x0000041F, 0x0008 },    /* R1055  - Noise Gate Select 2R */
 	{ 0x00000420, 0x0080 },    /* R1056  - Output Path Config 3L */
 	{ 0x00000421, 0x0180 },    /* R1057  - DAC Digital Volume 3L */
-	{ 0x00000422, 0x0080 },    /* R1058  - DAC Volume Limit 3L */
+	{ 0x00000422, 0x0081 },    /* R1058  - DAC Volume Limit 3L */
 	{ 0x00000423, 0x0010 },    /* R1059  - Noise Gate Select 3L */
 	{ 0x00000424, 0x0080 },    /* R1060  - Output Path Config 3R */
 	{ 0x00000425, 0x0180 },    /* R1061  - DAC Digital Volume 3R */
-	{ 0x00000426, 0x0080 },    /* R1062  - DAC Volume Limit 3R */
+	{ 0x00000426, 0x0081 },    /* R1062  - DAC Volume Limit 3R */
 	{ 0x00000427, 0x0020 },    /* R1063  - Noise Gate Select 3R */
 	{ 0x00000428, 0x0000 },    /* R1064  - Output Path Config 4L */
 	{ 0x00000429, 0x0180 },    /* R1065  - DAC Digital Volume 4L */
-	{ 0x0000042A, 0x0080 },    /* R1066  - Out Volume 4L */
+	{ 0x0000042A, 0x0081 },    /* R1066  - Out Volume 4L */
 	{ 0x0000042B, 0x0040 },    /* R1067  - Noise Gate Select 4L */
 	{ 0x0000042C, 0x0000 },    /* R1068  - Output Path Config 4R */
 	{ 0x0000042D, 0x0180 },    /* R1069  - DAC Digital Volume 4R */
-	{ 0x0000042E, 0x0080 },    /* R1070  - Out Volume 4R */
+	{ 0x0000042E, 0x0081 },    /* R1070  - Out Volume 4R */
 	{ 0x0000042F, 0x0080 },    /* R1071  - Noise Gate Select 4R */
 	{ 0x00000430, 0x0000 },    /* R1072  - Output Path Config 5L */
 	{ 0x00000431, 0x0180 },    /* R1073  - DAC Digital Volume 5L */
-	{ 0x00000432, 0x0080 },    /* R1074  - DAC Volume Limit 5L */
+	{ 0x00000432, 0x0081 },    /* R1074  - DAC Volume Limit 5L */
 	{ 0x00000433, 0x0100 },    /* R1075  - Noise Gate Select 5L */
 	{ 0x00000434, 0x0000 },    /* R1076  - Output Path Config 5R */
 	{ 0x00000435, 0x0180 },    /* R1077  - DAC Digital Volume 5R */
-	{ 0x00000436, 0x0080 },    /* R1078  - DAC Volume Limit 5R */
+	{ 0x00000436, 0x0081 },    /* R1078  - DAC Volume Limit 5R */
 	{ 0x00000437, 0x0200 },    /* R1079  - Noise Gate Select 5R */
 	{ 0x00000438, 0x0000 },    /* R1080  - Output Path Config 6L */
 	{ 0x00000439, 0x0180 },    /* R1081  - DAC Digital Volume 6L */
-	{ 0x0000043A, 0x0080 },    /* R1082  - DAC Volume Limit 6L */
+	{ 0x0000043A, 0x0081 },    /* R1082  - DAC Volume Limit 6L */
 	{ 0x0000043B, 0x0400 },    /* R1083  - Noise Gate Select 6L */
 	{ 0x0000043C, 0x0000 },    /* R1084  - Output Path Config 6R */
 	{ 0x0000043D, 0x0180 },    /* R1085  - DAC Digital Volume 6R */
-	{ 0x0000043E, 0x0080 },    /* R1086  - DAC Volume Limit 6R */
+	{ 0x0000043E, 0x0081 },    /* R1086  - DAC Volume Limit 6R */
 	{ 0x0000043F, 0x0800 },    /* R1087  - Noise Gate Select 6R */
-	{ 0x00000440, 0x8FFF },    /* R1088  - DRE Enable */
+	{ 0x00000440, 0x003F },    /* R1088  - DRE Enable */
 	{ 0x00000450, 0x0000 },    /* R1104  - DAC AEC Control 1 */
 	{ 0x00000458, 0x0000 },    /* R1112  - Noise Gate Control */
 	{ 0x00000490, 0x0069 },    /* R1168  - PDM SPK1 CTRL 1 */
@@ -864,8 +860,8 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x00000492, 0x0069 },    /* R1170  - PDM SPK2 CTRL 1 */
 	{ 0x00000493, 0x0000 },    /* R1171  - PDM SPK2 CTRL 2 */
 	{ 0x000004A0, 0x3480 },    /* R1184  - HP1 Short Circuit Ctrl */
-	{ 0x000004A1, 0x3480 },    /* R1185  - HP2 Short Circuit Ctrl */
-	{ 0x000004A2, 0x3480 },    /* R1186  - HP3 Short Circuit Ctrl */
+	{ 0x000004A1, 0x3400 },    /* R1185  - HP2 Short Circuit Ctrl */
+	{ 0x000004A2, 0x3400 },    /* R1186  - HP3 Short Circuit Ctrl */
 	{ 0x00000500, 0x000C },    /* R1280  - AIF1 BCLK Ctrl */
 	{ 0x00000501, 0x0008 },    /* R1281  - AIF1 Tx Pin Ctrl */
 	{ 0x00000502, 0x0000 },    /* R1282  - AIF1 Rx Pin Ctrl */
@@ -1483,23 +1479,23 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x00000C10, 0x1000 },    /* R3088  - GPIO Debounce Config */
 	{ 0x00000C18, 0x0000 },    /* R3096  - GP Switch 1 */
 	{ 0x00000C20, 0x8002 },    /* R3104  - Misc Pad Ctrl 1 */
-	{ 0x00000C21, 0x8001 },    /* R3105  - Misc Pad Ctrl 2 */
+	{ 0x00000C21, 0x0001 },    /* R3105  - Misc Pad Ctrl 2 */
 	{ 0x00000C22, 0x0000 },    /* R3106  - Misc Pad Ctrl 3 */
 	{ 0x00000C23, 0x0000 },    /* R3107  - Misc Pad Ctrl 4 */
 	{ 0x00000C24, 0x0000 },    /* R3108  - Misc Pad Ctrl 5 */
 	{ 0x00000C25, 0x0000 },    /* R3109  - Misc Pad Ctrl 6 */
-	{ 0x00000C30, 0x8282 },    /* R3120  - Misc Pad Ctrl 7 */
-	{ 0x00000C31, 0x0082 },    /* R3121  - Misc Pad Ctrl 8 */
-	{ 0x00000C32, 0x8282 },    /* R3122  - Misc Pad Ctrl 9 */
-	{ 0x00000C33, 0x8282 },    /* R3123  - Misc Pad Ctrl 10 */
-	{ 0x00000C34, 0x8282 },    /* R3124  - Misc Pad Ctrl 11 */
-	{ 0x00000C35, 0x8282 },    /* R3125  - Misc Pad Ctrl 12 */
-	{ 0x00000C36, 0x8282 },    /* R3126  - Misc Pad Ctrl 13 */
-	{ 0x00000C37, 0x8282 },    /* R3127  - Misc Pad Ctrl 14 */
-	{ 0x00000C38, 0x8282 },    /* R3128  - Misc Pad Ctrl 15 */
-	{ 0x00000C39, 0x8282 },    /* R3129  - Misc Pad Ctrl 16 */
-	{ 0x00000C3A, 0x8282 },    /* R3130  - Misc Pad Ctrl 17 */
-	{ 0x00000C3B, 0x8282 },    /* R3131  - Misc Pad Ctrl 18 */
+	{ 0x00000C30, 0x0404 },    /* R3120  - Misc Pad Ctrl 7 */
+	{ 0x00000C31, 0x0004 },    /* R3121  - Misc Pad Ctrl 8 */
+	{ 0x00000C32, 0x0404 },    /* R3122  - Misc Pad Ctrl 9 */
+	{ 0x00000C33, 0x0404 },    /* R3123  - Misc Pad Ctrl 10 */
+	{ 0x00000C34, 0x0404 },    /* R3124  - Misc Pad Ctrl 11 */
+	{ 0x00000C35, 0x0404 },    /* R3125  - Misc Pad Ctrl 12 */
+	{ 0x00000C36, 0x0404 },    /* R3126  - Misc Pad Ctrl 13 */
+	{ 0x00000C37, 0x0404 },    /* R3127  - Misc Pad Ctrl 14 */
+	{ 0x00000C38, 0x0004 },    /* R3128  - Misc Pad Ctrl 15 */
+	{ 0x00000C39, 0x0404 },    /* R3129  - Misc Pad Ctrl 16 */
+	{ 0x00000C3A, 0x0404 },    /* R3130  - Misc Pad Ctrl 17 */
+	{ 0x00000C3B, 0x0404 },    /* R3131  - Misc Pad Ctrl 18 */
 	{ 0x00000D08, 0xFFFF },    /* R3336  - Interrupt Status 1 Mask */
 	{ 0x00000D09, 0xFFFF },    /* R3337  - Interrupt Status 2 Mask */
 	{ 0x00000D0A, 0xFFFF },    /* R3338  - Interrupt Status 3 Mask */
@@ -1641,7 +1637,7 @@ static const struct reg_default wm5110_reg_default[] = {
 	{ 0x00000F0D, 0x0000 },    /* R3853  - ANC Coefficient */
 	{ 0x00000F0E, 0x0000 },    /* R3854  - ANC Coefficient */
 	{ 0x00000F0F, 0x0000 },    /* R3855  - ANC Coefficient */
-	{ 0x00000F10, 0x0000 },    /* R3856  - ANC Coefficient */
+	{ 0x00000F10, 0x0001 },    /* R3856  - ANC Coefficient */
 	{ 0x00000F11, 0x0000 },    /* R3857  - ANC Coefficient */
 	{ 0x00000F12, 0x0000 },    /* R3858  - ANC Coefficient */
 	{ 0x00000F15, 0x0000 },    /* R3861  - FCL Filter Control */
@@ -1947,8 +1943,6 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_FLL1_CONTROL_5:
 	case ARIZONA_FLL1_CONTROL_6:
 	case ARIZONA_FLL1_CONTROL_7:
-	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
-	case ARIZONA_FLL1_NCO_TEST_0:
 	case ARIZONA_FLL1_SYNCHRONISER_1:
 	case ARIZONA_FLL1_SYNCHRONISER_2:
 	case ARIZONA_FLL1_SYNCHRONISER_3:
@@ -1965,8 +1959,6 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_FLL2_CONTROL_5:
 	case ARIZONA_FLL2_CONTROL_6:
 	case ARIZONA_FLL2_CONTROL_7:
-	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
-	case ARIZONA_FLL2_NCO_TEST_0:
 	case ARIZONA_FLL2_SYNCHRONISER_1:
 	case ARIZONA_FLL2_SYNCHRONISER_2:
 	case ARIZONA_FLL2_SYNCHRONISER_3:
-- 
2.1.4

[PATCH RESEND 2/7] mfd: wm5102: Fix defaults array based on testing

[Charles Keepax]

My automated test is back and now can check defaults against the actual
hardware. This patch updates the defaults array for the differences
detected and removes a couple of completely unused registers.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
---
 drivers/mfd/wm5102-tables.c | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c
index 0386eaf..ab8b23b 100644
--- a/drivers/mfd/wm5102-tables.c
+++ b/drivers/mfd/wm5102-tables.c
@@ -297,7 +297,6 @@ static const struct reg_default wm5102_reg_default[] = {
 	{ 0x00000174, 0x007D },   /* R372   - FLL1 Control 4 */ 
 	{ 0x00000175, 0x0004 },   /* R373   - FLL1 Control 5 */ 
 	{ 0x00000176, 0x0000 },   /* R374   - FLL1 Control 6 */ 
-	{ 0x00000177, 0x0181 },   /* R375   - FLL1 Loop Filter Test 1 */ 
 	{ 0x00000179, 0x0000 },   /* R377   - FLL1 Control 7 */
 	{ 0x00000181, 0x0000 },   /* R385   - FLL1 Synchroniser 1 */ 
 	{ 0x00000182, 0x0000 },   /* R386   - FLL1 Synchroniser 2 */ 
@@ -314,7 +313,6 @@ static const struct reg_default wm5102_reg_default[] = {
 	{ 0x00000194, 0x007D },   /* R404   - FLL2 Control 4 */ 
 	{ 0x00000195, 0x0004 },   /* R405   - FLL2 Control 5 */ 
 	{ 0x00000196, 0x0000 },   /* R406   - FLL2 Control 6 */ 
-	{ 0x00000197, 0x0000 },   /* R407   - FLL2 Loop Filter Test 1 */ 
 	{ 0x00000199, 0x0000 },   /* R409   - FLL2 Control 7 */
 	{ 0x000001A1, 0x0000 },   /* R417   - FLL2 Synchroniser 1 */ 
 	{ 0x000001A2, 0x0000 },   /* R418   - FLL2 Synchroniser 2 */ 
@@ -338,7 +336,7 @@ static const struct reg_default wm5102_reg_default[] = {
 	{ 0x000002A3, 0x1102 },   /* R675   - Mic Detect 1 */ 
 	{ 0x000002A4, 0x009F },   /* R676   - Mic Detect 2 */ 
 	{ 0x000002A6, 0x3737 },   /* R678   - Mic Detect Level 1 */
-	{ 0x000002A7, 0x372C },   /* R679   - Mic Detect Level 2 */
+	{ 0x000002A7, 0x2C37 },   /* R679   - Mic Detect Level 2 */
 	{ 0x000002A8, 0x1422 },   /* R680   - Mic Detect Level 3 */
 	{ 0x000002A9, 0x030A },   /* R681   - Mic Detect Level 4 */
 	{ 0x000002C3, 0x0000 },   /* R707   - Mic noise mix control 1 */ 
@@ -402,7 +400,7 @@ static const struct reg_default wm5102_reg_default[] = {
 	{ 0x00000435, 0x0180 },   /* R1077  - DAC Digital Volume 5R */ 
 	{ 0x00000436, 0x0081 },   /* R1078  - DAC Volume Limit 5R */
 	{ 0x00000437, 0x0200 },   /* R1079  - Noise Gate Select 5R */
-	{ 0x00000440, 0x8FFF },   /* R1088  - DRE Enable */
+	{ 0x00000440, 0x0FFF },   /* R1088  - DRE Enable */
 	{ 0x00000442, 0x3F0A },   /* R1090  - DRE Control 2 */
 	{ 0x00000443, 0xDC1F },   /* R1090  - DRE Control 3 */
 	{ 0x00000450, 0x0000 },   /* R1104  - DAC AEC Control 1 */ 
@@ -863,7 +861,7 @@ static const struct reg_default wm5102_reg_default[] = {
 	{ 0x00000C0F, 0x0400 },   /* R3087  - IRQ CTRL 1 */ 
 	{ 0x00000C10, 0x1000 },   /* R3088  - GPIO Debounce Config */ 
 	{ 0x00000C20, 0x8002 },   /* R3104  - Misc Pad Ctrl 1 */ 
-	{ 0x00000C21, 0x8001 },   /* R3105  - Misc Pad Ctrl 2 */ 
+	{ 0x00000C21, 0x0001 },   /* R3105  - Misc Pad Ctrl 2 */
 	{ 0x00000C22, 0x0000 },   /* R3106  - Misc Pad Ctrl 3 */ 
 	{ 0x00000C23, 0x0000 },   /* R3107  - Misc Pad Ctrl 4 */ 
 	{ 0x00000C24, 0x0000 },   /* R3108  - Misc Pad Ctrl 5 */ 
@@ -984,7 +982,7 @@ static const struct reg_default wm5102_reg_default[] = {
 	{ 0x00000ECD, 0x0000 },   /* R3789  - HPLPF4_2 */ 
 	{ 0x00000EE0, 0x0000 },   /* R3808  - ASRC_ENABLE */ 
 	{ 0x00000EE2, 0x0000 },   /* R3810  - ASRC_RATE1 */ 
-	{ 0x00000EE3, 0x0400 },   /* R3811  - ASRC_RATE2 */
+	{ 0x00000EE3, 0x4000 },   /* R3811  - ASRC_RATE2 */
 	{ 0x00000EF0, 0x0000 },   /* R3824  - ISRC 1 CTRL 1 */ 
 	{ 0x00000EF1, 0x0000 },   /* R3825  - ISRC 1 CTRL 2 */ 
 	{ 0x00000EF2, 0x0000 },   /* R3826  - ISRC 1 CTRL 3 */ 
@@ -1062,8 +1060,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_FLL1_CONTROL_4:
 	case ARIZONA_FLL1_CONTROL_5:
 	case ARIZONA_FLL1_CONTROL_6:
-	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
-	case ARIZONA_FLL1_NCO_TEST_0:
 	case ARIZONA_FLL1_CONTROL_7:
 	case ARIZONA_FLL1_SYNCHRONISER_1:
 	case ARIZONA_FLL1_SYNCHRONISER_2:
@@ -1080,8 +1076,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_FLL2_CONTROL_4:
 	case ARIZONA_FLL2_CONTROL_5:
 	case ARIZONA_FLL2_CONTROL_6:
-	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
-	case ARIZONA_FLL2_NCO_TEST_0:
 	case ARIZONA_FLL2_CONTROL_7:
 	case ARIZONA_FLL2_SYNCHRONISER_1:
 	case ARIZONA_FLL2_SYNCHRONISER_2:
@@ -1849,8 +1843,6 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg)
 	case ARIZONA_HAPTICS_STATUS:
 	case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS:
 	case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS:
-	case ARIZONA_FLL1_NCO_TEST_0:
-	case ARIZONA_FLL2_NCO_TEST_0:
 	case ARIZONA_DAC_COMP_1:
 	case ARIZONA_DAC_COMP_2:
 	case ARIZONA_DAC_COMP_3:
-- 
2.1.4

[PATCH RESEND 3/7] mfd: wm8998: Fix defaults array based on testing

[Charles Keepax]

My automated test is back and now can check defaults against the actual
hardware. This patch updates the defaults array for the differences
detected and removes a couple of completely unused registers.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
---
 drivers/mfd/wm8998-tables.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c
index 4c2dce77..a0de300 100644
--- a/drivers/mfd/wm8998-tables.c
+++ b/drivers/mfd/wm8998-tables.c
@@ -229,8 +229,6 @@ static const struct reg_default wm8998_reg_default[] = {
 	{ 0x00000174, 0x007D },    /* R372   - FLL1 Control 4 */
 	{ 0x00000175, 0x0004 },    /* R373   - FLL1 Control 5 */
 	{ 0x00000176, 0x0000 },    /* R374   - FLL1 Control 6 */
-	{ 0x00000177, 0x0181 },    /* R375   - FLL1 Loop Filter Test 1 */
-	{ 0x00000178, 0x0000 },    /* R376   - FLL1 NCO Test 0 */
 	{ 0x00000179, 0x0000 },    /* R377   - FLL1 Control 7 */
 	{ 0x00000181, 0x0000 },    /* R385   - FLL1 Synchroniser 1 */
 	{ 0x00000182, 0x0000 },    /* R386   - FLL1 Synchroniser 2 */
@@ -247,8 +245,6 @@ static const struct reg_default wm8998_reg_default[] = {
 	{ 0x00000194, 0x007D },    /* R404   - FLL2 Control 4 */
 	{ 0x00000195, 0x0004 },    /* R405   - FLL2 Control 5 */
 	{ 0x00000196, 0x0000 },    /* R406   - FLL2 Control 6 */
-	{ 0x00000197, 0x0000 },    /* R407   - FLL2 Loop Filter Test 1 */
-	{ 0x00000198, 0x0000 },    /* R408   - FLL2 NCO Test 0 */
 	{ 0x00000199, 0x0000 },    /* R409   - FLL2 Control 7 */
 	{ 0x000001A1, 0x0000 },    /* R417   - FLL2 Synchroniser 1 */
 	{ 0x000001A2, 0x0000 },    /* R418   - FLL2 Synchroniser 2 */
@@ -320,7 +316,7 @@ static const struct reg_default wm8998_reg_default[] = {
 	{ 0x00000434, 0x0000 },    /* R1076  - Output Path Config 5R */
 	{ 0x00000435, 0x0180 },    /* R1077  - DAC Digital Volume 5R */
 	{ 0x00000437, 0x0200 },    /* R1079  - Noise Gate Select 5R */
-	{ 0x00000440, 0x8FFF },    /* R1088  - DRE Enable */
+	{ 0x00000440, 0x002F },    /* R1088  - DRE Enable */
 	{ 0x00000441, 0xC759 },    /* R1089  - DRE Control 1 */
 	{ 0x00000442, 0x2A08 },    /* R1089  - DRE Control 2 */
 	{ 0x00000443, 0x5CFA },    /* R1089  - DRE Control 3 */
@@ -686,7 +682,7 @@ static const struct reg_default wm8998_reg_default[] = {
 	{ 0x00000C10, 0x1000 },    /* R3088  - GPIO Debounce Config */
 	{ 0x00000C18, 0x0000 },    /* R3096  - GP Switch 1 */
 	{ 0x00000C20, 0x8002 },    /* R3104  - Misc Pad Ctrl 1 */
-	{ 0x00000C21, 0x8001 },    /* R3105  - Misc Pad Ctrl 2 */
+	{ 0x00000C21, 0x0001 },    /* R3105  - Misc Pad Ctrl 2 */
 	{ 0x00000C22, 0x0000 },    /* R3106  - Misc Pad Ctrl 3 */
 	{ 0x00000C23, 0x0000 },    /* R3107  - Misc Pad Ctrl 4 */
 	{ 0x00000C24, 0x0000 },    /* R3108  - Misc Pad Ctrl 5 */
@@ -888,8 +884,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_FLL1_CONTROL_5:
 	case ARIZONA_FLL1_CONTROL_6:
 	case ARIZONA_FLL1_CONTROL_7:
-	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
-	case ARIZONA_FLL1_NCO_TEST_0:
 	case ARIZONA_FLL1_SYNCHRONISER_1:
 	case ARIZONA_FLL1_SYNCHRONISER_2:
 	case ARIZONA_FLL1_SYNCHRONISER_3:
@@ -906,8 +900,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_FLL2_CONTROL_5:
 	case ARIZONA_FLL2_CONTROL_6:
 	case ARIZONA_FLL2_CONTROL_7:
-	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
-	case ARIZONA_FLL2_NCO_TEST_0:
 	case ARIZONA_FLL2_SYNCHRONISER_1:
 	case ARIZONA_FLL2_SYNCHRONISER_2:
 	case ARIZONA_FLL2_SYNCHRONISER_3:
-- 
2.1.4

[PATCH RESEND 4/7] mfd: cs47l24: Fix defaults array based on testing

[Charles Keepax]

My automated test is back and now can check defaults against the actual
hardware. This patch updates the defaults array for the differences
detected and removes a couple of completely unused registers.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
---
 drivers/mfd/cs47l24-tables.c | 10 +---------
 1 file changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/cs47l24-tables.c
index 8708006..f6b78aa 100644
--- a/drivers/mfd/cs47l24-tables.c
+++ b/drivers/mfd/cs47l24-tables.c
@@ -227,8 +227,6 @@ static const struct reg_default cs47l24_reg_default[] = {
 	{ 0x00000174, 0x007D },    /* R372   - FLL1 Control 4 */
 	{ 0x00000175, 0x0006 },    /* R373   - FLL1 Control 5 */
 	{ 0x00000176, 0x0000 },    /* R374   - FLL1 Control 6 */
-	{ 0x00000177, 0x0281 },    /* R375   - FLL1 Loop Filter Test 1 */
-	{ 0x00000178, 0x0000 },    /* R376   - FLL1 NCO Test 0 */
 	{ 0x00000179, 0x0000 },    /* R376   - FLL1 Control 7 */
 	{ 0x00000181, 0x0000 },    /* R385   - FLL1 Synchroniser 1 */
 	{ 0x00000182, 0x0000 },    /* R386   - FLL1 Synchroniser 2 */
@@ -245,8 +243,6 @@ static const struct reg_default cs47l24_reg_default[] = {
 	{ 0x00000194, 0x007D },    /* R404   - FLL2 Control 4 */
 	{ 0x00000195, 0x000C },    /* R405   - FLL2 Control 5 */
 	{ 0x00000196, 0x0000 },    /* R406   - FLL2 Control 6 */
-	{ 0x00000197, 0x0000 },    /* R407   - FLL2 Loop Filter Test 1 */
-	{ 0x00000198, 0x0000 },    /* R408   - FLL2 NCO Test 0 */
 	{ 0x00000199, 0x0000 },    /* R408   - FLL2 Control 7 */
 	{ 0x000001A1, 0x0000 },    /* R417   - FLL2 Synchroniser 1 */
 	{ 0x000001A2, 0x0000 },    /* R418   - FLL2 Synchroniser 2 */
@@ -678,7 +674,7 @@ static const struct reg_default cs47l24_reg_default[] = {
 	{ 0x00000C0F, 0x0400 },    /* R3087  - IRQ CTRL 1 */
 	{ 0x00000C10, 0x1000 },    /* R3088  - GPIO Debounce Config */
 	{ 0x00000C20, 0x0002 },    /* R3104  - Misc Pad Ctrl 1 */
-	{ 0x00000C21, 0x8001 },    /* R3105  - Misc Pad Ctrl 2 */
+	{ 0x00000C21, 0x0000 },    /* R3105  - Misc Pad Ctrl 2 */
 	{ 0x00000C22, 0x0000 },    /* R3106  - Misc Pad Ctrl 3 */
 	{ 0x00000C23, 0x0000 },    /* R3107  - Misc Pad Ctrl 4 */
 	{ 0x00000C24, 0x0000 },    /* R3108  - Misc Pad Ctrl 5 */
@@ -858,8 +854,6 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_FLL1_CONTROL_5:
 	case ARIZONA_FLL1_CONTROL_6:
 	case ARIZONA_FLL1_CONTROL_7:
-	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
-	case ARIZONA_FLL1_NCO_TEST_0:
 	case ARIZONA_FLL1_SYNCHRONISER_1:
 	case ARIZONA_FLL1_SYNCHRONISER_2:
 	case ARIZONA_FLL1_SYNCHRONISER_3:
@@ -876,8 +870,6 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_FLL2_CONTROL_5:
 	case ARIZONA_FLL2_CONTROL_6:
 	case ARIZONA_FLL2_CONTROL_7:
-	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
-	case ARIZONA_FLL2_NCO_TEST_0:
 	case ARIZONA_FLL2_SYNCHRONISER_1:
 	case ARIZONA_FLL2_SYNCHRONISER_2:
 	case ARIZONA_FLL2_SYNCHRONISER_3:
-- 
2.1.4

[PATCH RESEND 5/7] mfd: arizona: Remove duplicate select of MFD_CORE

[Charles Keepax]

MFD_ARIZONA_I2C and MFD_ARIZONA_SPI both select MFD_ARIZONA and all
three of those select MFD_CORE, this makes the selects of MFD_CORE in
MFD_ARIZONA_I2C and MFD_ARIZONA_SPI redundant, so we remove them.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
---
 drivers/mfd/Kconfig | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 6c4ebd9..9f012b7 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1372,7 +1372,6 @@ config MFD_ARIZONA
 config MFD_ARIZONA_I2C
 	tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with I2C"
 	select MFD_ARIZONA
-	select MFD_CORE
 	select REGMAP_I2C
 	depends on I2C
 	help
@@ -1382,7 +1381,6 @@ config MFD_ARIZONA_I2C
 config MFD_ARIZONA_SPI
 	tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with SPI"
 	select MFD_ARIZONA
-	select MFD_CORE
 	select REGMAP_SPI
 	depends on SPI_MASTER
 	help
-- 
2.1.4

[PATCH RESEND 6/7] mfd: arizona: Update small typo in Arizona SPI Kconfig

[Charles Keepax]

The help text had a copy and paste error and refers to I2C in the SPI
section. This patch corrects this typo.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
---
 drivers/mfd/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 9f012b7..d438a73 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1385,7 +1385,7 @@ config MFD_ARIZONA_SPI
 	depends on SPI_MASTER
 	help
 	  Support for the Cirrus Logic/Wolfson Microelectronics Arizona platform
-	  audio SoC core functionality controlled via I2C.
+	  audio SoC core functionality controlled via SPI.
 
 config MFD_CS47L24
 	bool "Cirrus Logic CS47L24 and WM1831"
-- 
2.1.4

[PATCH RESEND 7/7] mfd: arizona: Allow building Arizona MFD as a module

[Charles Keepax]

There is nothing that prevents us building the Arizona MFD as a module,
this patch enables this.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
---
 drivers/mfd/Kconfig        |  2 +-
 drivers/mfd/Makefile       | 18 +++++++++---------
 drivers/mfd/arizona-core.c |  4 ++++
 3 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index d438a73..25c8aa2 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1367,7 +1367,7 @@ config MFD_ARIZONA
 	select REGMAP
 	select REGMAP_IRQ
 	select MFD_CORE
-	bool
+	tristate
 
 config MFD_ARIZONA_I2C
 	tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with I2C"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 0f230a6..bd57faa 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -35,25 +35,25 @@ obj-$(CONFIG_MFD_T7L66XB)	+= t7l66xb.o tmio_core.o
 obj-$(CONFIG_MFD_TC6387XB)	+= tc6387xb.o tmio_core.o
 obj-$(CONFIG_MFD_TC6393XB)	+= tc6393xb.o tmio_core.o
 
-obj-$(CONFIG_MFD_ARIZONA)	+= arizona-core.o
-obj-$(CONFIG_MFD_ARIZONA)	+= arizona-irq.o
-obj-$(CONFIG_MFD_ARIZONA_I2C)	+= arizona-i2c.o
-obj-$(CONFIG_MFD_ARIZONA_SPI)	+= arizona-spi.o
+arizona-objs			:= arizona-core.o arizona-irq.o
 ifeq ($(CONFIG_MFD_WM5102),y)
-obj-$(CONFIG_MFD_ARIZONA)	+= wm5102-tables.o
+arizona-objs			+= wm5102-tables.o
 endif
 ifeq ($(CONFIG_MFD_WM5110),y)
-obj-$(CONFIG_MFD_ARIZONA)	+= wm5110-tables.o
+arizona-objs			+= wm5110-tables.o
 endif
 ifeq ($(CONFIG_MFD_WM8997),y)
-obj-$(CONFIG_MFD_ARIZONA)	+= wm8997-tables.o
+arizona-objs			+= wm8997-tables.o
 endif
 ifeq ($(CONFIG_MFD_WM8998),y)
-obj-$(CONFIG_MFD_ARIZONA)	+= wm8998-tables.o
+arizona-objs			+= wm8998-tables.o
 endif
 ifeq ($(CONFIG_MFD_CS47L24),y)
-obj-$(CONFIG_MFD_ARIZONA)	+= cs47l24-tables.o
+arizona-objs			+= cs47l24-tables.o
 endif
+obj-$(CONFIG_MFD_ARIZONA)	+= arizona.o
+obj-$(CONFIG_MFD_ARIZONA_I2C)	+= arizona-i2c.o
+obj-$(CONFIG_MFD_ARIZONA_SPI)	+= arizona-spi.o
 obj-$(CONFIG_MFD_WM8400)	+= wm8400-core.o
 wm831x-objs			:= wm831x-core.o wm831x-irq.o wm831x-otp.o
 wm831x-objs			+= wm831x-auxadc.o
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index 5319f25..53134e7 100644
--- a/drivers/mfd/arizona-core.c
+++ b/drivers/mfd/arizona-core.c
@@ -1519,3 +1519,7 @@ int arizona_dev_exit(struct arizona *arizona)
 	return 0;
 }
 EXPORT_SYMBOL_GPL(arizona_dev_exit);
+
+MODULE_DESCRIPTION("Arizona MFD Core");
+MODULE_LICENSE("GPL");
+MODULE_SOFTDEP("pre: arizona-ldo1");
-- 
2.1.4

Re: [PATCH RESEND 7/7] mfd: arizona: Allow building Arizona MFD as a module

[Charles Keepax]

On Tue, Feb 09, 2016 at 10:52:03AM +0000, Charles Keepax wrote:
> There is nothing that prevents us building the Arizona MFD as a module,
> this patch enables this.
> 
> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> ---

Actually sorry drop this last patch for now, if you build the MFD
as a module then build in the other parts there are some issues.
I will need to resolve that first.

Thanks,
Charles

Re: [PATCH RESEND 6/7] mfd: arizona: Update small typo in Arizona SPI Kconfig

[Lee Jones]

On Tue, 09 Feb 2016, Charles Keepax wrote:

> The help text had a copy and paste error and refers to I2C in the SPI
> section. This patch corrects this typo.
> 
> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> ---
>  drivers/mfd/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks.

> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 9f012b7..d438a73 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -1385,7 +1385,7 @@ config MFD_ARIZONA_SPI
>  	depends on SPI_MASTER
>  	help
>  	  Support for the Cirrus Logic/Wolfson Microelectronics Arizona platform
> -	  audio SoC core functionality controlled via I2C.
> +	  audio SoC core functionality controlled via SPI.
>  
>  config MFD_CS47L24
>  	bool "Cirrus Logic CS47L24 and WM1831"

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH RESEND 1/7] mfd: wm5110: Fix defaults array based on testing

[Lee Jones]

On Tue, 09 Feb 2016, Charles Keepax wrote:

> My automated test is back and now can check defaults against the actual
> hardware. This patch updates the defaults array for the differences
> detected and removes a couple of completely unused registers.
> 
> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> ---
>  drivers/mfd/wm5110-tables.c | 82 ++++++++++++++++++++-------------------------
>  1 file changed, 37 insertions(+), 45 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c
> index c18e11f..8e74e71 100644
> --- a/drivers/mfd/wm5110-tables.c
> +++ b/drivers/mfd/wm5110-tables.c
> @@ -676,8 +676,8 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x00000008, 0x0019 },    /* R8     - Ctrl IF SPI CFG 1 */
>  	{ 0x00000009, 0x0001 },    /* R9     - Ctrl IF I2C1 CFG 1 */
>  	{ 0x0000000A, 0x0001 },    /* R10    - Ctrl IF I2C2 CFG 1 */
> -	{ 0x0000000B, 0x0036 },    /* R11    - Ctrl IF I2C1 CFG 2 */
> -	{ 0x0000000C, 0x0036 },    /* R12    - Ctrl IF I2C2 CFG 2 */
> +	{ 0x0000000B, 0x001A },    /* R11    - Ctrl IF I2C1 CFG 2 */
> +	{ 0x0000000C, 0x001A },    /* R12    - Ctrl IF I2C2 CFG 2 */
>  	{ 0x00000020, 0x0000 },    /* R32    - Tone Generator 1 */
>  	{ 0x00000021, 0x1000 },    /* R33    - Tone Generator 2 */
>  	{ 0x00000022, 0x0000 },    /* R34    - Tone Generator 3 */
> @@ -723,14 +723,12 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x00000154, 0x0000 },    /* R340   - Rate Estimator 3 */
>  	{ 0x00000155, 0x0000 },    /* R341   - Rate Estimator 4 */
>  	{ 0x00000156, 0x0000 },    /* R342   - Rate Estimator 5 */
> -	{ 0x00000171, 0x0000 },    /* R369   - FLL1 Control 1 */
> +	{ 0x00000171, 0x0002 },    /* R369   - FLL1 Control 1 */
>  	{ 0x00000172, 0x0008 },    /* R370   - FLL1 Control 2 */
>  	{ 0x00000173, 0x0018 },    /* R371   - FLL1 Control 3 */
>  	{ 0x00000174, 0x007D },    /* R372   - FLL1 Control 4 */
>  	{ 0x00000175, 0x0006 },    /* R373   - FLL1 Control 5 */
>  	{ 0x00000176, 0x0000 },    /* R374   - FLL1 Control 6 */
> -	{ 0x00000177, 0x0281 },    /* R375   - FLL1 Loop Filter Test 1 */
> -	{ 0x00000178, 0x0000 },    /* R376   - FLL1 NCO Test 0 */
>  	{ 0x00000179, 0x0000 },    /* R376   - FLL1 Control 7 */
>  	{ 0x00000181, 0x0000 },    /* R385   - FLL1 Synchroniser 1 */
>  	{ 0x00000182, 0x0000 },    /* R386   - FLL1 Synchroniser 2 */
> @@ -740,15 +738,13 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x00000186, 0x0000 },    /* R390   - FLL1 Synchroniser 6 */
>  	{ 0x00000187, 0x0001 },    /* R390   - FLL1 Synchroniser 7 */
>  	{ 0x00000189, 0x0000 },    /* R393   - FLL1 Spread Spectrum */
> -	{ 0x0000018A, 0x0004 },    /* R394   - FLL1 GPIO Clock */
> -	{ 0x00000191, 0x0000 },    /* R401   - FLL2 Control 1 */
> +	{ 0x0000018A, 0x000C },    /* R394   - FLL1 GPIO Clock */
> +	{ 0x00000191, 0x0002 },    /* R401   - FLL2 Control 1 */
>  	{ 0x00000192, 0x0008 },    /* R402   - FLL2 Control 2 */
>  	{ 0x00000193, 0x0018 },    /* R403   - FLL2 Control 3 */
>  	{ 0x00000194, 0x007D },    /* R404   - FLL2 Control 4 */
>  	{ 0x00000195, 0x000C },    /* R405   - FLL2 Control 5 */
>  	{ 0x00000196, 0x0000 },    /* R406   - FLL2 Control 6 */
> -	{ 0x00000197, 0x0000 },    /* R407   - FLL2 Loop Filter Test 1 */
> -	{ 0x00000198, 0x0000 },    /* R408   - FLL2 NCO Test 0 */
>  	{ 0x00000199, 0x0000 },    /* R408   - FLL2 Control 7 */
>  	{ 0x000001A1, 0x0000 },    /* R417   - FLL2 Synchroniser 1 */
>  	{ 0x000001A2, 0x0000 },    /* R418   - FLL2 Synchroniser 2 */
> @@ -758,7 +754,7 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x000001A6, 0x0000 },    /* R422   - FLL2 Synchroniser 6 */
>  	{ 0x000001A7, 0x0001 },    /* R422   - FLL2 Synchroniser 7 */
>  	{ 0x000001A9, 0x0000 },    /* R425   - FLL2 Spread Spectrum */
> -	{ 0x000001AA, 0x0004 },    /* R426   - FLL2 GPIO Clock */
> +	{ 0x000001AA, 0x000C },    /* R426   - FLL2 GPIO Clock */
>  	{ 0x00000200, 0x0006 },    /* R512   - Mic Charge Pump 1 */
>  	{ 0x00000210, 0x0184 },    /* R528   - LDO1 Control 1 */
>  	{ 0x00000213, 0x03E4 },    /* R531   - LDO2 Control 1 */
> @@ -771,9 +767,9 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x000002A3, 0x1102 },    /* R675   - Mic Detect 1 */
>  	{ 0x000002A4, 0x009F },    /* R676   - Mic Detect 2 */
>  	{ 0x000002A6, 0x3737 },    /* R678   - Mic Detect Level 1 */
> -	{ 0x000002A7, 0x372C },    /* R679   - Mic Detect Level 2 */
> +	{ 0x000002A7, 0x2C37 },    /* R679   - Mic Detect Level 2 */
>  	{ 0x000002A8, 0x1422 },    /* R680   - Mic Detect Level 3 */
> -	{ 0x000002A9, 0x300A },    /* R681   - Mic Detect Level 4 */
> +	{ 0x000002A9, 0x030A },    /* R681   - Mic Detect Level 4 */
>  	{ 0x000002C3, 0x0000 },    /* R707   - Mic noise mix control 1 */
>  	{ 0x000002CB, 0x0000 },    /* R715   - Isolation control */
>  	{ 0x000002D3, 0x0000 },    /* R723   - Jack detect analogue */
> @@ -810,53 +806,53 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x00000409, 0x0022 },    /* R1033  - Output Volume Ramp */
>  	{ 0x00000410, 0x0080 },    /* R1040  - Output Path Config 1L */
>  	{ 0x00000411, 0x0180 },    /* R1041  - DAC Digital Volume 1L */
> -	{ 0x00000412, 0x0080 },    /* R1042  - DAC Volume Limit 1L */
> +	{ 0x00000412, 0x0081 },    /* R1042  - DAC Volume Limit 1L */
>  	{ 0x00000413, 0x0001 },    /* R1043  - Noise Gate Select 1L */
>  	{ 0x00000414, 0x0080 },    /* R1044  - Output Path Config 1R */
>  	{ 0x00000415, 0x0180 },    /* R1045  - DAC Digital Volume 1R */
> -	{ 0x00000416, 0x0080 },    /* R1046  - DAC Volume Limit 1R */
> +	{ 0x00000416, 0x0081 },    /* R1046  - DAC Volume Limit 1R */
>  	{ 0x00000417, 0x0002 },    /* R1047  - Noise Gate Select 1R */
>  	{ 0x00000418, 0x0080 },    /* R1048  - Output Path Config 2L */
>  	{ 0x00000419, 0x0180 },    /* R1049  - DAC Digital Volume 2L */
> -	{ 0x0000041A, 0x0080 },    /* R1050  - DAC Volume Limit 2L */
> +	{ 0x0000041A, 0x0081 },    /* R1050  - DAC Volume Limit 2L */
>  	{ 0x0000041B, 0x0004 },    /* R1051  - Noise Gate Select 2L */
>  	{ 0x0000041C, 0x0080 },    /* R1052  - Output Path Config 2R */
>  	{ 0x0000041D, 0x0180 },    /* R1053  - DAC Digital Volume 2R */
> -	{ 0x0000041E, 0x0080 },    /* R1054  - DAC Volume Limit 2R */
> +	{ 0x0000041E, 0x0081 },    /* R1054  - DAC Volume Limit 2R */
>  	{ 0x0000041F, 0x0008 },    /* R1055  - Noise Gate Select 2R */
>  	{ 0x00000420, 0x0080 },    /* R1056  - Output Path Config 3L */
>  	{ 0x00000421, 0x0180 },    /* R1057  - DAC Digital Volume 3L */
> -	{ 0x00000422, 0x0080 },    /* R1058  - DAC Volume Limit 3L */
> +	{ 0x00000422, 0x0081 },    /* R1058  - DAC Volume Limit 3L */
>  	{ 0x00000423, 0x0010 },    /* R1059  - Noise Gate Select 3L */
>  	{ 0x00000424, 0x0080 },    /* R1060  - Output Path Config 3R */
>  	{ 0x00000425, 0x0180 },    /* R1061  - DAC Digital Volume 3R */
> -	{ 0x00000426, 0x0080 },    /* R1062  - DAC Volume Limit 3R */
> +	{ 0x00000426, 0x0081 },    /* R1062  - DAC Volume Limit 3R */
>  	{ 0x00000427, 0x0020 },    /* R1063  - Noise Gate Select 3R */
>  	{ 0x00000428, 0x0000 },    /* R1064  - Output Path Config 4L */
>  	{ 0x00000429, 0x0180 },    /* R1065  - DAC Digital Volume 4L */
> -	{ 0x0000042A, 0x0080 },    /* R1066  - Out Volume 4L */
> +	{ 0x0000042A, 0x0081 },    /* R1066  - Out Volume 4L */
>  	{ 0x0000042B, 0x0040 },    /* R1067  - Noise Gate Select 4L */
>  	{ 0x0000042C, 0x0000 },    /* R1068  - Output Path Config 4R */
>  	{ 0x0000042D, 0x0180 },    /* R1069  - DAC Digital Volume 4R */
> -	{ 0x0000042E, 0x0080 },    /* R1070  - Out Volume 4R */
> +	{ 0x0000042E, 0x0081 },    /* R1070  - Out Volume 4R */
>  	{ 0x0000042F, 0x0080 },    /* R1071  - Noise Gate Select 4R */
>  	{ 0x00000430, 0x0000 },    /* R1072  - Output Path Config 5L */
>  	{ 0x00000431, 0x0180 },    /* R1073  - DAC Digital Volume 5L */
> -	{ 0x00000432, 0x0080 },    /* R1074  - DAC Volume Limit 5L */
> +	{ 0x00000432, 0x0081 },    /* R1074  - DAC Volume Limit 5L */
>  	{ 0x00000433, 0x0100 },    /* R1075  - Noise Gate Select 5L */
>  	{ 0x00000434, 0x0000 },    /* R1076  - Output Path Config 5R */
>  	{ 0x00000435, 0x0180 },    /* R1077  - DAC Digital Volume 5R */
> -	{ 0x00000436, 0x0080 },    /* R1078  - DAC Volume Limit 5R */
> +	{ 0x00000436, 0x0081 },    /* R1078  - DAC Volume Limit 5R */
>  	{ 0x00000437, 0x0200 },    /* R1079  - Noise Gate Select 5R */
>  	{ 0x00000438, 0x0000 },    /* R1080  - Output Path Config 6L */
>  	{ 0x00000439, 0x0180 },    /* R1081  - DAC Digital Volume 6L */
> -	{ 0x0000043A, 0x0080 },    /* R1082  - DAC Volume Limit 6L */
> +	{ 0x0000043A, 0x0081 },    /* R1082  - DAC Volume Limit 6L */
>  	{ 0x0000043B, 0x0400 },    /* R1083  - Noise Gate Select 6L */
>  	{ 0x0000043C, 0x0000 },    /* R1084  - Output Path Config 6R */
>  	{ 0x0000043D, 0x0180 },    /* R1085  - DAC Digital Volume 6R */
> -	{ 0x0000043E, 0x0080 },    /* R1086  - DAC Volume Limit 6R */
> +	{ 0x0000043E, 0x0081 },    /* R1086  - DAC Volume Limit 6R */
>  	{ 0x0000043F, 0x0800 },    /* R1087  - Noise Gate Select 6R */
> -	{ 0x00000440, 0x8FFF },    /* R1088  - DRE Enable */
> +	{ 0x00000440, 0x003F },    /* R1088  - DRE Enable */
>  	{ 0x00000450, 0x0000 },    /* R1104  - DAC AEC Control 1 */
>  	{ 0x00000458, 0x0000 },    /* R1112  - Noise Gate Control */
>  	{ 0x00000490, 0x0069 },    /* R1168  - PDM SPK1 CTRL 1 */
> @@ -864,8 +860,8 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x00000492, 0x0069 },    /* R1170  - PDM SPK2 CTRL 1 */
>  	{ 0x00000493, 0x0000 },    /* R1171  - PDM SPK2 CTRL 2 */
>  	{ 0x000004A0, 0x3480 },    /* R1184  - HP1 Short Circuit Ctrl */
> -	{ 0x000004A1, 0x3480 },    /* R1185  - HP2 Short Circuit Ctrl */
> -	{ 0x000004A2, 0x3480 },    /* R1186  - HP3 Short Circuit Ctrl */
> +	{ 0x000004A1, 0x3400 },    /* R1185  - HP2 Short Circuit Ctrl */
> +	{ 0x000004A2, 0x3400 },    /* R1186  - HP3 Short Circuit Ctrl */
>  	{ 0x00000500, 0x000C },    /* R1280  - AIF1 BCLK Ctrl */
>  	{ 0x00000501, 0x0008 },    /* R1281  - AIF1 Tx Pin Ctrl */
>  	{ 0x00000502, 0x0000 },    /* R1282  - AIF1 Rx Pin Ctrl */
> @@ -1483,23 +1479,23 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x00000C10, 0x1000 },    /* R3088  - GPIO Debounce Config */
>  	{ 0x00000C18, 0x0000 },    /* R3096  - GP Switch 1 */
>  	{ 0x00000C20, 0x8002 },    /* R3104  - Misc Pad Ctrl 1 */
> -	{ 0x00000C21, 0x8001 },    /* R3105  - Misc Pad Ctrl 2 */
> +	{ 0x00000C21, 0x0001 },    /* R3105  - Misc Pad Ctrl 2 */
>  	{ 0x00000C22, 0x0000 },    /* R3106  - Misc Pad Ctrl 3 */
>  	{ 0x00000C23, 0x0000 },    /* R3107  - Misc Pad Ctrl 4 */
>  	{ 0x00000C24, 0x0000 },    /* R3108  - Misc Pad Ctrl 5 */
>  	{ 0x00000C25, 0x0000 },    /* R3109  - Misc Pad Ctrl 6 */
> -	{ 0x00000C30, 0x8282 },    /* R3120  - Misc Pad Ctrl 7 */
> -	{ 0x00000C31, 0x0082 },    /* R3121  - Misc Pad Ctrl 8 */
> -	{ 0x00000C32, 0x8282 },    /* R3122  - Misc Pad Ctrl 9 */
> -	{ 0x00000C33, 0x8282 },    /* R3123  - Misc Pad Ctrl 10 */
> -	{ 0x00000C34, 0x8282 },    /* R3124  - Misc Pad Ctrl 11 */
> -	{ 0x00000C35, 0x8282 },    /* R3125  - Misc Pad Ctrl 12 */
> -	{ 0x00000C36, 0x8282 },    /* R3126  - Misc Pad Ctrl 13 */
> -	{ 0x00000C37, 0x8282 },    /* R3127  - Misc Pad Ctrl 14 */
> -	{ 0x00000C38, 0x8282 },    /* R3128  - Misc Pad Ctrl 15 */
> -	{ 0x00000C39, 0x8282 },    /* R3129  - Misc Pad Ctrl 16 */
> -	{ 0x00000C3A, 0x8282 },    /* R3130  - Misc Pad Ctrl 17 */
> -	{ 0x00000C3B, 0x8282 },    /* R3131  - Misc Pad Ctrl 18 */
> +	{ 0x00000C30, 0x0404 },    /* R3120  - Misc Pad Ctrl 7 */
> +	{ 0x00000C31, 0x0004 },    /* R3121  - Misc Pad Ctrl 8 */
> +	{ 0x00000C32, 0x0404 },    /* R3122  - Misc Pad Ctrl 9 */
> +	{ 0x00000C33, 0x0404 },    /* R3123  - Misc Pad Ctrl 10 */
> +	{ 0x00000C34, 0x0404 },    /* R3124  - Misc Pad Ctrl 11 */
> +	{ 0x00000C35, 0x0404 },    /* R3125  - Misc Pad Ctrl 12 */
> +	{ 0x00000C36, 0x0404 },    /* R3126  - Misc Pad Ctrl 13 */
> +	{ 0x00000C37, 0x0404 },    /* R3127  - Misc Pad Ctrl 14 */
> +	{ 0x00000C38, 0x0004 },    /* R3128  - Misc Pad Ctrl 15 */
> +	{ 0x00000C39, 0x0404 },    /* R3129  - Misc Pad Ctrl 16 */
> +	{ 0x00000C3A, 0x0404 },    /* R3130  - Misc Pad Ctrl 17 */
> +	{ 0x00000C3B, 0x0404 },    /* R3131  - Misc Pad Ctrl 18 */
>  	{ 0x00000D08, 0xFFFF },    /* R3336  - Interrupt Status 1 Mask */
>  	{ 0x00000D09, 0xFFFF },    /* R3337  - Interrupt Status 2 Mask */
>  	{ 0x00000D0A, 0xFFFF },    /* R3338  - Interrupt Status 3 Mask */
> @@ -1641,7 +1637,7 @@ static const struct reg_default wm5110_reg_default[] = {
>  	{ 0x00000F0D, 0x0000 },    /* R3853  - ANC Coefficient */
>  	{ 0x00000F0E, 0x0000 },    /* R3854  - ANC Coefficient */
>  	{ 0x00000F0F, 0x0000 },    /* R3855  - ANC Coefficient */
> -	{ 0x00000F10, 0x0000 },    /* R3856  - ANC Coefficient */
> +	{ 0x00000F10, 0x0001 },    /* R3856  - ANC Coefficient */
>  	{ 0x00000F11, 0x0000 },    /* R3857  - ANC Coefficient */
>  	{ 0x00000F12, 0x0000 },    /* R3858  - ANC Coefficient */
>  	{ 0x00000F15, 0x0000 },    /* R3861  - FCL Filter Control */
> @@ -1947,8 +1943,6 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL1_CONTROL_5:
>  	case ARIZONA_FLL1_CONTROL_6:
>  	case ARIZONA_FLL1_CONTROL_7:
> -	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL1_NCO_TEST_0:
>  	case ARIZONA_FLL1_SYNCHRONISER_1:
>  	case ARIZONA_FLL1_SYNCHRONISER_2:
>  	case ARIZONA_FLL1_SYNCHRONISER_3:
> @@ -1965,8 +1959,6 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL2_CONTROL_5:
>  	case ARIZONA_FLL2_CONTROL_6:
>  	case ARIZONA_FLL2_CONTROL_7:
> -	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL2_NCO_TEST_0:
>  	case ARIZONA_FLL2_SYNCHRONISER_1:
>  	case ARIZONA_FLL2_SYNCHRONISER_2:
>  	case ARIZONA_FLL2_SYNCHRONISER_3:

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH RESEND 2/7] mfd: wm5102: Fix defaults array based on testing

[Lee Jones]

On Tue, 09 Feb 2016, Charles Keepax wrote:

> My automated test is back and now can check defaults against the actual
> hardware. This patch updates the defaults array for the differences
> detected and removes a couple of completely unused registers.
> 
> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> ---
>  drivers/mfd/wm5102-tables.c | 16 ++++------------
>  1 file changed, 4 insertions(+), 12 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c
> index 0386eaf..ab8b23b 100644
> --- a/drivers/mfd/wm5102-tables.c
> +++ b/drivers/mfd/wm5102-tables.c
> @@ -297,7 +297,6 @@ static const struct reg_default wm5102_reg_default[] = {
>  	{ 0x00000174, 0x007D },   /* R372   - FLL1 Control 4 */ 
>  	{ 0x00000175, 0x0004 },   /* R373   - FLL1 Control 5 */ 
>  	{ 0x00000176, 0x0000 },   /* R374   - FLL1 Control 6 */ 
> -	{ 0x00000177, 0x0181 },   /* R375   - FLL1 Loop Filter Test 1 */ 
>  	{ 0x00000179, 0x0000 },   /* R377   - FLL1 Control 7 */
>  	{ 0x00000181, 0x0000 },   /* R385   - FLL1 Synchroniser 1 */ 
>  	{ 0x00000182, 0x0000 },   /* R386   - FLL1 Synchroniser 2 */ 
> @@ -314,7 +313,6 @@ static const struct reg_default wm5102_reg_default[] = {
>  	{ 0x00000194, 0x007D },   /* R404   - FLL2 Control 4 */ 
>  	{ 0x00000195, 0x0004 },   /* R405   - FLL2 Control 5 */ 
>  	{ 0x00000196, 0x0000 },   /* R406   - FLL2 Control 6 */ 
> -	{ 0x00000197, 0x0000 },   /* R407   - FLL2 Loop Filter Test 1 */ 
>  	{ 0x00000199, 0x0000 },   /* R409   - FLL2 Control 7 */
>  	{ 0x000001A1, 0x0000 },   /* R417   - FLL2 Synchroniser 1 */ 
>  	{ 0x000001A2, 0x0000 },   /* R418   - FLL2 Synchroniser 2 */ 
> @@ -338,7 +336,7 @@ static const struct reg_default wm5102_reg_default[] = {
>  	{ 0x000002A3, 0x1102 },   /* R675   - Mic Detect 1 */ 
>  	{ 0x000002A4, 0x009F },   /* R676   - Mic Detect 2 */ 
>  	{ 0x000002A6, 0x3737 },   /* R678   - Mic Detect Level 1 */
> -	{ 0x000002A7, 0x372C },   /* R679   - Mic Detect Level 2 */
> +	{ 0x000002A7, 0x2C37 },   /* R679   - Mic Detect Level 2 */
>  	{ 0x000002A8, 0x1422 },   /* R680   - Mic Detect Level 3 */
>  	{ 0x000002A9, 0x030A },   /* R681   - Mic Detect Level 4 */
>  	{ 0x000002C3, 0x0000 },   /* R707   - Mic noise mix control 1 */ 
> @@ -402,7 +400,7 @@ static const struct reg_default wm5102_reg_default[] = {
>  	{ 0x00000435, 0x0180 },   /* R1077  - DAC Digital Volume 5R */ 
>  	{ 0x00000436, 0x0081 },   /* R1078  - DAC Volume Limit 5R */
>  	{ 0x00000437, 0x0200 },   /* R1079  - Noise Gate Select 5R */
> -	{ 0x00000440, 0x8FFF },   /* R1088  - DRE Enable */
> +	{ 0x00000440, 0x0FFF },   /* R1088  - DRE Enable */
>  	{ 0x00000442, 0x3F0A },   /* R1090  - DRE Control 2 */
>  	{ 0x00000443, 0xDC1F },   /* R1090  - DRE Control 3 */
>  	{ 0x00000450, 0x0000 },   /* R1104  - DAC AEC Control 1 */ 
> @@ -863,7 +861,7 @@ static const struct reg_default wm5102_reg_default[] = {
>  	{ 0x00000C0F, 0x0400 },   /* R3087  - IRQ CTRL 1 */ 
>  	{ 0x00000C10, 0x1000 },   /* R3088  - GPIO Debounce Config */ 
>  	{ 0x00000C20, 0x8002 },   /* R3104  - Misc Pad Ctrl 1 */ 
> -	{ 0x00000C21, 0x8001 },   /* R3105  - Misc Pad Ctrl 2 */ 
> +	{ 0x00000C21, 0x0001 },   /* R3105  - Misc Pad Ctrl 2 */
>  	{ 0x00000C22, 0x0000 },   /* R3106  - Misc Pad Ctrl 3 */ 
>  	{ 0x00000C23, 0x0000 },   /* R3107  - Misc Pad Ctrl 4 */ 
>  	{ 0x00000C24, 0x0000 },   /* R3108  - Misc Pad Ctrl 5 */ 
> @@ -984,7 +982,7 @@ static const struct reg_default wm5102_reg_default[] = {
>  	{ 0x00000ECD, 0x0000 },   /* R3789  - HPLPF4_2 */ 
>  	{ 0x00000EE0, 0x0000 },   /* R3808  - ASRC_ENABLE */ 
>  	{ 0x00000EE2, 0x0000 },   /* R3810  - ASRC_RATE1 */ 
> -	{ 0x00000EE3, 0x0400 },   /* R3811  - ASRC_RATE2 */
> +	{ 0x00000EE3, 0x4000 },   /* R3811  - ASRC_RATE2 */
>  	{ 0x00000EF0, 0x0000 },   /* R3824  - ISRC 1 CTRL 1 */ 
>  	{ 0x00000EF1, 0x0000 },   /* R3825  - ISRC 1 CTRL 2 */ 
>  	{ 0x00000EF2, 0x0000 },   /* R3826  - ISRC 1 CTRL 3 */ 
> @@ -1062,8 +1060,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL1_CONTROL_4:
>  	case ARIZONA_FLL1_CONTROL_5:
>  	case ARIZONA_FLL1_CONTROL_6:
> -	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL1_NCO_TEST_0:
>  	case ARIZONA_FLL1_CONTROL_7:
>  	case ARIZONA_FLL1_SYNCHRONISER_1:
>  	case ARIZONA_FLL1_SYNCHRONISER_2:
> @@ -1080,8 +1076,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL2_CONTROL_4:
>  	case ARIZONA_FLL2_CONTROL_5:
>  	case ARIZONA_FLL2_CONTROL_6:
> -	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL2_NCO_TEST_0:
>  	case ARIZONA_FLL2_CONTROL_7:
>  	case ARIZONA_FLL2_SYNCHRONISER_1:
>  	case ARIZONA_FLL2_SYNCHRONISER_2:
> @@ -1849,8 +1843,6 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_HAPTICS_STATUS:
>  	case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS:
>  	case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS:
> -	case ARIZONA_FLL1_NCO_TEST_0:
> -	case ARIZONA_FLL2_NCO_TEST_0:
>  	case ARIZONA_DAC_COMP_1:
>  	case ARIZONA_DAC_COMP_2:
>  	case ARIZONA_DAC_COMP_3:

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH RESEND 3/7] mfd: wm8998: Fix defaults array based on testing

[Lee Jones]

On Tue, 09 Feb 2016, Charles Keepax wrote:

> My automated test is back and now can check defaults against the actual
> hardware. This patch updates the defaults array for the differences
> detected and removes a couple of completely unused registers.
> 
> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> ---
>  drivers/mfd/wm8998-tables.c | 12 ++----------
>  1 file changed, 2 insertions(+), 10 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c
> index 4c2dce77..a0de300 100644
> --- a/drivers/mfd/wm8998-tables.c
> +++ b/drivers/mfd/wm8998-tables.c
> @@ -229,8 +229,6 @@ static const struct reg_default wm8998_reg_default[] = {
>  	{ 0x00000174, 0x007D },    /* R372   - FLL1 Control 4 */
>  	{ 0x00000175, 0x0004 },    /* R373   - FLL1 Control 5 */
>  	{ 0x00000176, 0x0000 },    /* R374   - FLL1 Control 6 */
> -	{ 0x00000177, 0x0181 },    /* R375   - FLL1 Loop Filter Test 1 */
> -	{ 0x00000178, 0x0000 },    /* R376   - FLL1 NCO Test 0 */
>  	{ 0x00000179, 0x0000 },    /* R377   - FLL1 Control 7 */
>  	{ 0x00000181, 0x0000 },    /* R385   - FLL1 Synchroniser 1 */
>  	{ 0x00000182, 0x0000 },    /* R386   - FLL1 Synchroniser 2 */
> @@ -247,8 +245,6 @@ static const struct reg_default wm8998_reg_default[] = {
>  	{ 0x00000194, 0x007D },    /* R404   - FLL2 Control 4 */
>  	{ 0x00000195, 0x0004 },    /* R405   - FLL2 Control 5 */
>  	{ 0x00000196, 0x0000 },    /* R406   - FLL2 Control 6 */
> -	{ 0x00000197, 0x0000 },    /* R407   - FLL2 Loop Filter Test 1 */
> -	{ 0x00000198, 0x0000 },    /* R408   - FLL2 NCO Test 0 */
>  	{ 0x00000199, 0x0000 },    /* R409   - FLL2 Control 7 */
>  	{ 0x000001A1, 0x0000 },    /* R417   - FLL2 Synchroniser 1 */
>  	{ 0x000001A2, 0x0000 },    /* R418   - FLL2 Synchroniser 2 */
> @@ -320,7 +316,7 @@ static const struct reg_default wm8998_reg_default[] = {
>  	{ 0x00000434, 0x0000 },    /* R1076  - Output Path Config 5R */
>  	{ 0x00000435, 0x0180 },    /* R1077  - DAC Digital Volume 5R */
>  	{ 0x00000437, 0x0200 },    /* R1079  - Noise Gate Select 5R */
> -	{ 0x00000440, 0x8FFF },    /* R1088  - DRE Enable */
> +	{ 0x00000440, 0x002F },    /* R1088  - DRE Enable */
>  	{ 0x00000441, 0xC759 },    /* R1089  - DRE Control 1 */
>  	{ 0x00000442, 0x2A08 },    /* R1089  - DRE Control 2 */
>  	{ 0x00000443, 0x5CFA },    /* R1089  - DRE Control 3 */
> @@ -686,7 +682,7 @@ static const struct reg_default wm8998_reg_default[] = {
>  	{ 0x00000C10, 0x1000 },    /* R3088  - GPIO Debounce Config */
>  	{ 0x00000C18, 0x0000 },    /* R3096  - GP Switch 1 */
>  	{ 0x00000C20, 0x8002 },    /* R3104  - Misc Pad Ctrl 1 */
> -	{ 0x00000C21, 0x8001 },    /* R3105  - Misc Pad Ctrl 2 */
> +	{ 0x00000C21, 0x0001 },    /* R3105  - Misc Pad Ctrl 2 */
>  	{ 0x00000C22, 0x0000 },    /* R3106  - Misc Pad Ctrl 3 */
>  	{ 0x00000C23, 0x0000 },    /* R3107  - Misc Pad Ctrl 4 */
>  	{ 0x00000C24, 0x0000 },    /* R3108  - Misc Pad Ctrl 5 */
> @@ -888,8 +884,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL1_CONTROL_5:
>  	case ARIZONA_FLL1_CONTROL_6:
>  	case ARIZONA_FLL1_CONTROL_7:
> -	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL1_NCO_TEST_0:
>  	case ARIZONA_FLL1_SYNCHRONISER_1:
>  	case ARIZONA_FLL1_SYNCHRONISER_2:
>  	case ARIZONA_FLL1_SYNCHRONISER_3:
> @@ -906,8 +900,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL2_CONTROL_5:
>  	case ARIZONA_FLL2_CONTROL_6:
>  	case ARIZONA_FLL2_CONTROL_7:
> -	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL2_NCO_TEST_0:
>  	case ARIZONA_FLL2_SYNCHRONISER_1:
>  	case ARIZONA_FLL2_SYNCHRONISER_2:
>  	case ARIZONA_FLL2_SYNCHRONISER_3:

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH RESEND 4/7] mfd: cs47l24: Fix defaults array based on testing

[Lee Jones]

On Tue, 09 Feb 2016, Charles Keepax wrote:

> My automated test is back and now can check defaults against the actual
> hardware. This patch updates the defaults array for the differences
> detected and removes a couple of completely unused registers.
> 
> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> ---
>  drivers/mfd/cs47l24-tables.c | 10 +---------
>  1 file changed, 1 insertion(+), 9 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/cs47l24-tables.c
> index 8708006..f6b78aa 100644
> --- a/drivers/mfd/cs47l24-tables.c
> +++ b/drivers/mfd/cs47l24-tables.c
> @@ -227,8 +227,6 @@ static const struct reg_default cs47l24_reg_default[] = {
>  	{ 0x00000174, 0x007D },    /* R372   - FLL1 Control 4 */
>  	{ 0x00000175, 0x0006 },    /* R373   - FLL1 Control 5 */
>  	{ 0x00000176, 0x0000 },    /* R374   - FLL1 Control 6 */
> -	{ 0x00000177, 0x0281 },    /* R375   - FLL1 Loop Filter Test 1 */
> -	{ 0x00000178, 0x0000 },    /* R376   - FLL1 NCO Test 0 */
>  	{ 0x00000179, 0x0000 },    /* R376   - FLL1 Control 7 */
>  	{ 0x00000181, 0x0000 },    /* R385   - FLL1 Synchroniser 1 */
>  	{ 0x00000182, 0x0000 },    /* R386   - FLL1 Synchroniser 2 */
> @@ -245,8 +243,6 @@ static const struct reg_default cs47l24_reg_default[] = {
>  	{ 0x00000194, 0x007D },    /* R404   - FLL2 Control 4 */
>  	{ 0x00000195, 0x000C },    /* R405   - FLL2 Control 5 */
>  	{ 0x00000196, 0x0000 },    /* R406   - FLL2 Control 6 */
> -	{ 0x00000197, 0x0000 },    /* R407   - FLL2 Loop Filter Test 1 */
> -	{ 0x00000198, 0x0000 },    /* R408   - FLL2 NCO Test 0 */
>  	{ 0x00000199, 0x0000 },    /* R408   - FLL2 Control 7 */
>  	{ 0x000001A1, 0x0000 },    /* R417   - FLL2 Synchroniser 1 */
>  	{ 0x000001A2, 0x0000 },    /* R418   - FLL2 Synchroniser 2 */
> @@ -678,7 +674,7 @@ static const struct reg_default cs47l24_reg_default[] = {
>  	{ 0x00000C0F, 0x0400 },    /* R3087  - IRQ CTRL 1 */
>  	{ 0x00000C10, 0x1000 },    /* R3088  - GPIO Debounce Config */
>  	{ 0x00000C20, 0x0002 },    /* R3104  - Misc Pad Ctrl 1 */
> -	{ 0x00000C21, 0x8001 },    /* R3105  - Misc Pad Ctrl 2 */
> +	{ 0x00000C21, 0x0000 },    /* R3105  - Misc Pad Ctrl 2 */
>  	{ 0x00000C22, 0x0000 },    /* R3106  - Misc Pad Ctrl 3 */
>  	{ 0x00000C23, 0x0000 },    /* R3107  - Misc Pad Ctrl 4 */
>  	{ 0x00000C24, 0x0000 },    /* R3108  - Misc Pad Ctrl 5 */
> @@ -858,8 +854,6 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL1_CONTROL_5:
>  	case ARIZONA_FLL1_CONTROL_6:
>  	case ARIZONA_FLL1_CONTROL_7:
> -	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL1_NCO_TEST_0:
>  	case ARIZONA_FLL1_SYNCHRONISER_1:
>  	case ARIZONA_FLL1_SYNCHRONISER_2:
>  	case ARIZONA_FLL1_SYNCHRONISER_3:
> @@ -876,8 +870,6 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL2_CONTROL_5:
>  	case ARIZONA_FLL2_CONTROL_6:
>  	case ARIZONA_FLL2_CONTROL_7:
> -	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL2_NCO_TEST_0:
>  	case ARIZONA_FLL2_SYNCHRONISER_1:
>  	case ARIZONA_FLL2_SYNCHRONISER_2:
>  	case ARIZONA_FLL2_SYNCHRONISER_3:

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH RESEND 5/7] mfd: arizona: Remove duplicate select of MFD_CORE

[Lee Jones]

On Tue, 09 Feb 2016, Charles Keepax wrote:

> MFD_ARIZONA_I2C and MFD_ARIZONA_SPI both select MFD_ARIZONA and all
> three of those select MFD_CORE, this makes the selects of MFD_CORE in
> MFD_ARIZONA_I2C and MFD_ARIZONA_SPI redundant, so we remove them.
> 
> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> ---
>  drivers/mfd/Kconfig | 2 --
>  1 file changed, 2 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 6c4ebd9..9f012b7 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -1372,7 +1372,6 @@ config MFD_ARIZONA
>  config MFD_ARIZONA_I2C
>  	tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with I2C"
>  	select MFD_ARIZONA
> -	select MFD_CORE
>  	select REGMAP_I2C
>  	depends on I2C
>  	help
> @@ -1382,7 +1381,6 @@ config MFD_ARIZONA_I2C
>  config MFD_ARIZONA_SPI
>  	tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with SPI"
>  	select MFD_ARIZONA
> -	select MFD_CORE
>  	select REGMAP_SPI
>  	depends on SPI_MASTER
>  	help

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH 0/7] Minor Arizona MFD Cleanups

[Charles Keepax]

Hi,

This series fixes up a bunch of register defaults in the Arizona
devices and sorts a few Kconfig options.

Thanks,
Charles

Charles Keepax (7):
  mfd: wm5110: Fix defaults array based on testing
  mfd: wm5102: Fix defaults array based on testing
  mfd: wm8998: Fix defaults array based on testing
  mfd: cs47l24: Fix defaults array based on testing
  mfd: arizona: Remove duplicate select of MFD_CORE
  mfd: arizona: Update small typo in Arizona SPI Kconfig
  mfd: arizona: Allow building Arizona MFD as a module

 drivers/mfd/Kconfig          |  6 ++--
 drivers/mfd/Makefile         | 18 +++++-----
 drivers/mfd/arizona-core.c   |  4 +++
 drivers/mfd/cs47l24-tables.c | 10 +-----
 drivers/mfd/wm5102-tables.c  | 16 +++------
 drivers/mfd/wm5110-tables.c  | 82 ++++++++++++++++++++------------------------
 drivers/mfd/wm8998-tables.c  | 12 ++-----
 7 files changed, 59 insertions(+), 89 deletions(-)

-- 
2.1.4