From: Yakir Yang <ykk@rock-chips.com> To: Inki Dae <inki.dae@samsung.com>, Andrzej Hajda <a.hajda@samsung.com>, Joonyoung Shim <jy0922.shim@samsung.com>, Seung-Woo Kim <sw0312.kim@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Jingoo Han <jingoohan1@gmail.com>, Thierry Reding <treding@nvidia.com>, Krzysztof Kozlowski <k.kozlowski@samsung.com>, Rob Herring <robh+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>, Mark Yao <mark.yao@rock-chips.com> Cc: Russell King <linux@arm.linux.org.uk>, djkurtz@chromium.org, Sean Paul <seanpaul@chromium.org>, Kukjin Kim <kgene@kernel.org>, Kumar Gala <galak@codeaurora.org>, emil.l.velikov@gmail.com, Ian Campbell <ijc+devicetree@hellion.org.uk>, Gustavo Padovan <gustavo.padovan@collabora.co.uk>, Kishon Vijay Abraham I <kishon@ti.com>, Pawel Moll <pawel.moll@arm.com>, ajaynumb@gmail.com, robherring2@gmail.com, javier@osg.samsung.com, Andy Yan <andy.yan@rock-chips.com>, Yakir Yang <ykk@rock-chips.com>, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v14 11/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Date: Mon, 15 Feb 2016 19:10:54 +0800 [thread overview] Message-ID: <1455534654-1966-1-git-send-email-ykk@rock-chips.com> (raw) In-Reply-To: <1455534485-1154-1-git-send-email-ykk@rock-chips.com> RK3288 need some special registers setting, we can separate them out by the dev_type of plat_data. Signed-off-by: Yakir Yang <ykk@rock-chips.com> --- Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Fix compile failed dut to phy_pd_addr variable misspell error drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 76 ++++++++++++++--------- drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 12 ++++ 2 files changed, 60 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c index 3858df5..1e24b37 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -15,6 +15,8 @@ #include <linux/delay.h> #include <linux/gpio.h> +#include <drm/bridge/analogix_dp.h> + #include "analogix_dp_core.h" #include "analogix_dp_reg.h" @@ -72,6 +74,14 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp) reg = SEL_24M | TX_DVDD_BIT_1_0625V; writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); + if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) { + writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1); + writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2); + writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3); + writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4); + writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5); + } + reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO; writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3); @@ -206,81 +216,85 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, bool enable) { u32 reg; + u32 phy_pd_addr = ANALOGIX_DP_PHY_PD; + + if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) + phy_pd_addr = ANALOGIX_DP_PD; switch (block) { case AUX_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= AUX_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~AUX_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case CH0_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= CH0_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~CH0_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case CH1_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= CH1_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~CH1_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case CH2_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= CH2_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~CH2_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case CH3_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= CH3_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~CH3_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case ANALOG_TOTAL: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= DP_PHY_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~DP_PHY_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case POWER_ALL: if (enable) { reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD | CH1_PD | CH0_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - writel(0x00, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(0x00, dp->reg_base + phy_pd_addr); } break; default: @@ -399,8 +413,14 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp) analogix_dp_reset_aux(dp); /* Disable AUX transaction H/W retry */ - reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0) | - AUX_HW_RETRY_INTERVAL_600_MICROSECONDS; + if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) + reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) | + AUX_HW_RETRY_COUNT_SEL(3) | + AUX_HW_RETRY_INTERVAL_600_MICROSECONDS; + else + reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | + AUX_HW_RETRY_COUNT_SEL(0) | + AUX_HW_RETRY_INTERVAL_600_MICROSECONDS; writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL); /* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */ diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h index 738db4c..337912b 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h @@ -22,6 +22,14 @@ #define ANALOGIX_DP_VIDEO_CTL_8 0x3C #define ANALOGIX_DP_VIDEO_CTL_10 0x44 +#define ANALOGIX_DP_PLL_REG_1 0xfc +#define ANALOGIX_DP_PLL_REG_2 0x9e4 +#define ANALOGIX_DP_PLL_REG_3 0x9e8 +#define ANALOGIX_DP_PLL_REG_4 0x9ec +#define ANALOGIX_DP_PLL_REG_5 0xa00 + +#define ANALOGIX_DP_PD 0x12c + #define ANALOGIX_DP_LANE_MAP 0x35C #define ANALOGIX_DP_ANALOG_CTL_1 0x370 @@ -154,6 +162,10 @@ #define VSYNC_POLARITY_CFG (0x1 << 1) #define HSYNC_POLARITY_CFG (0x1 << 0) +/* ANALOGIX_DP_PLL_REG_1 */ +#define REF_CLK_24M (0x1 << 1) +#define REF_CLK_27M (0x0 << 1) + /* ANALOGIX_DP_LANE_MAP */ #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) #define LANE3_MAP_LOGIC_LANE_1 (0x1 << 6) -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: ykk@rock-chips.com (Yakir Yang) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v14 11/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Date: Mon, 15 Feb 2016 19:10:54 +0800 [thread overview] Message-ID: <1455534654-1966-1-git-send-email-ykk@rock-chips.com> (raw) In-Reply-To: <1455534485-1154-1-git-send-email-ykk@rock-chips.com> RK3288 need some special registers setting, we can separate them out by the dev_type of plat_data. Signed-off-by: Yakir Yang <ykk@rock-chips.com> --- Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Fix compile failed dut to phy_pd_addr variable misspell error drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 76 ++++++++++++++--------- drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 12 ++++ 2 files changed, 60 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c index 3858df5..1e24b37 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -15,6 +15,8 @@ #include <linux/delay.h> #include <linux/gpio.h> +#include <drm/bridge/analogix_dp.h> + #include "analogix_dp_core.h" #include "analogix_dp_reg.h" @@ -72,6 +74,14 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp) reg = SEL_24M | TX_DVDD_BIT_1_0625V; writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); + if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) { + writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1); + writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2); + writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3); + writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4); + writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5); + } + reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO; writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3); @@ -206,81 +216,85 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, bool enable) { u32 reg; + u32 phy_pd_addr = ANALOGIX_DP_PHY_PD; + + if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) + phy_pd_addr = ANALOGIX_DP_PD; switch (block) { case AUX_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= AUX_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~AUX_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case CH0_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= CH0_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~CH0_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case CH1_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= CH1_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~CH1_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case CH2_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= CH2_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~CH2_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case CH3_BLOCK: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= CH3_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~CH3_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case ANALOG_TOTAL: if (enable) { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg |= DP_PHY_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD); + reg = readl(dp->reg_base + phy_pd_addr); reg &= ~DP_PHY_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } break; case POWER_ALL: if (enable) { reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD | CH1_PD | CH0_PD; - writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(reg, dp->reg_base + phy_pd_addr); } else { - writel(0x00, dp->reg_base + ANALOGIX_DP_PHY_PD); + writel(0x00, dp->reg_base + phy_pd_addr); } break; default: @@ -399,8 +413,14 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp) analogix_dp_reset_aux(dp); /* Disable AUX transaction H/W retry */ - reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0) | - AUX_HW_RETRY_INTERVAL_600_MICROSECONDS; + if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) + reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) | + AUX_HW_RETRY_COUNT_SEL(3) | + AUX_HW_RETRY_INTERVAL_600_MICROSECONDS; + else + reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | + AUX_HW_RETRY_COUNT_SEL(0) | + AUX_HW_RETRY_INTERVAL_600_MICROSECONDS; writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL); /* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */ diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h index 738db4c..337912b 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h @@ -22,6 +22,14 @@ #define ANALOGIX_DP_VIDEO_CTL_8 0x3C #define ANALOGIX_DP_VIDEO_CTL_10 0x44 +#define ANALOGIX_DP_PLL_REG_1 0xfc +#define ANALOGIX_DP_PLL_REG_2 0x9e4 +#define ANALOGIX_DP_PLL_REG_3 0x9e8 +#define ANALOGIX_DP_PLL_REG_4 0x9ec +#define ANALOGIX_DP_PLL_REG_5 0xa00 + +#define ANALOGIX_DP_PD 0x12c + #define ANALOGIX_DP_LANE_MAP 0x35C #define ANALOGIX_DP_ANALOG_CTL_1 0x370 @@ -154,6 +162,10 @@ #define VSYNC_POLARITY_CFG (0x1 << 1) #define HSYNC_POLARITY_CFG (0x1 << 0) +/* ANALOGIX_DP_PLL_REG_1 */ +#define REF_CLK_24M (0x1 << 1) +#define REF_CLK_27M (0x0 << 1) + /* ANALOGIX_DP_LANE_MAP */ #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) #define LANE3_MAP_LOGIC_LANE_1 (0x1 << 6) -- 1.9.1
next prev parent reply other threads:[~2016-02-15 11:11 UTC|newest] Thread overview: 157+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-02-15 11:08 [PATCH v14 0/17] Add Analogix Core Display Port Driver Yakir Yang 2016-02-15 11:08 ` Yakir Yang 2016-02-15 11:09 ` [PATCH v14 01/17] drm: bridge: analogix/dp: split exynos dp driver to bridge directory Yakir Yang 2016-02-15 11:09 ` Yakir Yang 2016-03-17 21:47 ` [PATCH v14.1 " Heiko Stübner 2016-03-17 21:47 ` Heiko Stübner 2016-03-18 7:01 ` Caesar Wang 2016-03-18 7:01 ` Caesar Wang 2016-06-07 17:06 ` Javier Martinez Canillas 2016-06-07 17:06 ` Javier Martinez Canillas 2016-06-07 17:06 ` Javier Martinez Canillas 2016-06-08 1:28 ` Yakir Yang 2016-06-08 1:28 ` Yakir Yang 2016-06-08 1:28 ` Yakir Yang 2016-06-08 7:44 ` Marc Zyngier 2016-06-08 7:44 ` Marc Zyngier 2016-06-08 7:44 ` Marc Zyngier 2016-06-08 10:53 ` Yakir Yang 2016-06-08 10:53 ` Yakir Yang 2016-06-08 10:53 ` Yakir Yang 2016-06-08 14:19 ` Javier Martinez Canillas 2016-06-08 14:19 ` Javier Martinez Canillas 2016-06-08 14:19 ` Javier Martinez Canillas 2016-03-30 20:32 ` [v14, " Guenter Roeck 2016-03-30 20:32 ` Guenter Roeck 2016-03-30 20:32 ` Guenter Roeck 2016-03-31 9:56 ` Thierry Reding 2016-03-31 9:56 ` Thierry Reding 2016-03-31 9:56 ` Thierry Reding 2016-03-31 16:02 ` Doug Anderson 2016-03-31 16:02 ` Doug Anderson 2016-03-31 16:02 ` Doug Anderson 2016-04-05 2:15 ` Yakir Yang 2016-04-05 2:15 ` Yakir Yang 2016-04-05 2:15 ` Yakir Yang 2016-03-31 15:57 ` Doug Anderson 2016-03-31 15:57 ` Doug Anderson 2016-03-31 15:57 ` Doug Anderson 2016-04-05 1:49 ` Yakir Yang 2016-04-05 1:49 ` Yakir Yang 2016-04-05 1:49 ` Yakir Yang 2016-02-15 11:09 ` [PATCH v14 02/17] drm/exynos: dp: rename implementation specific driver part Yakir Yang 2016-02-15 11:09 ` Yakir Yang 2016-02-15 11:09 ` [PATCH v14 03/17] drm: bridge: analogix/dp: rename register constants Yakir Yang 2016-02-15 11:09 ` Yakir Yang 2016-02-15 11:09 ` [PATCH v14 04/17] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang 2016-02-15 11:09 ` Yakir Yang 2016-02-15 11:09 ` Yakir Yang 2016-03-17 21:48 ` Heiko Stübner 2016-03-17 21:48 ` Heiko Stübner 2016-03-17 21:48 ` Heiko Stübner 2016-03-17 21:50 ` [PATCH v14.1 " Heiko Stübner 2016-03-17 21:50 ` Heiko Stübner 2016-03-17 21:50 ` Heiko Stübner 2016-02-15 11:10 ` [PATCH v14 05/17] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang 2016-02-15 11:10 ` Yakir Yang 2016-02-15 11:10 ` [PATCH v14 06/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang 2016-02-15 11:10 ` Yakir Yang 2016-02-15 11:10 ` [PATCH v14 07/17] dt-bindings: add document for analogix display port driver Yakir Yang 2016-02-15 11:10 ` Yakir Yang 2016-02-15 11:10 ` [PATCH v14 08/17] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang 2016-02-15 11:10 ` Yakir Yang 2016-02-15 11:10 ` [PATCH v14 09/17] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang 2016-02-15 11:10 ` Yakir Yang 2016-03-17 21:51 ` [PATCH v14.1 " Heiko Stübner 2016-03-17 21:51 ` Heiko Stübner 2016-03-17 21:51 ` Heiko Stübner 2016-03-18 6:45 ` Caesar Wang 2016-03-18 6:45 ` Caesar Wang 2016-03-18 6:45 ` Caesar Wang 2016-03-23 1:08 ` [PATCH v14 " Mark yao 2016-03-23 1:08 ` Mark yao 2016-03-23 1:08 ` Mark yao 2016-02-15 11:10 ` [PATCH v14 10/17] dt-bindings: add document for rockchip variant of analogix_dp Yakir Yang 2016-02-15 11:10 ` Yakir Yang 2016-02-15 11:10 ` Yakir Yang [this message] 2016-02-15 11:10 ` [PATCH v14 11/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang 2016-03-18 6:56 ` Caesar Wang 2016-03-18 6:56 ` Caesar Wang 2016-03-18 6:56 ` Caesar Wang 2016-02-15 11:11 ` [PATCH v14 12/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang 2016-02-15 11:11 ` Yakir Yang 2016-02-15 11:11 ` [PATCH v14 13/17] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang 2016-02-15 11:11 ` Yakir Yang 2016-02-15 11:11 ` [PATCH v14 14/17] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang 2016-02-15 11:11 ` Yakir Yang 2016-02-15 11:11 ` [PATCH v14 15/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang 2016-02-15 11:11 ` Yakir Yang 2016-02-15 11:11 ` [PATCH v14 16/17] drm: bridge: analogix/dp: add panel prepare/unprepare in suspend/resume time Yakir Yang 2016-02-15 11:11 ` Yakir Yang 2016-02-15 11:11 ` [PATCH v14 17/17] drm: bridge: analogix/dp: Fix the possible dead lock in bridge disable time Yakir Yang 2016-02-15 11:11 ` Yakir Yang 2016-03-18 6:41 ` [PATCH v14 0/17] Add Analogix Core Display Port Driver Caesar Wang 2016-03-18 6:41 ` Caesar Wang 2016-03-18 6:41 ` Caesar Wang 2016-03-18 22:53 ` Doug Anderson 2016-03-18 22:53 ` Doug Anderson 2016-03-18 22:53 ` Doug Anderson 2016-03-22 19:19 ` Javier Martinez Canillas 2016-03-22 19:19 ` Javier Martinez Canillas 2016-03-22 19:19 ` Javier Martinez Canillas 2016-03-22 22:12 ` Who is going to merge it [Was: Re: [PATCH v14 0/17] Add Analogix Core Display Port Driver] Heiko Stübner 2016-03-22 22:12 ` Heiko Stübner 2016-03-22 22:12 ` Heiko Stübner 2016-03-22 22:44 ` Inki Dae 2016-03-22 22:44 ` Inki Dae 2016-03-22 22:44 ` Inki Dae 2016-03-22 22:52 ` Heiko Stübner 2016-03-22 22:52 ` Heiko Stübner 2016-03-22 22:52 ` Heiko Stübner 2016-03-22 23:09 ` Inki Dae 2016-03-22 23:09 ` Inki Dae 2016-03-22 23:09 ` Inki Dae 2016-03-22 23:39 ` Russell King - ARM Linux 2016-03-22 23:39 ` Russell King - ARM Linux 2016-03-22 23:39 ` Russell King - ARM Linux 2016-03-22 23:54 ` Inki Dae 2016-03-22 23:54 ` Inki Dae 2016-03-22 23:54 ` Inki Dae 2016-03-23 0:08 ` Russell King - ARM Linux 2016-03-23 0:08 ` Russell King - ARM Linux 2016-03-23 0:08 ` Russell King - ARM Linux 2016-03-23 0:41 ` Dave Airlie 2016-03-23 0:41 ` Dave Airlie 2016-03-23 0:41 ` Dave Airlie 2016-03-23 1:08 ` Mark yao 2016-03-23 1:08 ` Mark yao 2016-03-23 1:08 ` Mark yao 2016-03-23 15:49 ` Thierry Reding 2016-03-23 15:49 ` Thierry Reding 2016-03-23 15:49 ` Thierry Reding 2016-03-24 11:10 ` Yakir Yang 2017-11-13 1:11 ` Yakir Yang 2016-03-24 11:10 ` Yakir Yang 2016-03-24 11:10 ` Yakir Yang 2016-03-24 11:10 ` Yakir Yang [not found] ` <CAPM=9tz9_rbGJFuv-+YN=Sicfng++tHTDLrOX5Ohtwft+VnwtA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-03-24 11:10 ` Yakir Yang 2016-03-24 11:11 ` Yakir Yang 2016-03-24 15:00 ` Yakir Yang 2016-03-24 13:01 ` [PATCH v14 0/17] Add Analogix Core Display Port Driver Heiko Stübner 2016-03-24 13:01 ` Heiko Stübner 2016-03-24 13:01 ` Heiko Stübner 2016-03-31 10:15 ` Daniel Vetter 2016-03-31 10:15 ` Daniel Vetter 2016-03-31 10:15 ` Daniel Vetter 2016-03-31 10:22 ` Thierry Reding 2016-03-31 10:22 ` Thierry Reding 2016-03-31 10:22 ` Thierry Reding 2016-04-05 2:06 ` Yakir Yang 2016-04-05 2:06 ` Yakir Yang 2016-04-05 2:06 ` Yakir Yang 2016-07-29 8:38 ` Tomeu Vizoso 2016-07-29 8:38 ` Tomeu Vizoso 2016-07-29 8:38 ` Tomeu Vizoso 2016-08-01 1:49 ` Yakir Yang 2016-08-01 1:49 ` Yakir Yang 2016-08-01 1:49 ` Yakir Yang
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