[PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Geert Uytterhoeven]

	Hi all,

The Renesas R-Car System Controller, as found in various Renesas R-Car
SoCs, provides power management for the CPU cores and various
coprocessors.

This RFC patch series adds DT support for the R-Car SYSC, using the
generic PM Domain. It supports R-Car H1, R-Car Gen2, and R-Car H3.

Patches:
  - Patch 1 adds the DT binding documentation (alternatives I considered
    below the "---"-line),
  - Patch 2 moves the existing pm-rcar driver to drivers/soc/renesas, so
    it can be shared by arm32 and arm64,
  - Patches 3-5 contain the driver implementation,
  - Patches 6-11 add the SYSC PM domains themselves to the various dtsi
    files.

Known issues:
  - This needs better integration with the PM code in pm-rcar-gen2, the
    SMP code in smp-r8a7790, and Magnus' DT APMU series,
  - CPG/MSSR clock domain handling should share more code with the
    renesas-cpg-mssr driver.

Changes compared to v2 (more details in the individual patches):
  - Moved pm-rcar from arch/arm/mach-shmobile/ to drivers/soc/renesas/,
  - Added R-Car H3 (r8a7795) support, incl. support for devices part of
    a SYSC PM domain and the CPG/MSSR clock domain,
  - Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
  - Added fallback compatibility strings for R-Car Gen2 and Gen3.
  - Changed one-line summary prefix to match current arm-soc practices,
  - The L2 cache-controller patches have been extracted into a separate
    series ("[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
    cache-controller nodes"),
  - Minor fixes.

This series is against renesas-devel-20160215-v4.5-rc4, with series
"[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
cache-controller nodes" applied. It is not yet meant to be applied!
It's published as-is to ease development of drivers for devices residing
in a SYSC PM domain on R-Car H3 (e.g. VSP, FCP_V).

This was tested on r8a7779/marzen, r8a7791/koelsch, r8a7794/alt, and
r8a7795/salvator-x.

For your convenience, I've also pushed this series to
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git#topic/rcar-sysc-pd-rfc-v2

Thanks for your comments!

Geert Uytterhoeven (11):
  PM / Domains: Add DT bindings for the R-Car System Controller
  soc: renesas: Move pm-rcar to drivers/soc/renesas/
  soc: renesas: Improve rcar_sysc_power() debug info
  soc: renesas: rcar: Add DT support for SYSC PM domains
  soc: renesas: rcar: Handle clock domain devices in SYSC PM domains
  ARM: dts: r8a7779: Add SYSC PM domains
  ARM: dts: r8a7790: Add SYSC PM domains
  ARM: dts: r8a7791: Add SYSC PM domains
  ARM: dts: r8a7793: Add SYSC PM domains
  ARM: dts: r8a7794: Add SYSC PM domains
  arm64: dts: r8a7795: Add SYSC PM domains

 .../bindings/power/renesas,sysc-rcar.txt           |  87 ++++
 arch/arm/boot/dts/r8a7779.dtsi                     |  48 ++
 arch/arm/boot/dts/r8a7790.dtsi                     |  89 ++++
 arch/arm/boot/dts/r8a7791.dtsi                     |  40 ++
 arch/arm/boot/dts/r8a7793.dtsi                     |  39 ++
 arch/arm/boot/dts/r8a7794.dtsi                     |  40 ++
 arch/arm/mach-shmobile/Kconfig                     |   8 +-
 arch/arm/mach-shmobile/Makefile                    |   1 -
 arch/arm/mach-shmobile/pm-r8a7779.c                |   3 +-
 arch/arm/mach-shmobile/pm-rcar-gen2.c              |   2 +-
 arch/arm/mach-shmobile/pm-rcar.c                   | 164 ------
 arch/arm/mach-shmobile/smp-r8a7779.c               |   2 +-
 arch/arm/mach-shmobile/smp-r8a7790.c               |   2 +-
 arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 142 ++++++
 drivers/soc/Kconfig                                |   1 +
 drivers/soc/Makefile                               |   3 +-
 drivers/soc/renesas/Kconfig                        |   8 +
 drivers/soc/renesas/Makefile                       |   1 +
 drivers/soc/renesas/pm-rcar.c                      | 559 +++++++++++++++++++++
 .../linux/soc/renesas}/pm-rcar.h                   |   2 +
 20 files changed, 1065 insertions(+), 176 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
 delete mode 100644 arch/arm/mach-shmobile/pm-rcar.c
 create mode 100644 drivers/soc/renesas/Kconfig
 create mode 100644 drivers/soc/renesas/Makefile
 create mode 100644 drivers/soc/renesas/pm-rcar.c
 rename {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h (93%)

-- 
1.9.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Geert Uytterhoeven]

	Hi all,

The Renesas R-Car System Controller, as found in various Renesas R-Car
SoCs, provides power management for the CPU cores and various
coprocessors.

This RFC patch series adds DT support for the R-Car SYSC, using the
generic PM Domain. It supports R-Car H1, R-Car Gen2, and R-Car H3.

Patches:
  - Patch 1 adds the DT binding documentation (alternatives I considered
    below the "---"-line),
  - Patch 2 moves the existing pm-rcar driver to drivers/soc/renesas, so
    it can be shared by arm32 and arm64,
  - Patches 3-5 contain the driver implementation,
  - Patches 6-11 add the SYSC PM domains themselves to the various dtsi
    files.

Known issues:
  - This needs better integration with the PM code in pm-rcar-gen2, the
    SMP code in smp-r8a7790, and Magnus' DT APMU series,
  - CPG/MSSR clock domain handling should share more code with the
    renesas-cpg-mssr driver.

Changes compared to v2 (more details in the individual patches):
  - Moved pm-rcar from arch/arm/mach-shmobile/ to drivers/soc/renesas/,
  - Added R-Car H3 (r8a7795) support, incl. support for devices part of
    a SYSC PM domain and the CPG/MSSR clock domain,
  - Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
  - Added fallback compatibility strings for R-Car Gen2 and Gen3.
  - Changed one-line summary prefix to match current arm-soc practices,
  - The L2 cache-controller patches have been extracted into a separate
    series ("[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
    cache-controller nodes"),
  - Minor fixes.

This series is against renesas-devel-20160215-v4.5-rc4, with series
"[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
cache-controller nodes" applied. It is not yet meant to be applied!
It's published as-is to ease development of drivers for devices residing
in a SYSC PM domain on R-Car H3 (e.g. VSP, FCP_V).

This was tested on r8a7779/marzen, r8a7791/koelsch, r8a7794/alt, and
r8a7795/salvator-x.

For your convenience, I've also pushed this series to
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git#topic/rcar-sysc-pd-rfc-v2

Thanks for your comments!

Geert Uytterhoeven (11):
  PM / Domains: Add DT bindings for the R-Car System Controller
  soc: renesas: Move pm-rcar to drivers/soc/renesas/
  soc: renesas: Improve rcar_sysc_power() debug info
  soc: renesas: rcar: Add DT support for SYSC PM domains
  soc: renesas: rcar: Handle clock domain devices in SYSC PM domains
  ARM: dts: r8a7779: Add SYSC PM domains
  ARM: dts: r8a7790: Add SYSC PM domains
  ARM: dts: r8a7791: Add SYSC PM domains
  ARM: dts: r8a7793: Add SYSC PM domains
  ARM: dts: r8a7794: Add SYSC PM domains
  arm64: dts: r8a7795: Add SYSC PM domains

 .../bindings/power/renesas,sysc-rcar.txt           |  87 ++++
 arch/arm/boot/dts/r8a7779.dtsi                     |  48 ++
 arch/arm/boot/dts/r8a7790.dtsi                     |  89 ++++
 arch/arm/boot/dts/r8a7791.dtsi                     |  40 ++
 arch/arm/boot/dts/r8a7793.dtsi                     |  39 ++
 arch/arm/boot/dts/r8a7794.dtsi                     |  40 ++
 arch/arm/mach-shmobile/Kconfig                     |   8 +-
 arch/arm/mach-shmobile/Makefile                    |   1 -
 arch/arm/mach-shmobile/pm-r8a7779.c                |   3 +-
 arch/arm/mach-shmobile/pm-rcar-gen2.c              |   2 +-
 arch/arm/mach-shmobile/pm-rcar.c                   | 164 ------
 arch/arm/mach-shmobile/smp-r8a7779.c               |   2 +-
 arch/arm/mach-shmobile/smp-r8a7790.c               |   2 +-
 arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 142 ++++++
 drivers/soc/Kconfig                                |   1 +
 drivers/soc/Makefile                               |   3 +-
 drivers/soc/renesas/Kconfig                        |   8 +
 drivers/soc/renesas/Makefile                       |   1 +
 drivers/soc/renesas/pm-rcar.c                      | 559 +++++++++++++++++++++
 .../linux/soc/renesas}/pm-rcar.h                   |   2 +
 20 files changed, 1065 insertions(+), 176 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
 delete mode 100644 arch/arm/mach-shmobile/pm-rcar.c
 create mode 100644 drivers/soc/renesas/Kconfig
 create mode 100644 drivers/soc/renesas/Makefile
 create mode 100644 drivers/soc/renesas/pm-rcar.c
 rename {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h (93%)

-- 
1.9.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Geert Uytterhoeven]

The Renesas R-Car System Controller provides power management for the
CPU cores and various coprocessors, following the generic PM domain
bindings in Documentation/devicetree/bindings/power/power_domain.txt.

This supports R-Car Gen1, Gen2, and Gen3.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Alternatives I considered:

  - Using a single node per power register block, even if it contains
    multiple domains, e.g.:

	    pd_ca15_scu: ca15_scu@180 {
		    reg = <0x180 0x20>;
		    #address-cells = <1>;
		    #size-cells = <0>;
		    #power-domain-cells = <0>;
		    renesas,interrupt-bits = <12>;

		    pd_ca15_cpu: ca15_cpu@40 {
			    reg = <0x40 0x20>;
			    #power-domain-cells = <1>;
			    renesas,pm-domain-indices = <0 1>;
			    renesas,pm-domain-names =
				    "ca15_cpu0", "ca15_cpu1";
			    renesas,interrupt-bits = <0 1>;
		    };
	    };

    Notes:
      - You cannot just have a property with the number of domains, as
	index 0 is not used on R-Car H1. Hence the need for
	"renesas,pm-domain-indices" and "renesas,interrupt-bits",
      - "#power-domain-cells = <1>" for nodes with multiple domains,
	which allows typos in "power-domains = <&pd_ca15_cpu n>", using
	an invalid value of "n".

  - Using a linear description in DT:
      - Needs parent links for subdomains,
      - More complicated to parse (lesson learned from R-Mobile PM
	Domain support).

  - Keeping the power register block offset and the bit number as separate
    "reg" cells, increasing "#address-cells" from 2 to 3,

  - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
    cell, decreasing "#address-cells" from 2 to 1.

v2:
  - Add R-Car H3 (r8a7795) support,
  - Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
  - Add fallback compatibility strings for R-Car Gen2 and Gen3.
---
 .../bindings/power/renesas,sysc-rcar.txt           | 87 ++++++++++++++++++++++
 1 file changed, 87 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt

diff --git a/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
new file mode 100644
index 0000000000000000..92ddc0da7b755215
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
@@ -0,0 +1,87 @@
+DT bindings for the Renesas R-Car System Controller
+
+== System Controller Node ==
+
+The R-Car System Controller provides power management for the CPU cores and
+various coprocessors.
+
+Required properties:
+  - compatible: Must contain one or more of the following:
+      - "renesas,r8a7779-sysc" (R-Car H1)
+      - "renesas,r8a7790-sysc" (R-Car H2)
+      - "renesas,r8a7791-sysc" (R-Car M2-W)
+      - "renesas,r8a7792-sysc" (R-Car V2H)
+      - "renesas,r8a7793-sysc" (R-Car M2-N)
+      - "renesas,r8a7794-sysc" (R-Car E2)
+      - "renesas,r8a7795-sysc" (R-Car H3)
+      - "renesas,rcar-gen2-sysc" (Generic R-Car Gen2)
+      - "renesas,rcar-gen3-sysc" (Generic R-Car Gen3)
+    When compatible with the generic version, nodes must list the SoC-specific
+    version corresponding to the platform first, followed by the generic
+    version.
+  - reg: Address start and address range for the device.
+  - pm-domains: This node contains a hierarchy of PM Domain Nodes.
+    Dependencies (e.g. parent SCUs should not be powered off while child CPUs
+    are on) should be reflected using subnodes.
+
+
+== PM Domain Nodes ==
+
+Each of the PM domain nodes represents a PM domain, as documented by the
+generic PM domain bindings in
+Documentation/devicetree/bindings/power/power_domain.txt.
+
+Required properties:
+  - #power-domain-cells: Must be 0.
+  - reg: This property must contain 2 values:
+	   - The first value is the number of the interrupt bit representing
+	     the power area in the various Interrupt Registers (e.g. SYSCISR,
+	     Interrupt Status Register),
+	   - The second value encodes the power register block offset (which is
+	     a multiple of 64), and the number of the bit representing the
+	     power area in the various Power Control Registers (e.g. PWROFFSR,
+	     Power Shutoff Status Register). This value is created by ORing
+	     these two numbers.
+	 The parent's node must contain the following two properties:
+	   - #address-cells: Must be 2,
+	   - #size-cells: Must be 0.
+
+
+Example:
+
+	sysc: system-controller@e6180000 {
+		compatible = "renesas,r8a7791-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu@12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu@0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu@1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh@16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx@20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
-- 
1.9.1

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Geert Uytterhoeven]

The Renesas R-Car System Controller provides power management for the
CPU cores and various coprocessors, following the generic PM domain
bindings in Documentation/devicetree/bindings/power/power_domain.txt.

This supports R-Car Gen1, Gen2, and Gen3.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Alternatives I considered:

  - Using a single node per power register block, even if it contains
    multiple domains, e.g.:

	    pd_ca15_scu: ca15_scu at 180 {
		    reg = <0x180 0x20>;
		    #address-cells = <1>;
		    #size-cells = <0>;
		    #power-domain-cells = <0>;
		    renesas,interrupt-bits = <12>;

		    pd_ca15_cpu: ca15_cpu at 40 {
			    reg = <0x40 0x20>;
			    #power-domain-cells = <1>;
			    renesas,pm-domain-indices = <0 1>;
			    renesas,pm-domain-names =
				    "ca15_cpu0", "ca15_cpu1";
			    renesas,interrupt-bits = <0 1>;
		    };
	    };

    Notes:
      - You cannot just have a property with the number of domains, as
	index 0 is not used on R-Car H1. Hence the need for
	"renesas,pm-domain-indices" and "renesas,interrupt-bits",
      - "#power-domain-cells = <1>" for nodes with multiple domains,
	which allows typos in "power-domains = <&pd_ca15_cpu n>", using
	an invalid value of "n".

  - Using a linear description in DT:
      - Needs parent links for subdomains,
      - More complicated to parse (lesson learned from R-Mobile PM
	Domain support).

  - Keeping the power register block offset and the bit number as separate
    "reg" cells, increasing "#address-cells" from 2 to 3,

  - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
    cell, decreasing "#address-cells" from 2 to 1.

v2:
  - Add R-Car H3 (r8a7795) support,
  - Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
  - Add fallback compatibility strings for R-Car Gen2 and Gen3.
---
 .../bindings/power/renesas,sysc-rcar.txt           | 87 ++++++++++++++++++++++
 1 file changed, 87 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt

diff --git a/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
new file mode 100644
index 0000000000000000..92ddc0da7b755215
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
@@ -0,0 +1,87 @@
+DT bindings for the Renesas R-Car System Controller
+
+== System Controller Node ==
+
+The R-Car System Controller provides power management for the CPU cores and
+various coprocessors.
+
+Required properties:
+  - compatible: Must contain one or more of the following:
+      - "renesas,r8a7779-sysc" (R-Car H1)
+      - "renesas,r8a7790-sysc" (R-Car H2)
+      - "renesas,r8a7791-sysc" (R-Car M2-W)
+      - "renesas,r8a7792-sysc" (R-Car V2H)
+      - "renesas,r8a7793-sysc" (R-Car M2-N)
+      - "renesas,r8a7794-sysc" (R-Car E2)
+      - "renesas,r8a7795-sysc" (R-Car H3)
+      - "renesas,rcar-gen2-sysc" (Generic R-Car Gen2)
+      - "renesas,rcar-gen3-sysc" (Generic R-Car Gen3)
+    When compatible with the generic version, nodes must list the SoC-specific
+    version corresponding to the platform first, followed by the generic
+    version.
+  - reg: Address start and address range for the device.
+  - pm-domains: This node contains a hierarchy of PM Domain Nodes.
+    Dependencies (e.g. parent SCUs should not be powered off while child CPUs
+    are on) should be reflected using subnodes.
+
+
+== PM Domain Nodes ==
+
+Each of the PM domain nodes represents a PM domain, as documented by the
+generic PM domain bindings in
+Documentation/devicetree/bindings/power/power_domain.txt.
+
+Required properties:
+  - #power-domain-cells: Must be 0.
+  - reg: This property must contain 2 values:
+	   - The first value is the number of the interrupt bit representing
+	     the power area in the various Interrupt Registers (e.g. SYSCISR,
+	     Interrupt Status Register),
+	   - The second value encodes the power register block offset (which is
+	     a multiple of 64), and the number of the bit representing the
+	     power area in the various Power Control Registers (e.g. PWROFFSR,
+	     Power Shutoff Status Register). This value is created by ORing
+	     these two numbers.
+	 The parent's node must contain the following two properties:
+	   - #address-cells: Must be 2,
+	   - #size-cells: Must be 0.
+
+
+Example:
+
+	sysc: system-controller at e6180000 {
+		compatible = "renesas,r8a7791-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu at 12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu at 0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu at 1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh at 16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx at 20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
-- 
1.9.1

Re: [PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:50 Geert Uytterhoeven wrote:
> The Renesas R-Car System Controller provides power management for the
> CPU cores and various coprocessors, following the generic PM domain
> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> 
> This supports R-Car Gen1, Gen2, and Gen3.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Alternatives I considered:
> 
>   - Using a single node per power register block, even if it contains
>     multiple domains, e.g.:
> 
> 	    pd_ca15_scu: ca15_scu@180 {
> 		    reg = <0x180 0x20>;
> 		    #address-cells = <1>;
> 		    #size-cells = <0>;
> 		    #power-domain-cells = <0>;
> 		    renesas,interrupt-bits = <12>;
> 
> 		    pd_ca15_cpu: ca15_cpu@40 {
> 			    reg = <0x40 0x20>;
> 			    #power-domain-cells = <1>;
> 			    renesas,pm-domain-indices = <0 1>;
> 			    renesas,pm-domain-names =
> 				    "ca15_cpu0", "ca15_cpu1";
> 			    renesas,interrupt-bits = <0 1>;
> 		    };
> 	    };
> 
>     Notes:
>       - You cannot just have a property with the number of domains, as
> 	index 0 is not used on R-Car H1. Hence the need for
> 	"renesas,pm-domain-indices" and "renesas,interrupt-bits",
>       - "#power-domain-cells = <1>" for nodes with multiple domains,
> 	which allows typos in "power-domains = <&pd_ca15_cpu n>", using
> 	an invalid value of "n".
> 
>   - Using a linear description in DT:
>       - Needs parent links for subdomains,
>       - More complicated to parse (lesson learned from R-Mobile PM
> 	Domain support).
> 
>   - Keeping the power register block offset and the bit number as separate
>     "reg" cells, increasing "#address-cells" from 2 to 3,
>
>   - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
>     cell, decreasing "#address-cells" from 2 to 1.
> 
> v2:
>   - Add R-Car H3 (r8a7795) support,
>   - Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
>   - Add fallback compatibility strings for R-Car Gen2 and Gen3.
> ---
>  .../bindings/power/renesas,sysc-rcar.txt           | 87 +++++++++++++++++++
>  1 file changed, 87 insertions(+) create mode 100644
> Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> 
> diff --git a/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt new file
> mode 100644
> index 0000000000000000..92ddc0da7b755215
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> @@ -0,0 +1,87 @@
> +DT bindings for the Renesas R-Car System Controller
> +
> +== System Controller Node ==
> +
> +The R-Car System Controller provides power management for the CPU cores and
> +various coprocessors.
> +
> +Required properties:
> +  - compatible: Must contain one or more of the following:
> +      - "renesas,r8a7779-sysc" (R-Car H1)
> +      - "renesas,r8a7790-sysc" (R-Car H2)
> +      - "renesas,r8a7791-sysc" (R-Car M2-W)
> +      - "renesas,r8a7792-sysc" (R-Car V2H)
> +      - "renesas,r8a7793-sysc" (R-Car M2-N)
> +      - "renesas,r8a7794-sysc" (R-Car E2)
> +      - "renesas,r8a7795-sysc" (R-Car H3)
> +      - "renesas,rcar-gen2-sysc" (Generic R-Car Gen2)
> +      - "renesas,rcar-gen3-sysc" (Generic R-Car Gen3)
> +    When compatible with the generic version, nodes must list the
> SoC-specific
> +    version corresponding to the platform first, followed by the generic
> +    version.
> +  - reg: Address start and address range for the device.

This isn't correct. I'll refrain from saying we abuse the reg property, as 
using the first cell as a power domain number should be fine (the second cell 
feels a bit more of an abuse to me though, but I won't complain too much), but 
the bindings document should describe what the reg cells contain.

> +  - pm-domains: This node contains a hierarchy of PM Domain Nodes.

Can't it be an issue that the node happens to have the same name as the 
standard pm-domains property ?

> +    Dependencies (e.g. parent SCUs should not be powered off while child
> CPUs
> +    are on) should be reflected using subnodes.
> +
> +
> +== PM Domain Nodes ==
> +
> +Each of the PM domain nodes represents a PM domain, as documented by the
> +generic PM domain bindings in
> +Documentation/devicetree/bindings/power/power_domain.txt.
> +
> +Required properties:
> +  - #power-domain-cells: Must be 0.
> +  - reg: This property must contain 2 values:
> +	   - The first value is the number of the interrupt bit representing
> +	     the power area in the various Interrupt Registers (e.g. SYSCISR,
> +	     Interrupt Status Register),
> +	   - The second value encodes the power register block offset (which is
> +	     a multiple of 64), and the number of the bit representing the
> +	     power area in the various Power Control Registers (e.g. PWROFFSR,
> +	     Power Shutoff Status Register). This value is created by ORing
> +	     these two numbers.
> +	 The parent's node must contain the following two properties:
> +	   - #address-cells: Must be 2,
> +	   - #size-cells: Must be 0.
> +
> +
> +Example:
> +
> +	sysc: system-controller@e6180000 {
> +		compatible = "renesas,r8a7791-sysc", "renesas,rcar-gen2-sysc";
> +		reg = <0 0xe6180000 0 0x0200>;
> +
> +		pm-domains {
> +			#address-cells = <2>;
> +			#size-cells = <0>;
> +
> +			pd_ca15_scu: scu@12 {
> +				reg = <12 0x180>;
> +				#address-cells = <2>;
> +				#size-cells = <0>;
> +				#power-domain-cells = <0>;
> +
> +				pd_ca15_cpu0: cpu@0 {
> +					reg = <0 0x40>;
> +					#power-domain-cells = <0>;
> +				};
> +
> +				pd_ca15_cpu1: cpu@1 {
> +					reg = <1 0x41>;
> +					#power-domain-cells = <0>;
> +				};
> +			};
> +
> +			pd_sh: sh@16 {
> +				reg = <16 0x80>;
> +				#power-domain-cells = <0>;
> +			};
> +
> +			pd_sgx: sgx@20 {
> +				reg = <20 0xc0>;
> +				#power-domain-cells = <0>;
> +			};
> +		};
> +	};

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:50 Geert Uytterhoeven wrote:
> The Renesas R-Car System Controller provides power management for the
> CPU cores and various coprocessors, following the generic PM domain
> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> 
> This supports R-Car Gen1, Gen2, and Gen3.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Alternatives I considered:
> 
>   - Using a single node per power register block, even if it contains
>     multiple domains, e.g.:
> 
> 	    pd_ca15_scu: ca15_scu at 180 {
> 		    reg = <0x180 0x20>;
> 		    #address-cells = <1>;
> 		    #size-cells = <0>;
> 		    #power-domain-cells = <0>;
> 		    renesas,interrupt-bits = <12>;
> 
> 		    pd_ca15_cpu: ca15_cpu at 40 {
> 			    reg = <0x40 0x20>;
> 			    #power-domain-cells = <1>;
> 			    renesas,pm-domain-indices = <0 1>;
> 			    renesas,pm-domain-names =
> 				    "ca15_cpu0", "ca15_cpu1";
> 			    renesas,interrupt-bits = <0 1>;
> 		    };
> 	    };
> 
>     Notes:
>       - You cannot just have a property with the number of domains, as
> 	index 0 is not used on R-Car H1. Hence the need for
> 	"renesas,pm-domain-indices" and "renesas,interrupt-bits",
>       - "#power-domain-cells = <1>" for nodes with multiple domains,
> 	which allows typos in "power-domains = <&pd_ca15_cpu n>", using
> 	an invalid value of "n".
> 
>   - Using a linear description in DT:
>       - Needs parent links for subdomains,
>       - More complicated to parse (lesson learned from R-Mobile PM
> 	Domain support).
> 
>   - Keeping the power register block offset and the bit number as separate
>     "reg" cells, increasing "#address-cells" from 2 to 3,
>
>   - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
>     cell, decreasing "#address-cells" from 2 to 1.
> 
> v2:
>   - Add R-Car H3 (r8a7795) support,
>   - Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
>   - Add fallback compatibility strings for R-Car Gen2 and Gen3.
> ---
>  .../bindings/power/renesas,sysc-rcar.txt           | 87 +++++++++++++++++++
>  1 file changed, 87 insertions(+) create mode 100644
> Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> 
> diff --git a/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt new file
> mode 100644
> index 0000000000000000..92ddc0da7b755215
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> @@ -0,0 +1,87 @@
> +DT bindings for the Renesas R-Car System Controller
> +
> +== System Controller Node ==
> +
> +The R-Car System Controller provides power management for the CPU cores and
> +various coprocessors.
> +
> +Required properties:
> +  - compatible: Must contain one or more of the following:
> +      - "renesas,r8a7779-sysc" (R-Car H1)
> +      - "renesas,r8a7790-sysc" (R-Car H2)
> +      - "renesas,r8a7791-sysc" (R-Car M2-W)
> +      - "renesas,r8a7792-sysc" (R-Car V2H)
> +      - "renesas,r8a7793-sysc" (R-Car M2-N)
> +      - "renesas,r8a7794-sysc" (R-Car E2)
> +      - "renesas,r8a7795-sysc" (R-Car H3)
> +      - "renesas,rcar-gen2-sysc" (Generic R-Car Gen2)
> +      - "renesas,rcar-gen3-sysc" (Generic R-Car Gen3)
> +    When compatible with the generic version, nodes must list the
> SoC-specific
> +    version corresponding to the platform first, followed by the generic
> +    version.
> +  - reg: Address start and address range for the device.

This isn't correct. I'll refrain from saying we abuse the reg property, as 
using the first cell as a power domain number should be fine (the second cell 
feels a bit more of an abuse to me though, but I won't complain too much), but 
the bindings document should describe what the reg cells contain.

> +  - pm-domains: This node contains a hierarchy of PM Domain Nodes.

Can't it be an issue that the node happens to have the same name as the 
standard pm-domains property ?

> +    Dependencies (e.g. parent SCUs should not be powered off while child
> CPUs
> +    are on) should be reflected using subnodes.
> +
> +
> +== PM Domain Nodes ==
> +
> +Each of the PM domain nodes represents a PM domain, as documented by the
> +generic PM domain bindings in
> +Documentation/devicetree/bindings/power/power_domain.txt.
> +
> +Required properties:
> +  - #power-domain-cells: Must be 0.
> +  - reg: This property must contain 2 values:
> +	   - The first value is the number of the interrupt bit representing
> +	     the power area in the various Interrupt Registers (e.g. SYSCISR,
> +	     Interrupt Status Register),
> +	   - The second value encodes the power register block offset (which is
> +	     a multiple of 64), and the number of the bit representing the
> +	     power area in the various Power Control Registers (e.g. PWROFFSR,
> +	     Power Shutoff Status Register). This value is created by ORing
> +	     these two numbers.
> +	 The parent's node must contain the following two properties:
> +	   - #address-cells: Must be 2,
> +	   - #size-cells: Must be 0.
> +
> +
> +Example:
> +
> +	sysc: system-controller at e6180000 {
> +		compatible = "renesas,r8a7791-sysc", "renesas,rcar-gen2-sysc";
> +		reg = <0 0xe6180000 0 0x0200>;
> +
> +		pm-domains {
> +			#address-cells = <2>;
> +			#size-cells = <0>;
> +
> +			pd_ca15_scu: scu at 12 {
> +				reg = <12 0x180>;
> +				#address-cells = <2>;
> +				#size-cells = <0>;
> +				#power-domain-cells = <0>;
> +
> +				pd_ca15_cpu0: cpu at 0 {
> +					reg = <0 0x40>;
> +					#power-domain-cells = <0>;
> +				};
> +
> +				pd_ca15_cpu1: cpu at 1 {
> +					reg = <1 0x41>;
> +					#power-domain-cells = <0>;
> +				};
> +			};
> +
> +			pd_sh: sh at 16 {
> +				reg = <16 0x80>;
> +				#power-domain-cells = <0>;
> +			};
> +
> +			pd_sgx: sgx at 20 {
> +				reg = <20 0xc0>;
> +				#power-domain-cells = <0>;
> +			};
> +		};
> +	};

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Laurent Pinchart]

On Tuesday 16 February 2016 01:08:18 Laurent Pinchart wrote:
> On Monday 15 February 2016 22:16:50 Geert Uytterhoeven wrote:
> > The Renesas R-Car System Controller provides power management for the
> > CPU cores and various coprocessors, following the generic PM domain
> > bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> > 
> > This supports R-Car Gen1, Gen2, and Gen3.
> > 
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---

[snip]
> > 
> >  .../bindings/power/renesas,sysc-rcar.txt           | 87 +++++++++++++++++
> >  1 file changed, 87 insertions(+) create mode 100644
> > 
> > Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> > b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt new file
> > mode 100644
> > index 0000000000000000..92ddc0da7b755215
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> > @@ -0,0 +1,87 @@

[snip]

> > +  - pm-domains: This node contains a hierarchy of PM Domain Nodes.
> 
> Can't it be an issue that the node happens to have the same name as the
> standard pm-domains property ?

Scratch this, it's power-domains, not pm-domains, mybad.

> > +    Dependencies (e.g. parent SCUs should not be powered off while child
> > CPUs
> > +    are on) should be reflected using subnodes.

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Laurent Pinchart]

On Tuesday 16 February 2016 01:08:18 Laurent Pinchart wrote:
> On Monday 15 February 2016 22:16:50 Geert Uytterhoeven wrote:
> > The Renesas R-Car System Controller provides power management for the
> > CPU cores and various coprocessors, following the generic PM domain
> > bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> > 
> > This supports R-Car Gen1, Gen2, and Gen3.
> > 
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---

[snip]
> > 
> >  .../bindings/power/renesas,sysc-rcar.txt           | 87 +++++++++++++++++
> >  1 file changed, 87 insertions(+) create mode 100644
> > 
> > Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> > b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt new file
> > mode 100644
> > index 0000000000000000..92ddc0da7b755215
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
> > @@ -0,0 +1,87 @@

[snip]

> > +  - pm-domains: This node contains a hierarchy of PM Domain Nodes.
> 
> Can't it be an issue that the node happens to have the same name as the
> standard pm-domains property ?

Scratch this, it's power-domains, not pm-domains, mybad.

> > +    Dependencies (e.g. parent SCUs should not be powered off while child
> > CPUs
> > +    are on) should be reflected using subnodes.

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Geert Uytterhoeven]

Hi Laurent,

On Tue, Feb 16, 2016 at 12:08 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
>> @@ -0,0 +1,87 @@
>> +DT bindings for the Renesas R-Car System Controller
>> +
>> +== System Controller Node ==
>> +
>> +The R-Car System Controller provides power management for the CPU cores and
>> +various coprocessors.
>> +
>> +Required properties:
>> +  - compatible: Must contain one or more of the following:
>> +      - "renesas,r8a7779-sysc" (R-Car H1)
>> +      - "renesas,r8a7790-sysc" (R-Car H2)
>> +      - "renesas,r8a7791-sysc" (R-Car M2-W)
>> +      - "renesas,r8a7792-sysc" (R-Car V2H)
>> +      - "renesas,r8a7793-sysc" (R-Car M2-N)
>> +      - "renesas,r8a7794-sysc" (R-Car E2)
>> +      - "renesas,r8a7795-sysc" (R-Car H3)
>> +      - "renesas,rcar-gen2-sysc" (Generic R-Car Gen2)
>> +      - "renesas,rcar-gen3-sysc" (Generic R-Car Gen3)
>> +    When compatible with the generic version, nodes must list the
>> SoC-specific
>> +    version corresponding to the platform first, followed by the generic
>> +    version.
>> +  - reg: Address start and address range for the device.

You're quoting the description of the "reg" property for the SYSC device node...

> This isn't correct. I'll refrain from saying we abuse the reg property, as
> using the first cell as a power domain number should be fine (the second cell
> feels a bit more of an abuse to me though, but I won't complain too much), but
> the bindings document should describe what the reg cells contain.

... while the two cell format is for the PM domain nodes, not for the
SYSC device
node. Please check the other "reg" description.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Geert Uytterhoeven]

Hi Laurent,

On Tue, Feb 16, 2016 at 12:08 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt
>> @@ -0,0 +1,87 @@
>> +DT bindings for the Renesas R-Car System Controller
>> +
>> +== System Controller Node ==
>> +
>> +The R-Car System Controller provides power management for the CPU cores and
>> +various coprocessors.
>> +
>> +Required properties:
>> +  - compatible: Must contain one or more of the following:
>> +      - "renesas,r8a7779-sysc" (R-Car H1)
>> +      - "renesas,r8a7790-sysc" (R-Car H2)
>> +      - "renesas,r8a7791-sysc" (R-Car M2-W)
>> +      - "renesas,r8a7792-sysc" (R-Car V2H)
>> +      - "renesas,r8a7793-sysc" (R-Car M2-N)
>> +      - "renesas,r8a7794-sysc" (R-Car E2)
>> +      - "renesas,r8a7795-sysc" (R-Car H3)
>> +      - "renesas,rcar-gen2-sysc" (Generic R-Car Gen2)
>> +      - "renesas,rcar-gen3-sysc" (Generic R-Car Gen3)
>> +    When compatible with the generic version, nodes must list the
>> SoC-specific
>> +    version corresponding to the platform first, followed by the generic
>> +    version.
>> +  - reg: Address start and address range for the device.

You're quoting the description of the "reg" property for the SYSC device node...

> This isn't correct. I'll refrain from saying we abuse the reg property, as
> using the first cell as a power domain number should be fine (the second cell
> feels a bit more of an abuse to me though, but I won't complain too much), but
> the bindings document should describe what the reg cells contain.

... while the two cell format is for the PM domain nodes, not for the
SYSC device
node. Please check the other "reg" description.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Rob Herring]

On Mon, Feb 15, 2016 at 10:16:50PM +0100, Geert Uytterhoeven wrote:
> The Renesas R-Car System Controller provides power management for the
> CPU cores and various coprocessors, following the generic PM domain
> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> 
> This supports R-Car Gen1, Gen2, and Gen3.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Alternatives I considered:
> 
>   - Using a single node per power register block, even if it contains
>     multiple domains, e.g.:
> 
> 	    pd_ca15_scu: ca15_scu@180 {
> 		    reg = <0x180 0x20>;
> 		    #address-cells = <1>;
> 		    #size-cells = <0>;
> 		    #power-domain-cells = <0>;
> 		    renesas,interrupt-bits = <12>;
> 
> 		    pd_ca15_cpu: ca15_cpu@40 {
> 			    reg = <0x40 0x20>;
> 			    #power-domain-cells = <1>;
> 			    renesas,pm-domain-indices = <0 1>;
> 			    renesas,pm-domain-names =
> 				    "ca15_cpu0", "ca15_cpu1";
> 			    renesas,interrupt-bits = <0 1>;
> 		    };
> 	    };
> 
>     Notes:
>       - You cannot just have a property with the number of domains, as
> 	index 0 is not used on R-Car H1. Hence the need for
> 	"renesas,pm-domain-indices" and "renesas,interrupt-bits",
>       - "#power-domain-cells = <1>" for nodes with multiple domains,
> 	which allows typos in "power-domains = <&pd_ca15_cpu n>", using
> 	an invalid value of "n".
> 
>   - Using a linear description in DT:
>       - Needs parent links for subdomains,
>       - More complicated to parse (lesson learned from R-Mobile PM
> 	Domain support).
> 
>   - Keeping the power register block offset and the bit number as separate
>     "reg" cells, increasing "#address-cells" from 2 to 3,
> 
>   - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
>     cell, decreasing "#address-cells" from 2 to 1.

I think I'd move to not encoding mulitple things into reg. This seems 
like a bit of abuse of reg. Otherwise, I don't have much to comment on.

Rob

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Rob Herring]

On Mon, Feb 15, 2016 at 10:16:50PM +0100, Geert Uytterhoeven wrote:
> The Renesas R-Car System Controller provides power management for the
> CPU cores and various coprocessors, following the generic PM domain
> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> 
> This supports R-Car Gen1, Gen2, and Gen3.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Alternatives I considered:
> 
>   - Using a single node per power register block, even if it contains
>     multiple domains, e.g.:
> 
> 	    pd_ca15_scu: ca15_scu at 180 {
> 		    reg = <0x180 0x20>;
> 		    #address-cells = <1>;
> 		    #size-cells = <0>;
> 		    #power-domain-cells = <0>;
> 		    renesas,interrupt-bits = <12>;
> 
> 		    pd_ca15_cpu: ca15_cpu at 40 {
> 			    reg = <0x40 0x20>;
> 			    #power-domain-cells = <1>;
> 			    renesas,pm-domain-indices = <0 1>;
> 			    renesas,pm-domain-names =
> 				    "ca15_cpu0", "ca15_cpu1";
> 			    renesas,interrupt-bits = <0 1>;
> 		    };
> 	    };
> 
>     Notes:
>       - You cannot just have a property with the number of domains, as
> 	index 0 is not used on R-Car H1. Hence the need for
> 	"renesas,pm-domain-indices" and "renesas,interrupt-bits",
>       - "#power-domain-cells = <1>" for nodes with multiple domains,
> 	which allows typos in "power-domains = <&pd_ca15_cpu n>", using
> 	an invalid value of "n".
> 
>   - Using a linear description in DT:
>       - Needs parent links for subdomains,
>       - More complicated to parse (lesson learned from R-Mobile PM
> 	Domain support).
> 
>   - Keeping the power register block offset and the bit number as separate
>     "reg" cells, increasing "#address-cells" from 2 to 3,
> 
>   - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
>     cell, decreasing "#address-cells" from 2 to 1.

I think I'd move to not encoding mulitple things into reg. This seems 
like a bit of abuse of reg. Otherwise, I don't have much to comment on.

Rob

Re: [PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Geert Uytterhoeven]

Hi Rob,

On Thu, Feb 18, 2016 at 3:38 PM, Rob Herring <robh@kernel.org> wrote:
> On Mon, Feb 15, 2016 at 10:16:50PM +0100, Geert Uytterhoeven wrote:
>> The Renesas R-Car System Controller provides power management for the
>> CPU cores and various coprocessors, following the generic PM domain
>> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
>>
>> This supports R-Car Gen1, Gen2, and Gen3.
>>
>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> ---
>> Alternatives I considered:
>>
>>   - Using a single node per power register block, even if it contains
>>     multiple domains, e.g.:
>>
>>           pd_ca15_scu: ca15_scu@180 {
>>                   reg = <0x180 0x20>;
>>                   #address-cells = <1>;
>>                   #size-cells = <0>;
>>                   #power-domain-cells = <0>;
>>                   renesas,interrupt-bits = <12>;
>>
>>                   pd_ca15_cpu: ca15_cpu@40 {
>>                           reg = <0x40 0x20>;
>>                           #power-domain-cells = <1>;
>>                           renesas,pm-domain-indices = <0 1>;
>>                           renesas,pm-domain-names =
>>                                   "ca15_cpu0", "ca15_cpu1";
>>                           renesas,interrupt-bits = <0 1>;
>>                   };
>>           };
>>
>>     Notes:
>>       - You cannot just have a property with the number of domains, as
>>       index 0 is not used on R-Car H1. Hence the need for
>>       "renesas,pm-domain-indices" and "renesas,interrupt-bits",
>>       - "#power-domain-cells = <1>" for nodes with multiple domains,
>>       which allows typos in "power-domains = <&pd_ca15_cpu n>", using
>>       an invalid value of "n".
>>
>>   - Using a linear description in DT:
>>       - Needs parent links for subdomains,
>>       - More complicated to parse (lesson learned from R-Mobile PM
>>       Domain support).
>>
>>   - Keeping the power register block offset and the bit number as separate
>>     "reg" cells, increasing "#address-cells" from 2 to 3,
>>
>>   - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
>>     cell, decreasing "#address-cells" from 2 to 1.
>
> I think I'd move to not encoding mulitple things into reg. This seems
> like a bit of abuse of reg. Otherwise, I don't have much to comment on.

Thanks!

(quoting the encoding of the reg properties)
> +== PM Domain Nodes ==
> +
> +Each of the PM domain nodes represents a PM domain, as documented by the
> +generic PM domain bindings in
> +Documentation/devicetree/bindings/power/power_domain.txt.
> +
> +Required properties:
> +  - #power-domain-cells: Must be 0.
> +  - reg: This property must contain 2 values:
> +          - The first value is the number of the interrupt bit representing
> +            the power area in the various Interrupt Registers (e.g. SYSCISR,
> +            Interrupt Status Register),
> +          - The second value encodes the power register block offset (which is
> +            a multiple of 64), and the number of the bit representing the
> +            power area in the various Power Control Registers (e.g. PWROFFSR,
> +            Power Shutoff Status Register). This value is created by ORing
> +            these two numbers.

Not encoding multiple things into reg means adding more properties to provide
that information, iff we want to describe the PM Domain Nodes in DT.
I considered the reg property a two-dimensional address space.

Taking the lessons from CCF and the new CPG/MSSR bindings into account
(which was BTW designed after the SYSC DT bindings), perhaps the PM Domain
hierarchy should be moved from DT to C, in the driver, too?

That would mean we have in DT:
  1) "#power-domain-cells = <1>"
  2) defines for the various domains, e.g. "#define R8A7791_PD_CA15_SCU      12"
  3) e.g. "power-domains = <&sysc R8A7791_PD_CA15_SCU>"
  4) and we can get rid of the fallback compatibility strings again.

Thoughts?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Geert Uytterhoeven]

Hi Rob,

On Thu, Feb 18, 2016 at 3:38 PM, Rob Herring <robh@kernel.org> wrote:
> On Mon, Feb 15, 2016 at 10:16:50PM +0100, Geert Uytterhoeven wrote:
>> The Renesas R-Car System Controller provides power management for the
>> CPU cores and various coprocessors, following the generic PM domain
>> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
>>
>> This supports R-Car Gen1, Gen2, and Gen3.
>>
>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> ---
>> Alternatives I considered:
>>
>>   - Using a single node per power register block, even if it contains
>>     multiple domains, e.g.:
>>
>>           pd_ca15_scu: ca15_scu at 180 {
>>                   reg = <0x180 0x20>;
>>                   #address-cells = <1>;
>>                   #size-cells = <0>;
>>                   #power-domain-cells = <0>;
>>                   renesas,interrupt-bits = <12>;
>>
>>                   pd_ca15_cpu: ca15_cpu at 40 {
>>                           reg = <0x40 0x20>;
>>                           #power-domain-cells = <1>;
>>                           renesas,pm-domain-indices = <0 1>;
>>                           renesas,pm-domain-names =
>>                                   "ca15_cpu0", "ca15_cpu1";
>>                           renesas,interrupt-bits = <0 1>;
>>                   };
>>           };
>>
>>     Notes:
>>       - You cannot just have a property with the number of domains, as
>>       index 0 is not used on R-Car H1. Hence the need for
>>       "renesas,pm-domain-indices" and "renesas,interrupt-bits",
>>       - "#power-domain-cells = <1>" for nodes with multiple domains,
>>       which allows typos in "power-domains = <&pd_ca15_cpu n>", using
>>       an invalid value of "n".
>>
>>   - Using a linear description in DT:
>>       - Needs parent links for subdomains,
>>       - More complicated to parse (lesson learned from R-Mobile PM
>>       Domain support).
>>
>>   - Keeping the power register block offset and the bit number as separate
>>     "reg" cells, increasing "#address-cells" from 2 to 3,
>>
>>   - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
>>     cell, decreasing "#address-cells" from 2 to 1.
>
> I think I'd move to not encoding mulitple things into reg. This seems
> like a bit of abuse of reg. Otherwise, I don't have much to comment on.

Thanks!

(quoting the encoding of the reg properties)
> +== PM Domain Nodes ==
> +
> +Each of the PM domain nodes represents a PM domain, as documented by the
> +generic PM domain bindings in
> +Documentation/devicetree/bindings/power/power_domain.txt.
> +
> +Required properties:
> +  - #power-domain-cells: Must be 0.
> +  - reg: This property must contain 2 values:
> +          - The first value is the number of the interrupt bit representing
> +            the power area in the various Interrupt Registers (e.g. SYSCISR,
> +            Interrupt Status Register),
> +          - The second value encodes the power register block offset (which is
> +            a multiple of 64), and the number of the bit representing the
> +            power area in the various Power Control Registers (e.g. PWROFFSR,
> +            Power Shutoff Status Register). This value is created by ORing
> +            these two numbers.

Not encoding multiple things into reg means adding more properties to provide
that information, iff we want to describe the PM Domain Nodes in DT.
I considered the reg property a two-dimensional address space.

Taking the lessons from CCF and the new CPG/MSSR bindings into account
(which was BTW designed after the SYSC DT bindings), perhaps the PM Domain
hierarchy should be moved from DT to C, in the driver, too?

That would mean we have in DT:
  1) "#power-domain-cells = <1>"
  2) defines for the various domains, e.g. "#define R8A7791_PD_CA15_SCU      12"
  3) e.g. "power-domains = <&sysc R8A7791_PD_CA15_SCU>"
  4) and we can get rid of the fallback compatibility strings again.

Thoughts?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Laurent Pinchart]

Hi Geert,

On Thursday 18 February 2016 18:18:56 Geert Uytterhoeven wrote:
> On Thu, Feb 18, 2016 at 3:38 PM, Rob Herring <robh@kernel.org> wrote:
> > On Mon, Feb 15, 2016 at 10:16:50PM +0100, Geert Uytterhoeven wrote:
> >> The Renesas R-Car System Controller provides power management for the
> >> CPU cores and various coprocessors, following the generic PM domain
> >> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> >> 
> >> This supports R-Car Gen1, Gen2, and Gen3.
> >> 
> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >> ---
> >> 
> >> Alternatives I considered:
> >>   - Using a single node per power register block, even if it contains
> >>     multiple domains, e.g.:
> >>           pd_ca15_scu: ca15_scu@180 {
> >>                   reg = <0x180 0x20>;
> >>                   #address-cells = <1>;
> >>                   #size-cells = <0>;
> >>                   #power-domain-cells = <0>;
> >>                   renesas,interrupt-bits = <12>;
> >>                   
> >>                   pd_ca15_cpu: ca15_cpu@40 {
> >>                           reg = <0x40 0x20>;
> >>                           #power-domain-cells = <1>;
> >>                           renesas,pm-domain-indices = <0 1>;
> >>                           renesas,pm-domain-names =
> >>                                   "ca15_cpu0", "ca15_cpu1";
> >>                           renesas,interrupt-bits = <0 1>;
> >>                   };
> >>           };
> >>     
> >>     Notes:
> >>       - You cannot just have a property with the number of domains, as
> >>       index 0 is not used on R-Car H1. Hence the need for
> >>       "renesas,pm-domain-indices" and "renesas,interrupt-bits",
> >>       - "#power-domain-cells = <1>" for nodes with multiple domains,
> >>       which allows typos in "power-domains = <&pd_ca15_cpu n>", using
> >>       an invalid value of "n".
> >>   
> >>   - Using a linear description in DT:
> >>       - Needs parent links for subdomains,
> >>       - More complicated to parse (lesson learned from R-Mobile PM
> >>       Domain support).
> >>   
> >>   - Keeping the power register block offset and the bit number as
> >>   separate
> >>     "reg" cells, increasing "#address-cells" from 2 to 3,
> >>   
> >>   - Merging the interrupt bit (which needs only 5 bits) in the other
> >>   "reg"
> >>     cell, decreasing "#address-cells" from 2 to 1.
> > 
> > I think I'd move to not encoding mulitple things into reg. This seems
> > like a bit of abuse of reg. Otherwise, I don't have much to comment on.
> 
> Thanks!
> 
> (quoting the encoding of the reg properties)
> 
> > +== PM Domain Nodes ==
> > +
> > +Each of the PM domain nodes represents a PM domain, as documented by the
> > +generic PM domain bindings in
> > +Documentation/devicetree/bindings/power/power_domain.txt.
> > +
> > +Required properties:
> > +  - #power-domain-cells: Must be 0.
> > +  - reg: This property must contain 2 values:
> > +          - The first value is the number of the interrupt bit
> > representing
> > +            the power area in the various Interrupt Registers (e.g.
> > SYSCISR,
> > +            Interrupt Status Register),
> > +          - The second value encodes the power register block offset
> > (which is
> > +            a multiple of 64), and the number of the bit representing the
> > +            power area in the various Power Control Registers (e.g.
> > PWROFFSR,
> > +            Power Shutoff Status Register). This value is created by
> > ORing
> > +            these two numbers.
> 
> Not encoding multiple things into reg means adding more properties to
> provide that information, iff we want to describe the PM Domain Nodes in
> DT. I considered the reg property a two-dimensional address space.
> 
> Taking the lessons from CCF and the new CPG/MSSR bindings into account
> (which was BTW designed after the SYSC DT bindings), perhaps the PM Domain
> hierarchy should be moved from DT to C, in the driver, too?
> 
> That would mean we have in DT:
>   1) "#power-domain-cells = <1>"
>   2) defines for the various domains, e.g. "#define R8A7791_PD_CA15_SCU     
> 12"
>   3) e.g. "power-domains = <&sysc R8A7791_PD_CA15_SCU>"
>   4) and we can get rid of the fallback compatibility strings again.
> 
> Thoughts?

That simplifies DT and will give more flexibility to handle all the weird 
details in C code, so I like it.

Additionally the amount of per-SoC data related to power domains is pretty 
limited, so we shouldn't have a size issue, even for multi-platform kernels. 
The removal of DT parsing code might even make the kernel smaller. The only 
driver I'm concerned about when it comes to per-SoC data size is the PFC 
driver.

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Laurent Pinchart]

Hi Geert,

On Thursday 18 February 2016 18:18:56 Geert Uytterhoeven wrote:
> On Thu, Feb 18, 2016 at 3:38 PM, Rob Herring <robh@kernel.org> wrote:
> > On Mon, Feb 15, 2016 at 10:16:50PM +0100, Geert Uytterhoeven wrote:
> >> The Renesas R-Car System Controller provides power management for the
> >> CPU cores and various coprocessors, following the generic PM domain
> >> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> >> 
> >> This supports R-Car Gen1, Gen2, and Gen3.
> >> 
> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >> ---
> >> 
> >> Alternatives I considered:
> >>   - Using a single node per power register block, even if it contains
> >>     multiple domains, e.g.:
> >>           pd_ca15_scu: ca15_scu at 180 {
> >>                   reg = <0x180 0x20>;
> >>                   #address-cells = <1>;
> >>                   #size-cells = <0>;
> >>                   #power-domain-cells = <0>;
> >>                   renesas,interrupt-bits = <12>;
> >>                   
> >>                   pd_ca15_cpu: ca15_cpu at 40 {
> >>                           reg = <0x40 0x20>;
> >>                           #power-domain-cells = <1>;
> >>                           renesas,pm-domain-indices = <0 1>;
> >>                           renesas,pm-domain-names =
> >>                                   "ca15_cpu0", "ca15_cpu1";
> >>                           renesas,interrupt-bits = <0 1>;
> >>                   };
> >>           };
> >>     
> >>     Notes:
> >>       - You cannot just have a property with the number of domains, as
> >>       index 0 is not used on R-Car H1. Hence the need for
> >>       "renesas,pm-domain-indices" and "renesas,interrupt-bits",
> >>       - "#power-domain-cells = <1>" for nodes with multiple domains,
> >>       which allows typos in "power-domains = <&pd_ca15_cpu n>", using
> >>       an invalid value of "n".
> >>   
> >>   - Using a linear description in DT:
> >>       - Needs parent links for subdomains,
> >>       - More complicated to parse (lesson learned from R-Mobile PM
> >>       Domain support).
> >>   
> >>   - Keeping the power register block offset and the bit number as
> >>   separate
> >>     "reg" cells, increasing "#address-cells" from 2 to 3,
> >>   
> >>   - Merging the interrupt bit (which needs only 5 bits) in the other
> >>   "reg"
> >>     cell, decreasing "#address-cells" from 2 to 1.
> > 
> > I think I'd move to not encoding mulitple things into reg. This seems
> > like a bit of abuse of reg. Otherwise, I don't have much to comment on.
> 
> Thanks!
> 
> (quoting the encoding of the reg properties)
> 
> > +== PM Domain Nodes ==
> > +
> > +Each of the PM domain nodes represents a PM domain, as documented by the
> > +generic PM domain bindings in
> > +Documentation/devicetree/bindings/power/power_domain.txt.
> > +
> > +Required properties:
> > +  - #power-domain-cells: Must be 0.
> > +  - reg: This property must contain 2 values:
> > +          - The first value is the number of the interrupt bit
> > representing
> > +            the power area in the various Interrupt Registers (e.g.
> > SYSCISR,
> > +            Interrupt Status Register),
> > +          - The second value encodes the power register block offset
> > (which is
> > +            a multiple of 64), and the number of the bit representing the
> > +            power area in the various Power Control Registers (e.g.
> > PWROFFSR,
> > +            Power Shutoff Status Register). This value is created by
> > ORing
> > +            these two numbers.
> 
> Not encoding multiple things into reg means adding more properties to
> provide that information, iff we want to describe the PM Domain Nodes in
> DT. I considered the reg property a two-dimensional address space.
> 
> Taking the lessons from CCF and the new CPG/MSSR bindings into account
> (which was BTW designed after the SYSC DT bindings), perhaps the PM Domain
> hierarchy should be moved from DT to C, in the driver, too?
> 
> That would mean we have in DT:
>   1) "#power-domain-cells = <1>"
>   2) defines for the various domains, e.g. "#define R8A7791_PD_CA15_SCU     
> 12"
>   3) e.g. "power-domains = <&sysc R8A7791_PD_CA15_SCU>"
>   4) and we can get rid of the fallback compatibility strings again.
> 
> Thoughts?

That simplifies DT and will give more flexibility to handle all the weird 
details in C code, so I like it.

Additionally the amount of per-SoC data related to power domains is pretty 
limited, so we shouldn't have a size issue, even for multi-platform kernels. 
The removal of DT parsing code might even make the kernel smaller. The only 
driver I'm concerned about when it comes to per-SoC data size is the PFC 
driver.

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Rob Herring]

On Thu, Feb 18, 2016 at 06:18:56PM +0100, Geert Uytterhoeven wrote:
> Hi Rob,
> 
> On Thu, Feb 18, 2016 at 3:38 PM, Rob Herring <robh@kernel.org> wrote:
> > On Mon, Feb 15, 2016 at 10:16:50PM +0100, Geert Uytterhoeven wrote:
> >> The Renesas R-Car System Controller provides power management for the
> >> CPU cores and various coprocessors, following the generic PM domain
> >> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> >>
> >> This supports R-Car Gen1, Gen2, and Gen3.
> >>
> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >> ---

> >>   - Keeping the power register block offset and the bit number as separate
> >>     "reg" cells, increasing "#address-cells" from 2 to 3,
> >>
> >>   - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
> >>     cell, decreasing "#address-cells" from 2 to 1.
> >
> > I think I'd move to not encoding mulitple things into reg. This seems
> > like a bit of abuse of reg. Otherwise, I don't have much to comment on.
> 
> Thanks!
> 
> (quoting the encoding of the reg properties)
> > +== PM Domain Nodes ==
> > +
> > +Each of the PM domain nodes represents a PM domain, as documented by the
> > +generic PM domain bindings in
> > +Documentation/devicetree/bindings/power/power_domain.txt.
> > +
> > +Required properties:
> > +  - #power-domain-cells: Must be 0.
> > +  - reg: This property must contain 2 values:
> > +          - The first value is the number of the interrupt bit representing
> > +            the power area in the various Interrupt Registers (e.g. SYSCISR,
> > +            Interrupt Status Register),
> > +          - The second value encodes the power register block offset (which is
> > +            a multiple of 64), and the number of the bit representing the
> > +            power area in the various Power Control Registers (e.g. PWROFFSR,
> > +            Power Shutoff Status Register). This value is created by ORing
> > +            these two numbers.
> 
> Not encoding multiple things into reg means adding more properties to provide
> that information, iff we want to describe the PM Domain Nodes in DT.
> I considered the reg property a two-dimensional address space.
> 
> Taking the lessons from CCF and the new CPG/MSSR bindings into account
> (which was BTW designed after the SYSC DT bindings), perhaps the PM Domain
> hierarchy should be moved from DT to C, in the driver, too?
> 
> That would mean we have in DT:
>   1) "#power-domain-cells = <1>"
>   2) defines for the various domains, e.g. "#define R8A7791_PD_CA15_SCU      12"
>   3) e.g. "power-domains = <&sysc R8A7791_PD_CA15_SCU>"
>   4) and we can get rid of the fallback compatibility strings again.
> 
> Thoughts?

Seems fine to me.

Rob

[PATCH/RFC v2 01/11] PM / Domains: Add DT bindings for the R-Car System Controller

[Rob Herring]

On Thu, Feb 18, 2016 at 06:18:56PM +0100, Geert Uytterhoeven wrote:
> Hi Rob,
> 
> On Thu, Feb 18, 2016 at 3:38 PM, Rob Herring <robh@kernel.org> wrote:
> > On Mon, Feb 15, 2016 at 10:16:50PM +0100, Geert Uytterhoeven wrote:
> >> The Renesas R-Car System Controller provides power management for the
> >> CPU cores and various coprocessors, following the generic PM domain
> >> bindings in Documentation/devicetree/bindings/power/power_domain.txt.
> >>
> >> This supports R-Car Gen1, Gen2, and Gen3.
> >>
> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >> ---

> >>   - Keeping the power register block offset and the bit number as separate
> >>     "reg" cells, increasing "#address-cells" from 2 to 3,
> >>
> >>   - Merging the interrupt bit (which needs only 5 bits) in the other "reg"
> >>     cell, decreasing "#address-cells" from 2 to 1.
> >
> > I think I'd move to not encoding mulitple things into reg. This seems
> > like a bit of abuse of reg. Otherwise, I don't have much to comment on.
> 
> Thanks!
> 
> (quoting the encoding of the reg properties)
> > +== PM Domain Nodes ==
> > +
> > +Each of the PM domain nodes represents a PM domain, as documented by the
> > +generic PM domain bindings in
> > +Documentation/devicetree/bindings/power/power_domain.txt.
> > +
> > +Required properties:
> > +  - #power-domain-cells: Must be 0.
> > +  - reg: This property must contain 2 values:
> > +          - The first value is the number of the interrupt bit representing
> > +            the power area in the various Interrupt Registers (e.g. SYSCISR,
> > +            Interrupt Status Register),
> > +          - The second value encodes the power register block offset (which is
> > +            a multiple of 64), and the number of the bit representing the
> > +            power area in the various Power Control Registers (e.g. PWROFFSR,
> > +            Power Shutoff Status Register). This value is created by ORing
> > +            these two numbers.
> 
> Not encoding multiple things into reg means adding more properties to provide
> that information, iff we want to describe the PM Domain Nodes in DT.
> I considered the reg property a two-dimensional address space.
> 
> Taking the lessons from CCF and the new CPG/MSSR bindings into account
> (which was BTW designed after the SYSC DT bindings), perhaps the PM Domain
> hierarchy should be moved from DT to C, in the driver, too?
> 
> That would mean we have in DT:
>   1) "#power-domain-cells = <1>"
>   2) defines for the various domains, e.g. "#define R8A7791_PD_CA15_SCU      12"
>   3) e.g. "power-domains = <&sysc R8A7791_PD_CA15_SCU>"
>   4) and we can get rid of the fallback compatibility strings again.
> 
> Thoughts?

Seems fine to me.

Rob

[PATCH/RFC v2 02/11] soc: renesas: Move pm-rcar to drivers/soc/renesas/

[Geert Uytterhoeven]

Move the pm-rcar driver to drivers/soc/renesas/, so it can be shared
between arm32 (R-Car H1 and Gen2) and arm64 (R-Car Gen3).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - New.
---
 arch/arm/mach-shmobile/Kconfig                                  | 8 ++------
 arch/arm/mach-shmobile/Makefile                                 | 1 -
 arch/arm/mach-shmobile/pm-r8a7779.c                             | 3 ++-
 arch/arm/mach-shmobile/pm-rcar-gen2.c                           | 2 +-
 arch/arm/mach-shmobile/smp-r8a7779.c                            | 2 +-
 arch/arm/mach-shmobile/smp-r8a7790.c                            | 2 +-
 drivers/soc/Kconfig                                             | 1 +
 drivers/soc/Makefile                                            | 3 ++-
 drivers/soc/renesas/Kconfig                                     | 8 ++++++++
 drivers/soc/renesas/Makefile                                    | 1 +
 {arch/arm/mach-shmobile => drivers/soc/renesas}/pm-rcar.c       | 2 +-
 {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h | 2 ++
 12 files changed, 22 insertions(+), 13 deletions(-)
 create mode 100644 drivers/soc/renesas/Kconfig
 create mode 100644 drivers/soc/renesas/Makefile
 rename {arch/arm/mach-shmobile => drivers/soc/renesas}/pm-rcar.c (99%)
 rename {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h (93%)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index cd5f171f83ce6420..e45479d5104ea91a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -4,23 +4,19 @@ config ARCH_SHMOBILE
 config ARCH_SHMOBILE_MULTI
 	bool
 
-config PM_RCAR
-	bool
-	select PM_GENERIC_DOMAINS if PM
-
 config PM_RMOBILE
 	bool
 	select PM_GENERIC_DOMAINS
 
 config ARCH_RCAR_GEN1
 	bool
-	select PM_RCAR if PM || SMP
+	select RENESAS_RCAR_PM if PM || SMP
 	select RENESAS_INTC_IRQPIN
 	select SYS_SUPPORTS_SH_TMU
 
 config ARCH_RCAR_GEN2
 	bool
-	select PM_RCAR if PM || SMP
+	select RENESAS_RCAR_PM if PM || SMP
 	select RENESAS_IRQC
 	select SYS_SUPPORTS_SH_CMT
 	select PCI_DOMAINS if PCI
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index a65c80ac9009d51f..ebb909c55b856a58 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -39,7 +39,6 @@ smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o platsmp-scu.o
 # PM objects
 obj-$(CONFIG_SUSPEND)		+= suspend.o
 obj-$(CONFIG_CPU_FREQ)		+= cpufreq.o
-obj-$(CONFIG_PM_RCAR)		+= pm-rcar.o
 obj-$(CONFIG_PM_RMOBILE)	+= pm-rmobile.o
 obj-$(CONFIG_ARCH_RCAR_GEN2)	+= pm-rcar-gen2.o
 
diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c
index 14c42a1bdf1ef20d..314cc47738252ae6 100644
--- a/arch/arm/mach-shmobile/pm-r8a7779.c
+++ b/arch/arm/mach-shmobile/pm-r8a7779.c
@@ -9,9 +9,10 @@
  * for more details.
  */
 
+#include <linux/soc/renesas/pm-rcar.h>
+
 #include <asm/io.h>
 
-#include "pm-rcar.h"
 #include "r8a7779.h"
 
 /* SYSC */
diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index 6815781ad1165ef3..13ef9a8f5bf74090 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -13,9 +13,9 @@
 #include <linux/kernel.h>
 #include <linux/of.h>
 #include <linux/smp.h>
+#include <linux/soc/renesas/pm-rcar.h>
 #include <asm/io.h>
 #include "common.h"
-#include "pm-rcar.h"
 #include "rcar-gen2.h"
 
 /* RST */
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index f5c31fbc10b2efbf..12e4804a1985012e 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -19,13 +19,13 @@
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/delay.h>
+#include <linux/soc/renesas/pm-rcar.h>
 
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
 #include "common.h"
-#include "pm-rcar.h"
 #include "r8a7779.h"
 
 #define AVECR IOMEM(0xfe700040)
diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
index f6426c6fdefcb489..79a0f7b86ce9149a 100644
--- a/arch/arm/mach-shmobile/smp-r8a7790.c
+++ b/arch/arm/mach-shmobile/smp-r8a7790.c
@@ -17,12 +17,12 @@
 #include <linux/init.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <linux/soc/renesas/pm-rcar.h>
 
 #include <asm/smp_plat.h>
 
 #include "common.h"
 #include "platsmp-apmu.h"
-#include "pm-rcar.h"
 #include "rcar-gen2.h"
 #include "r8a7790.h"
 
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 88260205a2614c84..5d76c14ef98cdc26 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -5,6 +5,7 @@ source "drivers/soc/brcmstb/Kconfig"
 source "drivers/soc/fsl/qe/Kconfig"
 source "drivers/soc/mediatek/Kconfig"
 source "drivers/soc/qcom/Kconfig"
+source "drivers/soc/renesas/Kconfig"
 source "drivers/soc/rockchip/Kconfig"
 source "drivers/soc/sunxi/Kconfig"
 source "drivers/soc/tegra/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 2afdc74f7491adf0..298ee4157bb6d9a0 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -9,7 +9,8 @@ obj-$(CONFIG_MACH_DOVE)		+= dove/
 obj-y				+= fsl/
 obj-$(CONFIG_ARCH_MEDIATEK)	+= mediatek/
 obj-$(CONFIG_ARCH_QCOM)		+= qcom/
-obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
+obj-$(CONFIG_ARCH_RENESAS)	+= renesas/
+obj-$(CONFIG_ARCH_ROCKCHIP)	+= rockchip/
 obj-$(CONFIG_ARCH_SUNXI)	+= sunxi/
 obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
 obj-$(CONFIG_SOC_TI)		+= ti/
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
new file mode 100644
index 0000000000000000..b2e4d31555c285f0
--- /dev/null
+++ b/drivers/soc/renesas/Kconfig
@@ -0,0 +1,8 @@
+#
+# Renesas SoC drivers
+#
+
+config RENESAS_RCAR_PM
+	bool
+	select PM_GENERIC_DOMAINS if PM
+	default y if ARCH_RENESAS && ARM64
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
new file mode 100644
index 0000000000000000..36b8aedf2ef4195f
--- /dev/null
+++ b/drivers/soc/renesas/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_RENESAS_RCAR_PM)	+= pm-rcar.o
diff --git a/arch/arm/mach-shmobile/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
similarity index 99%
rename from arch/arm/mach-shmobile/pm-rcar.c
rename to drivers/soc/renesas/pm-rcar.c
index 0af05d288b09c3ab..bc605d9fbc6ce79c 100644
--- a/arch/arm/mach-shmobile/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -13,7 +13,7 @@
 #include <linux/mm.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
-#include "pm-rcar.h"
+#include <linux/soc/renesas/pm-rcar.h>
 
 /* SYSC Common */
 #define SYSCSR			0x00	/* SYSC Status Register */
diff --git a/arch/arm/mach-shmobile/pm-rcar.h b/include/linux/soc/renesas/pm-rcar.h
similarity index 93%
rename from arch/arm/mach-shmobile/pm-rcar.h
rename to include/linux/soc/renesas/pm-rcar.h
index 1b901db4a24c4633..bfeb647ffd9d2e12 100644
--- a/arch/arm/mach-shmobile/pm-rcar.h
+++ b/include/linux/soc/renesas/pm-rcar.h
@@ -1,6 +1,8 @@
 #ifndef PM_RCAR_H
 #define PM_RCAR_H
 
+#include <linux/types.h>
+
 struct rcar_sysc_ch {
 	u16 chan_offs;
 	u8 chan_bit;
-- 
1.9.1

[PATCH/RFC v2 02/11] soc: renesas: Move pm-rcar to drivers/soc/renesas/

[Geert Uytterhoeven]

Move the pm-rcar driver to drivers/soc/renesas/, so it can be shared
between arm32 (R-Car H1 and Gen2) and arm64 (R-Car Gen3).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - New.
---
 arch/arm/mach-shmobile/Kconfig                                  | 8 ++------
 arch/arm/mach-shmobile/Makefile                                 | 1 -
 arch/arm/mach-shmobile/pm-r8a7779.c                             | 3 ++-
 arch/arm/mach-shmobile/pm-rcar-gen2.c                           | 2 +-
 arch/arm/mach-shmobile/smp-r8a7779.c                            | 2 +-
 arch/arm/mach-shmobile/smp-r8a7790.c                            | 2 +-
 drivers/soc/Kconfig                                             | 1 +
 drivers/soc/Makefile                                            | 3 ++-
 drivers/soc/renesas/Kconfig                                     | 8 ++++++++
 drivers/soc/renesas/Makefile                                    | 1 +
 {arch/arm/mach-shmobile => drivers/soc/renesas}/pm-rcar.c       | 2 +-
 {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h | 2 ++
 12 files changed, 22 insertions(+), 13 deletions(-)
 create mode 100644 drivers/soc/renesas/Kconfig
 create mode 100644 drivers/soc/renesas/Makefile
 rename {arch/arm/mach-shmobile => drivers/soc/renesas}/pm-rcar.c (99%)
 rename {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h (93%)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index cd5f171f83ce6420..e45479d5104ea91a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -4,23 +4,19 @@ config ARCH_SHMOBILE
 config ARCH_SHMOBILE_MULTI
 	bool
 
-config PM_RCAR
-	bool
-	select PM_GENERIC_DOMAINS if PM
-
 config PM_RMOBILE
 	bool
 	select PM_GENERIC_DOMAINS
 
 config ARCH_RCAR_GEN1
 	bool
-	select PM_RCAR if PM || SMP
+	select RENESAS_RCAR_PM if PM || SMP
 	select RENESAS_INTC_IRQPIN
 	select SYS_SUPPORTS_SH_TMU
 
 config ARCH_RCAR_GEN2
 	bool
-	select PM_RCAR if PM || SMP
+	select RENESAS_RCAR_PM if PM || SMP
 	select RENESAS_IRQC
 	select SYS_SUPPORTS_SH_CMT
 	select PCI_DOMAINS if PCI
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index a65c80ac9009d51f..ebb909c55b856a58 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -39,7 +39,6 @@ smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o platsmp-scu.o
 # PM objects
 obj-$(CONFIG_SUSPEND)		+= suspend.o
 obj-$(CONFIG_CPU_FREQ)		+= cpufreq.o
-obj-$(CONFIG_PM_RCAR)		+= pm-rcar.o
 obj-$(CONFIG_PM_RMOBILE)	+= pm-rmobile.o
 obj-$(CONFIG_ARCH_RCAR_GEN2)	+= pm-rcar-gen2.o
 
diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c
index 14c42a1bdf1ef20d..314cc47738252ae6 100644
--- a/arch/arm/mach-shmobile/pm-r8a7779.c
+++ b/arch/arm/mach-shmobile/pm-r8a7779.c
@@ -9,9 +9,10 @@
  * for more details.
  */
 
+#include <linux/soc/renesas/pm-rcar.h>
+
 #include <asm/io.h>
 
-#include "pm-rcar.h"
 #include "r8a7779.h"
 
 /* SYSC */
diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index 6815781ad1165ef3..13ef9a8f5bf74090 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -13,9 +13,9 @@
 #include <linux/kernel.h>
 #include <linux/of.h>
 #include <linux/smp.h>
+#include <linux/soc/renesas/pm-rcar.h>
 #include <asm/io.h>
 #include "common.h"
-#include "pm-rcar.h"
 #include "rcar-gen2.h"
 
 /* RST */
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index f5c31fbc10b2efbf..12e4804a1985012e 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -19,13 +19,13 @@
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/delay.h>
+#include <linux/soc/renesas/pm-rcar.h>
 
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
 #include "common.h"
-#include "pm-rcar.h"
 #include "r8a7779.h"
 
 #define AVECR IOMEM(0xfe700040)
diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
index f6426c6fdefcb489..79a0f7b86ce9149a 100644
--- a/arch/arm/mach-shmobile/smp-r8a7790.c
+++ b/arch/arm/mach-shmobile/smp-r8a7790.c
@@ -17,12 +17,12 @@
 #include <linux/init.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <linux/soc/renesas/pm-rcar.h>
 
 #include <asm/smp_plat.h>
 
 #include "common.h"
 #include "platsmp-apmu.h"
-#include "pm-rcar.h"
 #include "rcar-gen2.h"
 #include "r8a7790.h"
 
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 88260205a2614c84..5d76c14ef98cdc26 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -5,6 +5,7 @@ source "drivers/soc/brcmstb/Kconfig"
 source "drivers/soc/fsl/qe/Kconfig"
 source "drivers/soc/mediatek/Kconfig"
 source "drivers/soc/qcom/Kconfig"
+source "drivers/soc/renesas/Kconfig"
 source "drivers/soc/rockchip/Kconfig"
 source "drivers/soc/sunxi/Kconfig"
 source "drivers/soc/tegra/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 2afdc74f7491adf0..298ee4157bb6d9a0 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -9,7 +9,8 @@ obj-$(CONFIG_MACH_DOVE)		+= dove/
 obj-y				+= fsl/
 obj-$(CONFIG_ARCH_MEDIATEK)	+= mediatek/
 obj-$(CONFIG_ARCH_QCOM)		+= qcom/
-obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
+obj-$(CONFIG_ARCH_RENESAS)	+= renesas/
+obj-$(CONFIG_ARCH_ROCKCHIP)	+= rockchip/
 obj-$(CONFIG_ARCH_SUNXI)	+= sunxi/
 obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
 obj-$(CONFIG_SOC_TI)		+= ti/
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
new file mode 100644
index 0000000000000000..b2e4d31555c285f0
--- /dev/null
+++ b/drivers/soc/renesas/Kconfig
@@ -0,0 +1,8 @@
+#
+# Renesas SoC drivers
+#
+
+config RENESAS_RCAR_PM
+	bool
+	select PM_GENERIC_DOMAINS if PM
+	default y if ARCH_RENESAS && ARM64
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
new file mode 100644
index 0000000000000000..36b8aedf2ef4195f
--- /dev/null
+++ b/drivers/soc/renesas/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_RENESAS_RCAR_PM)	+= pm-rcar.o
diff --git a/arch/arm/mach-shmobile/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
similarity index 99%
rename from arch/arm/mach-shmobile/pm-rcar.c
rename to drivers/soc/renesas/pm-rcar.c
index 0af05d288b09c3ab..bc605d9fbc6ce79c 100644
--- a/arch/arm/mach-shmobile/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -13,7 +13,7 @@
 #include <linux/mm.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
-#include "pm-rcar.h"
+#include <linux/soc/renesas/pm-rcar.h>
 
 /* SYSC Common */
 #define SYSCSR			0x00	/* SYSC Status Register */
diff --git a/arch/arm/mach-shmobile/pm-rcar.h b/include/linux/soc/renesas/pm-rcar.h
similarity index 93%
rename from arch/arm/mach-shmobile/pm-rcar.h
rename to include/linux/soc/renesas/pm-rcar.h
index 1b901db4a24c4633..bfeb647ffd9d2e12 100644
--- a/arch/arm/mach-shmobile/pm-rcar.h
+++ b/include/linux/soc/renesas/pm-rcar.h
@@ -1,6 +1,8 @@
 #ifndef PM_RCAR_H
 #define PM_RCAR_H
 
+#include <linux/types.h>
+
 struct rcar_sysc_ch {
 	u16 chan_offs;
 	u8 chan_bit;
-- 
1.9.1

Re: [PATCH/RFC v2 02/11] soc: renesas: Move pm-rcar to drivers/soc/renesas/

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:51 Geert Uytterhoeven wrote:
> Move the pm-rcar driver to drivers/soc/renesas/, so it can be shared
> between arm32 (R-Car H1 and Gen2) and arm64 (R-Car Gen3).
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> v2:
>   - New.
> ---
> arch/arm/mach-shmobile/Kconfig                                  | 8 ++-----
> arch/arm/mach-shmobile/Makefile                                 | 1 -
> arch/arm/mach-shmobile/pm-r8a7779.c                             | 3 ++-
> arch/arm/mach-shmobile/pm-rcar-gen2.c                           | 2 +-
> arch/arm/mach-shmobile/smp-r8a7779.c                            | 2 +-
> arch/arm/mach-shmobile/smp-r8a7790.c                            | 2 +-
> drivers/soc/Kconfig                                             | 1 +
> drivers/soc/Makefile                                            | 3 ++-
> drivers/soc/renesas/Kconfig                                     | 8 ++++++++
> drivers/soc/renesas/Makefile                                    | 1 +
> {arch/arm/mach-shmobile => drivers/soc/renesas}/pm-rcar.c       | 2 +-
> {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h | 2 ++
> 12 files changed, 22 insertions(+), 13 deletions(-)
>  create mode 100644 drivers/soc/renesas/Kconfig
>  create mode 100644 drivers/soc/renesas/Makefile
>  rename {arch/arm/mach-shmobile => drivers/soc/renesas}/pm-rcar.c (99%)
>  rename {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h
> (93%)
> 
> diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
> index cd5f171f83ce6420..e45479d5104ea91a 100644
> --- a/arch/arm/mach-shmobile/Kconfig
> +++ b/arch/arm/mach-shmobile/Kconfig
> @@ -4,23 +4,19 @@ config ARCH_SHMOBILE
>  config ARCH_SHMOBILE_MULTI
>  	bool
> 
> -config PM_RCAR
> -	bool
> -	select PM_GENERIC_DOMAINS if PM
> -
>  config PM_RMOBILE
>  	bool
>  	select PM_GENERIC_DOMAINS
> 
>  config ARCH_RCAR_GEN1
>  	bool
> -	select PM_RCAR if PM || SMP
> +	select RENESAS_RCAR_PM if PM || SMP
>  	select RENESAS_INTC_IRQPIN
>  	select SYS_SUPPORTS_SH_TMU
> 
>  config ARCH_RCAR_GEN2
>  	bool
> -	select PM_RCAR if PM || SMP
> +	select RENESAS_RCAR_PM if PM || SMP
>  	select RENESAS_IRQC
>  	select SYS_SUPPORTS_SH_CMT
>  	select PCI_DOMAINS if PCI
> diff --git a/arch/arm/mach-shmobile/Makefile
> b/arch/arm/mach-shmobile/Makefile index a65c80ac9009d51f..ebb909c55b856a58
> 100644
> --- a/arch/arm/mach-shmobile/Makefile
> +++ b/arch/arm/mach-shmobile/Makefile
> @@ -39,7 +39,6 @@ smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o
> platsmp-scu.o # PM objects
>  obj-$(CONFIG_SUSPEND)		+= suspend.o
>  obj-$(CONFIG_CPU_FREQ)		+= cpufreq.o
> -obj-$(CONFIG_PM_RCAR)		+= pm-rcar.o
>  obj-$(CONFIG_PM_RMOBILE)	+= pm-rmobile.o
>  obj-$(CONFIG_ARCH_RCAR_GEN2)	+= pm-rcar-gen2.o
> 
> diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c
> b/arch/arm/mach-shmobile/pm-r8a7779.c index
> 14c42a1bdf1ef20d..314cc47738252ae6 100644
> --- a/arch/arm/mach-shmobile/pm-r8a7779.c
> +++ b/arch/arm/mach-shmobile/pm-r8a7779.c
> @@ -9,9 +9,10 @@
>   * for more details.
>   */
> 
> +#include <linux/soc/renesas/pm-rcar.h>
> +
>  #include <asm/io.h>
> 
> -#include "pm-rcar.h"
>  #include "r8a7779.h"
> 
>  /* SYSC */
> diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c
> b/arch/arm/mach-shmobile/pm-rcar-gen2.c index
> 6815781ad1165ef3..13ef9a8f5bf74090 100644
> --- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
> +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
> @@ -13,9 +13,9 @@
>  #include <linux/kernel.h>
>  #include <linux/of.h>
>  #include <linux/smp.h>
> +#include <linux/soc/renesas/pm-rcar.h>
>  #include <asm/io.h>
>  #include "common.h"
> -#include "pm-rcar.h"
>  #include "rcar-gen2.h"
> 
>  /* RST */
> diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c
> b/arch/arm/mach-shmobile/smp-r8a7779.c index
> f5c31fbc10b2efbf..12e4804a1985012e 100644
> --- a/arch/arm/mach-shmobile/smp-r8a7779.c
> +++ b/arch/arm/mach-shmobile/smp-r8a7779.c
> @@ -19,13 +19,13 @@
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
>  #include <linux/delay.h>
> +#include <linux/soc/renesas/pm-rcar.h>
> 
>  #include <asm/cacheflush.h>
>  #include <asm/smp_plat.h>
>  #include <asm/smp_scu.h>
> 
>  #include "common.h"
> -#include "pm-rcar.h"
>  #include "r8a7779.h"
> 
>  #define AVECR IOMEM(0xfe700040)
> diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c
> b/arch/arm/mach-shmobile/smp-r8a7790.c index
> f6426c6fdefcb489..79a0f7b86ce9149a 100644
> --- a/arch/arm/mach-shmobile/smp-r8a7790.c
> +++ b/arch/arm/mach-shmobile/smp-r8a7790.c
> @@ -17,12 +17,12 @@
>  #include <linux/init.h>
>  #include <linux/smp.h>
>  #include <linux/io.h>
> +#include <linux/soc/renesas/pm-rcar.h>
> 
>  #include <asm/smp_plat.h>
> 
>  #include "common.h"
>  #include "platsmp-apmu.h"
> -#include "pm-rcar.h"
>  #include "rcar-gen2.h"
>  #include "r8a7790.h"
> 
> diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> index 88260205a2614c84..5d76c14ef98cdc26 100644
> --- a/drivers/soc/Kconfig
> +++ b/drivers/soc/Kconfig
> @@ -5,6 +5,7 @@ source "drivers/soc/brcmstb/Kconfig"
>  source "drivers/soc/fsl/qe/Kconfig"
>  source "drivers/soc/mediatek/Kconfig"
>  source "drivers/soc/qcom/Kconfig"
> +source "drivers/soc/renesas/Kconfig"
>  source "drivers/soc/rockchip/Kconfig"
>  source "drivers/soc/sunxi/Kconfig"
>  source "drivers/soc/tegra/Kconfig"
> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> index 2afdc74f7491adf0..298ee4157bb6d9a0 100644
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -9,7 +9,8 @@ obj-$(CONFIG_MACH_DOVE)		+= dove/
>  obj-y				+= fsl/
>  obj-$(CONFIG_ARCH_MEDIATEK)	+= mediatek/
>  obj-$(CONFIG_ARCH_QCOM)		+= qcom/
> -obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
> +obj-$(CONFIG_ARCH_RENESAS)	+= renesas/
> +obj-$(CONFIG_ARCH_ROCKCHIP)	+= rockchip/
>  obj-$(CONFIG_ARCH_SUNXI)	+= sunxi/
>  obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
>  obj-$(CONFIG_SOC_TI)		+= ti/
> diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
> new file mode 100644
> index 0000000000000000..b2e4d31555c285f0
> --- /dev/null
> +++ b/drivers/soc/renesas/Kconfig
> @@ -0,0 +1,8 @@
> +#
> +# Renesas SoC drivers
> +#
> +
> +config RENESAS_RCAR_PM
> +	bool
> +	select PM_GENERIC_DOMAINS if PM
> +	default y if ARCH_RENESAS && ARM64
> diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
> new file mode 100644
> index 0000000000000000..36b8aedf2ef4195f
> --- /dev/null
> +++ b/drivers/soc/renesas/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_RENESAS_RCAR_PM)	+= pm-rcar.o
> diff --git a/arch/arm/mach-shmobile/pm-rcar.c
> b/drivers/soc/renesas/pm-rcar.c similarity index 99%
> rename from arch/arm/mach-shmobile/pm-rcar.c
> rename to drivers/soc/renesas/pm-rcar.c
> index 0af05d288b09c3ab..bc605d9fbc6ce79c 100644
> --- a/arch/arm/mach-shmobile/pm-rcar.c
> +++ b/drivers/soc/renesas/pm-rcar.c
> @@ -13,7 +13,7 @@
>  #include <linux/mm.h>
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
> -#include "pm-rcar.h"
> +#include <linux/soc/renesas/pm-rcar.h>
> 
>  /* SYSC Common */
>  #define SYSCSR			0x00	/* SYSC Status Register */
> diff --git a/arch/arm/mach-shmobile/pm-rcar.h
> b/include/linux/soc/renesas/pm-rcar.h similarity index 93%
> rename from arch/arm/mach-shmobile/pm-rcar.h
> rename to include/linux/soc/renesas/pm-rcar.h
> index 1b901db4a24c4633..bfeb647ffd9d2e12 100644
> --- a/arch/arm/mach-shmobile/pm-rcar.h
> +++ b/include/linux/soc/renesas/pm-rcar.h
> @@ -1,6 +1,8 @@
>  #ifndef PM_RCAR_H
>  #define PM_RCAR_H
> 
> +#include <linux/types.h>
> +
>  struct rcar_sysc_ch {
>  	u16 chan_offs;
>  	u8 chan_bit;

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 02/11] soc: renesas: Move pm-rcar to drivers/soc/renesas/

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:51 Geert Uytterhoeven wrote:
> Move the pm-rcar driver to drivers/soc/renesas/, so it can be shared
> between arm32 (R-Car H1 and Gen2) and arm64 (R-Car Gen3).
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> v2:
>   - New.
> ---
> arch/arm/mach-shmobile/Kconfig                                  | 8 ++-----
> arch/arm/mach-shmobile/Makefile                                 | 1 -
> arch/arm/mach-shmobile/pm-r8a7779.c                             | 3 ++-
> arch/arm/mach-shmobile/pm-rcar-gen2.c                           | 2 +-
> arch/arm/mach-shmobile/smp-r8a7779.c                            | 2 +-
> arch/arm/mach-shmobile/smp-r8a7790.c                            | 2 +-
> drivers/soc/Kconfig                                             | 1 +
> drivers/soc/Makefile                                            | 3 ++-
> drivers/soc/renesas/Kconfig                                     | 8 ++++++++
> drivers/soc/renesas/Makefile                                    | 1 +
> {arch/arm/mach-shmobile => drivers/soc/renesas}/pm-rcar.c       | 2 +-
> {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h | 2 ++
> 12 files changed, 22 insertions(+), 13 deletions(-)
>  create mode 100644 drivers/soc/renesas/Kconfig
>  create mode 100644 drivers/soc/renesas/Makefile
>  rename {arch/arm/mach-shmobile => drivers/soc/renesas}/pm-rcar.c (99%)
>  rename {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h
> (93%)
> 
> diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
> index cd5f171f83ce6420..e45479d5104ea91a 100644
> --- a/arch/arm/mach-shmobile/Kconfig
> +++ b/arch/arm/mach-shmobile/Kconfig
> @@ -4,23 +4,19 @@ config ARCH_SHMOBILE
>  config ARCH_SHMOBILE_MULTI
>  	bool
> 
> -config PM_RCAR
> -	bool
> -	select PM_GENERIC_DOMAINS if PM
> -
>  config PM_RMOBILE
>  	bool
>  	select PM_GENERIC_DOMAINS
> 
>  config ARCH_RCAR_GEN1
>  	bool
> -	select PM_RCAR if PM || SMP
> +	select RENESAS_RCAR_PM if PM || SMP
>  	select RENESAS_INTC_IRQPIN
>  	select SYS_SUPPORTS_SH_TMU
> 
>  config ARCH_RCAR_GEN2
>  	bool
> -	select PM_RCAR if PM || SMP
> +	select RENESAS_RCAR_PM if PM || SMP
>  	select RENESAS_IRQC
>  	select SYS_SUPPORTS_SH_CMT
>  	select PCI_DOMAINS if PCI
> diff --git a/arch/arm/mach-shmobile/Makefile
> b/arch/arm/mach-shmobile/Makefile index a65c80ac9009d51f..ebb909c55b856a58
> 100644
> --- a/arch/arm/mach-shmobile/Makefile
> +++ b/arch/arm/mach-shmobile/Makefile
> @@ -39,7 +39,6 @@ smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o
> platsmp-scu.o # PM objects
>  obj-$(CONFIG_SUSPEND)		+= suspend.o
>  obj-$(CONFIG_CPU_FREQ)		+= cpufreq.o
> -obj-$(CONFIG_PM_RCAR)		+= pm-rcar.o
>  obj-$(CONFIG_PM_RMOBILE)	+= pm-rmobile.o
>  obj-$(CONFIG_ARCH_RCAR_GEN2)	+= pm-rcar-gen2.o
> 
> diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c
> b/arch/arm/mach-shmobile/pm-r8a7779.c index
> 14c42a1bdf1ef20d..314cc47738252ae6 100644
> --- a/arch/arm/mach-shmobile/pm-r8a7779.c
> +++ b/arch/arm/mach-shmobile/pm-r8a7779.c
> @@ -9,9 +9,10 @@
>   * for more details.
>   */
> 
> +#include <linux/soc/renesas/pm-rcar.h>
> +
>  #include <asm/io.h>
> 
> -#include "pm-rcar.h"
>  #include "r8a7779.h"
> 
>  /* SYSC */
> diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c
> b/arch/arm/mach-shmobile/pm-rcar-gen2.c index
> 6815781ad1165ef3..13ef9a8f5bf74090 100644
> --- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
> +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
> @@ -13,9 +13,9 @@
>  #include <linux/kernel.h>
>  #include <linux/of.h>
>  #include <linux/smp.h>
> +#include <linux/soc/renesas/pm-rcar.h>
>  #include <asm/io.h>
>  #include "common.h"
> -#include "pm-rcar.h"
>  #include "rcar-gen2.h"
> 
>  /* RST */
> diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c
> b/arch/arm/mach-shmobile/smp-r8a7779.c index
> f5c31fbc10b2efbf..12e4804a1985012e 100644
> --- a/arch/arm/mach-shmobile/smp-r8a7779.c
> +++ b/arch/arm/mach-shmobile/smp-r8a7779.c
> @@ -19,13 +19,13 @@
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
>  #include <linux/delay.h>
> +#include <linux/soc/renesas/pm-rcar.h>
> 
>  #include <asm/cacheflush.h>
>  #include <asm/smp_plat.h>
>  #include <asm/smp_scu.h>
> 
>  #include "common.h"
> -#include "pm-rcar.h"
>  #include "r8a7779.h"
> 
>  #define AVECR IOMEM(0xfe700040)
> diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c
> b/arch/arm/mach-shmobile/smp-r8a7790.c index
> f6426c6fdefcb489..79a0f7b86ce9149a 100644
> --- a/arch/arm/mach-shmobile/smp-r8a7790.c
> +++ b/arch/arm/mach-shmobile/smp-r8a7790.c
> @@ -17,12 +17,12 @@
>  #include <linux/init.h>
>  #include <linux/smp.h>
>  #include <linux/io.h>
> +#include <linux/soc/renesas/pm-rcar.h>
> 
>  #include <asm/smp_plat.h>
> 
>  #include "common.h"
>  #include "platsmp-apmu.h"
> -#include "pm-rcar.h"
>  #include "rcar-gen2.h"
>  #include "r8a7790.h"
> 
> diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> index 88260205a2614c84..5d76c14ef98cdc26 100644
> --- a/drivers/soc/Kconfig
> +++ b/drivers/soc/Kconfig
> @@ -5,6 +5,7 @@ source "drivers/soc/brcmstb/Kconfig"
>  source "drivers/soc/fsl/qe/Kconfig"
>  source "drivers/soc/mediatek/Kconfig"
>  source "drivers/soc/qcom/Kconfig"
> +source "drivers/soc/renesas/Kconfig"
>  source "drivers/soc/rockchip/Kconfig"
>  source "drivers/soc/sunxi/Kconfig"
>  source "drivers/soc/tegra/Kconfig"
> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> index 2afdc74f7491adf0..298ee4157bb6d9a0 100644
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -9,7 +9,8 @@ obj-$(CONFIG_MACH_DOVE)		+= dove/
>  obj-y				+= fsl/
>  obj-$(CONFIG_ARCH_MEDIATEK)	+= mediatek/
>  obj-$(CONFIG_ARCH_QCOM)		+= qcom/
> -obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
> +obj-$(CONFIG_ARCH_RENESAS)	+= renesas/
> +obj-$(CONFIG_ARCH_ROCKCHIP)	+= rockchip/
>  obj-$(CONFIG_ARCH_SUNXI)	+= sunxi/
>  obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
>  obj-$(CONFIG_SOC_TI)		+= ti/
> diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
> new file mode 100644
> index 0000000000000000..b2e4d31555c285f0
> --- /dev/null
> +++ b/drivers/soc/renesas/Kconfig
> @@ -0,0 +1,8 @@
> +#
> +# Renesas SoC drivers
> +#
> +
> +config RENESAS_RCAR_PM
> +	bool
> +	select PM_GENERIC_DOMAINS if PM
> +	default y if ARCH_RENESAS && ARM64
> diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
> new file mode 100644
> index 0000000000000000..36b8aedf2ef4195f
> --- /dev/null
> +++ b/drivers/soc/renesas/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_RENESAS_RCAR_PM)	+= pm-rcar.o
> diff --git a/arch/arm/mach-shmobile/pm-rcar.c
> b/drivers/soc/renesas/pm-rcar.c similarity index 99%
> rename from arch/arm/mach-shmobile/pm-rcar.c
> rename to drivers/soc/renesas/pm-rcar.c
> index 0af05d288b09c3ab..bc605d9fbc6ce79c 100644
> --- a/arch/arm/mach-shmobile/pm-rcar.c
> +++ b/drivers/soc/renesas/pm-rcar.c
> @@ -13,7 +13,7 @@
>  #include <linux/mm.h>
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
> -#include "pm-rcar.h"
> +#include <linux/soc/renesas/pm-rcar.h>
> 
>  /* SYSC Common */
>  #define SYSCSR			0x00	/* SYSC Status Register */
> diff --git a/arch/arm/mach-shmobile/pm-rcar.h
> b/include/linux/soc/renesas/pm-rcar.h similarity index 93%
> rename from arch/arm/mach-shmobile/pm-rcar.h
> rename to include/linux/soc/renesas/pm-rcar.h
> index 1b901db4a24c4633..bfeb647ffd9d2e12 100644
> --- a/arch/arm/mach-shmobile/pm-rcar.h
> +++ b/include/linux/soc/renesas/pm-rcar.h
> @@ -1,6 +1,8 @@
>  #ifndef PM_RCAR_H
>  #define PM_RCAR_H
> 
> +#include <linux/types.h>
> +
>  struct rcar_sysc_ch {
>  	u16 chan_offs;
>  	u8 chan_bit;

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 03/11] soc: renesas: Improve rcar_sysc_power() debug info

[Geert Uytterhoeven]

Print requested power domain state.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - New.
---
 drivers/soc/renesas/pm-rcar.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index bc605d9fbc6ce79c..cc684e9cc8db5d1c 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -128,7 +128,7 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
  out:
 	spin_unlock_irqrestore(&rcar_sysc_lock, flags);
 
-	pr_debug("sysc power domain %d: %08x -> %d\n",
+	pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off",
 		 sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
 	return ret;
 }
-- 
1.9.1

[PATCH/RFC v2 03/11] soc: renesas: Improve rcar_sysc_power() debug info

[Geert Uytterhoeven]

Print requested power domain state.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - New.
---
 drivers/soc/renesas/pm-rcar.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index bc605d9fbc6ce79c..cc684e9cc8db5d1c 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -128,7 +128,7 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
  out:
 	spin_unlock_irqrestore(&rcar_sysc_lock, flags);
 
-	pr_debug("sysc power domain %d: %08x -> %d\n",
+	pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off",
 		 sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
 	return ret;
 }
-- 
1.9.1

Re: [PATCH/RFC v2 03/11] soc: renesas: Improve rcar_sysc_power() debug info

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:52 Geert Uytterhoeven wrote:
> Print requested power domain state.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> v2:
>   - New.
> ---
>  drivers/soc/renesas/pm-rcar.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
> index bc605d9fbc6ce79c..cc684e9cc8db5d1c 100644
> --- a/drivers/soc/renesas/pm-rcar.c
> +++ b/drivers/soc/renesas/pm-rcar.c
> @@ -128,7 +128,7 @@ static int rcar_sysc_power(const struct rcar_sysc_ch
> *sysc_ch, bool on) out:
>  	spin_unlock_irqrestore(&rcar_sysc_lock, flags);
> 
> -	pr_debug("sysc power domain %d: %08x -> %d\n",
> +	pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off",
>  		 sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
>  	return ret;
>  }

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 03/11] soc: renesas: Improve rcar_sysc_power() debug info

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:52 Geert Uytterhoeven wrote:
> Print requested power domain state.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> v2:
>   - New.
> ---
>  drivers/soc/renesas/pm-rcar.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
> index bc605d9fbc6ce79c..cc684e9cc8db5d1c 100644
> --- a/drivers/soc/renesas/pm-rcar.c
> +++ b/drivers/soc/renesas/pm-rcar.c
> @@ -128,7 +128,7 @@ static int rcar_sysc_power(const struct rcar_sysc_ch
> *sysc_ch, bool on) out:
>  	spin_unlock_irqrestore(&rcar_sysc_lock, flags);
> 
> -	pr_debug("sysc power domain %d: %08x -> %d\n",
> +	pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off",
>  		 sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
>  	return ret;
>  }

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 05/11] soc: renesas: rcar: Handle clock domain devices in SYSC PM domains

[Geert Uytterhoeven]

R-Car H3 contains some hardware modules (e.g. VSP and FCP_V) that are
not only located in a power area controlled by the SYSC system
controller, but that are also part of the generic CPG/MSSR clock domain.
Make sure both are handled by enabling module clock PM when the device
for such a hardware module is attached to the SYSC PM Domain.

FIXME Share code with the renesas-cpg-mssr driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - New.
---
 drivers/soc/renesas/pm-rcar.c | 68 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index c0540934126e58eb..d1bf8c231540b11d 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -9,16 +9,20 @@
  * for more details.
  */
 
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>
 #include <linux/of_address.h>
+#include <linux/pm_clock.h>
 #include <linux/pm_domain.h>
 #include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/soc/renesas/pm-rcar.h>
 
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
 /* SYSC Common */
 #define SYSCSR			0x00	/* SYSC Status Register */
 #define SYSCISR			0x04	/* Interrupt Status Register */
@@ -248,11 +252,75 @@ static int rcar_pd_power_up(struct generic_pm_domain *genpd)
 	return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
 }
 
+#ifdef CONFIG_ARCH_R8A7795
+static int rcar_clk_pd_attach_dev(struct generic_pm_domain *genpd,
+				  struct device *dev)
+{
+	struct device_node *np = dev->of_node;
+	struct of_phandle_args clkspec;
+	struct clk *clk;
+	int i = 0;
+	int error;
+
+	while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells", i,
+					   &clkspec)) {
+		if (clkspec.args_count == 2 && clkspec.args[0] == CPG_MOD &&
+		    of_device_is_compatible(clkspec.np,
+					    "renesas,r8a7795-cpg-mssr"))
+			goto found;
+
+		of_node_put(clkspec.np);
+		i++;
+	}
+
+	return 0;
+
+found:
+	clk = of_clk_get_from_provider(&clkspec);
+	of_node_put(clkspec.np);
+
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	error = pm_clk_create(dev);
+	if (error) {
+		dev_err(dev, "pm_clk_create failed %d\n", error);
+		goto fail_put;
+	}
+
+	error = pm_clk_add_clk(dev, clk);
+	if (error) {
+		dev_err(dev, "pm_clk_add_clk %pC failed %d\n", clk, error);
+		goto fail_destroy;
+	}
+
+	return 0;
+
+fail_destroy:
+	pm_clk_destroy(dev);
+fail_put:
+	clk_put(clk);
+	return error;
+}
+
+static void rcar_clk_pd_detach_dev(struct generic_pm_domain *genpd,
+				   struct device *dev)
+{
+	if (!list_empty(&dev->power.subsys_data->clock_list))
+		pm_clk_destroy(dev);
+}
+#endif /* CONFIG_ARCH_R8A7795 */
+
 static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
 {
 	struct generic_pm_domain *genpd = &rcar_pd->genpd;
 	struct dev_power_governor *gov = rcar_pd->gov;
 
+#ifdef CONFIG_ARCH_R8A7795
+	genpd->flags = GENPD_FLAG_PM_CLK;
+	genpd->attach_dev = rcar_clk_pd_attach_dev;
+	genpd->detach_dev = rcar_clk_pd_detach_dev;
+#endif
 	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
 	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
 	genpd->power_off		= rcar_pd_power_down;
-- 
1.9.1

[PATCH/RFC v2 05/11] soc: renesas: rcar: Handle clock domain devices in SYSC PM domains

[Geert Uytterhoeven]

R-Car H3 contains some hardware modules (e.g. VSP and FCP_V) that are
not only located in a power area controlled by the SYSC system
controller, but that are also part of the generic CPG/MSSR clock domain.
Make sure both are handled by enabling module clock PM when the device
for such a hardware module is attached to the SYSC PM Domain.

FIXME Share code with the renesas-cpg-mssr driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - New.
---
 drivers/soc/renesas/pm-rcar.c | 68 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index c0540934126e58eb..d1bf8c231540b11d 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -9,16 +9,20 @@
  * for more details.
  */
 
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>
 #include <linux/of_address.h>
+#include <linux/pm_clock.h>
 #include <linux/pm_domain.h>
 #include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/soc/renesas/pm-rcar.h>
 
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
 /* SYSC Common */
 #define SYSCSR			0x00	/* SYSC Status Register */
 #define SYSCISR			0x04	/* Interrupt Status Register */
@@ -248,11 +252,75 @@ static int rcar_pd_power_up(struct generic_pm_domain *genpd)
 	return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
 }
 
+#ifdef CONFIG_ARCH_R8A7795
+static int rcar_clk_pd_attach_dev(struct generic_pm_domain *genpd,
+				  struct device *dev)
+{
+	struct device_node *np = dev->of_node;
+	struct of_phandle_args clkspec;
+	struct clk *clk;
+	int i = 0;
+	int error;
+
+	while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells", i,
+					   &clkspec)) {
+		if (clkspec.args_count == 2 && clkspec.args[0] == CPG_MOD &&
+		    of_device_is_compatible(clkspec.np,
+					    "renesas,r8a7795-cpg-mssr"))
+			goto found;
+
+		of_node_put(clkspec.np);
+		i++;
+	}
+
+	return 0;
+
+found:
+	clk = of_clk_get_from_provider(&clkspec);
+	of_node_put(clkspec.np);
+
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	error = pm_clk_create(dev);
+	if (error) {
+		dev_err(dev, "pm_clk_create failed %d\n", error);
+		goto fail_put;
+	}
+
+	error = pm_clk_add_clk(dev, clk);
+	if (error) {
+		dev_err(dev, "pm_clk_add_clk %pC failed %d\n", clk, error);
+		goto fail_destroy;
+	}
+
+	return 0;
+
+fail_destroy:
+	pm_clk_destroy(dev);
+fail_put:
+	clk_put(clk);
+	return error;
+}
+
+static void rcar_clk_pd_detach_dev(struct generic_pm_domain *genpd,
+				   struct device *dev)
+{
+	if (!list_empty(&dev->power.subsys_data->clock_list))
+		pm_clk_destroy(dev);
+}
+#endif /* CONFIG_ARCH_R8A7795 */
+
 static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
 {
 	struct generic_pm_domain *genpd = &rcar_pd->genpd;
 	struct dev_power_governor *gov = rcar_pd->gov;
 
+#ifdef CONFIG_ARCH_R8A7795
+	genpd->flags = GENPD_FLAG_PM_CLK;
+	genpd->attach_dev = rcar_clk_pd_attach_dev;
+	genpd->detach_dev = rcar_clk_pd_detach_dev;
+#endif
 	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
 	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
 	genpd->power_off		= rcar_pd_power_down;
-- 
1.9.1

Re: [PATCH/RFC v2 05/11] soc: renesas: rcar: Handle clock domain devices in SYSC PM domains

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:54 Geert Uytterhoeven wrote:
> R-Car H3 contains some hardware modules (e.g. VSP and FCP_V) that are
> not only located in a power area controlled by the SYSC system
> controller, but that are also part of the generic CPG/MSSR clock domain.
> Make sure both are handled by enabling module clock PM when the device
> for such a hardware module is attached to the SYSC PM Domain.

Can't we specify both power domains in the DT power-domains attribute instead 
?

> FIXME Share code with the renesas-cpg-mssr driver.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
>   - New.
> ---
> drivers/soc/renesas/pm-rcar.c | 68 +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
> 
> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
> index c0540934126e58eb..d1bf8c231540b11d 100644
> --- a/drivers/soc/renesas/pm-rcar.c
> +++ b/drivers/soc/renesas/pm-rcar.c
> @@ -9,16 +9,20 @@
>   * for more details.
>   */
> 
> +#include <linux/clk.h>
>  #include <linux/delay.h>
>  #include <linux/err.h>
>  #include <linux/mm.h>
>  #include <linux/of_address.h>
> +#include <linux/pm_clock.h>
>  #include <linux/pm_domain.h>
>  #include <linux/slab.h>
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
>  #include <linux/soc/renesas/pm-rcar.h>
> 
> +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> +
>  /* SYSC Common */
>  #define SYSCSR			0x00	/* SYSC Status Register */
>  #define SYSCISR			0x04	/* Interrupt Status Register */
> @@ -248,11 +252,75 @@ static int rcar_pd_power_up(struct generic_pm_domain
> *genpd) return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
>  }
> 
> +#ifdef CONFIG_ARCH_R8A7795
> +static int rcar_clk_pd_attach_dev(struct generic_pm_domain *genpd,
> +				  struct device *dev)
> +{
> +	struct device_node *np = dev->of_node;
> +	struct of_phandle_args clkspec;
> +	struct clk *clk;
> +	int i = 0;
> +	int error;
> +
> +	while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells", i,
> +					   &clkspec)) {
> +		if (clkspec.args_count == 2 && clkspec.args[0] == CPG_MOD &&
> +		    of_device_is_compatible(clkspec.np,
> +					    "renesas,r8a7795-cpg-mssr"))
> +			goto found;
> +
> +		of_node_put(clkspec.np);
> +		i++;
> +	}
> +
> +	return 0;
> +
> +found:
> +	clk = of_clk_get_from_provider(&clkspec);
> +	of_node_put(clkspec.np);
> +
> +	if (IS_ERR(clk))
> +		return PTR_ERR(clk);
> +
> +	error = pm_clk_create(dev);
> +	if (error) {
> +		dev_err(dev, "pm_clk_create failed %d\n", error);
> +		goto fail_put;
> +	}
> +
> +	error = pm_clk_add_clk(dev, clk);
> +	if (error) {
> +		dev_err(dev, "pm_clk_add_clk %pC failed %d\n", clk, error);
> +		goto fail_destroy;
> +	}
> +
> +	return 0;
> +
> +fail_destroy:
> +	pm_clk_destroy(dev);
> +fail_put:
> +	clk_put(clk);
> +	return error;
> +}
> +
> +static void rcar_clk_pd_detach_dev(struct generic_pm_domain *genpd,
> +				   struct device *dev)
> +{
> +	if (!list_empty(&dev->power.subsys_data->clock_list))
> +		pm_clk_destroy(dev);
> +}
> +#endif /* CONFIG_ARCH_R8A7795 */
> +
>  static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
>  {
>  	struct generic_pm_domain *genpd = &rcar_pd->genpd;
>  	struct dev_power_governor *gov = rcar_pd->gov;
> 
> +#ifdef CONFIG_ARCH_R8A7795
> +	genpd->flags = GENPD_FLAG_PM_CLK;
> +	genpd->attach_dev = rcar_clk_pd_attach_dev;
> +	genpd->detach_dev = rcar_clk_pd_detach_dev;
> +#endif
>  	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
>  	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
>  	genpd->power_off		= rcar_pd_power_down;

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 05/11] soc: renesas: rcar: Handle clock domain devices in SYSC PM domains

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:54 Geert Uytterhoeven wrote:
> R-Car H3 contains some hardware modules (e.g. VSP and FCP_V) that are
> not only located in a power area controlled by the SYSC system
> controller, but that are also part of the generic CPG/MSSR clock domain.
> Make sure both are handled by enabling module clock PM when the device
> for such a hardware module is attached to the SYSC PM Domain.

Can't we specify both power domains in the DT power-domains attribute instead 
?

> FIXME Share code with the renesas-cpg-mssr driver.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
>   - New.
> ---
> drivers/soc/renesas/pm-rcar.c | 68 +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
> 
> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
> index c0540934126e58eb..d1bf8c231540b11d 100644
> --- a/drivers/soc/renesas/pm-rcar.c
> +++ b/drivers/soc/renesas/pm-rcar.c
> @@ -9,16 +9,20 @@
>   * for more details.
>   */
> 
> +#include <linux/clk.h>
>  #include <linux/delay.h>
>  #include <linux/err.h>
>  #include <linux/mm.h>
>  #include <linux/of_address.h>
> +#include <linux/pm_clock.h>
>  #include <linux/pm_domain.h>
>  #include <linux/slab.h>
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
>  #include <linux/soc/renesas/pm-rcar.h>
> 
> +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> +
>  /* SYSC Common */
>  #define SYSCSR			0x00	/* SYSC Status Register */
>  #define SYSCISR			0x04	/* Interrupt Status Register */
> @@ -248,11 +252,75 @@ static int rcar_pd_power_up(struct generic_pm_domain
> *genpd) return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
>  }
> 
> +#ifdef CONFIG_ARCH_R8A7795
> +static int rcar_clk_pd_attach_dev(struct generic_pm_domain *genpd,
> +				  struct device *dev)
> +{
> +	struct device_node *np = dev->of_node;
> +	struct of_phandle_args clkspec;
> +	struct clk *clk;
> +	int i = 0;
> +	int error;
> +
> +	while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells", i,
> +					   &clkspec)) {
> +		if (clkspec.args_count == 2 && clkspec.args[0] == CPG_MOD &&
> +		    of_device_is_compatible(clkspec.np,
> +					    "renesas,r8a7795-cpg-mssr"))
> +			goto found;
> +
> +		of_node_put(clkspec.np);
> +		i++;
> +	}
> +
> +	return 0;
> +
> +found:
> +	clk = of_clk_get_from_provider(&clkspec);
> +	of_node_put(clkspec.np);
> +
> +	if (IS_ERR(clk))
> +		return PTR_ERR(clk);
> +
> +	error = pm_clk_create(dev);
> +	if (error) {
> +		dev_err(dev, "pm_clk_create failed %d\n", error);
> +		goto fail_put;
> +	}
> +
> +	error = pm_clk_add_clk(dev, clk);
> +	if (error) {
> +		dev_err(dev, "pm_clk_add_clk %pC failed %d\n", clk, error);
> +		goto fail_destroy;
> +	}
> +
> +	return 0;
> +
> +fail_destroy:
> +	pm_clk_destroy(dev);
> +fail_put:
> +	clk_put(clk);
> +	return error;
> +}
> +
> +static void rcar_clk_pd_detach_dev(struct generic_pm_domain *genpd,
> +				   struct device *dev)
> +{
> +	if (!list_empty(&dev->power.subsys_data->clock_list))
> +		pm_clk_destroy(dev);
> +}
> +#endif /* CONFIG_ARCH_R8A7795 */
> +
>  static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
>  {
>  	struct generic_pm_domain *genpd = &rcar_pd->genpd;
>  	struct dev_power_governor *gov = rcar_pd->gov;
> 
> +#ifdef CONFIG_ARCH_R8A7795
> +	genpd->flags = GENPD_FLAG_PM_CLK;
> +	genpd->attach_dev = rcar_clk_pd_attach_dev;
> +	genpd->detach_dev = rcar_clk_pd_detach_dev;
> +#endif
>  	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
>  	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
>  	genpd->power_off		= rcar_pd_power_down;

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC v2 05/11] soc: renesas: rcar: Handle clock domain devices in SYSC PM domains

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 11:08 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Monday 15 February 2016 22:16:54 Geert Uytterhoeven wrote:
>> R-Car H3 contains some hardware modules (e.g. VSP and FCP_V) that are
>> not only located in a power area controlled by the SYSC system
>> controller, but that are also part of the generic CPG/MSSR clock domain.
>> Make sure both are handled by enabling module clock PM when the device
>> for such a hardware module is attached to the SYSC PM Domain.
>
> Can't we specify both power domains in the DT power-domains attribute instead
> ?

While the DT property is called "power-domains" (plural), only the first entry
is parsed by genpd_dev_pm_attach(). Which makes sense for power areas
(if there are multiple, they are nested), but indeed can cause problems when
mixed with clock domains.

For R-Mobile, I fixed it in a similar way.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC v2 05/11] soc: renesas: rcar: Handle clock domain devices in SYSC PM domains

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 11:08 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Monday 15 February 2016 22:16:54 Geert Uytterhoeven wrote:
>> R-Car H3 contains some hardware modules (e.g. VSP and FCP_V) that are
>> not only located in a power area controlled by the SYSC system
>> controller, but that are also part of the generic CPG/MSSR clock domain.
>> Make sure both are handled by enabling module clock PM when the device
>> for such a hardware module is attached to the SYSC PM Domain.
>
> Can't we specify both power domains in the DT power-domains attribute instead
> ?

While the DT property is called "power-domains" (plural), only the first entry
is parsed by genpd_dev_pm_attach(). Which makes sense for power areas
(if there are multiple, they are nested), but indeed can cause problems when
mixed with clock domains.

For R-Mobile, I fixed it in a similar way.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC v2 05/11] soc: renesas: rcar: Handle clock domain devices in SYSC PM domains

[Laurent Pinchart]

Hi Geert,

On Tuesday 16 February 2016 08:30:03 Geert Uytterhoeven wrote:
> On Mon, Feb 15, 2016 at 11:08 PM, Laurent Pinchart wrote:
> > On Monday 15 February 2016 22:16:54 Geert Uytterhoeven wrote:
> >> R-Car H3 contains some hardware modules (e.g. VSP and FCP_V) that are
> >> not only located in a power area controlled by the SYSC system
> >> controller, but that are also part of the generic CPG/MSSR clock domain.
> >> Make sure both are handled by enabling module clock PM when the device
> >> for such a hardware module is attached to the SYSC PM Domain.
> > 
> > Can't we specify both power domains in the DT power-domains attribute
> > instead ?
> 
> While the DT property is called "power-domains" (plural), only the first
> entry is parsed by genpd_dev_pm_attach(). Which makes sense for power areas
> (if there are multiple, they are nested), but indeed can cause problems
> when mixed with clock domains.
> 
> For R-Mobile, I fixed it in a similar way.

Still, shouldn't it be fixed in genpd ?

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 05/11] soc: renesas: rcar: Handle clock domain devices in SYSC PM domains

[Laurent Pinchart]

Hi Geert,

On Tuesday 16 February 2016 08:30:03 Geert Uytterhoeven wrote:
> On Mon, Feb 15, 2016 at 11:08 PM, Laurent Pinchart wrote:
> > On Monday 15 February 2016 22:16:54 Geert Uytterhoeven wrote:
> >> R-Car H3 contains some hardware modules (e.g. VSP and FCP_V) that are
> >> not only located in a power area controlled by the SYSC system
> >> controller, but that are also part of the generic CPG/MSSR clock domain.
> >> Make sure both are handled by enabling module clock PM when the device
> >> for such a hardware module is attached to the SYSC PM Domain.
> > 
> > Can't we specify both power domains in the DT power-domains attribute
> > instead ?
> 
> While the DT property is called "power-domains" (plural), only the first
> entry is parsed by genpd_dev_pm_attach(). Which makes sense for power areas
> (if there are multiple, they are nested), but indeed can cause problems
> when mixed with clock domains.
> 
> For R-Mobile, I fixed it in a similar way.

Still, shouldn't it be fixed in genpd ?

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 06/11] ARM: dts: r8a7779: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up ARM CPU cores 1-3 to their respective PM domains.
Note that ARM CPU core 0 cannot be shut off.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Correct sysc "reg" property (#address/size-cells = 1, not 2),
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7779.dtsi | 48 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index a0cc08e6295b0396..14b28c225bb3587c 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -34,18 +34,21 @@
 			compatible = "arm,cortex-a9";
 			reg = <1>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_arm1>;
 		};
 		cpu@2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <2>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_arm2>;
 		};
 		cpu@3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <3>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_arm3>;
 		};
 	};
 
@@ -591,4 +594,49 @@
 				"mmc1", "mmc0";
 		};
 	};
+
+	sysc: system-controller@ffd85000 {
+		compatible = "renesas,r8a7779-sysc";
+		reg = <0xffd85000 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_arm1: cpu@1 {
+				reg = <1 0x41>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_arm2: cpu@2 {
+				reg = <2 0x42>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_arm3: cpu@3 {
+				reg = <3 0x43>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sh: sh@16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx@20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_vdp: vdp@21 {
+				reg = <21 0x100>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_imp: imp@24 {
+				reg = <24 0x140>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
 };
-- 
1.9.1

[PATCH/RFC v2 06/11] ARM: dts: r8a7779: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up ARM CPU cores 1-3 to their respective PM domains.
Note that ARM CPU core 0 cannot be shut off.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Correct sysc "reg" property (#address/size-cells = 1, not 2),
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7779.dtsi | 48 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index a0cc08e6295b0396..14b28c225bb3587c 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -34,18 +34,21 @@
 			compatible = "arm,cortex-a9";
 			reg = <1>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_arm1>;
 		};
 		cpu at 2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <2>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_arm2>;
 		};
 		cpu at 3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <3>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_arm3>;
 		};
 	};
 
@@ -591,4 +594,49 @@
 				"mmc1", "mmc0";
 		};
 	};
+
+	sysc: system-controller at ffd85000 {
+		compatible = "renesas,r8a7779-sysc";
+		reg = <0xffd85000 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_arm1: cpu at 1 {
+				reg = <1 0x41>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_arm2: cpu at 2 {
+				reg = <2 0x42>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_arm3: cpu at 3 {
+				reg = <3 0x43>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sh: sh at 16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx at 20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_vdp: vdp at 21 {
+				reg = <21 0x100>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_imp: imp at 24 {
+				reg = <24 0x140>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
 };
-- 
1.9.1

[PATCH/RFC v2 08/11] ARM: dts: r8a7791: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A15 CPU cores and the Cortex-A15 L2 cache/SCU to
their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7791.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index a65910ed5884edfd..a194273eb2b7951e 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -51,6 +51,7 @@
 			voltage-tolerance = <1>; /* 1% */
 			clocks = <&cpg_clocks R8A7791_CLK_Z>;
 			clock-latency = <300000>; /* 300 us */
+			power-domains = <&pd_ca15_cpu0>;
 			next-level-cache = <&L2_CA15>;
 
 			/* kHz - uV - OPPs unknown yet */
@@ -67,12 +68,14 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1500000000>;
+			power-domains = <&pd_ca15_cpu1>;
 			next-level-cache = <&L2_CA15>;
 		};
 	};
 
 	L2_CA15: cache-controller@0 {
 		compatible = "cache";
+		power-domains = <&pd_ca15_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1473,6 +1476,43 @@
 		};
 	};
 
+	sysc: system-controller@e6180000 {
+		compatible = "renesas,r8a7791-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu@12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu@0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu@1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh@16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx@20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	qspi: spi@e6b10000 {
 		compatible = "renesas,qspi-r8a7791", "renesas,qspi";
 		reg = <0 0xe6b10000 0 0x2c>;
-- 
1.9.1

[PATCH/RFC v2 08/11] ARM: dts: r8a7791: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A15 CPU cores and the Cortex-A15 L2 cache/SCU to
their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7791.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index a65910ed5884edfd..a194273eb2b7951e 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -51,6 +51,7 @@
 			voltage-tolerance = <1>; /* 1% */
 			clocks = <&cpg_clocks R8A7791_CLK_Z>;
 			clock-latency = <300000>; /* 300 us */
+			power-domains = <&pd_ca15_cpu0>;
 			next-level-cache = <&L2_CA15>;
 
 			/* kHz - uV - OPPs unknown yet */
@@ -67,12 +68,14 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1500000000>;
+			power-domains = <&pd_ca15_cpu1>;
 			next-level-cache = <&L2_CA15>;
 		};
 	};
 
 	L2_CA15: cache-controller at 0 {
 		compatible = "cache";
+		power-domains = <&pd_ca15_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1473,6 +1476,43 @@
 		};
 	};
 
+	sysc: system-controller at e6180000 {
+		compatible = "renesas,r8a7791-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu at 12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu at 0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu at 1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh at 16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx at 20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	qspi: spi at e6b10000 {
 		compatible = "renesas,qspi-r8a7791", "renesas,qspi";
 		reg = <0 0xe6b10000 0 0x2c>;
-- 
1.9.1

[PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Populate the SYSC PM domains from DT.

Special cases, like PM domains containing CPU cores or SCUs, are
handled by scanning the DT topology.

The SYSCIER register value is derived from the PM domains found in DT,
which will allow to get rid of the hardcoded values in pm-rcar-gen2.c.
However, this means we have to scan for PM domains even if CONFIG_PM=n.

FIXME:
  - This needs better integration with the PM code in pm-rcar-gen2, the
    SMP code in smp-r8a7790, and Magnus' DT APMU series.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
v2:
  - Add missing definitions for SYSC_PWR_CA15_CPU and SYSC_PWR_CA7_CPU,
  - Add R-Car H3 (r8a7795) support,
  - Drop tests for CONFIG_ARCH_SHMOBILE_LEGACY,
  - Add missing break statements in rcar_sysc_pwr_on_off(),
  - Add missing calls to of_node_put() in error paths,
  - Fix build if CONFIG_PM=n,
  - Update compatible values,
  - Update copyright.
---
 drivers/soc/renesas/pm-rcar.c | 327 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 327 insertions(+)

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index cc684e9cc8db5d1c..c0540934126e58eb 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -2,6 +2,7 @@
  * R-Car SYSC Power management support
  *
  * Copyright (C) 2014  Magnus Damm
+ * Copyright (C) 2015-2016 Glider bvba
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -11,6 +12,9 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>
+#include <linux/of_address.h>
+#include <linux/pm_domain.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/soc/renesas/pm-rcar.h>
@@ -38,6 +42,18 @@
 #define PWRONSR_OFFS		0x10	/* Power Resume Status Register */
 #define PWRER_OFFS		0x14	/* Power Shutoff/Resume Error */
 
+/*
+ * SYSC Power Control Register Base Addresses (R-Car Gen2)
+ */
+#define SYSC_PWR_CA15_CPU	0x40	/* CA15 cores (incl. L1C) (H2/M2/V2H) */
+#define SYSC_PWR_CA7_CPU	0x1c0	/* CA7 cores (incl. L1C) (H2/E2) */
+
+/*
+ * SYSC Power Control Register Base Addresses (R-Car Gen3)
+ */
+#define SYSC_PWR_CA57_CPU	0x80	/* CA57 cores (incl. L1C) (H3) */
+#define SYSC_PWR_CA53_CPU	0x200	/* CA53 cores (incl. L1C) (H3) */
+
 
 #define SYSCSR_RETRIES		100
 #define SYSCSR_DELAY_US		1
@@ -51,11 +67,40 @@
 static void __iomem *rcar_sysc_base;
 static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
 
+static unsigned int rcar_gen;
+
 static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on)
 {
 	unsigned int sr_bit, reg_offs;
 	int k;
 
+	/*
+	 * Only R-Car H1 can control power to CPUs
+	 * Use WFI to power off, CPG/APMU to resume ARM cores on later R-Car
+	 * Generations
+	 */
+	switch (rcar_gen) {
+	case 2:
+		/* FIXME Check rcar_pm_domain.cpu instead? */
+		switch (sysc_ch->chan_offs) {
+		case SYSC_PWR_CA15_CPU:
+		case SYSC_PWR_CA7_CPU:
+			pr_err("%s: Cannot control power to CPU\n", __func__);
+			return -EINVAL;
+		}
+		break;
+
+	case 3:
+		/* FIXME Check rcar_pm_domain.cpu instead? */
+		switch (sysc_ch->chan_offs) {
+		case SYSC_PWR_CA57_CPU:
+		case SYSC_PWR_CA53_CPU:
+			pr_err("%s: Cannot control power to CPU\n", __func__);
+			return -EINVAL;
+		}
+		break;
+	}
+
 	if (on) {
 		sr_bit = SYSCSR_PONENB;
 		reg_offs = PWRONCR_OFFS;
@@ -162,3 +207,285 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
 
 	return rcar_sysc_base;
 }
+
+#ifdef CONFIG_PM_GENERIC_DOMAINS
+struct rcar_pm_domain {
+	struct generic_pm_domain genpd;
+	struct dev_power_governor *gov;
+	struct rcar_sysc_ch ch;
+	unsigned busy:1;		/* Set if always -EBUSY */
+	unsigned cpu:1;			/* Set if domain contains CPU */
+	char name[0];
+};
+
+static inline struct rcar_pm_domain *to_rcar_pd(struct generic_pm_domain *d)
+{
+	return container_of(d, struct rcar_pm_domain, genpd);
+}
+
+static bool rcar_pd_active_wakeup(struct device *dev)
+{
+	return true;
+}
+
+static int rcar_pd_power_down(struct generic_pm_domain *genpd)
+{
+	struct rcar_pm_domain *rcar_pd = to_rcar_pd(genpd);
+
+	pr_debug("%s: %s\n", __func__, genpd->name);
+
+	if (rcar_pd->busy) {
+		pr_debug("%s: %s busy\n", __func__, genpd->name);
+		return -EBUSY;
+	}
+
+	return rcar_sysc_power_down(&rcar_pd->ch);
+}
+
+static int rcar_pd_power_up(struct generic_pm_domain *genpd)
+{
+	pr_debug("%s: %s\n", __func__, genpd->name);
+	return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
+}
+
+static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
+{
+	struct generic_pm_domain *genpd = &rcar_pd->genpd;
+	struct dev_power_governor *gov = rcar_pd->gov;
+
+	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
+	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
+	genpd->power_off		= rcar_pd_power_down;
+	genpd->power_on			= rcar_pd_power_up;
+
+	if (rcar_sysc_power_is_off(&rcar_pd->ch))
+		rcar_sysc_power_up(&rcar_pd->ch);
+}
+
+enum pd_types {
+	PD_NORMAL,
+	PD_CPU,
+	PD_SCU,
+};
+
+#define MAX_NUM_SPECIAL_PDS	16
+
+static struct special_pd {
+	struct device_node *pd;
+	enum pd_types type;
+} special_pds[MAX_NUM_SPECIAL_PDS] __initdata;
+
+static unsigned int num_special_pds __initdata;
+
+static void __init add_special_pd(struct device_node *np, enum pd_types type)
+{
+	unsigned int i;
+	struct device_node *pd;
+
+	pd = of_parse_phandle(np, "power-domains", 0);
+	if (!pd)
+		return;
+
+	for (i = 0; i < num_special_pds; i++)
+		if (pd == special_pds[i].pd && type == special_pds[i].type) {
+			of_node_put(pd);
+			return;
+		}
+
+	if (num_special_pds == ARRAY_SIZE(special_pds)) {
+		pr_warn("Too many special PM domains\n");
+		of_node_put(pd);
+		return;
+	}
+
+	pr_debug("Special PM domain %s type %d for %s\n", pd->name, type,
+		 np->full_name);
+
+	special_pds[num_special_pds].pd = pd;
+	special_pds[num_special_pds].type = type;
+	num_special_pds++;
+}
+
+static void __init get_special_pds(void)
+{
+	struct device_node *cpu, *scu;
+
+	/* PM domains containing CPUs */
+	for_each_node_by_type(cpu, "cpu") {
+		add_special_pd(cpu, PD_CPU);
+
+		/* SCU, represented by an L2 node */
+		scu = of_parse_phandle(cpu, "next-level-cache", 0);
+		if (scu) {
+			add_special_pd(scu, PD_SCU);
+			of_node_put(scu);
+		}
+	}
+}
+
+static void __init put_special_pds(void)
+{
+	unsigned int i;
+
+	for (i = 0; i < num_special_pds; i++)
+		of_node_put(special_pds[i].pd);
+}
+
+static enum pd_types __init pd_type(const struct device_node *pd)
+{
+	unsigned int i;
+
+	for (i = 0; i < num_special_pds; i++)
+		if (pd == special_pds[i].pd)
+			return special_pds[i].type;
+
+	return PD_NORMAL;
+}
+
+static void __init rcar_setup_pm_domain(struct device_node *np,
+					struct rcar_pm_domain *pd)
+{
+	const char *name = pd->genpd.name;
+
+	switch (pd_type(np)) {
+	case PD_CPU:
+		/*
+		 * This domain contains a CPU core and therefore it should
+		 * only be turned off if the CPU is not in use.
+		 */
+		pr_debug("PM domain %s contains CPU\n", name);
+		pd->gov = &pm_domain_always_on_gov;
+		pd->busy = true;
+		pd->cpu = true;
+		break;
+
+	case PD_SCU:
+		/*
+		 * This domain contains an SCU and cache-controller, and
+		 * therefore it should only be turned off if the CPU cores are
+		 * not in use.
+		 */
+		pr_debug("PM domain %s contains SCU\n", name);
+		pd->gov = &pm_domain_always_on_gov;
+		pd->busy = true;
+		break;
+
+	case PD_NORMAL:
+		break;
+	}
+
+	rcar_init_pm_domain(pd);
+}
+
+static int __init rcar_add_pm_domains(struct device_node *parent,
+				      struct generic_pm_domain *genpd_parent,
+				      u32 *syscier)
+{
+	struct device_node *np;
+
+	for_each_child_of_node(parent, np) {
+		struct rcar_pm_domain *pd;
+		u32 reg[2];
+		int n;
+
+		if (of_property_read_u32_array(np, "reg", reg,
+					       ARRAY_SIZE(reg))) {
+			of_node_put(np);
+			return -EINVAL;
+		}
+
+		*syscier |= BIT(reg[0]);
+
+		if (!IS_ENABLED(CONFIG_PM)) {
+			/* Just continue parsing "reg" to update *syscier */
+			rcar_add_pm_domains(np, NULL, syscier);
+			continue;
+		}
+
+		n = snprintf(NULL, 0, "%s@%u", np->name, reg[0]) + 1;
+
+		pd = kzalloc(sizeof(*pd) + n, GFP_KERNEL);
+		if (!pd) {
+			of_node_put(np);
+			return -ENOMEM;
+		}
+
+		snprintf(pd->name, n, "%s@%u", np->name, reg[0]);
+		pd->genpd.name = pd->name;
+		pd->ch.chan_offs = reg[1] & ~31;
+		pd->ch.chan_bit = reg[1] & 31;
+		pd->ch.isr_bit = reg[0];
+
+		rcar_setup_pm_domain(np, pd);
+		if (genpd_parent)
+			pm_genpd_add_subdomain(genpd_parent, &pd->genpd);
+		of_genpd_add_provider_simple(np, &pd->genpd);
+
+		rcar_add_pm_domains(np, &pd->genpd, syscier);
+	}
+	return 0;
+}
+
+static const struct of_device_id rcar_sysc_matches[] = {
+	{ .compatible = "renesas,r8a7779-sysc", .data = (void *)1 },
+	{ .compatible = "renesas,rcar-gen2-sysc", .data = (void *)2 },
+	{ .compatible = "renesas,rcar-gen3-sysc", .data = (void *)3 },
+	{ /* sentinel */ }
+};
+
+static int __init rcar_init_pm_domains(void)
+{
+	const struct of_device_id *match;
+	struct device_node *np, *pmd;
+	bool scanned = false;
+	void __iomem *base;
+	int ret = 0;
+
+	for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
+		u32 syscier = 0;
+
+		rcar_gen = (uintptr_t)match->data;
+
+		base = of_iomap(np, 0);
+		if (!base) {
+			pr_warn("%s cannot map reg 0\n", np->full_name);
+			continue;
+		}
+
+		rcar_sysc_base = base;	// FIXME conflicts with rcar_sysc_init()
+
+		pmd = of_get_child_by_name(np, "pm-domains");
+		if (!pmd) {
+			pr_warn("%s lacks pm-domains node\n", np->full_name);
+			continue;
+		}
+
+		if (!scanned) {
+			/* Find PM domains containing special blocks */
+			get_special_pds();
+			scanned = true;
+		}
+
+		ret = rcar_add_pm_domains(pmd, NULL, &syscier);
+		of_node_put(pmd);
+		if (ret) {
+			of_node_put(np);
+			break;
+		}
+
+		/*
+		 * Enable all interrupt sources, but do not use interrupt
+		 * handler
+		 */
+		pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
+		iowrite32(syscier, rcar_sysc_base + SYSCIER);
+		iowrite32(0, rcar_sysc_base + SYSCIMR);
+	}
+
+	put_special_pds();
+
+	return ret;
+}
+
+core_initcall(rcar_init_pm_domains);
+#endif /* PM_GENERIC_DOMAINS */
-- 
1.9.1

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[PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Populate the SYSC PM domains from DT.

Special cases, like PM domains containing CPU cores or SCUs, are
handled by scanning the DT topology.

The SYSCIER register value is derived from the PM domains found in DT,
which will allow to get rid of the hardcoded values in pm-rcar-gen2.c.
However, this means we have to scan for PM domains even if CONFIG_PM=n.

FIXME:
  - This needs better integration with the PM code in pm-rcar-gen2, the
    SMP code in smp-r8a7790, and Magnus' DT APMU series.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Add missing definitions for SYSC_PWR_CA15_CPU and SYSC_PWR_CA7_CPU,
  - Add R-Car H3 (r8a7795) support,
  - Drop tests for CONFIG_ARCH_SHMOBILE_LEGACY,
  - Add missing break statements in rcar_sysc_pwr_on_off(),
  - Add missing calls to of_node_put() in error paths,
  - Fix build if CONFIG_PM=n,
  - Update compatible values,
  - Update copyright.
---
 drivers/soc/renesas/pm-rcar.c | 327 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 327 insertions(+)

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index cc684e9cc8db5d1c..c0540934126e58eb 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -2,6 +2,7 @@
  * R-Car SYSC Power management support
  *
  * Copyright (C) 2014  Magnus Damm
+ * Copyright (C) 2015-2016 Glider bvba
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -11,6 +12,9 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>
+#include <linux/of_address.h>
+#include <linux/pm_domain.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/soc/renesas/pm-rcar.h>
@@ -38,6 +42,18 @@
 #define PWRONSR_OFFS		0x10	/* Power Resume Status Register */
 #define PWRER_OFFS		0x14	/* Power Shutoff/Resume Error */
 
+/*
+ * SYSC Power Control Register Base Addresses (R-Car Gen2)
+ */
+#define SYSC_PWR_CA15_CPU	0x40	/* CA15 cores (incl. L1C) (H2/M2/V2H) */
+#define SYSC_PWR_CA7_CPU	0x1c0	/* CA7 cores (incl. L1C) (H2/E2) */
+
+/*
+ * SYSC Power Control Register Base Addresses (R-Car Gen3)
+ */
+#define SYSC_PWR_CA57_CPU	0x80	/* CA57 cores (incl. L1C) (H3) */
+#define SYSC_PWR_CA53_CPU	0x200	/* CA53 cores (incl. L1C) (H3) */
+
 
 #define SYSCSR_RETRIES		100
 #define SYSCSR_DELAY_US		1
@@ -51,11 +67,40 @@
 static void __iomem *rcar_sysc_base;
 static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
 
+static unsigned int rcar_gen;
+
 static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on)
 {
 	unsigned int sr_bit, reg_offs;
 	int k;
 
+	/*
+	 * Only R-Car H1 can control power to CPUs
+	 * Use WFI to power off, CPG/APMU to resume ARM cores on later R-Car
+	 * Generations
+	 */
+	switch (rcar_gen) {
+	case 2:
+		/* FIXME Check rcar_pm_domain.cpu instead? */
+		switch (sysc_ch->chan_offs) {
+		case SYSC_PWR_CA15_CPU:
+		case SYSC_PWR_CA7_CPU:
+			pr_err("%s: Cannot control power to CPU\n", __func__);
+			return -EINVAL;
+		}
+		break;
+
+	case 3:
+		/* FIXME Check rcar_pm_domain.cpu instead? */
+		switch (sysc_ch->chan_offs) {
+		case SYSC_PWR_CA57_CPU:
+		case SYSC_PWR_CA53_CPU:
+			pr_err("%s: Cannot control power to CPU\n", __func__);
+			return -EINVAL;
+		}
+		break;
+	}
+
 	if (on) {
 		sr_bit = SYSCSR_PONENB;
 		reg_offs = PWRONCR_OFFS;
@@ -162,3 +207,285 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
 
 	return rcar_sysc_base;
 }
+
+#ifdef CONFIG_PM_GENERIC_DOMAINS
+struct rcar_pm_domain {
+	struct generic_pm_domain genpd;
+	struct dev_power_governor *gov;
+	struct rcar_sysc_ch ch;
+	unsigned busy:1;		/* Set if always -EBUSY */
+	unsigned cpu:1;			/* Set if domain contains CPU */
+	char name[0];
+};
+
+static inline struct rcar_pm_domain *to_rcar_pd(struct generic_pm_domain *d)
+{
+	return container_of(d, struct rcar_pm_domain, genpd);
+}
+
+static bool rcar_pd_active_wakeup(struct device *dev)
+{
+	return true;
+}
+
+static int rcar_pd_power_down(struct generic_pm_domain *genpd)
+{
+	struct rcar_pm_domain *rcar_pd = to_rcar_pd(genpd);
+
+	pr_debug("%s: %s\n", __func__, genpd->name);
+
+	if (rcar_pd->busy) {
+		pr_debug("%s: %s busy\n", __func__, genpd->name);
+		return -EBUSY;
+	}
+
+	return rcar_sysc_power_down(&rcar_pd->ch);
+}
+
+static int rcar_pd_power_up(struct generic_pm_domain *genpd)
+{
+	pr_debug("%s: %s\n", __func__, genpd->name);
+	return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
+}
+
+static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
+{
+	struct generic_pm_domain *genpd = &rcar_pd->genpd;
+	struct dev_power_governor *gov = rcar_pd->gov;
+
+	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
+	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
+	genpd->power_off		= rcar_pd_power_down;
+	genpd->power_on			= rcar_pd_power_up;
+
+	if (rcar_sysc_power_is_off(&rcar_pd->ch))
+		rcar_sysc_power_up(&rcar_pd->ch);
+}
+
+enum pd_types {
+	PD_NORMAL,
+	PD_CPU,
+	PD_SCU,
+};
+
+#define MAX_NUM_SPECIAL_PDS	16
+
+static struct special_pd {
+	struct device_node *pd;
+	enum pd_types type;
+} special_pds[MAX_NUM_SPECIAL_PDS] __initdata;
+
+static unsigned int num_special_pds __initdata;
+
+static void __init add_special_pd(struct device_node *np, enum pd_types type)
+{
+	unsigned int i;
+	struct device_node *pd;
+
+	pd = of_parse_phandle(np, "power-domains", 0);
+	if (!pd)
+		return;
+
+	for (i = 0; i < num_special_pds; i++)
+		if (pd == special_pds[i].pd && type == special_pds[i].type) {
+			of_node_put(pd);
+			return;
+		}
+
+	if (num_special_pds == ARRAY_SIZE(special_pds)) {
+		pr_warn("Too many special PM domains\n");
+		of_node_put(pd);
+		return;
+	}
+
+	pr_debug("Special PM domain %s type %d for %s\n", pd->name, type,
+		 np->full_name);
+
+	special_pds[num_special_pds].pd = pd;
+	special_pds[num_special_pds].type = type;
+	num_special_pds++;
+}
+
+static void __init get_special_pds(void)
+{
+	struct device_node *cpu, *scu;
+
+	/* PM domains containing CPUs */
+	for_each_node_by_type(cpu, "cpu") {
+		add_special_pd(cpu, PD_CPU);
+
+		/* SCU, represented by an L2 node */
+		scu = of_parse_phandle(cpu, "next-level-cache", 0);
+		if (scu) {
+			add_special_pd(scu, PD_SCU);
+			of_node_put(scu);
+		}
+	}
+}
+
+static void __init put_special_pds(void)
+{
+	unsigned int i;
+
+	for (i = 0; i < num_special_pds; i++)
+		of_node_put(special_pds[i].pd);
+}
+
+static enum pd_types __init pd_type(const struct device_node *pd)
+{
+	unsigned int i;
+
+	for (i = 0; i < num_special_pds; i++)
+		if (pd == special_pds[i].pd)
+			return special_pds[i].type;
+
+	return PD_NORMAL;
+}
+
+static void __init rcar_setup_pm_domain(struct device_node *np,
+					struct rcar_pm_domain *pd)
+{
+	const char *name = pd->genpd.name;
+
+	switch (pd_type(np)) {
+	case PD_CPU:
+		/*
+		 * This domain contains a CPU core and therefore it should
+		 * only be turned off if the CPU is not in use.
+		 */
+		pr_debug("PM domain %s contains CPU\n", name);
+		pd->gov = &pm_domain_always_on_gov;
+		pd->busy = true;
+		pd->cpu = true;
+		break;
+
+	case PD_SCU:
+		/*
+		 * This domain contains an SCU and cache-controller, and
+		 * therefore it should only be turned off if the CPU cores are
+		 * not in use.
+		 */
+		pr_debug("PM domain %s contains SCU\n", name);
+		pd->gov = &pm_domain_always_on_gov;
+		pd->busy = true;
+		break;
+
+	case PD_NORMAL:
+		break;
+	}
+
+	rcar_init_pm_domain(pd);
+}
+
+static int __init rcar_add_pm_domains(struct device_node *parent,
+				      struct generic_pm_domain *genpd_parent,
+				      u32 *syscier)
+{
+	struct device_node *np;
+
+	for_each_child_of_node(parent, np) {
+		struct rcar_pm_domain *pd;
+		u32 reg[2];
+		int n;
+
+		if (of_property_read_u32_array(np, "reg", reg,
+					       ARRAY_SIZE(reg))) {
+			of_node_put(np);
+			return -EINVAL;
+		}
+
+		*syscier |= BIT(reg[0]);
+
+		if (!IS_ENABLED(CONFIG_PM)) {
+			/* Just continue parsing "reg" to update *syscier */
+			rcar_add_pm_domains(np, NULL, syscier);
+			continue;
+		}
+
+		n = snprintf(NULL, 0, "%s@%u", np->name, reg[0]) + 1;
+
+		pd = kzalloc(sizeof(*pd) + n, GFP_KERNEL);
+		if (!pd) {
+			of_node_put(np);
+			return -ENOMEM;
+		}
+
+		snprintf(pd->name, n, "%s@%u", np->name, reg[0]);
+		pd->genpd.name = pd->name;
+		pd->ch.chan_offs = reg[1] & ~31;
+		pd->ch.chan_bit = reg[1] & 31;
+		pd->ch.isr_bit = reg[0];
+
+		rcar_setup_pm_domain(np, pd);
+		if (genpd_parent)
+			pm_genpd_add_subdomain(genpd_parent, &pd->genpd);
+		of_genpd_add_provider_simple(np, &pd->genpd);
+
+		rcar_add_pm_domains(np, &pd->genpd, syscier);
+	}
+	return 0;
+}
+
+static const struct of_device_id rcar_sysc_matches[] = {
+	{ .compatible = "renesas,r8a7779-sysc", .data = (void *)1 },
+	{ .compatible = "renesas,rcar-gen2-sysc", .data = (void *)2 },
+	{ .compatible = "renesas,rcar-gen3-sysc", .data = (void *)3 },
+	{ /* sentinel */ }
+};
+
+static int __init rcar_init_pm_domains(void)
+{
+	const struct of_device_id *match;
+	struct device_node *np, *pmd;
+	bool scanned = false;
+	void __iomem *base;
+	int ret = 0;
+
+	for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
+		u32 syscier = 0;
+
+		rcar_gen = (uintptr_t)match->data;
+
+		base = of_iomap(np, 0);
+		if (!base) {
+			pr_warn("%s cannot map reg 0\n", np->full_name);
+			continue;
+		}
+
+		rcar_sysc_base = base;	// FIXME conflicts with rcar_sysc_init()
+
+		pmd = of_get_child_by_name(np, "pm-domains");
+		if (!pmd) {
+			pr_warn("%s lacks pm-domains node\n", np->full_name);
+			continue;
+		}
+
+		if (!scanned) {
+			/* Find PM domains containing special blocks */
+			get_special_pds();
+			scanned = true;
+		}
+
+		ret = rcar_add_pm_domains(pmd, NULL, &syscier);
+		of_node_put(pmd);
+		if (ret) {
+			of_node_put(np);
+			break;
+		}
+
+		/*
+		 * Enable all interrupt sources, but do not use interrupt
+		 * handler
+		 */
+		pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
+		iowrite32(syscier, rcar_sysc_base + SYSCIER);
+		iowrite32(0, rcar_sysc_base + SYSCIMR);
+	}
+
+	put_special_pds();
+
+	return ret;
+}
+
+core_initcall(rcar_init_pm_domains);
+#endif /* PM_GENERIC_DOMAINS */
-- 
1.9.1

[PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Populate the SYSC PM domains from DT.

Special cases, like PM domains containing CPU cores or SCUs, are
handled by scanning the DT topology.

The SYSCIER register value is derived from the PM domains found in DT,
which will allow to get rid of the hardcoded values in pm-rcar-gen2.c.
However, this means we have to scan for PM domains even if CONFIG_PM=n.

FIXME:
  - This needs better integration with the PM code in pm-rcar-gen2, the
    SMP code in smp-r8a7790, and Magnus' DT APMU series.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Add missing definitions for SYSC_PWR_CA15_CPU and SYSC_PWR_CA7_CPU,
  - Add R-Car H3 (r8a7795) support,
  - Drop tests for CONFIG_ARCH_SHMOBILE_LEGACY,
  - Add missing break statements in rcar_sysc_pwr_on_off(),
  - Add missing calls to of_node_put() in error paths,
  - Fix build if CONFIG_PM=n,
  - Update compatible values,
  - Update copyright.
---
 drivers/soc/renesas/pm-rcar.c | 327 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 327 insertions(+)

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index cc684e9cc8db5d1c..c0540934126e58eb 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -2,6 +2,7 @@
  * R-Car SYSC Power management support
  *
  * Copyright (C) 2014  Magnus Damm
+ * Copyright (C) 2015-2016 Glider bvba
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -11,6 +12,9 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>
+#include <linux/of_address.h>
+#include <linux/pm_domain.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/soc/renesas/pm-rcar.h>
@@ -38,6 +42,18 @@
 #define PWRONSR_OFFS		0x10	/* Power Resume Status Register */
 #define PWRER_OFFS		0x14	/* Power Shutoff/Resume Error */
 
+/*
+ * SYSC Power Control Register Base Addresses (R-Car Gen2)
+ */
+#define SYSC_PWR_CA15_CPU	0x40	/* CA15 cores (incl. L1C) (H2/M2/V2H) */
+#define SYSC_PWR_CA7_CPU	0x1c0	/* CA7 cores (incl. L1C) (H2/E2) */
+
+/*
+ * SYSC Power Control Register Base Addresses (R-Car Gen3)
+ */
+#define SYSC_PWR_CA57_CPU	0x80	/* CA57 cores (incl. L1C) (H3) */
+#define SYSC_PWR_CA53_CPU	0x200	/* CA53 cores (incl. L1C) (H3) */
+
 
 #define SYSCSR_RETRIES		100
 #define SYSCSR_DELAY_US		1
@@ -51,11 +67,40 @@
 static void __iomem *rcar_sysc_base;
 static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
 
+static unsigned int rcar_gen;
+
 static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on)
 {
 	unsigned int sr_bit, reg_offs;
 	int k;
 
+	/*
+	 * Only R-Car H1 can control power to CPUs
+	 * Use WFI to power off, CPG/APMU to resume ARM cores on later R-Car
+	 * Generations
+	 */
+	switch (rcar_gen) {
+	case 2:
+		/* FIXME Check rcar_pm_domain.cpu instead? */
+		switch (sysc_ch->chan_offs) {
+		case SYSC_PWR_CA15_CPU:
+		case SYSC_PWR_CA7_CPU:
+			pr_err("%s: Cannot control power to CPU\n", __func__);
+			return -EINVAL;
+		}
+		break;
+
+	case 3:
+		/* FIXME Check rcar_pm_domain.cpu instead? */
+		switch (sysc_ch->chan_offs) {
+		case SYSC_PWR_CA57_CPU:
+		case SYSC_PWR_CA53_CPU:
+			pr_err("%s: Cannot control power to CPU\n", __func__);
+			return -EINVAL;
+		}
+		break;
+	}
+
 	if (on) {
 		sr_bit = SYSCSR_PONENB;
 		reg_offs = PWRONCR_OFFS;
@@ -162,3 +207,285 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
 
 	return rcar_sysc_base;
 }
+
+#ifdef CONFIG_PM_GENERIC_DOMAINS
+struct rcar_pm_domain {
+	struct generic_pm_domain genpd;
+	struct dev_power_governor *gov;
+	struct rcar_sysc_ch ch;
+	unsigned busy:1;		/* Set if always -EBUSY */
+	unsigned cpu:1;			/* Set if domain contains CPU */
+	char name[0];
+};
+
+static inline struct rcar_pm_domain *to_rcar_pd(struct generic_pm_domain *d)
+{
+	return container_of(d, struct rcar_pm_domain, genpd);
+}
+
+static bool rcar_pd_active_wakeup(struct device *dev)
+{
+	return true;
+}
+
+static int rcar_pd_power_down(struct generic_pm_domain *genpd)
+{
+	struct rcar_pm_domain *rcar_pd = to_rcar_pd(genpd);
+
+	pr_debug("%s: %s\n", __func__, genpd->name);
+
+	if (rcar_pd->busy) {
+		pr_debug("%s: %s busy\n", __func__, genpd->name);
+		return -EBUSY;
+	}
+
+	return rcar_sysc_power_down(&rcar_pd->ch);
+}
+
+static int rcar_pd_power_up(struct generic_pm_domain *genpd)
+{
+	pr_debug("%s: %s\n", __func__, genpd->name);
+	return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
+}
+
+static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
+{
+	struct generic_pm_domain *genpd = &rcar_pd->genpd;
+	struct dev_power_governor *gov = rcar_pd->gov;
+
+	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
+	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
+	genpd->power_off		= rcar_pd_power_down;
+	genpd->power_on			= rcar_pd_power_up;
+
+	if (rcar_sysc_power_is_off(&rcar_pd->ch))
+		rcar_sysc_power_up(&rcar_pd->ch);
+}
+
+enum pd_types {
+	PD_NORMAL,
+	PD_CPU,
+	PD_SCU,
+};
+
+#define MAX_NUM_SPECIAL_PDS	16
+
+static struct special_pd {
+	struct device_node *pd;
+	enum pd_types type;
+} special_pds[MAX_NUM_SPECIAL_PDS] __initdata;
+
+static unsigned int num_special_pds __initdata;
+
+static void __init add_special_pd(struct device_node *np, enum pd_types type)
+{
+	unsigned int i;
+	struct device_node *pd;
+
+	pd = of_parse_phandle(np, "power-domains", 0);
+	if (!pd)
+		return;
+
+	for (i = 0; i < num_special_pds; i++)
+		if (pd == special_pds[i].pd && type == special_pds[i].type) {
+			of_node_put(pd);
+			return;
+		}
+
+	if (num_special_pds == ARRAY_SIZE(special_pds)) {
+		pr_warn("Too many special PM domains\n");
+		of_node_put(pd);
+		return;
+	}
+
+	pr_debug("Special PM domain %s type %d for %s\n", pd->name, type,
+		 np->full_name);
+
+	special_pds[num_special_pds].pd = pd;
+	special_pds[num_special_pds].type = type;
+	num_special_pds++;
+}
+
+static void __init get_special_pds(void)
+{
+	struct device_node *cpu, *scu;
+
+	/* PM domains containing CPUs */
+	for_each_node_by_type(cpu, "cpu") {
+		add_special_pd(cpu, PD_CPU);
+
+		/* SCU, represented by an L2 node */
+		scu = of_parse_phandle(cpu, "next-level-cache", 0);
+		if (scu) {
+			add_special_pd(scu, PD_SCU);
+			of_node_put(scu);
+		}
+	}
+}
+
+static void __init put_special_pds(void)
+{
+	unsigned int i;
+
+	for (i = 0; i < num_special_pds; i++)
+		of_node_put(special_pds[i].pd);
+}
+
+static enum pd_types __init pd_type(const struct device_node *pd)
+{
+	unsigned int i;
+
+	for (i = 0; i < num_special_pds; i++)
+		if (pd == special_pds[i].pd)
+			return special_pds[i].type;
+
+	return PD_NORMAL;
+}
+
+static void __init rcar_setup_pm_domain(struct device_node *np,
+					struct rcar_pm_domain *pd)
+{
+	const char *name = pd->genpd.name;
+
+	switch (pd_type(np)) {
+	case PD_CPU:
+		/*
+		 * This domain contains a CPU core and therefore it should
+		 * only be turned off if the CPU is not in use.
+		 */
+		pr_debug("PM domain %s contains CPU\n", name);
+		pd->gov = &pm_domain_always_on_gov;
+		pd->busy = true;
+		pd->cpu = true;
+		break;
+
+	case PD_SCU:
+		/*
+		 * This domain contains an SCU and cache-controller, and
+		 * therefore it should only be turned off if the CPU cores are
+		 * not in use.
+		 */
+		pr_debug("PM domain %s contains SCU\n", name);
+		pd->gov = &pm_domain_always_on_gov;
+		pd->busy = true;
+		break;
+
+	case PD_NORMAL:
+		break;
+	}
+
+	rcar_init_pm_domain(pd);
+}
+
+static int __init rcar_add_pm_domains(struct device_node *parent,
+				      struct generic_pm_domain *genpd_parent,
+				      u32 *syscier)
+{
+	struct device_node *np;
+
+	for_each_child_of_node(parent, np) {
+		struct rcar_pm_domain *pd;
+		u32 reg[2];
+		int n;
+
+		if (of_property_read_u32_array(np, "reg", reg,
+					       ARRAY_SIZE(reg))) {
+			of_node_put(np);
+			return -EINVAL;
+		}
+
+		*syscier |= BIT(reg[0]);
+
+		if (!IS_ENABLED(CONFIG_PM)) {
+			/* Just continue parsing "reg" to update *syscier */
+			rcar_add_pm_domains(np, NULL, syscier);
+			continue;
+		}
+
+		n = snprintf(NULL, 0, "%s@%u", np->name, reg[0]) + 1;
+
+		pd = kzalloc(sizeof(*pd) + n, GFP_KERNEL);
+		if (!pd) {
+			of_node_put(np);
+			return -ENOMEM;
+		}
+
+		snprintf(pd->name, n, "%s@%u", np->name, reg[0]);
+		pd->genpd.name = pd->name;
+		pd->ch.chan_offs = reg[1] & ~31;
+		pd->ch.chan_bit = reg[1] & 31;
+		pd->ch.isr_bit = reg[0];
+
+		rcar_setup_pm_domain(np, pd);
+		if (genpd_parent)
+			pm_genpd_add_subdomain(genpd_parent, &pd->genpd);
+		of_genpd_add_provider_simple(np, &pd->genpd);
+
+		rcar_add_pm_domains(np, &pd->genpd, syscier);
+	}
+	return 0;
+}
+
+static const struct of_device_id rcar_sysc_matches[] = {
+	{ .compatible = "renesas,r8a7779-sysc", .data = (void *)1 },
+	{ .compatible = "renesas,rcar-gen2-sysc", .data = (void *)2 },
+	{ .compatible = "renesas,rcar-gen3-sysc", .data = (void *)3 },
+	{ /* sentinel */ }
+};
+
+static int __init rcar_init_pm_domains(void)
+{
+	const struct of_device_id *match;
+	struct device_node *np, *pmd;
+	bool scanned = false;
+	void __iomem *base;
+	int ret = 0;
+
+	for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
+		u32 syscier = 0;
+
+		rcar_gen = (uintptr_t)match->data;
+
+		base = of_iomap(np, 0);
+		if (!base) {
+			pr_warn("%s cannot map reg 0\n", np->full_name);
+			continue;
+		}
+
+		rcar_sysc_base = base;	// FIXME conflicts with rcar_sysc_init()
+
+		pmd = of_get_child_by_name(np, "pm-domains");
+		if (!pmd) {
+			pr_warn("%s lacks pm-domains node\n", np->full_name);
+			continue;
+		}
+
+		if (!scanned) {
+			/* Find PM domains containing special blocks */
+			get_special_pds();
+			scanned = true;
+		}
+
+		ret = rcar_add_pm_domains(pmd, NULL, &syscier);
+		of_node_put(pmd);
+		if (ret) {
+			of_node_put(np);
+			break;
+		}
+
+		/*
+		 * Enable all interrupt sources, but do not use interrupt
+		 * handler
+		 */
+		pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
+		iowrite32(syscier, rcar_sysc_base + SYSCIER);
+		iowrite32(0, rcar_sysc_base + SYSCIMR);
+	}
+
+	put_special_pds();
+
+	return ret;
+}
+
+core_initcall(rcar_init_pm_domains);
+#endif /* PM_GENERIC_DOMAINS */
-- 
1.9.1

Re: [PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:53 Geert Uytterhoeven wrote:
> Populate the SYSC PM domains from DT.
> 
> Special cases, like PM domains containing CPU cores or SCUs, are
> handled by scanning the DT topology.
> 
> The SYSCIER register value is derived from the PM domains found in DT,
> which will allow to get rid of the hardcoded values in pm-rcar-gen2.c.
> However, this means we have to scan for PM domains even if CONFIG_PM=n.
> 
> FIXME:
>   - This needs better integration with the PM code in pm-rcar-gen2, the
>     SMP code in smp-r8a7790, and Magnus' DT APMU series.

Have you given this some thoughts already ? Unfortunately smp_prepare_cpus() 
is called before any initcall :-/ How do the other platforms handle this ?

> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
>   - Add missing definitions for SYSC_PWR_CA15_CPU and SYSC_PWR_CA7_CPU,
>   - Add R-Car H3 (r8a7795) support,
>   - Drop tests for CONFIG_ARCH_SHMOBILE_LEGACY,
>   - Add missing break statements in rcar_sysc_pwr_on_off(),
>   - Add missing calls to of_node_put() in error paths,
>   - Fix build if CONFIG_PM=n,
>   - Update compatible values,
>   - Update copyright.
> ---
>  drivers/soc/renesas/pm-rcar.c | 327 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 327 insertions(+)
> 
> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
> index cc684e9cc8db5d1c..c0540934126e58eb 100644
> --- a/drivers/soc/renesas/pm-rcar.c
> +++ b/drivers/soc/renesas/pm-rcar.c
> @@ -2,6 +2,7 @@
>   * R-Car SYSC Power management support
>   *
>   * Copyright (C) 2014  Magnus Damm
> + * Copyright (C) 2015-2016 Glider bvba
>   *
>   * This file is subject to the terms and conditions of the GNU General
> Public * License.  See the file "COPYING" in the main directory of this
> archive @@ -11,6 +12,9 @@
>  #include <linux/delay.h>
>  #include <linux/err.h>
>  #include <linux/mm.h>
> +#include <linux/of_address.h>
> +#include <linux/pm_domain.h>
> +#include <linux/slab.h>
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
>  #include <linux/soc/renesas/pm-rcar.h>
> @@ -38,6 +42,18 @@
>  #define PWRONSR_OFFS		0x10	/* Power Resume Status Register */
>  #define PWRER_OFFS		0x14	/* Power Shutoff/Resume Error */
> 
> +/*
> + * SYSC Power Control Register Base Addresses (R-Car Gen2)
> + */
> +#define SYSC_PWR_CA15_CPU	0x40	/* CA15 cores (incl. L1C) (H2/M2/V2H) */
> +#define SYSC_PWR_CA7_CPU	0x1c0	/* CA7 cores (incl. L1C) (H2/E2) */
> +
> +/*
> + * SYSC Power Control Register Base Addresses (R-Car Gen3)
> + */
> +#define SYSC_PWR_CA57_CPU	0x80	/* CA57 cores (incl. L1C) (H3) */
> +#define SYSC_PWR_CA53_CPU	0x200	/* CA53 cores (incl. L1C) (H3) */
> +
> 
>  #define SYSCSR_RETRIES		100
>  #define SYSCSR_DELAY_US		1
> @@ -51,11 +67,40 @@
>  static void __iomem *rcar_sysc_base;
>  static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
> 
> +static unsigned int rcar_gen;
> +
>  static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool
> on)
> {
>  	unsigned int sr_bit, reg_offs;
>  	int k;
> 
> +	/*
> +	 * Only R-Car H1 can control power to CPUs
> +	 * Use WFI to power off, CPG/APMU to resume ARM cores on later R-Car
> +	 * Generations
> +	 */
> +	switch (rcar_gen) {
> +	case 2:
> +		/* FIXME Check rcar_pm_domain.cpu instead? */
> +		switch (sysc_ch->chan_offs) {
> +		case SYSC_PWR_CA15_CPU:
> +		case SYSC_PWR_CA7_CPU:
> +			pr_err("%s: Cannot control power to CPU\n", __func__);
> +			return -EINVAL;
> +		}
> +		break;
> +
> +	case 3:
> +		/* FIXME Check rcar_pm_domain.cpu instead? */
> +		switch (sysc_ch->chan_offs) {
> +		case SYSC_PWR_CA57_CPU:
> +		case SYSC_PWR_CA53_CPU:
> +			pr_err("%s: Cannot control power to CPU\n", __func__);
> +			return -EINVAL;
> +		}
> +		break;
> +	}
> +
>  	if (on) {
>  		sr_bit = SYSCSR_PONENB;
>  		reg_offs = PWRONCR_OFFS;
> @@ -162,3 +207,285 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
> 
>  	return rcar_sysc_base;
>  }
> +
> +#ifdef CONFIG_PM_GENERIC_DOMAINS
> +struct rcar_pm_domain {
> +	struct generic_pm_domain genpd;
> +	struct dev_power_governor *gov;
> +	struct rcar_sysc_ch ch;
> +	unsigned busy:1;		/* Set if always -EBUSY */
> +	unsigned cpu:1;			/* Set if domain contains CPU */
> +	char name[0];
> +};
> +
> +static inline struct rcar_pm_domain *to_rcar_pd(struct generic_pm_domain
> *d)
> +{
> +	return container_of(d, struct rcar_pm_domain, genpd);
> +}
> +
> +static bool rcar_pd_active_wakeup(struct device *dev)
> +{
> +	return true;
> +}
> +
> +static int rcar_pd_power_down(struct generic_pm_domain *genpd)
> +{
> +	struct rcar_pm_domain *rcar_pd = to_rcar_pd(genpd);
> +
> +	pr_debug("%s: %s\n", __func__, genpd->name);
> +
> +	if (rcar_pd->busy) {
> +		pr_debug("%s: %s busy\n", __func__, genpd->name);
> +		return -EBUSY;
> +	}
> +
> +	return rcar_sysc_power_down(&rcar_pd->ch);
> +}
> +
> +static int rcar_pd_power_up(struct generic_pm_domain *genpd)
> +{
> +	pr_debug("%s: %s\n", __func__, genpd->name);
> +	return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
> +}
> +
> +static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
> +{
> +	struct generic_pm_domain *genpd = &rcar_pd->genpd;
> +	struct dev_power_governor *gov = rcar_pd->gov;
> +
> +	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
> +	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
> +	genpd->power_off		= rcar_pd_power_down;
> +	genpd->power_on			= rcar_pd_power_up;
> +
> +	if (rcar_sysc_power_is_off(&rcar_pd->ch))
> +		rcar_sysc_power_up(&rcar_pd->ch);
> +}
> +
> +enum pd_types {
> +	PD_NORMAL,
> +	PD_CPU,
> +	PD_SCU,
> +};
> +
> +#define MAX_NUM_SPECIAL_PDS	16
> +
> +static struct special_pd {
> +	struct device_node *pd;
> +	enum pd_types type;
> +} special_pds[MAX_NUM_SPECIAL_PDS] __initdata;
> +
> +static unsigned int num_special_pds __initdata;
> +
> +static void __init add_special_pd(struct device_node *np, enum pd_types
> type)
> +{
> +	unsigned int i;
> +	struct device_node *pd;
> +
> +	pd = of_parse_phandle(np, "power-domains", 0);
> +	if (!pd)
> +		return;
> +
> +	for (i = 0; i < num_special_pds; i++)
> +		if (pd == special_pds[i].pd && type == special_pds[i].type) {
> +			of_node_put(pd);
> +			return;
> +		}
> +
> +	if (num_special_pds == ARRAY_SIZE(special_pds)) {
> +		pr_warn("Too many special PM domains\n");
> +		of_node_put(pd);
> +		return;
> +	}
> +
> +	pr_debug("Special PM domain %s type %d for %s\n", pd->name, type,
> +		 np->full_name);
> +
> +	special_pds[num_special_pds].pd = pd;
> +	special_pds[num_special_pds].type = type;
> +	num_special_pds++;
> +}
> +
> +static void __init get_special_pds(void)
> +{
> +	struct device_node *cpu, *scu;
> +
> +	/* PM domains containing CPUs */
> +	for_each_node_by_type(cpu, "cpu") {
> +		add_special_pd(cpu, PD_CPU);
> +
> +		/* SCU, represented by an L2 node */
> +		scu = of_parse_phandle(cpu, "next-level-cache", 0);
> +		if (scu) {
> +			add_special_pd(scu, PD_SCU);
> +			of_node_put(scu);
> +		}
> +	}
> +}
> +
> +static void __init put_special_pds(void)
> +{
> +	unsigned int i;
> +
> +	for (i = 0; i < num_special_pds; i++)
> +		of_node_put(special_pds[i].pd);
> +}
> +
> +static enum pd_types __init pd_type(const struct device_node *pd)
> +{
> +	unsigned int i;
> +
> +	for (i = 0; i < num_special_pds; i++)
> +		if (pd == special_pds[i].pd)
> +			return special_pds[i].type;
> +
> +	return PD_NORMAL;
> +}
> +
> +static void __init rcar_setup_pm_domain(struct device_node *np,
> +					struct rcar_pm_domain *pd)
> +{
> +	const char *name = pd->genpd.name;
> +
> +	switch (pd_type(np)) {
> +	case PD_CPU:
> +		/*
> +		 * This domain contains a CPU core and therefore it should
> +		 * only be turned off if the CPU is not in use.
> +		 */
> +		pr_debug("PM domain %s contains CPU\n", name);
> +		pd->gov = &pm_domain_always_on_gov;
> +		pd->busy = true;
> +		pd->cpu = true;
> +		break;
> +
> +	case PD_SCU:
> +		/*
> +		 * This domain contains an SCU and cache-controller, and
> +		 * therefore it should only be turned off if the CPU cores are
> +		 * not in use.
> +		 */
> +		pr_debug("PM domain %s contains SCU\n", name);
> +		pd->gov = &pm_domain_always_on_gov;
> +		pd->busy = true;
> +		break;
> +
> +	case PD_NORMAL:
> +		break;
> +	}
> +
> +	rcar_init_pm_domain(pd);
> +}
> +
> +static int __init rcar_add_pm_domains(struct device_node *parent,
> +				      struct generic_pm_domain *genpd_parent,
> +				      u32 *syscier)
> +{
> +	struct device_node *np;
> +
> +	for_each_child_of_node(parent, np) {
> +		struct rcar_pm_domain *pd;
> +		u32 reg[2];
> +		int n;
> +
> +		if (of_property_read_u32_array(np, "reg", reg,
> +					       ARRAY_SIZE(reg))) {
> +			of_node_put(np);
> +			return -EINVAL;
> +		}
> +
> +		*syscier |= BIT(reg[0]);
> +
> +		if (!IS_ENABLED(CONFIG_PM)) {
> +			/* Just continue parsing "reg" to update *syscier */
> +			rcar_add_pm_domains(np, NULL, syscier);
> +			continue;
> +		}
> +
> +		n = snprintf(NULL, 0, "%s@%u", np->name, reg[0]) + 1;
> +
> +		pd = kzalloc(sizeof(*pd) + n, GFP_KERNEL);
> +		if (!pd) {
> +			of_node_put(np);
> +			return -ENOMEM;
> +		}
> +
> +		snprintf(pd->name, n, "%s@%u", np->name, reg[0]);
> +		pd->genpd.name = pd->name;
> +		pd->ch.chan_offs = reg[1] & ~31;
> +		pd->ch.chan_bit = reg[1] & 31;
> +		pd->ch.isr_bit = reg[0];
> +
> +		rcar_setup_pm_domain(np, pd);
> +		if (genpd_parent)
> +			pm_genpd_add_subdomain(genpd_parent, &pd->genpd);
> +		of_genpd_add_provider_simple(np, &pd->genpd);
> +
> +		rcar_add_pm_domains(np, &pd->genpd, syscier);
> +	}
> +	return 0;
> +}
> +
> +static const struct of_device_id rcar_sysc_matches[] = {
> +	{ .compatible = "renesas,r8a7779-sysc", .data = (void *)1 },
> +	{ .compatible = "renesas,rcar-gen2-sysc", .data = (void *)2 },
> +	{ .compatible = "renesas,rcar-gen3-sysc", .data = (void *)3 },

How about RCAR_GEN1, RCAR_GEN2 and RCAR_GEN3 macros ?

> +	{ /* sentinel */ }
> +};
> +
> +static int __init rcar_init_pm_domains(void)
> +{
> +	const struct of_device_id *match;
> +	struct device_node *np, *pmd;
> +	bool scanned = false;
> +	void __iomem *base;
> +	int ret = 0;
> +
> +	for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
> +		u32 syscier = 0;
> +
> +		rcar_gen = (uintptr_t)match->data;
> +
> +		base = of_iomap(np, 0);
> +		if (!base) {
> +			pr_warn("%s cannot map reg 0\n", np->full_name);
> +			continue;
> +		}
> +
> +		rcar_sysc_base = base;	// FIXME conflicts with rcar_sysc_init()
> +
> +		pmd = of_get_child_by_name(np, "pm-domains");
> +		if (!pmd) {
> +			pr_warn("%s lacks pm-domains node\n", np->full_name);

Shouldn't you call iounmap() here ?

> +			continue;
> +		}
> +
> +		if (!scanned) {
> +			/* Find PM domains containing special blocks */
> +			get_special_pds();
> +			scanned = true;
> +		}
> +
> +		ret = rcar_add_pm_domains(pmd, NULL, &syscier);
> +		of_node_put(pmd);
> +		if (ret) {
> +			of_node_put(np);
> +			break;
> +		}
> +
> +		/*
> +		 * Enable all interrupt sources, but do not use interrupt
> +		 * handler
> +		 */
> +		pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
> +		iowrite32(syscier, rcar_sysc_base + SYSCIER);
> +		iowrite32(0, rcar_sysc_base + SYSCIMR);

Shouldn't the SYSCIMR bits be set to 1 to mask interrupts ?

> +	}
> +
> +	put_special_pds();
> +
> +	return ret;
> +}
> +
> +core_initcall(rcar_init_pm_domains);
> +#endif /* PM_GENERIC_DOMAINS */

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Laurent Pinchart]

Hi Geert,

Thank you for the patch.

On Monday 15 February 2016 22:16:53 Geert Uytterhoeven wrote:
> Populate the SYSC PM domains from DT.
> 
> Special cases, like PM domains containing CPU cores or SCUs, are
> handled by scanning the DT topology.
> 
> The SYSCIER register value is derived from the PM domains found in DT,
> which will allow to get rid of the hardcoded values in pm-rcar-gen2.c.
> However, this means we have to scan for PM domains even if CONFIG_PM=n.
> 
> FIXME:
>   - This needs better integration with the PM code in pm-rcar-gen2, the
>     SMP code in smp-r8a7790, and Magnus' DT APMU series.

Have you given this some thoughts already ? Unfortunately smp_prepare_cpus() 
is called before any initcall :-/ How do the other platforms handle this ?

> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
>   - Add missing definitions for SYSC_PWR_CA15_CPU and SYSC_PWR_CA7_CPU,
>   - Add R-Car H3 (r8a7795) support,
>   - Drop tests for CONFIG_ARCH_SHMOBILE_LEGACY,
>   - Add missing break statements in rcar_sysc_pwr_on_off(),
>   - Add missing calls to of_node_put() in error paths,
>   - Fix build if CONFIG_PM=n,
>   - Update compatible values,
>   - Update copyright.
> ---
>  drivers/soc/renesas/pm-rcar.c | 327 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 327 insertions(+)
> 
> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
> index cc684e9cc8db5d1c..c0540934126e58eb 100644
> --- a/drivers/soc/renesas/pm-rcar.c
> +++ b/drivers/soc/renesas/pm-rcar.c
> @@ -2,6 +2,7 @@
>   * R-Car SYSC Power management support
>   *
>   * Copyright (C) 2014  Magnus Damm
> + * Copyright (C) 2015-2016 Glider bvba
>   *
>   * This file is subject to the terms and conditions of the GNU General
> Public * License.  See the file "COPYING" in the main directory of this
> archive @@ -11,6 +12,9 @@
>  #include <linux/delay.h>
>  #include <linux/err.h>
>  #include <linux/mm.h>
> +#include <linux/of_address.h>
> +#include <linux/pm_domain.h>
> +#include <linux/slab.h>
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
>  #include <linux/soc/renesas/pm-rcar.h>
> @@ -38,6 +42,18 @@
>  #define PWRONSR_OFFS		0x10	/* Power Resume Status Register */
>  #define PWRER_OFFS		0x14	/* Power Shutoff/Resume Error */
> 
> +/*
> + * SYSC Power Control Register Base Addresses (R-Car Gen2)
> + */
> +#define SYSC_PWR_CA15_CPU	0x40	/* CA15 cores (incl. L1C) (H2/M2/V2H) */
> +#define SYSC_PWR_CA7_CPU	0x1c0	/* CA7 cores (incl. L1C) (H2/E2) */
> +
> +/*
> + * SYSC Power Control Register Base Addresses (R-Car Gen3)
> + */
> +#define SYSC_PWR_CA57_CPU	0x80	/* CA57 cores (incl. L1C) (H3) */
> +#define SYSC_PWR_CA53_CPU	0x200	/* CA53 cores (incl. L1C) (H3) */
> +
> 
>  #define SYSCSR_RETRIES		100
>  #define SYSCSR_DELAY_US		1
> @@ -51,11 +67,40 @@
>  static void __iomem *rcar_sysc_base;
>  static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
> 
> +static unsigned int rcar_gen;
> +
>  static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool
> on)
> {
>  	unsigned int sr_bit, reg_offs;
>  	int k;
> 
> +	/*
> +	 * Only R-Car H1 can control power to CPUs
> +	 * Use WFI to power off, CPG/APMU to resume ARM cores on later R-Car
> +	 * Generations
> +	 */
> +	switch (rcar_gen) {
> +	case 2:
> +		/* FIXME Check rcar_pm_domain.cpu instead? */
> +		switch (sysc_ch->chan_offs) {
> +		case SYSC_PWR_CA15_CPU:
> +		case SYSC_PWR_CA7_CPU:
> +			pr_err("%s: Cannot control power to CPU\n", __func__);
> +			return -EINVAL;
> +		}
> +		break;
> +
> +	case 3:
> +		/* FIXME Check rcar_pm_domain.cpu instead? */
> +		switch (sysc_ch->chan_offs) {
> +		case SYSC_PWR_CA57_CPU:
> +		case SYSC_PWR_CA53_CPU:
> +			pr_err("%s: Cannot control power to CPU\n", __func__);
> +			return -EINVAL;
> +		}
> +		break;
> +	}
> +
>  	if (on) {
>  		sr_bit = SYSCSR_PONENB;
>  		reg_offs = PWRONCR_OFFS;
> @@ -162,3 +207,285 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
> 
>  	return rcar_sysc_base;
>  }
> +
> +#ifdef CONFIG_PM_GENERIC_DOMAINS
> +struct rcar_pm_domain {
> +	struct generic_pm_domain genpd;
> +	struct dev_power_governor *gov;
> +	struct rcar_sysc_ch ch;
> +	unsigned busy:1;		/* Set if always -EBUSY */
> +	unsigned cpu:1;			/* Set if domain contains CPU */
> +	char name[0];
> +};
> +
> +static inline struct rcar_pm_domain *to_rcar_pd(struct generic_pm_domain
> *d)
> +{
> +	return container_of(d, struct rcar_pm_domain, genpd);
> +}
> +
> +static bool rcar_pd_active_wakeup(struct device *dev)
> +{
> +	return true;
> +}
> +
> +static int rcar_pd_power_down(struct generic_pm_domain *genpd)
> +{
> +	struct rcar_pm_domain *rcar_pd = to_rcar_pd(genpd);
> +
> +	pr_debug("%s: %s\n", __func__, genpd->name);
> +
> +	if (rcar_pd->busy) {
> +		pr_debug("%s: %s busy\n", __func__, genpd->name);
> +		return -EBUSY;
> +	}
> +
> +	return rcar_sysc_power_down(&rcar_pd->ch);
> +}
> +
> +static int rcar_pd_power_up(struct generic_pm_domain *genpd)
> +{
> +	pr_debug("%s: %s\n", __func__, genpd->name);
> +	return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
> +}
> +
> +static void rcar_init_pm_domain(struct rcar_pm_domain *rcar_pd)
> +{
> +	struct generic_pm_domain *genpd = &rcar_pd->genpd;
> +	struct dev_power_governor *gov = rcar_pd->gov;
> +
> +	pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
> +	genpd->dev_ops.active_wakeup	= rcar_pd_active_wakeup;
> +	genpd->power_off		= rcar_pd_power_down;
> +	genpd->power_on			= rcar_pd_power_up;
> +
> +	if (rcar_sysc_power_is_off(&rcar_pd->ch))
> +		rcar_sysc_power_up(&rcar_pd->ch);
> +}
> +
> +enum pd_types {
> +	PD_NORMAL,
> +	PD_CPU,
> +	PD_SCU,
> +};
> +
> +#define MAX_NUM_SPECIAL_PDS	16
> +
> +static struct special_pd {
> +	struct device_node *pd;
> +	enum pd_types type;
> +} special_pds[MAX_NUM_SPECIAL_PDS] __initdata;
> +
> +static unsigned int num_special_pds __initdata;
> +
> +static void __init add_special_pd(struct device_node *np, enum pd_types
> type)
> +{
> +	unsigned int i;
> +	struct device_node *pd;
> +
> +	pd = of_parse_phandle(np, "power-domains", 0);
> +	if (!pd)
> +		return;
> +
> +	for (i = 0; i < num_special_pds; i++)
> +		if (pd == special_pds[i].pd && type == special_pds[i].type) {
> +			of_node_put(pd);
> +			return;
> +		}
> +
> +	if (num_special_pds == ARRAY_SIZE(special_pds)) {
> +		pr_warn("Too many special PM domains\n");
> +		of_node_put(pd);
> +		return;
> +	}
> +
> +	pr_debug("Special PM domain %s type %d for %s\n", pd->name, type,
> +		 np->full_name);
> +
> +	special_pds[num_special_pds].pd = pd;
> +	special_pds[num_special_pds].type = type;
> +	num_special_pds++;
> +}
> +
> +static void __init get_special_pds(void)
> +{
> +	struct device_node *cpu, *scu;
> +
> +	/* PM domains containing CPUs */
> +	for_each_node_by_type(cpu, "cpu") {
> +		add_special_pd(cpu, PD_CPU);
> +
> +		/* SCU, represented by an L2 node */
> +		scu = of_parse_phandle(cpu, "next-level-cache", 0);
> +		if (scu) {
> +			add_special_pd(scu, PD_SCU);
> +			of_node_put(scu);
> +		}
> +	}
> +}
> +
> +static void __init put_special_pds(void)
> +{
> +	unsigned int i;
> +
> +	for (i = 0; i < num_special_pds; i++)
> +		of_node_put(special_pds[i].pd);
> +}
> +
> +static enum pd_types __init pd_type(const struct device_node *pd)
> +{
> +	unsigned int i;
> +
> +	for (i = 0; i < num_special_pds; i++)
> +		if (pd == special_pds[i].pd)
> +			return special_pds[i].type;
> +
> +	return PD_NORMAL;
> +}
> +
> +static void __init rcar_setup_pm_domain(struct device_node *np,
> +					struct rcar_pm_domain *pd)
> +{
> +	const char *name = pd->genpd.name;
> +
> +	switch (pd_type(np)) {
> +	case PD_CPU:
> +		/*
> +		 * This domain contains a CPU core and therefore it should
> +		 * only be turned off if the CPU is not in use.
> +		 */
> +		pr_debug("PM domain %s contains CPU\n", name);
> +		pd->gov = &pm_domain_always_on_gov;
> +		pd->busy = true;
> +		pd->cpu = true;
> +		break;
> +
> +	case PD_SCU:
> +		/*
> +		 * This domain contains an SCU and cache-controller, and
> +		 * therefore it should only be turned off if the CPU cores are
> +		 * not in use.
> +		 */
> +		pr_debug("PM domain %s contains SCU\n", name);
> +		pd->gov = &pm_domain_always_on_gov;
> +		pd->busy = true;
> +		break;
> +
> +	case PD_NORMAL:
> +		break;
> +	}
> +
> +	rcar_init_pm_domain(pd);
> +}
> +
> +static int __init rcar_add_pm_domains(struct device_node *parent,
> +				      struct generic_pm_domain *genpd_parent,
> +				      u32 *syscier)
> +{
> +	struct device_node *np;
> +
> +	for_each_child_of_node(parent, np) {
> +		struct rcar_pm_domain *pd;
> +		u32 reg[2];
> +		int n;
> +
> +		if (of_property_read_u32_array(np, "reg", reg,
> +					       ARRAY_SIZE(reg))) {
> +			of_node_put(np);
> +			return -EINVAL;
> +		}
> +
> +		*syscier |= BIT(reg[0]);
> +
> +		if (!IS_ENABLED(CONFIG_PM)) {
> +			/* Just continue parsing "reg" to update *syscier */
> +			rcar_add_pm_domains(np, NULL, syscier);
> +			continue;
> +		}
> +
> +		n = snprintf(NULL, 0, "%s@%u", np->name, reg[0]) + 1;
> +
> +		pd = kzalloc(sizeof(*pd) + n, GFP_KERNEL);
> +		if (!pd) {
> +			of_node_put(np);
> +			return -ENOMEM;
> +		}
> +
> +		snprintf(pd->name, n, "%s@%u", np->name, reg[0]);
> +		pd->genpd.name = pd->name;
> +		pd->ch.chan_offs = reg[1] & ~31;
> +		pd->ch.chan_bit = reg[1] & 31;
> +		pd->ch.isr_bit = reg[0];
> +
> +		rcar_setup_pm_domain(np, pd);
> +		if (genpd_parent)
> +			pm_genpd_add_subdomain(genpd_parent, &pd->genpd);
> +		of_genpd_add_provider_simple(np, &pd->genpd);
> +
> +		rcar_add_pm_domains(np, &pd->genpd, syscier);
> +	}
> +	return 0;
> +}
> +
> +static const struct of_device_id rcar_sysc_matches[] = {
> +	{ .compatible = "renesas,r8a7779-sysc", .data = (void *)1 },
> +	{ .compatible = "renesas,rcar-gen2-sysc", .data = (void *)2 },
> +	{ .compatible = "renesas,rcar-gen3-sysc", .data = (void *)3 },

How about RCAR_GEN1, RCAR_GEN2 and RCAR_GEN3 macros ?

> +	{ /* sentinel */ }
> +};
> +
> +static int __init rcar_init_pm_domains(void)
> +{
> +	const struct of_device_id *match;
> +	struct device_node *np, *pmd;
> +	bool scanned = false;
> +	void __iomem *base;
> +	int ret = 0;
> +
> +	for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
> +		u32 syscier = 0;
> +
> +		rcar_gen = (uintptr_t)match->data;
> +
> +		base = of_iomap(np, 0);
> +		if (!base) {
> +			pr_warn("%s cannot map reg 0\n", np->full_name);
> +			continue;
> +		}
> +
> +		rcar_sysc_base = base;	// FIXME conflicts with rcar_sysc_init()
> +
> +		pmd = of_get_child_by_name(np, "pm-domains");
> +		if (!pmd) {
> +			pr_warn("%s lacks pm-domains node\n", np->full_name);

Shouldn't you call iounmap() here ?

> +			continue;
> +		}
> +
> +		if (!scanned) {
> +			/* Find PM domains containing special blocks */
> +			get_special_pds();
> +			scanned = true;
> +		}
> +
> +		ret = rcar_add_pm_domains(pmd, NULL, &syscier);
> +		of_node_put(pmd);
> +		if (ret) {
> +			of_node_put(np);
> +			break;
> +		}
> +
> +		/*
> +		 * Enable all interrupt sources, but do not use interrupt
> +		 * handler
> +		 */
> +		pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
> +		iowrite32(syscier, rcar_sysc_base + SYSCIER);
> +		iowrite32(0, rcar_sysc_base + SYSCIMR);

Shouldn't the SYSCIMR bits be set to 1 to mask interrupts ?

> +	}
> +
> +	put_special_pds();
> +
> +	return ret;
> +}
> +
> +core_initcall(rcar_init_pm_domains);
> +#endif /* PM_GENERIC_DOMAINS */

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart
<laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org> wrote:
> On Monday 15 February 2016 22:16:53 Geert Uytterhoeven wrote:
>> Populate the SYSC PM domains from DT.
>>
>> Special cases, like PM domains containing CPU cores or SCUs, are
>> handled by scanning the DT topology.
>>
>> The SYSCIER register value is derived from the PM domains found in DT,
>> which will allow to get rid of the hardcoded values in pm-rcar-gen2.c.
>> However, this means we have to scan for PM domains even if CONFIG_PM=n.
>>
>> FIXME:
>>   - This needs better integration with the PM code in pm-rcar-gen2, the
>>     SMP code in smp-r8a7790, and Magnus' DT APMU series.
>
> Have you given this some thoughts already ? Unfortunately smp_prepare_cpus()
> is called before any initcall :-/ How do the other platforms handle this ?

I'm afraid no other platform already handles this.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
--
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[PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Monday 15 February 2016 22:16:53 Geert Uytterhoeven wrote:
>> Populate the SYSC PM domains from DT.
>>
>> Special cases, like PM domains containing CPU cores or SCUs, are
>> handled by scanning the DT topology.
>>
>> The SYSCIER register value is derived from the PM domains found in DT,
>> which will allow to get rid of the hardcoded values in pm-rcar-gen2.c.
>> However, this means we have to scan for PM domains even if CONFIG_PM=n.
>>
>> FIXME:
>>   - This needs better integration with the PM code in pm-rcar-gen2, the
>>     SMP code in smp-r8a7790, and Magnus' DT APMU series.
>
> Have you given this some thoughts already ? Unfortunately smp_prepare_cpus()
> is called before any initcall :-/ How do the other platforms handle this ?

I'm afraid no other platform already handles this.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Monday 15 February 2016 22:16:53 Geert Uytterhoeven wrote:
>> Populate the SYSC PM domains from DT.
>>
>> Special cases, like PM domains containing CPU cores or SCUs, are
>> handled by scanning the DT topology.
>>
>> The SYSCIER register value is derived from the PM domains found in DT,
>> which will allow to get rid of the hardcoded values in pm-rcar-gen2.c.
>> However, this means we have to scan for PM domains even if CONFIG_PM=n.
>>
>> FIXME:
>>   - This needs better integration with the PM code in pm-rcar-gen2, the
>>     SMP code in smp-r8a7790, and Magnus' DT APMU series.
>
> Have you given this some thoughts already ? Unfortunately smp_prepare_cpus()
> is called before any initcall :-/ How do the other platforms handle this ?

I'm afraid no other platform already handles this.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart
<laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org> wrote:
>>  drivers/soc/renesas/pm-rcar.c | 327 +++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 327 insertions(+)
>>
>> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
>> index cc684e9cc8db5d1c..c0540934126e58eb 100644
>> --- a/drivers/soc/renesas/pm-rcar.c
>> +++ b/drivers/soc/renesas/pm-rcar.c

>> +static int __init rcar_init_pm_domains(void)
>> +{
>> +     const struct of_device_id *match;
>> +     struct device_node *np, *pmd;
>> +     bool scanned = false;
>> +     void __iomem *base;
>> +     int ret = 0;
>> +
>> +     for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
>> +             u32 syscier = 0;
>> +
>> +             rcar_gen = (uintptr_t)match->data;
>> +
>> +             base = of_iomap(np, 0);
>> +             if (!base) {
>> +                     pr_warn("%s cannot map reg 0\n", np->full_name);
>> +                     continue;
>> +             }
>> +
>> +             rcar_sysc_base = base;  // FIXME conflicts with rcar_sysc_init()
>> +
>> +             pmd = of_get_child_by_name(np, "pm-domains");
>> +             if (!pmd) {
>> +                     pr_warn("%s lacks pm-domains node\n", np->full_name);
>
> Shouldn't you call iounmap() here ?

Yes. Will fix.

>> +             /*
>> +              * Enable all interrupt sources, but do not use interrupt
>> +              * handler
>> +              */
>> +             pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
>> +             iowrite32(syscier, rcar_sysc_base + SYSCIER);
>> +             iowrite32(0, rcar_sysc_base + SYSCIMR);
>
> Shouldn't the SYSCIMR bits be set to 1 to mask interrupts ?

That would work, too. It doesn't matter much, as the driver doesn't use
interrupts, so they stay disabled at the GIC level.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>>  drivers/soc/renesas/pm-rcar.c | 327 +++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 327 insertions(+)
>>
>> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
>> index cc684e9cc8db5d1c..c0540934126e58eb 100644
>> --- a/drivers/soc/renesas/pm-rcar.c
>> +++ b/drivers/soc/renesas/pm-rcar.c

>> +static int __init rcar_init_pm_domains(void)
>> +{
>> +     const struct of_device_id *match;
>> +     struct device_node *np, *pmd;
>> +     bool scanned = false;
>> +     void __iomem *base;
>> +     int ret = 0;
>> +
>> +     for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
>> +             u32 syscier = 0;
>> +
>> +             rcar_gen = (uintptr_t)match->data;
>> +
>> +             base = of_iomap(np, 0);
>> +             if (!base) {
>> +                     pr_warn("%s cannot map reg 0\n", np->full_name);
>> +                     continue;
>> +             }
>> +
>> +             rcar_sysc_base = base;  // FIXME conflicts with rcar_sysc_init()
>> +
>> +             pmd = of_get_child_by_name(np, "pm-domains");
>> +             if (!pmd) {
>> +                     pr_warn("%s lacks pm-domains node\n", np->full_name);
>
> Shouldn't you call iounmap() here ?

Yes. Will fix.

>> +             /*
>> +              * Enable all interrupt sources, but do not use interrupt
>> +              * handler
>> +              */
>> +             pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
>> +             iowrite32(syscier, rcar_sysc_base + SYSCIER);
>> +             iowrite32(0, rcar_sysc_base + SYSCIMR);
>
> Shouldn't the SYSCIMR bits be set to 1 to mask interrupts ?

That would work, too. It doesn't matter much, as the driver doesn't use
interrupts, so they stay disabled at the GIC level.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Geert Uytterhoeven]

Hi Laurent,

On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>>  drivers/soc/renesas/pm-rcar.c | 327 +++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 327 insertions(+)
>>
>> diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
>> index cc684e9cc8db5d1c..c0540934126e58eb 100644
>> --- a/drivers/soc/renesas/pm-rcar.c
>> +++ b/drivers/soc/renesas/pm-rcar.c

>> +static int __init rcar_init_pm_domains(void)
>> +{
>> +     const struct of_device_id *match;
>> +     struct device_node *np, *pmd;
>> +     bool scanned = false;
>> +     void __iomem *base;
>> +     int ret = 0;
>> +
>> +     for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
>> +             u32 syscier = 0;
>> +
>> +             rcar_gen = (uintptr_t)match->data;
>> +
>> +             base = of_iomap(np, 0);
>> +             if (!base) {
>> +                     pr_warn("%s cannot map reg 0\n", np->full_name);
>> +                     continue;
>> +             }
>> +
>> +             rcar_sysc_base = base;  // FIXME conflicts with rcar_sysc_init()
>> +
>> +             pmd = of_get_child_by_name(np, "pm-domains");
>> +             if (!pmd) {
>> +                     pr_warn("%s lacks pm-domains node\n", np->full_name);
>
> Shouldn't you call iounmap() here ?

Yes. Will fix.

>> +             /*
>> +              * Enable all interrupt sources, but do not use interrupt
>> +              * handler
>> +              */
>> +             pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
>> +             iowrite32(syscier, rcar_sysc_base + SYSCIER);
>> +             iowrite32(0, rcar_sysc_base + SYSCIMR);
>
> Shouldn't the SYSCIMR bits be set to 1 to mask interrupts ?

That would work, too. It doesn't matter much, as the driver doesn't use
interrupts, so they stay disabled at the GIC level.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Laurent Pinchart]

Hi Geert,

On Friday 26 February 2016 16:41:27 Geert Uytterhoeven wrote:
> On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart wrote:
> >>  drivers/soc/renesas/pm-rcar.c | 327 ++++++++++++++++++++++++++++++++++++
> >>  1 file changed, 327 insertions(+)
> >> 
> >> diff --git a/drivers/soc/renesas/pm-rcar.c
> >> b/drivers/soc/renesas/pm-rcar.c
> >> index cc684e9cc8db5d1c..c0540934126e58eb 100644
> >> --- a/drivers/soc/renesas/pm-rcar.c
> >> +++ b/drivers/soc/renesas/pm-rcar.c
> >> 
> >> +static int __init rcar_init_pm_domains(void)
> >> +{
> >> +     const struct of_device_id *match;
> >> +     struct device_node *np, *pmd;
> >> +     bool scanned = false;
> >> +     void __iomem *base;
> >> +     int ret = 0;
> >> +
> >> +     for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
> >> +             u32 syscier = 0;
> >> +
> >> +             rcar_gen = (uintptr_t)match->data;
> >> +
> >> +             base = of_iomap(np, 0);
> >> +             if (!base) {
> >> +                     pr_warn("%s cannot map reg 0\n", np->full_name);
> >> +                     continue;
> >> +             }
> >> +
> >> +             rcar_sysc_base = base;  // FIXME conflicts with
> >> rcar_sysc_init() +
> >> +             pmd = of_get_child_by_name(np, "pm-domains");
> >> +             if (!pmd) {
> >> +                     pr_warn("%s lacks pm-domains node\n",
> >> np->full_name);
> > 
> > Shouldn't you call iounmap() here ?
> 
> Yes. Will fix.
> 
> >> +             /*
> >> +              * Enable all interrupt sources, but do not use interrupt
> >> +              * handler
> >> +              */
> >> +             pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
> >> +             iowrite32(syscier, rcar_sysc_base + SYSCIER);
> >> +             iowrite32(0, rcar_sysc_base + SYSCIMR);
> > 
> > Shouldn't the SYSCIMR bits be set to 1 to mask interrupts ?
> 
> That would work, too. It doesn't matter much, as the driver doesn't use
> interrupts, so they stay disabled at the GIC level.

You're right, but as you write to the SYSCIMR register anyway, I'd feel safer 
if interrupts were masked in it too.

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 04/11] soc: renesas: rcar: Add DT support for SYSC PM domains

[Laurent Pinchart]

Hi Geert,

On Friday 26 February 2016 16:41:27 Geert Uytterhoeven wrote:
> On Mon, Feb 15, 2016 at 11:51 PM, Laurent Pinchart wrote:
> >>  drivers/soc/renesas/pm-rcar.c | 327 ++++++++++++++++++++++++++++++++++++
> >>  1 file changed, 327 insertions(+)
> >> 
> >> diff --git a/drivers/soc/renesas/pm-rcar.c
> >> b/drivers/soc/renesas/pm-rcar.c
> >> index cc684e9cc8db5d1c..c0540934126e58eb 100644
> >> --- a/drivers/soc/renesas/pm-rcar.c
> >> +++ b/drivers/soc/renesas/pm-rcar.c
> >> 
> >> +static int __init rcar_init_pm_domains(void)
> >> +{
> >> +     const struct of_device_id *match;
> >> +     struct device_node *np, *pmd;
> >> +     bool scanned = false;
> >> +     void __iomem *base;
> >> +     int ret = 0;
> >> +
> >> +     for_each_matching_node_and_match(np, rcar_sysc_matches, &match) {
> >> +             u32 syscier = 0;
> >> +
> >> +             rcar_gen = (uintptr_t)match->data;
> >> +
> >> +             base = of_iomap(np, 0);
> >> +             if (!base) {
> >> +                     pr_warn("%s cannot map reg 0\n", np->full_name);
> >> +                     continue;
> >> +             }
> >> +
> >> +             rcar_sysc_base = base;  // FIXME conflicts with
> >> rcar_sysc_init() +
> >> +             pmd = of_get_child_by_name(np, "pm-domains");
> >> +             if (!pmd) {
> >> +                     pr_warn("%s lacks pm-domains node\n",
> >> np->full_name);
> > 
> > Shouldn't you call iounmap() here ?
> 
> Yes. Will fix.
> 
> >> +             /*
> >> +              * Enable all interrupt sources, but do not use interrupt
> >> +              * handler
> >> +              */
> >> +             pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
> >> +             iowrite32(syscier, rcar_sysc_base + SYSCIER);
> >> +             iowrite32(0, rcar_sysc_base + SYSCIMR);
> > 
> > Shouldn't the SYSCIMR bits be set to 1 to mask interrupts ?
> 
> That would work, too. It doesn't matter much, as the driver doesn't use
> interrupts, so they stay disabled at the GIC level.

You're right, but as you write to the SYSCIMR register anyway, I'd feel safer 
if interrupts were masked in it too.

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 07/11] ARM: dts: r8a7790: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A15 and Cortex-A7 CPU cores and L2 caches/SCUs to
their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7790.dtsi | 89 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 89 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index e40aa6585831c520..3e5a97c70480cbbc 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -52,6 +52,7 @@
 			voltage-tolerance = <1>; /* 1% */
 			clocks = <&cpg_clocks R8A7790_CLK_Z>;
 			clock-latency = <300000>; /* 300 us */
+			power-domains = <&pd_ca15_cpu0>;
 			next-level-cache = <&L2_CA15>;
 
 			/* kHz - uV - OPPs unknown yet */
@@ -68,6 +69,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu1>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -76,6 +78,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <2>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu2>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -84,6 +87,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <3>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu3>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -92,6 +96,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x100>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu0>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -100,6 +105,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x101>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu1>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -108,6 +114,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x102>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu2>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -116,18 +123,21 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x103>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu3>;
 			next-level-cache = <&L2_CA7>;
 		};
 	};
 
 	L2_CA15: cache-controller@0 {
 		compatible = "cache";
+		power-domains = <&pd_ca15_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
 
 	L2_CA7: cache-controller@1 {
 		compatible = "cache";
+		power-domains = <&pd_ca7_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1441,6 +1451,85 @@
 		};
 	};
 
+	sysc: system-controller@e6180000 {
+		compatible = "renesas,r8a7790-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu@12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu@0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu@1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu2: cpu@2 {
+					reg = <2 0x42>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu3: cpu@3 {
+					reg = <3 0x43>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_ca7_scu: scu@21 {
+				reg = <21 0x100>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca7_cpu0: cpu@5 {
+					reg = <5 0x1c0>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu1: cpu@6 {
+					reg = <6 0x1c1>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu2: cpu@7 {
+					reg = <7 0x1c2>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu3: cpu@8 {
+					reg = <8 0x1c3>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh@16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_rgx: rgx@20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_imp: imp@24 {
+				reg = <24 0x140>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	qspi: spi@e6b10000 {
 		compatible = "renesas,qspi-r8a7790", "renesas,qspi";
 		reg = <0 0xe6b10000 0 0x2c>;
-- 
1.9.1

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[PATCH/RFC v2 07/11] ARM: dts: r8a7790: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A15 and Cortex-A7 CPU cores and L2 caches/SCUs to
their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7790.dtsi | 89 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 89 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index e40aa6585831c520..3e5a97c70480cbbc 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -52,6 +52,7 @@
 			voltage-tolerance = <1>; /* 1% */
 			clocks = <&cpg_clocks R8A7790_CLK_Z>;
 			clock-latency = <300000>; /* 300 us */
+			power-domains = <&pd_ca15_cpu0>;
 			next-level-cache = <&L2_CA15>;
 
 			/* kHz - uV - OPPs unknown yet */
@@ -68,6 +69,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu1>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -76,6 +78,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <2>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu2>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -84,6 +87,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <3>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu3>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -92,6 +96,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x100>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu0>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -100,6 +105,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x101>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu1>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -108,6 +114,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x102>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu2>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -116,18 +123,21 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x103>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu3>;
 			next-level-cache = <&L2_CA7>;
 		};
 	};
 
 	L2_CA15: cache-controller at 0 {
 		compatible = "cache";
+		power-domains = <&pd_ca15_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
 
 	L2_CA7: cache-controller at 1 {
 		compatible = "cache";
+		power-domains = <&pd_ca7_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1441,6 +1451,85 @@
 		};
 	};
 
+	sysc: system-controller at e6180000 {
+		compatible = "renesas,r8a7790-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu at 12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu at 0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu at 1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu2: cpu at 2 {
+					reg = <2 0x42>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu3: cpu at 3 {
+					reg = <3 0x43>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_ca7_scu: scu at 21 {
+				reg = <21 0x100>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca7_cpu0: cpu at 5 {
+					reg = <5 0x1c0>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu1: cpu at 6 {
+					reg = <6 0x1c1>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu2: cpu at 7 {
+					reg = <7 0x1c2>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu3: cpu at 8 {
+					reg = <8 0x1c3>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh at 16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_rgx: rgx at 20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_imp: imp at 24 {
+				reg = <24 0x140>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	qspi: spi at e6b10000 {
 		compatible = "renesas,qspi-r8a7790", "renesas,qspi";
 		reg = <0 0xe6b10000 0 0x2c>;
-- 
1.9.1

[PATCH/RFC v2 07/11] ARM: dts: r8a7790: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A15 and Cortex-A7 CPU cores and L2 caches/SCUs to
their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7790.dtsi | 89 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 89 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index e40aa6585831c520..3e5a97c70480cbbc 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -52,6 +52,7 @@
 			voltage-tolerance = <1>; /* 1% */
 			clocks = <&cpg_clocks R8A7790_CLK_Z>;
 			clock-latency = <300000>; /* 300 us */
+			power-domains = <&pd_ca15_cpu0>;
 			next-level-cache = <&L2_CA15>;
 
 			/* kHz - uV - OPPs unknown yet */
@@ -68,6 +69,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <1>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu1>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -76,6 +78,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <2>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu2>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -84,6 +87,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <3>;
 			clock-frequency = <1300000000>;
+			power-domains = <&pd_ca15_cpu3>;
 			next-level-cache = <&L2_CA15>;
 		};
 
@@ -92,6 +96,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x100>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu0>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -100,6 +105,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x101>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu1>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -108,6 +114,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x102>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu2>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -116,18 +123,21 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x103>;
 			clock-frequency = <780000000>;
+			power-domains = <&pd_ca7_cpu3>;
 			next-level-cache = <&L2_CA7>;
 		};
 	};
 
 	L2_CA15: cache-controller@0 {
 		compatible = "cache";
+		power-domains = <&pd_ca15_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
 
 	L2_CA7: cache-controller@1 {
 		compatible = "cache";
+		power-domains = <&pd_ca7_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1441,6 +1451,85 @@
 		};
 	};
 
+	sysc: system-controller@e6180000 {
+		compatible = "renesas,r8a7790-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu@12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu@0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu@1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu2: cpu@2 {
+					reg = <2 0x42>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu3: cpu@3 {
+					reg = <3 0x43>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_ca7_scu: scu@21 {
+				reg = <21 0x100>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca7_cpu0: cpu@5 {
+					reg = <5 0x1c0>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu1: cpu@6 {
+					reg = <6 0x1c1>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu2: cpu@7 {
+					reg = <7 0x1c2>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu3: cpu@8 {
+					reg = <8 0x1c3>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh@16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_rgx: rgx@20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_imp: imp@24 {
+				reg = <24 0x140>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	qspi: spi@e6b10000 {
 		compatible = "renesas,qspi-r8a7790", "renesas,qspi";
 		reg = <0 0xe6b10000 0 0x2c>;
-- 
1.9.1

[PATCH/RFC v2 09/11] ARM: dts: r8a7793: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to
their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7793.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 9a30f650aa515b80..843fd3306f35ebb0 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -43,6 +43,7 @@
 			voltage-tolerance = <1>; /* 1% */
 			clocks = <&cpg_clocks R8A7793_CLK_Z>;
 			clock-latency = <300000>; /* 300 us */
+			power-domains = <&pd_ca15_cpu0>;
 
 			/* kHz - uV - OPPs unknown yet */
 			operating-points = <1500000 1000000>,
@@ -57,6 +58,7 @@
 
 	L2_CA15: cache-controller@0 {
 		compatible = "cache";
+		power-domains = <&pd_ca15_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1144,6 +1146,43 @@
 		};
 	};
 
+	sysc: system-controller@e6180000 {
+		compatible = "renesas,r8a7793-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu@12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu@0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu@1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh@16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx@20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	ipmmu_sy0: mmu@e6280000 {
 		compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
 		reg = <0 0xe6280000 0 0x1000>;
-- 
1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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[PATCH/RFC v2 09/11] ARM: dts: r8a7793: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to
their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7793.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 9a30f650aa515b80..843fd3306f35ebb0 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -43,6 +43,7 @@
 			voltage-tolerance = <1>; /* 1% */
 			clocks = <&cpg_clocks R8A7793_CLK_Z>;
 			clock-latency = <300000>; /* 300 us */
+			power-domains = <&pd_ca15_cpu0>;
 
 			/* kHz - uV - OPPs unknown yet */
 			operating-points = <1500000 1000000>,
@@ -57,6 +58,7 @@
 
 	L2_CA15: cache-controller at 0 {
 		compatible = "cache";
+		power-domains = <&pd_ca15_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1144,6 +1146,43 @@
 		};
 	};
 
+	sysc: system-controller at e6180000 {
+		compatible = "renesas,r8a7793-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu at 12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu at 0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu at 1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh at 16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx at 20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	ipmmu_sy0: mmu at e6280000 {
 		compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
 		reg = <0 0xe6280000 0 0x1000>;
-- 
1.9.1

[PATCH/RFC v2 09/11] ARM: dts: r8a7793: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to
their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7793.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 9a30f650aa515b80..843fd3306f35ebb0 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -43,6 +43,7 @@
 			voltage-tolerance = <1>; /* 1% */
 			clocks = <&cpg_clocks R8A7793_CLK_Z>;
 			clock-latency = <300000>; /* 300 us */
+			power-domains = <&pd_ca15_cpu0>;
 
 			/* kHz - uV - OPPs unknown yet */
 			operating-points = <1500000 1000000>,
@@ -57,6 +58,7 @@
 
 	L2_CA15: cache-controller@0 {
 		compatible = "cache";
+		power-domains = <&pd_ca15_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1144,6 +1146,43 @@
 		};
 	};
 
+	sysc: system-controller@e6180000 {
+		compatible = "renesas,r8a7793-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca15_scu: scu@12 {
+				reg = <12 0x180>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca15_cpu0: cpu@0 {
+					reg = <0 0x40>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca15_cpu1: cpu@1 {
+					reg = <1 0x41>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh@16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx@20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	ipmmu_sy0: mmu@e6280000 {
 		compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
 		reg = <0 0xe6280000 0 0x1000>;
-- 
1.9.1

[PATCH/RFC v2 11/11] arm64: dts: r8a7795: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2
caches/SCUs to their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
The SH core was dropped in datasheet rev. 0.5E?

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 142 +++++++++++++++++++++++++++++++
 1 file changed, 142 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index c572527afec3403a..69f400e0d478b285 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -39,6 +39,7 @@
 			compatible = "arm,cortex-a57", "arm,armv8";
 			reg = <0x0>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu0>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -47,6 +48,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x1>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu1>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -54,6 +56,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x2>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu2>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -61,6 +64,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x3>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu3>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -68,12 +72,14 @@
 
 	L2_CA57: cache-controller@0 {
 		compatible = "cache";
+		power-domains = <&pd_ca57_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
 
 	L2_CA53: cache-controller@1 {
 		compatible = "cache";
+		power-domains = <&pd_ca53_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -968,5 +974,141 @@
 			#dma-cells = <1>;
 			dma-channels = <2>;
 		};
+
+		sysc: system-controller@e6180000 {
+			compatible = "renesas,r8a7795-sysc",
+				     "renesas,rcar-gen3-sysc";
+			reg = <0 0xe6180000 0 0x0400>;
+
+			pm-domains {
+				#address-cells = <2>;
+				#size-cells = <0>;
+
+				pd_ca57_scu: ca57_scu@12 {
+					reg = <12 0x1c0>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_ca57_cpu0: ca57_cpu@0 {
+						reg = <0 0x80>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu1: ca57_cpu@1 {
+						reg = <1 0x81>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu2: ca57_cpu@2 {
+						reg = <2 0x82>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu3: ca57_cpu@3 {
+						reg = <3 0x83>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_ca53_scu: ca53_scu@21 {
+					reg = <21 0x140>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_ca53_cpu0: ca53_cpu@5 {
+						reg = <5 0x200>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu1: ca53_cpu@6 {
+						reg = <6 0x201>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu2: ca53_cpu@7 {
+						reg = <7 0x202>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu3: ca53_cpu@8 {
+						reg = <8 0x203>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_a3vp: a3vp@9 {
+					reg = <9 0x340>;
+					#power-domain-cells = <0>;
+				};
+
+
+				pd_cr7: cr7@13 {
+					reg = <13 0x240>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_a3vc: a3vc@14 {
+					reg = <14 0x380>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_a2vc0: a2vc@25 {
+						reg = <25 0x3c0>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_a2vc1: a2vc@26 {
+						reg = <26 0x3c1>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_a3sh: a3sh@16 {
+					reg = <16 0xc0>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_3dg_a: 3dg@17 {
+					reg = <17 0x100>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_3dg_b: 3dg@18 {
+						reg = <18 0x101>;
+						#address-cells = <2>;
+						#size-cells = <0>;
+						#power-domain-cells = <0>;
+
+						pd_3dg_c: 3dg@19 {
+							reg = <19 0x102>;
+							#address-cells = <2>;
+							#size-cells = <0>;
+							#power-domain-cells = <0>;
+
+							pd_3dg_d: 3dg@20 {
+								reg = <20 0x103>;
+								#address-cells = <2>;
+								#size-cells = <0>;
+								#power-domain-cells = <0>;
+
+								pd_3dg_e: 3dg@22 {
+									reg = <22 0x104>;
+									#power-domain-cells = <0>;
+								};
+							};
+						};
+					};
+				};
+
+				pd_a3ir: a3ir@24 {
+					reg = <24 0x180>;
+					#power-domain-cells = <0>;
+				};
+			};
+		};
 	};
 };
-- 
1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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[PATCH/RFC v2 11/11] arm64: dts: r8a7795: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2
caches/SCUs to their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
The SH core was dropped in datasheet rev. 0.5E?

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 142 +++++++++++++++++++++++++++++++
 1 file changed, 142 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index c572527afec3403a..69f400e0d478b285 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -39,6 +39,7 @@
 			compatible = "arm,cortex-a57", "arm,armv8";
 			reg = <0x0>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu0>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -47,6 +48,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x1>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu1>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -54,6 +56,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x2>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu2>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -61,6 +64,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x3>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu3>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -68,12 +72,14 @@
 
 	L2_CA57: cache-controller at 0 {
 		compatible = "cache";
+		power-domains = <&pd_ca57_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
 
 	L2_CA53: cache-controller at 1 {
 		compatible = "cache";
+		power-domains = <&pd_ca53_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -968,5 +974,141 @@
 			#dma-cells = <1>;
 			dma-channels = <2>;
 		};
+
+		sysc: system-controller at e6180000 {
+			compatible = "renesas,r8a7795-sysc",
+				     "renesas,rcar-gen3-sysc";
+			reg = <0 0xe6180000 0 0x0400>;
+
+			pm-domains {
+				#address-cells = <2>;
+				#size-cells = <0>;
+
+				pd_ca57_scu: ca57_scu at 12 {
+					reg = <12 0x1c0>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_ca57_cpu0: ca57_cpu at 0 {
+						reg = <0 0x80>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu1: ca57_cpu at 1 {
+						reg = <1 0x81>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu2: ca57_cpu at 2 {
+						reg = <2 0x82>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu3: ca57_cpu at 3 {
+						reg = <3 0x83>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_ca53_scu: ca53_scu at 21 {
+					reg = <21 0x140>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_ca53_cpu0: ca53_cpu at 5 {
+						reg = <5 0x200>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu1: ca53_cpu at 6 {
+						reg = <6 0x201>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu2: ca53_cpu at 7 {
+						reg = <7 0x202>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu3: ca53_cpu at 8 {
+						reg = <8 0x203>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_a3vp: a3vp at 9 {
+					reg = <9 0x340>;
+					#power-domain-cells = <0>;
+				};
+
+
+				pd_cr7: cr7 at 13 {
+					reg = <13 0x240>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_a3vc: a3vc at 14 {
+					reg = <14 0x380>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_a2vc0: a2vc at 25 {
+						reg = <25 0x3c0>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_a2vc1: a2vc at 26 {
+						reg = <26 0x3c1>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_a3sh: a3sh at 16 {
+					reg = <16 0xc0>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_3dg_a: 3dg at 17 {
+					reg = <17 0x100>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_3dg_b: 3dg at 18 {
+						reg = <18 0x101>;
+						#address-cells = <2>;
+						#size-cells = <0>;
+						#power-domain-cells = <0>;
+
+						pd_3dg_c: 3dg at 19 {
+							reg = <19 0x102>;
+							#address-cells = <2>;
+							#size-cells = <0>;
+							#power-domain-cells = <0>;
+
+							pd_3dg_d: 3dg at 20 {
+								reg = <20 0x103>;
+								#address-cells = <2>;
+								#size-cells = <0>;
+								#power-domain-cells = <0>;
+
+								pd_3dg_e: 3dg at 22 {
+									reg = <22 0x104>;
+									#power-domain-cells = <0>;
+								};
+							};
+						};
+					};
+				};
+
+				pd_a3ir: a3ir at 24 {
+					reg = <24 0x180>;
+					#power-domain-cells = <0>;
+				};
+			};
+		};
 	};
 };
-- 
1.9.1

[PATCH/RFC v2 11/11] arm64: dts: r8a7795: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2
caches/SCUs to their respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
The SH core was dropped in datasheet rev. 0.5E?

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 142 +++++++++++++++++++++++++++++++
 1 file changed, 142 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index c572527afec3403a..69f400e0d478b285 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -39,6 +39,7 @@
 			compatible = "arm,cortex-a57", "arm,armv8";
 			reg = <0x0>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu0>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -47,6 +48,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x1>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu1>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -54,6 +56,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x2>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu2>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -61,6 +64,7 @@
 			compatible = "arm,cortex-a57","arm,armv8";
 			reg = <0x3>;
 			device_type = "cpu";
+			power-domains = <&pd_ca57_cpu3>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
 		};
@@ -68,12 +72,14 @@
 
 	L2_CA57: cache-controller@0 {
 		compatible = "cache";
+		power-domains = <&pd_ca57_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
 
 	L2_CA53: cache-controller@1 {
 		compatible = "cache";
+		power-domains = <&pd_ca53_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -968,5 +974,141 @@
 			#dma-cells = <1>;
 			dma-channels = <2>;
 		};
+
+		sysc: system-controller@e6180000 {
+			compatible = "renesas,r8a7795-sysc",
+				     "renesas,rcar-gen3-sysc";
+			reg = <0 0xe6180000 0 0x0400>;
+
+			pm-domains {
+				#address-cells = <2>;
+				#size-cells = <0>;
+
+				pd_ca57_scu: ca57_scu@12 {
+					reg = <12 0x1c0>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_ca57_cpu0: ca57_cpu@0 {
+						reg = <0 0x80>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu1: ca57_cpu@1 {
+						reg = <1 0x81>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu2: ca57_cpu@2 {
+						reg = <2 0x82>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca57_cpu3: ca57_cpu@3 {
+						reg = <3 0x83>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_ca53_scu: ca53_scu@21 {
+					reg = <21 0x140>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_ca53_cpu0: ca53_cpu@5 {
+						reg = <5 0x200>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu1: ca53_cpu@6 {
+						reg = <6 0x201>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu2: ca53_cpu@7 {
+						reg = <7 0x202>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_ca53_cpu3: ca53_cpu@8 {
+						reg = <8 0x203>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_a3vp: a3vp@9 {
+					reg = <9 0x340>;
+					#power-domain-cells = <0>;
+				};
+
+
+				pd_cr7: cr7@13 {
+					reg = <13 0x240>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_a3vc: a3vc@14 {
+					reg = <14 0x380>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_a2vc0: a2vc@25 {
+						reg = <25 0x3c0>;
+						#power-domain-cells = <0>;
+					};
+
+					pd_a2vc1: a2vc@26 {
+						reg = <26 0x3c1>;
+						#power-domain-cells = <0>;
+					};
+				};
+
+				pd_a3sh: a3sh@16 {
+					reg = <16 0xc0>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_3dg_a: 3dg@17 {
+					reg = <17 0x100>;
+					#address-cells = <2>;
+					#size-cells = <0>;
+					#power-domain-cells = <0>;
+
+					pd_3dg_b: 3dg@18 {
+						reg = <18 0x101>;
+						#address-cells = <2>;
+						#size-cells = <0>;
+						#power-domain-cells = <0>;
+
+						pd_3dg_c: 3dg@19 {
+							reg = <19 0x102>;
+							#address-cells = <2>;
+							#size-cells = <0>;
+							#power-domain-cells = <0>;
+
+							pd_3dg_d: 3dg@20 {
+								reg = <20 0x103>;
+								#address-cells = <2>;
+								#size-cells = <0>;
+								#power-domain-cells = <0>;
+
+								pd_3dg_e: 3dg@22 {
+									reg = <22 0x104>;
+									#power-domain-cells = <0>;
+								};
+							};
+						};
+					};
+				};
+
+				pd_a3ir: a3ir@24 {
+					reg = <24 0x180>;
+					#power-domain-cells = <0>;
+				};
+			};
+		};
 	};
 };
-- 
1.9.1

[PATCH/RFC v2 10/11] ARM: dts: r8a7794: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their
respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7794.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 21a02df3609b24aa..d0fc735571242fd1 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -40,6 +40,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_ca7_cpu0>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -48,12 +49,14 @@
 			compatible = "arm,cortex-a7";
 			reg = <1>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_ca7_cpu1>;
 			next-level-cache = <&L2_CA7>;
 		};
 	};
 
 	L2_CA7: cache-controller@1 {
 		compatible = "cache";
+		power-domains = <&pd_ca7_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1152,6 +1155,43 @@
 		};
 	};
 
+	sysc: system-controller@e6180000 {
+		compatible = "renesas,r8a7794-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca7_scu: scu@21 {
+				reg = <21 0x100>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca7_cpu0: cpu@5 {
+					reg = <5 0x1c0>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu1: cpu@6 {
+					reg = <6 0x1c0>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh@16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx@20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	ipmmu_sy0: mmu@e6280000 {
 		compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
 		reg = <0 0xe6280000 0 0x1000>;
-- 
1.9.1

[PATCH/RFC v2 10/11] ARM: dts: r8a7794: Add SYSC PM domains

[Geert Uytterhoeven]

Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their
respective PM domains.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Change one-line summary prefix to match current arm-soc practices,
  - Update compatible values.
---
 arch/arm/boot/dts/r8a7794.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 21a02df3609b24aa..d0fc735571242fd1 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -40,6 +40,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_ca7_cpu0>;
 			next-level-cache = <&L2_CA7>;
 		};
 
@@ -48,12 +49,14 @@
 			compatible = "arm,cortex-a7";
 			reg = <1>;
 			clock-frequency = <1000000000>;
+			power-domains = <&pd_ca7_cpu1>;
 			next-level-cache = <&L2_CA7>;
 		};
 	};
 
 	L2_CA7: cache-controller at 1 {
 		compatible = "cache";
+		power-domains = <&pd_ca7_scu>;
 		cache-unified;
 		cache-level = <2>;
 	};
@@ -1152,6 +1155,43 @@
 		};
 	};
 
+	sysc: system-controller at e6180000 {
+		compatible = "renesas,r8a7794-sysc", "renesas,rcar-gen2-sysc";
+		reg = <0 0xe6180000 0 0x0200>;
+
+		pm-domains {
+			#address-cells = <2>;
+			#size-cells = <0>;
+
+			pd_ca7_scu: scu at 21 {
+				reg = <21 0x100>;
+				#address-cells = <2>;
+				#size-cells = <0>;
+				#power-domain-cells = <0>;
+
+				pd_ca7_cpu0: cpu at 5 {
+					reg = <5 0x1c0>;
+					#power-domain-cells = <0>;
+				};
+
+				pd_ca7_cpu1: cpu at 6 {
+					reg = <6 0x1c0>;
+					#power-domain-cells = <0>;
+				};
+			};
+
+			pd_sh: sh at 16 {
+				reg = <16 0x80>;
+				#power-domain-cells = <0>;
+			};
+
+			pd_sgx: sgx at 20 {
+				reg = <20 0xc0>;
+				#power-domain-cells = <0>;
+			};
+		};
+	};
+
 	ipmmu_sy0: mmu at e6280000 {
 		compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
 		reg = <0 0xe6280000 0 0x1000>;
-- 
1.9.1

Re: [PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Laurent Pinchart]

Hi Geert,

After rebasing this series on top of Simon's latest devel branch, I'm 
experiencing hard system freezes when using the VSP.

What makes the problem curious is that PM runtime works fine when the VSP 
instances are probed, the A3VP power domain is turned on and off correctly for 
each instance. However, after booting the system, if I try to RPM resume the 
device, the system hangs.

I've traced this (using printk debugging) down to the SYSCISCR write in 
rcar_sysc_power(). The value written is 0x00000200, which corresponds to the 
A3VP power domain, and the resume request completion wait loop doesn't time 
out.

Does this ring any bell ? Do you have a more recent version of this patch 
series that I could try ?

On Monday 15 February 2016 22:16:49 Geert Uytterhoeven wrote:
> 	Hi all,
> 
> The Renesas R-Car System Controller, as found in various Renesas R-Car
> SoCs, provides power management for the CPU cores and various
> coprocessors.
> 
> This RFC patch series adds DT support for the R-Car SYSC, using the
> generic PM Domain. It supports R-Car H1, R-Car Gen2, and R-Car H3.
> 
> Patches:
>   - Patch 1 adds the DT binding documentation (alternatives I considered
>     below the "---"-line),
>   - Patch 2 moves the existing pm-rcar driver to drivers/soc/renesas, so
>     it can be shared by arm32 and arm64,
>   - Patches 3-5 contain the driver implementation,
>   - Patches 6-11 add the SYSC PM domains themselves to the various dtsi
>     files.
> 
> Known issues:
>   - This needs better integration with the PM code in pm-rcar-gen2, the
>     SMP code in smp-r8a7790, and Magnus' DT APMU series,
>   - CPG/MSSR clock domain handling should share more code with the
>     renesas-cpg-mssr driver.
> 
> Changes compared to v2 (more details in the individual patches):
>   - Moved pm-rcar from arch/arm/mach-shmobile/ to drivers/soc/renesas/,
>   - Added R-Car H3 (r8a7795) support, incl. support for devices part of
>     a SYSC PM domain and the CPG/MSSR clock domain,
>   - Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
>   - Added fallback compatibility strings for R-Car Gen2 and Gen3.
>   - Changed one-line summary prefix to match current arm-soc practices,
>   - The L2 cache-controller patches have been extracted into a separate
>     series ("[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
>     cache-controller nodes"),
>   - Minor fixes.
> 
> This series is against renesas-devel-20160215-v4.5-rc4, with series
> "[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
> cache-controller nodes" applied. It is not yet meant to be applied!
> It's published as-is to ease development of drivers for devices residing
> in a SYSC PM domain on R-Car H3 (e.g. VSP, FCP_V).
> 
> This was tested on r8a7779/marzen, r8a7791/koelsch, r8a7794/alt, and
> r8a7795/salvator-x.
> 
> For your convenience, I've also pushed this series to
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git#topi
> c/rcar-sysc-pd-rfc-v2
> 
> Thanks for your comments!
> 
> Geert Uytterhoeven (11):
>   PM / Domains: Add DT bindings for the R-Car System Controller
>   soc: renesas: Move pm-rcar to drivers/soc/renesas/
>   soc: renesas: Improve rcar_sysc_power() debug info
>   soc: renesas: rcar: Add DT support for SYSC PM domains
>   soc: renesas: rcar: Handle clock domain devices in SYSC PM domains
>   ARM: dts: r8a7779: Add SYSC PM domains
>   ARM: dts: r8a7790: Add SYSC PM domains
>   ARM: dts: r8a7791: Add SYSC PM domains
>   ARM: dts: r8a7793: Add SYSC PM domains
>   ARM: dts: r8a7794: Add SYSC PM domains
>   arm64: dts: r8a7795: Add SYSC PM domains
> 
>  .../bindings/power/renesas,sysc-rcar.txt           |  87 ++++
>  arch/arm/boot/dts/r8a7779.dtsi                     |  48 ++
>  arch/arm/boot/dts/r8a7790.dtsi                     |  89 ++++
>  arch/arm/boot/dts/r8a7791.dtsi                     |  40 ++
>  arch/arm/boot/dts/r8a7793.dtsi                     |  39 ++
>  arch/arm/boot/dts/r8a7794.dtsi                     |  40 ++
>  arch/arm/mach-shmobile/Kconfig                     |   8 +-
>  arch/arm/mach-shmobile/Makefile                    |   1 -
>  arch/arm/mach-shmobile/pm-r8a7779.c                |   3 +-
>  arch/arm/mach-shmobile/pm-rcar-gen2.c              |   2 +-
>  arch/arm/mach-shmobile/pm-rcar.c                   | 164 ------
>  arch/arm/mach-shmobile/smp-r8a7779.c               |   2 +-
>  arch/arm/mach-shmobile/smp-r8a7790.c               |   2 +-
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 142 ++++++
>  drivers/soc/Kconfig                                |   1 +
>  drivers/soc/Makefile                               |   3 +-
>  drivers/soc/renesas/Kconfig                        |   8 +
>  drivers/soc/renesas/Makefile                       |   1 +
>  drivers/soc/renesas/pm-rcar.c                      | 559 ++++++++++++++++++
>  .../linux/soc/renesas}/pm-rcar.h                   |   2 +
>  20 files changed, 1065 insertions(+), 176 deletions(-)
>  create mode 100644
> Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt delete mode
> 100644 arch/arm/mach-shmobile/pm-rcar.c
>  create mode 100644 drivers/soc/renesas/Kconfig
>  create mode 100644 drivers/soc/renesas/Makefile
>  create mode 100644 drivers/soc/renesas/pm-rcar.c
>  rename {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h
> (93%)

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Laurent Pinchart]

Hi Geert,

After rebasing this series on top of Simon's latest devel branch, I'm 
experiencing hard system freezes when using the VSP.

What makes the problem curious is that PM runtime works fine when the VSP 
instances are probed, the A3VP power domain is turned on and off correctly for 
each instance. However, after booting the system, if I try to RPM resume the 
device, the system hangs.

I've traced this (using printk debugging) down to the SYSCISCR write in 
rcar_sysc_power(). The value written is 0x00000200, which corresponds to the 
A3VP power domain, and the resume request completion wait loop doesn't time 
out.

Does this ring any bell ? Do you have a more recent version of this patch 
series that I could try ?

On Monday 15 February 2016 22:16:49 Geert Uytterhoeven wrote:
> 	Hi all,
> 
> The Renesas R-Car System Controller, as found in various Renesas R-Car
> SoCs, provides power management for the CPU cores and various
> coprocessors.
> 
> This RFC patch series adds DT support for the R-Car SYSC, using the
> generic PM Domain. It supports R-Car H1, R-Car Gen2, and R-Car H3.
> 
> Patches:
>   - Patch 1 adds the DT binding documentation (alternatives I considered
>     below the "---"-line),
>   - Patch 2 moves the existing pm-rcar driver to drivers/soc/renesas, so
>     it can be shared by arm32 and arm64,
>   - Patches 3-5 contain the driver implementation,
>   - Patches 6-11 add the SYSC PM domains themselves to the various dtsi
>     files.
> 
> Known issues:
>   - This needs better integration with the PM code in pm-rcar-gen2, the
>     SMP code in smp-r8a7790, and Magnus' DT APMU series,
>   - CPG/MSSR clock domain handling should share more code with the
>     renesas-cpg-mssr driver.
> 
> Changes compared to v2 (more details in the individual patches):
>   - Moved pm-rcar from arch/arm/mach-shmobile/ to drivers/soc/renesas/,
>   - Added R-Car H3 (r8a7795) support, incl. support for devices part of
>     a SYSC PM domain and the CPG/MSSR clock domain,
>   - Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
>   - Added fallback compatibility strings for R-Car Gen2 and Gen3.
>   - Changed one-line summary prefix to match current arm-soc practices,
>   - The L2 cache-controller patches have been extracted into a separate
>     series ("[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
>     cache-controller nodes"),
>   - Minor fixes.
> 
> This series is against renesas-devel-20160215-v4.5-rc4, with series
> "[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2
> cache-controller nodes" applied. It is not yet meant to be applied!
> It's published as-is to ease development of drivers for devices residing
> in a SYSC PM domain on R-Car H3 (e.g. VSP, FCP_V).
> 
> This was tested on r8a7779/marzen, r8a7791/koelsch, r8a7794/alt, and
> r8a7795/salvator-x.
> 
> For your convenience, I've also pushed this series to
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git#topi
> c/rcar-sysc-pd-rfc-v2
> 
> Thanks for your comments!
> 
> Geert Uytterhoeven (11):
>   PM / Domains: Add DT bindings for the R-Car System Controller
>   soc: renesas: Move pm-rcar to drivers/soc/renesas/
>   soc: renesas: Improve rcar_sysc_power() debug info
>   soc: renesas: rcar: Add DT support for SYSC PM domains
>   soc: renesas: rcar: Handle clock domain devices in SYSC PM domains
>   ARM: dts: r8a7779: Add SYSC PM domains
>   ARM: dts: r8a7790: Add SYSC PM domains
>   ARM: dts: r8a7791: Add SYSC PM domains
>   ARM: dts: r8a7793: Add SYSC PM domains
>   ARM: dts: r8a7794: Add SYSC PM domains
>   arm64: dts: r8a7795: Add SYSC PM domains
> 
>  .../bindings/power/renesas,sysc-rcar.txt           |  87 ++++
>  arch/arm/boot/dts/r8a7779.dtsi                     |  48 ++
>  arch/arm/boot/dts/r8a7790.dtsi                     |  89 ++++
>  arch/arm/boot/dts/r8a7791.dtsi                     |  40 ++
>  arch/arm/boot/dts/r8a7793.dtsi                     |  39 ++
>  arch/arm/boot/dts/r8a7794.dtsi                     |  40 ++
>  arch/arm/mach-shmobile/Kconfig                     |   8 +-
>  arch/arm/mach-shmobile/Makefile                    |   1 -
>  arch/arm/mach-shmobile/pm-r8a7779.c                |   3 +-
>  arch/arm/mach-shmobile/pm-rcar-gen2.c              |   2 +-
>  arch/arm/mach-shmobile/pm-rcar.c                   | 164 ------
>  arch/arm/mach-shmobile/smp-r8a7779.c               |   2 +-
>  arch/arm/mach-shmobile/smp-r8a7790.c               |   2 +-
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 142 ++++++
>  drivers/soc/Kconfig                                |   1 +
>  drivers/soc/Makefile                               |   3 +-
>  drivers/soc/renesas/Kconfig                        |   8 +
>  drivers/soc/renesas/Makefile                       |   1 +
>  drivers/soc/renesas/pm-rcar.c                      | 559 ++++++++++++++++++
>  .../linux/soc/renesas}/pm-rcar.h                   |   2 +
>  20 files changed, 1065 insertions(+), 176 deletions(-)
>  create mode 100644
> Documentation/devicetree/bindings/power/renesas,sysc-rcar.txt delete mode
> 100644 arch/arm/mach-shmobile/pm-rcar.c
>  create mode 100644 drivers/soc/renesas/Kconfig
>  create mode 100644 drivers/soc/renesas/Makefile
>  create mode 100644 drivers/soc/renesas/pm-rcar.c
>  rename {arch/arm/mach-shmobile => include/linux/soc/renesas}/pm-rcar.h
> (93%)

-- 
Regards,

Laurent Pinchart

Re: [PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Geert Uytterhoeven]

Hi Laurent,

On Sat, Feb 27, 2016 at 2:53 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> After rebasing this series on top of Simon's latest devel branch, I'm
> experiencing hard system freezes when using the VSP.

Is this due to the rebasing? Did it work in renesas-drivers-2016-02-16-v4.5-rc4
or renesas-drivers-2016-02-23-v4.5-rc5?

> What makes the problem curious is that PM runtime works fine when the VSP
> instances are probed, the A3VP power domain is turned on and off correctly for
> each instance. However, after booting the system, if I try to RPM resume the
> device, the system hangs.
>
> I've traced this (using printk debugging) down to the SYSCISCR write in
> rcar_sysc_power(). The value written is 0x00000200, which corresponds to the
> A3VP power domain, and the resume request completion wait loop doesn't time
> out.

So the second write to SYSCISCR in that function locks up the system?

> Does this ring any bell ? Do you have a more recent version of this patch
> series that I could try ?

No clue, and no more recent version available yet.

What do I need to reproduce this?

Thanks for testing!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Geert Uytterhoeven]

Hi Laurent,

On Sat, Feb 27, 2016 at 2:53 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> After rebasing this series on top of Simon's latest devel branch, I'm
> experiencing hard system freezes when using the VSP.

Is this due to the rebasing? Did it work in renesas-drivers-2016-02-16-v4.5-rc4
or renesas-drivers-2016-02-23-v4.5-rc5?

> What makes the problem curious is that PM runtime works fine when the VSP
> instances are probed, the A3VP power domain is turned on and off correctly for
> each instance. However, after booting the system, if I try to RPM resume the
> device, the system hangs.
>
> I've traced this (using printk debugging) down to the SYSCISCR write in
> rcar_sysc_power(). The value written is 0x00000200, which corresponds to the
> A3VP power domain, and the resume request completion wait loop doesn't time
> out.

So the second write to SYSCISCR in that function locks up the system?

> Does this ring any bell ? Do you have a more recent version of this patch
> series that I could try ?

No clue, and no more recent version available yet.

What do I need to reproduce this?

Thanks for testing!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 7283 bytes --]

Hi Geert,

On Sunday 28 February 2016 09:55:32 Geert Uytterhoeven wrote:
> On Sat, Feb 27, 2016 at 2:53 AM, Laurent Pinchart wrote:
> > After rebasing this series on top of Simon's latest devel branch, I'm
> > experiencing hard system freezes when using the VSP.
> 
> Is this due to the rebasing? Did it work in
> renesas-drivers-2016-02-16-v4.5-rc4 or renesas-drivers-2016-02-23-v4.5-rc5?

I thought it was, but after further investigations I've been unable to get it
working at all even on my older branches, so I think the problem has always
been there.

> > What makes the problem curious is that PM runtime works fine when the VSP
> > instances are probed, the A3VP power domain is turned on and off correctly
> > for each instance. However, after booting the system, if I try to RPM
> > resume the device, the system hangs.
> > 
> > I've traced this (using printk debugging) down to the SYSCISCR write in
> > rcar_sysc_power(). The value written is 0x00000200, which corresponds to
> > the A3VP power domain, and the resume request completion wait loop
> > doesn't time out.
> 
> So the second write to SYSCISCR in that function locks up the system?

Correct, and only after the kernel has booted, there's a bunch of calls to
rcar_sysc_power() to enable/disable the A3VP power domain at boot time when
the vsp devices are probed, and those don't cause any issue.

> > Does this ring any bell ? Do you have a more recent version of this patch
> > series that I could try ?
> 
> No clue, and no more recent version available yet.
> 
> What do I need to reproduce this?

Compile

git://linuxtv.org/pinchartl/media.git drm/du/vsp1-kms/boards

(.config attached), boot it, and run

# cat /dev/video0

You can apply the following patch to see what's going on.

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index d1bf8c231540..4a5f00d7f84d 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -139,6 +139,9 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
 	int ret = 0;
 	int k;
 
+	if (sysc_ch->isr_bit == 9)
+		printk(KERN_INFO "%s(A3VP, %s)\n", __func__, on ? "on" : "off");
+
 	spin_lock_irqsave(&rcar_sysc_lock, flags);
 
 	iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
@@ -172,7 +175,16 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
 	if (k == SYSCISR_RETRIES)
 		ret = -EIO;
 
+	if (sysc_ch->isr_bit == 9) {
+		udelay(5000);
+		printk(KERN_INFO "%s: will write to SYSISCR\n", __func__);
+		udelay(5000);
+	}
 	iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
+	if (sysc_ch->isr_bit == 9) {
+		udelay(5000);
+		printk(KERN_INFO "%s: wrote to SYSISCR\n", __func__);
+	}
 
  out:
 	spin_unlock_irqrestore(&rcar_sysc_lock, flags);


On my system it prints the following messages during boot when probing the vsp
instances.

[    0.528433] rcar_sysc_power(A3VP, off)
[    0.535317] rcar_sysc_power: will write to SYSISCR
[    0.547713] rcar_sysc_power: wrote to SYSISCR
[    0.549910] rcar_sysc_power(A3VP, on)
[    0.556759] rcar_sysc_power: will write to SYSISCR
[    0.569155] rcar_sysc_power: wrote to SYSISCR
[    0.571386] rcar_sysc_power(A3VP, off)
[    0.578270] rcar_sysc_power: will write to SYSISCR
[    0.590665] rcar_sysc_power: wrote to SYSISCR
[    0.592857] rcar_sysc_power(A3VP, on)
[    0.599698] rcar_sysc_power: will write to SYSISCR
[    0.612094] rcar_sysc_power: wrote to SYSISCR
[    0.614310] rcar_sysc_power(A3VP, off)
[    0.621197] rcar_sysc_power: will write to SYSISCR
[    0.633592] rcar_sysc_power: wrote to SYSISCR
[    0.635783] rcar_sysc_power(A3VP, on)
[    0.642625] rcar_sysc_power: will write to SYSISCR
[    0.655020] rcar_sysc_power: wrote to SYSISCR
[    0.657237] rcar_sysc_power(A3VP, off)
[    0.664120] rcar_sysc_power: will write to SYSISCR
[    0.676515] rcar_sysc_power: wrote to SYSISCR
[    0.678706] rcar_sysc_power(A3VP, on)
[    0.685550] rcar_sysc_power: will write to SYSISCR
[    0.697945] rcar_sysc_power: wrote to SYSISCR
[    0.700133] rcar_sysc_power(A3VP, off)
[    0.707015] rcar_sysc_power: will write to SYSISCR
[    0.719410] rcar_sysc_power: wrote to SYSISCR
[    0.721736] rcar_sysc_power(A3VP, on)
[    0.728583] rcar_sysc_power: will write to SYSISCR
[    0.740978] rcar_sysc_power: wrote to SYSISCR
[    0.743213] rcar_sysc_power(A3VP, off)
[    0.750099] rcar_sysc_power: will write to SYSISCR
[    0.762495] rcar_sysc_power: wrote to SYSISCR
[    0.765445] rcar_sysc_power(A3VP, on)
[    0.772294] rcar_sysc_power: will write to SYSISCR
[    0.784689] rcar_sysc_power: wrote to SYSISCR
[    0.786897] rcar_sysc_power(A3VP, off)
[    0.793783] rcar_sysc_power: will write to SYSISCR
[    0.806178] rcar_sysc_power: wrote to SYSISCR
[    0.808369] rcar_sysc_power(A3VP, on)
[    0.815211] rcar_sysc_power: will write to SYSISCR
[    0.827606] rcar_sysc_power: wrote to SYSISCR
[    0.829845] rcar_sysc_power(A3VP, off)
[    0.836733] rcar_sysc_power: will write to SYSISCR
[    0.849128] rcar_sysc_power: wrote to SYSISCR
[    0.851985] rcar_sysc_power(A3VP, on)
[    0.858829] rcar_sysc_power: will write to SYSISCR
[    0.871224] rcar_sysc_power: wrote to SYSISCR
[    0.873435] rcar_sysc_power(A3VP, off)
[    0.880323] rcar_sysc_power: will write to SYSISCR
[    0.892719] rcar_sysc_power: wrote to SYSISCR
[    0.894911] rcar_sysc_power(A3VP, on)
[    0.901772] rcar_sysc_power: will write to SYSISCR
[    0.914168] rcar_sysc_power: wrote to SYSISCR
[    0.916395] rcar_sysc_power(A3VP, off)
[    0.923278] rcar_sysc_power: will write to SYSISCR
[    0.935673] rcar_sysc_power: wrote to SYSISCR
[    0.938275] rcar_sysc_power(A3VP, on)
[    0.945129] rcar_sysc_power: will write to SYSISCR
[    0.957525] rcar_sysc_power: wrote to SYSISCR
[    0.959729] rcar_sysc_power(A3VP, off)
[    0.966612] rcar_sysc_power: will write to SYSISCR
[    0.979008] rcar_sysc_power: wrote to SYSISCR
[    0.981204] rcar_sysc_power(A3VP, on)
[    0.988044] rcar_sysc_power: will write to SYSISCR
[    1.000440] rcar_sysc_power: wrote to SYSISCR
[    1.002660] rcar_sysc_power(A3VP, off)
[    1.009546] rcar_sysc_power: will write to SYSISCR
[    1.021941] rcar_sysc_power: wrote to SYSISCR
[    1.024540] rcar_sysc_power(A3VP, on)
[    1.031383] rcar_sysc_power: will write to SYSISCR
[    1.043778] rcar_sysc_power: wrote to SYSISCR
[    1.045980] rcar_sysc_power(A3VP, off)
[    1.052865] rcar_sysc_power: will write to SYSISCR
[    1.065261] rcar_sysc_power: wrote to SYSISCR
[    1.067450] rcar_sysc_power(A3VP, on)
[    1.074292] rcar_sysc_power: will write to SYSISCR
[    1.086687] rcar_sysc_power: wrote to SYSISCR
[    1.088910] rcar_sysc_power(A3VP, off)
[    1.095792] rcar_sysc_power: will write to SYSISCR
[    1.108187] rcar_sysc_power: wrote to SYSISCR
[    1.110781] rcar_sysc_power(A3VP, on)
[    1.117628] rcar_sysc_power: will write to SYSISCR
[    1.130023] rcar_sysc_power: wrote to SYSISCR
[    1.132224] rcar_sysc_power(A3VP, off)
[    1.139106] rcar_sysc_power: will write to SYSISCR
[    1.151501] rcar_sysc_power: wrote to SYSISCR


When I cat /dev/video0 I get the following messages in the kernel log

/ # cat /dev/video0
[    4.673226] rcar_sysc_power(A3VP, on)
[    4.680816] rcar_sysc_power: will write to SYSISCR

and the system then freezes.

-- 
Regards,

Laurent Pinchart

[-- Attachment #2: .config --]
[-- Type: text/plain, Size: 58823 bytes --]

#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.5.0-rc5 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
CONFIG_MMU=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_NO_IOPORT_MAP=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ZONE_DMA=y
CONFIG_HAVE_GENERIC_RCU_GUP=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_SMP=y
CONFIG_SWIOTLB=y
CONFIG_IOMMU_HELPER=y
CONFIG_KERNEL_MODE_NEON=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y

#
# General setup
#
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_FHANDLE=y
CONFIG_USELIB=y
CONFIG_AUDIT=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_AUDITSYSCALL=y
CONFIG_AUDIT_WATCH=y
CONFIG_AUDIT_TREE=y

#
# IRQ subsystem
#
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_HANDLE_DOMAIN_IRQ=y
# CONFIG_IRQ_DOMAIN_DEBUG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y

#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
# CONFIG_NO_HZ_FULL is not set
# CONFIG_NO_HZ is not set
CONFIG_HIGH_RES_TIMERS=y

#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y

#
# RCU Subsystem
#
CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
# CONFIG_TASKS_RCU is not set
CONFIG_RCU_STALL_COMMON=y
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_RCU_EXPEDITE_BOOT is not set
CONFIG_BUILD_BIN2C=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_CGROUPS=y
CONFIG_PAGE_COUNTER=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_MEMCG_SWAP_ENABLED=y
# CONFIG_BLK_CGROUP is not set
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_CFS_BANDWIDTH is not set
# CONFIG_RT_GROUP_SCHED is not set
# CONFIG_CGROUP_PIDS is not set
# CONFIG_CGROUP_FREEZER is not set
# CONFIG_CPUSETS is not set
# CONFIG_CGROUP_DEVICE is not set
# CONFIG_CGROUP_CPUACCT is not set
# CONFIG_CGROUP_PERF is not set
# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CHECKPOINT_RESTORE is not set
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_IPC_NS is not set
# CONFIG_USER_NS is not set
CONFIG_PID_NS=y
# CONFIG_NET_NS is not set
CONFIG_SCHED_AUTOGROUP=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
CONFIG_RD_XZ=y
CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_HAVE_UID16=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_BPF=y
# CONFIG_EXPERT is not set
CONFIG_UID16=y
CONFIG_MULTIUSER=y
# CONFIG_SGETMASK_SYSCALL is not set
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
# CONFIG_BPF_SYSCALL is not set
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_ADVISE_SYSCALLS=y
# CONFIG_USERFAULTFD is not set
CONFIG_MEMBARRIER=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y

#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SLUB_CPU_PARTIAL=y
# CONFIG_SYSTEM_DATA_VERIFICATION is not set
CONFIG_PROFILING=y
CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set
# CONFIG_UPROBES is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
CONFIG_HAVE_CMPXCHG_LOCAL=y
CONFIG_HAVE_CMPXCHG_DOUBLE=y
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_CC_STACKPROTECTOR_NONE=y
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_COMPAT_OLD_SIGACTION=y

#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
# CONFIG_MODULE_COMPRESS is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_CMDLINE_PARSER is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_BLOCK_COMPAT=y

#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_DEADLINE is not set
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_PREEMPT_NOTIFIERS=y
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_FREEZER=y

#
# Platform selection
#
# CONFIG_ARCH_BCM_IPROC is not set
# CONFIG_ARCH_BERLIN is not set
# CONFIG_ARCH_EXYNOS7 is not set
# CONFIG_ARCH_LAYERSCAPE is not set
# CONFIG_ARCH_HISI is not set
# CONFIG_ARCH_MEDIATEK is not set
# CONFIG_ARCH_QCOM is not set
# CONFIG_ARCH_ROCKCHIP is not set
# CONFIG_ARCH_SEATTLE is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_RENESAS=y
CONFIG_ARCH_R8A7795=y
# CONFIG_ARCH_STRATIX10 is not set
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_SPRD is not set
# CONFIG_ARCH_THUNDER is not set
# CONFIG_ARCH_UNIPHIER is not set
# CONFIG_ARCH_VEXPRESS is not set
# CONFIG_ARCH_XGENE is not set
# CONFIG_ARCH_ZYNQMP is not set

#
# Bus support
#
# CONFIG_PCI is not set
# CONFIG_PCI_DOMAINS is not set
# CONFIG_PCI_DOMAINS_GENERIC is not set
# CONFIG_PCI_SYSCALL is not set
CONFIG_PCI_LABEL=y

#
# Kernel Features
#

#
# ARM errata workarounds via the alternatives framework
#
CONFIG_ARM64_ERRATUM_826319=y
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_834220=y
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_ERRATUM_843419=y
# CONFIG_CAVIUM_ERRATUM_22375 is not set
# CONFIG_CAVIUM_ERRATUM_23154 is not set
CONFIG_ARM64_4K_PAGES=y
# CONFIG_ARM64_16K_PAGES is not set
# CONFIG_ARM64_64K_PAGES is not set
CONFIG_ARM64_VA_BITS_39=y
# CONFIG_ARM64_VA_BITS_48 is not set
CONFIG_ARM64_VA_BITS=39
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_SCHED_MC is not set
# CONFIG_SCHED_SMT is not set
CONFIG_NR_CPUS=64
CONFIG_HOTPLUG_CPU=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HW_PERF_EVENTS=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_NO_BOOTMEM=y
CONFIG_MEMORY_ISOLATION=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_COMPACTION=y
CONFIG_MIGRATION=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_MMU_NOTIFIER=y
CONFIG_KSM=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
CONFIG_CMA=y
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_AREAS=7
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
# CONFIG_ZSMALLOC is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_IDLE_PAGE_TRACKING is not set
CONFIG_FRAME_VECTOR=y
# CONFIG_SECCOMP is not set
# CONFIG_PARAVIRT is not set
# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
# CONFIG_XEN is not set
CONFIG_FORCE_MAX_ZONEORDER=11
# CONFIG_ARMV8_DEPRECATED is not set

#
# ARMv8.1 architectural features
#
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_PAN=y
# CONFIG_ARM64_LSE_ATOMICS is not set

#
# Boot options
#
CONFIG_CMDLINE="console=ttyAMA0"
# CONFIG_CMDLINE_FORCE is not set
CONFIG_EFI_STUB=y
CONFIG_EFI=y
CONFIG_DMI=y

#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
CONFIG_COMPAT_BINFMT_ELF=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_BINFMT_SCRIPT=y
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
CONFIG_COMPAT=y
CONFIG_SYSVIPC_COMPAT=y

#
# Power management options
#
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
# CONFIG_PM_AUTOSLEEP is not set
# CONFIG_PM_WAKELOCKS is not set
CONFIG_PM=y
CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_PM_SLEEP_DEBUG=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_CPU_PM=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y

#
# CPU Power Management
#

#
# CPU Idle
#
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_DT_IDLE_STATES=y

#
# ARM CPU Idle Drivers
#
CONFIG_ARM_CPUIDLE=y
# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set

#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
CONFIG_NET=y

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
# CONFIG_UNIX_DIAG is not set
# CONFIG_XFRM_USER is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE_DEMUX is not set
# CONFIG_NET_IP_TUNNEL is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_NET_UDP_TUNNEL is not set
# CONFIG_NET_FOU is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
CONFIG_NET_PTP_CLASSIFY=y
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_L2TP is not set
# CONFIG_BRIDGE is not set
CONFIG_HAVE_NET_DSA=y
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
# CONFIG_DNS_RESOLVER is not set
# CONFIG_BATMAN_ADV is not set
# CONFIG_OPENVSWITCH is not set
# CONFIG_VSOCKETS is not set
# CONFIG_NETLINK_MMAP is not set
# CONFIG_NETLINK_DIAG is not set
# CONFIG_MPLS is not set
# CONFIG_HSR is not set
# CONFIG_NET_SWITCHDEV is not set
# CONFIG_NET_L3_MASTER_DEV is not set
CONFIG_RPS=y
CONFIG_RFS_ACCEL=y
CONFIG_XPS=y
# CONFIG_SOCK_CGROUP_DATA is not set
# CONFIG_CGROUP_NET_PRIO is not set
# CONFIG_CGROUP_NET_CLASSID is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
# CONFIG_BPF_JIT is not set
CONFIG_NET_FLOW_LIMIT=y

#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_WIRELESS is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_RFKILL_REGULATOR is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_HAVE_BPF_JIT=y

#
# Device Drivers
#
CONFIG_ARM_AMBA=y

#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_ALLOW_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_DMA_SHARED_BUFFER=y
# CONFIG_FENCE_TRACE is not set
CONFIG_DMA_CMA=y

#
# Default contiguous memory area size:
#
CONFIG_CMA_SIZE_MBYTES=16
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_ALIGNMENT=8

#
# Bus devices
#
CONFIG_ARM_CCI=y
CONFIG_ARM_CCI_PMU=y
# CONFIG_ARM_CCI400_PMU is not set
CONFIG_ARM_CCI500_PMU=y
# CONFIG_ARM_CCN is not set
# CONFIG_SIMPLE_PM_BUS is not set
CONFIG_VEXPRESS_CONFIG=y
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
CONFIG_DTC=y
CONFIG_OF=y
# CONFIG_OF_UNITTEST is not set
CONFIG_OF_FLATTREE=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_IRQ=y
CONFIG_OF_NET=y
CONFIG_OF_MDIO=y
CONFIG_OF_RESERVED_MEM=y
# CONFIG_OF_OVERLAY is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_DRBD is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_RBD is not set

#
# Misc devices
#
# CONFIG_SENSORS_LIS3LV02D is not set
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1780 is not set
# CONFIG_SENSORS_BH1770 is not set
# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_BMP085_I2C is not set
# CONFIG_USB_SWITCH_FSA9480 is not set
# CONFIG_SRAM is not set
# CONFIG_VEXPRESS_SYSCFG is not set
# CONFIG_C2PORT is not set

#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
# CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set

#
# Texas Instruments shared transport line discipline
#
# CONFIG_TI_ST is not set
# CONFIG_SENSORS_LIS3_I2C is not set

#
# Altera FPGA firmware download module
#
# CONFIG_ALTERA_STAPL is not set

#
# Intel MIC Bus Driver
#

#
# SCIF Bus Driver
#

#
# Intel MIC Host Driver
#

#
# Intel MIC Card Driver
#

#
# SCIF Driver
#

#
# Intel MIC Coprocessor State Management (COSM) Drivers
#
# CONFIG_ECHO is not set
# CONFIG_CXL_BASE is not set
# CONFIG_CXL_KERNEL_API is not set
# CONFIG_CXL_EEH is not set

#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_HAVE_PATA_PLATFORM=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
# CONFIG_DUMMY is not set
# CONFIG_EQUALIZER is not set
# CONFIG_NET_TEAM is not set
# CONFIG_MACVLAN is not set
# CONFIG_VXLAN is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_TUN is not set
# CONFIG_TUN_VNET_CROSS_LE is not set
# CONFIG_VETH is not set
# CONFIG_NLMON is not set

#
# CAIF transport drivers
#
# CONFIG_VHOST_NET is not set
# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set

#
# Distributed Switch Architecture drivers
#
# CONFIG_NET_DSA_MV88E6XXX is not set
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
CONFIG_ETHERNET=y
# CONFIG_ALTERA_TSE is not set
# CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_AURORA is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_DNET is not set
# CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_HISILICON is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_ETHOC is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
CONFIG_NET_VENDOR_RENESAS=y
# CONFIG_SH_ETH is not set
CONFIG_RAVB=y
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PHYLIB=y

#
# MII PHY device drivers
#
# CONFIG_AQUANTIA_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_AMD_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_MICREL_PHY is not set
# CONFIG_DP83848_PHY is not set
# CONFIG_DP83867_PHY is not set
# CONFIG_MICROCHIP_PHY is not set
# CONFIG_FIXED_PHY is not set
CONFIG_MDIO_BITBANG=y
# CONFIG_MDIO_GPIO is not set
# CONFIG_MDIO_OCTEON is not set
# CONFIG_MDIO_BUS_MUX_GPIO is not set
# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
# CONFIG_MDIO_BCM_UNIMAC is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Host-side USB support is needed for USB Network Adapter support
#
# CONFIG_WLAN is not set

#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set
# CONFIG_ISDN is not set
# CONFIG_NVM is not set

#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_LEDS is not set
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set

#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set

#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set

#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set

#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=16
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
CONFIG_DEVMEM=y
CONFIG_DEVKMEM=y

#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
# CONFIG_SERIAL_8250_INGENIC is not set

#
# Non-8250 serial port support
#
# CONFIG_SERIAL_AMBA_PL010 is not set
# CONFIG_SERIAL_AMBA_PL011 is not set
# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=2
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_SC16IS7XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_XILINX_PS_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
# CONFIG_HVC_DCC is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_R3964 is not set

#
# PCMCIA character devices
#
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_XILLYBUS is not set

#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
# CONFIG_I2C_COMPAT is not set
# CONFIG_I2C_CHARDEV is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_ALGOBIT=y

#
# I2C Hardware Bus support
#

#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_CADENCE is not set
# CONFIG_I2C_CBUS_GPIO is not set
# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_NOMADIK is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_PXA_PCI is not set
# CONFIG_I2C_RIIC is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_SH_MOBILE is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set
CONFIG_I2C_RCAR=y

#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set

#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_STUB is not set
CONFIG_I2C_SLAVE=y
# CONFIG_I2C_SLAVE_EEPROM is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_SPI is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set

#
# PPS support
#
CONFIG_PPS=y
# CONFIG_PPS_DEBUG is not set
# CONFIG_NTP_PPS is not set

#
# PPS clients support
#
# CONFIG_PPS_CLIENT_KTIMER is not set
# CONFIG_PPS_CLIENT_LDISC is not set
# CONFIG_PPS_CLIENT_GPIO is not set

#
# PPS generators support
#

#
# PTP clock support
#
CONFIG_PTP_1588_CLOCK=y

#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
CONFIG_PINCTRL=y

#
# Pin controllers
#
CONFIG_PINMUX=y
CONFIG_PINCONF=y
CONFIG_GENERIC_PINCONF=y
# CONFIG_DEBUG_PINCTRL is not set
# CONFIG_PINCTRL_AMD is not set
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PINCTRL_SH_PFC=y
CONFIG_GPIO_SH_PFC=y
CONFIG_PINCTRL_PFC_R8A7795=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_OF_GPIO=y
CONFIG_GPIOLIB_IRQCHIP=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set
CONFIG_GPIO_GENERIC=y

#
# Memory mapped GPIO drivers
#
# CONFIG_GPIO_74XX_MMIO is not set
# CONFIG_GPIO_ALTERA is not set
# CONFIG_GPIO_DWAPB is not set
CONFIG_GPIO_GENERIC_PLATFORM=y
# CONFIG_GPIO_GRGPIO is not set
# CONFIG_GPIO_PL061 is not set
CONFIG_GPIO_RCAR=y
# CONFIG_GPIO_SYSCON is not set
# CONFIG_GPIO_XGENE is not set
# CONFIG_GPIO_XILINX is not set
# CONFIG_GPIO_ZX is not set

#
# I2C GPIO expanders
#
# CONFIG_GPIO_ADP5588 is not set
# CONFIG_GPIO_ADNP is not set
# CONFIG_GPIO_MAX7300 is not set
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set
# CONFIG_GPIO_SX150X is not set

#
# MFD GPIO expanders
#

#
# SPI or I2C GPIO expanders
#
# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_W1 is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
# CONFIG_PDA_POWER is not set
# CONFIG_TEST_POWER is not set
# CONFIG_BATTERY_DS2780 is not set
# CONFIG_BATTERY_DS2781 is not set
# CONFIG_BATTERY_DS2782 is not set
# CONFIG_BATTERY_SBS is not set
# CONFIG_BATTERY_BQ27XXX is not set
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_CHARGER_MAX8903 is not set
# CONFIG_CHARGER_LP8727 is not set
# CONFIG_CHARGER_GPIO is not set
# CONFIG_CHARGER_MANAGER is not set
# CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set
# CONFIG_CHARGER_BQ24735 is not set
# CONFIG_CHARGER_BQ25890 is not set
# CONFIG_CHARGER_SMB347 is not set
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_CHARGER_RT9455 is not set
CONFIG_POWER_RESET=y
# CONFIG_POWER_RESET_GPIO is not set
# CONFIG_POWER_RESET_GPIO_RESTART is not set
# CONFIG_POWER_RESET_LTC2952 is not set
# CONFIG_POWER_RESET_RESTART is not set
# CONFIG_POWER_RESET_VEXPRESS is not set
# CONFIG_POWER_RESET_XGENE is not set
CONFIG_POWER_RESET_SYSCON=y
# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
# CONFIG_POWER_AVS is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y

#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y

#
# Broadcom specific AMBA
#
# CONFIG_BCMA is not set

#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_MFD_AS3722 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_AAT2870_CORE is not set
# CONFIG_MFD_ATMEL_FLEXCOM is not set
# CONFIG_MFD_ATMEL_HLCDC is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_AXP20X is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_I2C is not set
# CONFIG_MFD_DA9055 is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_INTEL_SOC_PMIC is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77686 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_RK808 is not set
# CONFIG_MFD_RN5T618 is not set
# CONFIG_MFD_SEC_CORE is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_SMSC is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_STMPE is not set
CONFIG_MFD_SYSCON=y
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_TPS6105X is not set
# CONFIG_TPS65010 is not set
# CONFIG_TPS6507X is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
# CONFIG_MFD_TPS65912 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS80031 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_VEXPRESS_SYSREG is not set
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_ACT8865 is not set
# CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_ANATOP is not set
# CONFIG_REGULATOR_DA9210 is not set
# CONFIG_REGULATOR_DA9211 is not set
# CONFIG_REGULATOR_FAN53555 is not set
# CONFIG_REGULATOR_GPIO is not set
# CONFIG_REGULATOR_ISL9305 is not set
# CONFIG_REGULATOR_ISL6271A is not set
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_LP3972 is not set
# CONFIG_REGULATOR_LP872X is not set
# CONFIG_REGULATOR_LP8755 is not set
# CONFIG_REGULATOR_LTC3589 is not set
# CONFIG_REGULATOR_MAX1586 is not set
# CONFIG_REGULATOR_MAX8649 is not set
# CONFIG_REGULATOR_MAX8660 is not set
# CONFIG_REGULATOR_MAX8952 is not set
# CONFIG_REGULATOR_MAX8973 is not set
# CONFIG_REGULATOR_MT6311 is not set
# CONFIG_REGULATOR_PFUZE100 is not set
# CONFIG_REGULATOR_PV88060 is not set
# CONFIG_REGULATOR_PV88090 is not set
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS62360 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
# CONFIG_REGULATOR_VEXPRESS is not set
CONFIG_MEDIA_SUPPORT=y

#
# Multimedia core support
#
CONFIG_MEDIA_CAMERA_SUPPORT=y
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
# CONFIG_MEDIA_RADIO_SUPPORT is not set
# CONFIG_MEDIA_SDR_SUPPORT is not set
# CONFIG_MEDIA_RC_SUPPORT is not set
CONFIG_MEDIA_CONTROLLER=y
# CONFIG_MEDIA_CONTROLLER_DVB is not set
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_VIDEO_V4L2=y
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_VIDEOBUF2_CORE=y
CONFIG_VIDEOBUF2_MEMOPS=y
CONFIG_VIDEOBUF2_DMA_CONTIG=y
# CONFIG_TTPCI_EEPROM is not set

#
# Media drivers
#
CONFIG_V4L_PLATFORM_DRIVERS=y
# CONFIG_VIDEO_SH_VOU is not set
# CONFIG_SOC_CAMERA is not set
# CONFIG_VIDEO_XILINX is not set
CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_VIDEO_SH_VEU is not set
# CONFIG_VIDEO_RENESAS_JPU is not set
CONFIG_VIDEO_RENESAS_FCP=y
CONFIG_VIDEO_RENESAS_VSP1=y
# CONFIG_V4L_TEST_DRIVERS is not set

#
# Supported MMC/SDIO adapters
#

#
# Media ancillary drivers (tuners, sensors, i2c, frontends)
#
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set

#
# Encoders, decoders, sensors and other helper chips
#

#
# Audio decoders, processors and mixers
#
# CONFIG_VIDEO_TVAUDIO is not set
# CONFIG_VIDEO_TDA7432 is not set
# CONFIG_VIDEO_TDA9840 is not set
# CONFIG_VIDEO_TEA6415C is not set
# CONFIG_VIDEO_TEA6420 is not set
# CONFIG_VIDEO_MSP3400 is not set
# CONFIG_VIDEO_CS3308 is not set
# CONFIG_VIDEO_CS5345 is not set
# CONFIG_VIDEO_CS53L32A is not set
# CONFIG_VIDEO_TLV320AIC23B is not set
# CONFIG_VIDEO_UDA1342 is not set
# CONFIG_VIDEO_WM8775 is not set
# CONFIG_VIDEO_WM8739 is not set
# CONFIG_VIDEO_VP27SMPX is not set
# CONFIG_VIDEO_SONY_BTF_MPX is not set

#
# RDS decoders
#
# CONFIG_VIDEO_SAA6588 is not set

#
# Video decoders
#
# CONFIG_VIDEO_ADV7180 is not set
# CONFIG_VIDEO_ADV7183 is not set
# CONFIG_VIDEO_ADV7604 is not set
# CONFIG_VIDEO_ADV7842 is not set
# CONFIG_VIDEO_BT819 is not set
# CONFIG_VIDEO_BT856 is not set
# CONFIG_VIDEO_BT866 is not set
# CONFIG_VIDEO_KS0127 is not set
# CONFIG_VIDEO_ML86V7667 is not set
# CONFIG_VIDEO_SAA7110 is not set
# CONFIG_VIDEO_SAA711X is not set
# CONFIG_VIDEO_TC358743 is not set
# CONFIG_VIDEO_TVP514X is not set
# CONFIG_VIDEO_TVP5150 is not set
# CONFIG_VIDEO_TVP7002 is not set
# CONFIG_VIDEO_TW2804 is not set
# CONFIG_VIDEO_TW9903 is not set
# CONFIG_VIDEO_TW9906 is not set
# CONFIG_VIDEO_VPX3220 is not set

#
# Video and audio decoders
#
# CONFIG_VIDEO_SAA717X is not set
# CONFIG_VIDEO_CX25840 is not set

#
# Video encoders
#
# CONFIG_VIDEO_SAA7127 is not set
# CONFIG_VIDEO_SAA7185 is not set
# CONFIG_VIDEO_ADV7170 is not set
# CONFIG_VIDEO_ADV7175 is not set
# CONFIG_VIDEO_ADV7343 is not set
# CONFIG_VIDEO_ADV7393 is not set
# CONFIG_VIDEO_ADV7511 is not set
# CONFIG_VIDEO_AD9389B is not set
# CONFIG_VIDEO_AK881X is not set
# CONFIG_VIDEO_THS8200 is not set

#
# Camera sensor devices
#
# CONFIG_VIDEO_OV2659 is not set
# CONFIG_VIDEO_OV7640 is not set
# CONFIG_VIDEO_OV7670 is not set
# CONFIG_VIDEO_OV9650 is not set
# CONFIG_VIDEO_VS6624 is not set
# CONFIG_VIDEO_MT9M032 is not set
# CONFIG_VIDEO_MT9P031 is not set
# CONFIG_VIDEO_MT9T001 is not set
# CONFIG_VIDEO_MT9V011 is not set
# CONFIG_VIDEO_MT9V032 is not set
# CONFIG_VIDEO_SR030PC30 is not set
# CONFIG_VIDEO_NOON010PC30 is not set
# CONFIG_VIDEO_M5MOLS is not set
# CONFIG_VIDEO_S5K6AA is not set
# CONFIG_VIDEO_S5K6A3 is not set
# CONFIG_VIDEO_S5K4ECGX is not set
# CONFIG_VIDEO_S5K5BAF is not set
# CONFIG_VIDEO_SMIAPP is not set

#
# Flash devices
#
# CONFIG_VIDEO_ADP1653 is not set
# CONFIG_VIDEO_AS3645A is not set
# CONFIG_VIDEO_LM3560 is not set
# CONFIG_VIDEO_LM3646 is not set

#
# Video improvement chips
#
# CONFIG_VIDEO_UPD64031A is not set
# CONFIG_VIDEO_UPD64083 is not set

#
# Audio/Video compression chips
#
# CONFIG_VIDEO_SAA6752HS is not set

#
# Miscellaneous helper chips
#
# CONFIG_VIDEO_THS7303 is not set
# CONFIG_VIDEO_M52790 is not set

#
# Sensors used on soc_camera driver
#

#
# Customise DVB Frontends
#
# CONFIG_DVB_AU8522_V4L is not set
# CONFIG_DVB_TUNER_DIB0070 is not set
# CONFIG_DVB_TUNER_DIB0090 is not set

#
# Tools to develop new frontends
#
# CONFIG_DVB_DUMMY_FE is not set

#
# Graphics support
#
CONFIG_DRM=y
# CONFIG_DRM_DP_AUX_CHARDEV is not set
CONFIG_DRM_KMS_HELPER=y
CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
CONFIG_DRM_GEM_CMA_HELPER=y
CONFIG_DRM_KMS_CMA_HELPER=y

#
# I2C encoder or helper chips
#
# CONFIG_DRM_I2C_ADV7511 is not set
# CONFIG_DRM_I2C_CH7006 is not set
# CONFIG_DRM_I2C_SIL164 is not set
# CONFIG_DRM_I2C_NXP_TDA998X is not set
# CONFIG_DRM_HDLCD is not set

#
# ACP Configuration
#
# CONFIG_DRM_AMD_ACP is not set
# CONFIG_DRM_VGEM is not set
# CONFIG_DRM_UDL is not set
CONFIG_DRM_RCAR_DU=y
CONFIG_DRM_RCAR_HDMI=y
CONFIG_DRM_RCAR_LVDS=y
CONFIG_DRM_RCAR_VSP=y
CONFIG_DRM_BRIDGE=y

#
# Display Interface Bridges
#
# CONFIG_DRM_NXP_PTN3460 is not set
# CONFIG_DRM_PARADE_PS8622 is not set

#
# Frame buffer Devices
#
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FB_CMDLINE=y
CONFIG_FB_NOTIFY=y
# CONFIG_FB_DDC is not set
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_IMAGEBLIT=y
# CONFIG_FB_FOREIGN_ENDIAN is not set
CONFIG_FB_SYS_FOPS=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
CONFIG_FB_MODE_HELPERS=y
# CONFIG_FB_TILEBLITTING is not set

#
# Frame buffer hardware drivers
#
# CONFIG_FB_ARMCLCD is not set
# CONFIG_FB_OPENCORES is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_SH_MOBILE_LCDC is not set
# CONFIG_FB_IBM_GXT4500 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
# CONFIG_FB_BROADSHEET is not set
# CONFIG_FB_AUO_K190X is not set
# CONFIG_FB_SIMPLE is not set
# CONFIG_FB_SH_MOBILE_MERAM is not set
# CONFIG_FB_SSD1307 is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEOMODE_HELPERS=y
CONFIG_HDMI=y

#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_SOUND is not set

#
# HID support
#
# CONFIG_HID is not set

#
# I2C HID support
#
# CONFIG_I2C_HID is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB is not set

#
# USB port drivers
#

#
# USB Physical Layer drivers
#
# CONFIG_USB_PHY is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ULPI is not set
# CONFIG_USB_GADGET is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
# CONFIG_LEDS_CLASS_FLASH is not set

#
# LED drivers
#
# CONFIG_LEDS_BCM6328 is not set
# CONFIG_LEDS_BCM6358 is not set
# CONFIG_LEDS_LM3530 is not set
# CONFIG_LEDS_LM3642 is not set
# CONFIG_LEDS_PCA9532 is not set
# CONFIG_LEDS_GPIO is not set
# CONFIG_LEDS_LP3944 is not set
# CONFIG_LEDS_LP5521 is not set
# CONFIG_LEDS_LP5523 is not set
# CONFIG_LEDS_LP5562 is not set
# CONFIG_LEDS_LP8501 is not set
# CONFIG_LEDS_LP8860 is not set
# CONFIG_LEDS_PCA955X is not set
# CONFIG_LEDS_PCA963X is not set
# CONFIG_LEDS_REGULATOR is not set
# CONFIG_LEDS_BD2802 is not set
# CONFIG_LEDS_LT3593 is not set
# CONFIG_LEDS_TCA6507 is not set
# CONFIG_LEDS_TLC591XX is not set
# CONFIG_LEDS_LM355x is not set

#
# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
#
# CONFIG_LEDS_BLINKM is not set
CONFIG_LEDS_SYSCON=y

#
# LED Triggers
#
CONFIG_LEDS_TRIGGERS=y
# CONFIG_LEDS_TRIGGER_TIMER is not set
# CONFIG_LEDS_TRIGGER_ONESHOT is not set
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
CONFIG_LEDS_TRIGGER_CPU=y
# CONFIG_LEDS_TRIGGER_GPIO is not set
# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set

#
# iptables trigger is under Netfilter config (LED target)
#
# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
# CONFIG_LEDS_TRIGGER_CAMERA is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_EDAC_SUPPORT=y
# CONFIG_EDAC is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set

#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set

#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ABX80X is not set
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_HYM8563 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
# CONFIG_RTC_DRV_ISL12057 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF2127 is not set
# CONFIG_RTC_DRV_PCF8523 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF85063 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_BQ32K is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8010 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
# CONFIG_RTC_DRV_EM3027 is not set
# CONFIG_RTC_DRV_RV3029C2 is not set
# CONFIG_RTC_DRV_RV8803 is not set

#
# SPI RTC drivers
#

#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1685_FAMILY is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_DS2404 is not set
# CONFIG_RTC_DRV_EFI is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set
# CONFIG_RTC_DRV_ZYNQMP is not set

#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_PL030 is not set
# CONFIG_RTC_DRV_PL031 is not set
# CONFIG_RTC_DRV_SNVS is not set

#
# HID Sensor RTC drivers
#
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VIRT_DRIVERS is not set

#
# Virtio drivers
#
# CONFIG_VIRTIO_MMIO is not set

#
# Microsoft Hyper-V guest support
#
# CONFIG_STAGING is not set
# CONFIG_CHROME_PLATFORMS is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_COMMON_CLK=y

#
# Common Clock Framework
#
CONFIG_COMMON_CLK_VERSATILE=y
# CONFIG_CLK_SP810 is not set
# CONFIG_CLK_VEXPRESS_OSC is not set
# CONFIG_COMMON_CLK_SI5351 is not set
# CONFIG_COMMON_CLK_SI514 is not set
# CONFIG_COMMON_CLK_SI570 is not set
# CONFIG_COMMON_CLK_CDCE925 is not set
# CONFIG_COMMON_CLK_CS2000_CP is not set
# CONFIG_CLK_QORIQ is not set
# CONFIG_COMMON_CLK_XGENE is not set
# CONFIG_COMMON_CLK_NXP is not set
# CONFIG_COMMON_CLK_PXA is not set
# CONFIG_COMMON_CLK_CDCE706 is not set

#
# Hardware Spinlock drivers
#

#
# Clock Source drivers
#
CONFIG_CLKSRC_OF=y
CONFIG_CLKSRC_PROBE=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_TIMER_SP804 is not set
# CONFIG_ATMEL_PIT is not set
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
# CONFIG_SH_TIMER_TMU is not set
# CONFIG_EM_TIMER_STI is not set
# CONFIG_MAILBOX is not set
# CONFIG_IOMMU_SUPPORT is not set

#
# Remoteproc drivers
#
# CONFIG_STE_MODEM_RPROC is not set

#
# Rpmsg drivers
#

#
# SOC (System On Chip) specific Drivers
#
CONFIG_RENESAS_RCAR_PM=y
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
# CONFIG_PM_DEVFREQ is not set
# CONFIG_EXTCON is not set
# CONFIG_MEMORY is not set
# CONFIG_IIO is not set
# CONFIG_PWM is not set
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_MAX_NR=1
CONFIG_ARM_GIC_V3=y
CONFIG_RENESAS_IRQC=y
# CONFIG_TS4800_IRQ is not set
# CONFIG_IPACK_BUS is not set
CONFIG_RESET_CONTROLLER=y
# CONFIG_FMC is not set

#
# PHY Subsystem
#
CONFIG_GENERIC_PHY=y
# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# CONFIG_PHY_RCAR_GEN2 is not set
CONFIG_PHY_RCAR_GEN3_USB2=m
# CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_PHY_XGENE is not set
# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set

#
# Performance monitor support
#
CONFIG_ARM_PMU=y
# CONFIG_RAS is not set

#
# Android
#
# CONFIG_ANDROID is not set
# CONFIG_LIBNVDIMM is not set
# CONFIG_NVMEM is not set
# CONFIG_STM is not set
# CONFIG_STM_DUMMY is not set
# CONFIG_STM_SOURCE_CONSOLE is not set
# CONFIG_INTEL_TH is not set

#
# FPGA Configuration Support
#
# CONFIG_FPGA is not set

#
# Firmware Drivers
#
CONFIG_ARM_PSCI_FW=y
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
CONFIG_HAVE_ARM_SMCCC=y

#
# EFI (Extensible Firmware Interface) Support
#
# CONFIG_EFI_VARS is not set
CONFIG_EFI_ESRT=y
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_ARMSTUB=y

#
# File systems
#
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
CONFIG_EXT4_FS=y
# CONFIG_EXT4_FS_POSIX_ACL is not set
# CONFIG_EXT4_FS_SECURITY is not set
# CONFIG_EXT4_ENCRYPTION is not set
# CONFIG_EXT4_DEBUG is not set
CONFIG_JBD2=y
# CONFIG_JBD2_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
# CONFIG_FS_DAX is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_EXPORTFS=y
CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA=y
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
CONFIG_PRINT_QUOTA_WARNING=y
# CONFIG_QUOTA_DEBUG is not set
# CONFIG_QFMT_V1 is not set
# CONFIG_QFMT_V2 is not set
CONFIG_QUOTACTL=y
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=y
# CONFIG_OVERLAY_FS is not set

#
# Caches
#
# CONFIG_FSCACHE is not set

#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set

#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set

#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
# CONFIG_EFIVAR_FS is not set
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_SWAP is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
CONFIG_GRACE_PERIOD=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_DEBUG is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
CONFIG_HAVE_KVM_IRQFD=y
CONFIG_HAVE_KVM_EVENTFD=y
CONFIG_KVM_MMIO=y
CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y
CONFIG_KVM_VFIO=y
CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
CONFIG_KVM_COMPAT=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM_ARM_VGIC_V3=y
CONFIG_KVM=y
CONFIG_KVM_ARM_HOST=y

#
# Kernel hacking
#

#
# printk and dmesg options
#
CONFIG_PRINTK_TIME=y
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_BOOT_PRINTK_DELAY is not set
CONFIG_DYNAMIC_DEBUG=y

#
# Compile-time checks and compiler options
#
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_INFO_REDUCED is not set
# CONFIG_DEBUG_INFO_SPLIT is not set
# CONFIG_DEBUG_INFO_DWARF4 is not set
# CONFIG_GDB_SCRIPTS is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=2048
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_PAGE_OWNER is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SECTION_MISMATCH is not set
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
CONFIG_DEBUG_KERNEL=y

#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_VM is not set
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_PER_CPU_MAPS is not set
CONFIG_HAVE_ARCH_KASAN=y
# CONFIG_KASAN is not set
# CONFIG_DEBUG_SHIRQ is not set

#
# Debug Lockups and Hangs
#
CONFIG_LOCKUP_DETECTOR=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
# CONFIG_WQ_WATCHDOG is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHED_INFO=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_SCHED_STACK_END_CHECK is not set
# CONFIG_DEBUG_TIMEKEEPING is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_PREEMPT is not set

#
# Lock Debugging (spinlocks, mutexes, etc...)
#
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_ATOMIC_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_LOCK_TORTURE_TEST is not set
# CONFIG_STACKTRACE is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_PI_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set

#
# RCU Debugging
#
# CONFIG_PROVE_RCU is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_TORTURE_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set

#
# Runtime Testing
#
# CONFIG_LKDTM is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_RHASHTABLE is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_TEST_LKM is not set
# CONFIG_TEST_USER_COPY is not set
# CONFIG_TEST_BPF is not set
# CONFIG_TEST_FIRMWARE is not set
# CONFIG_TEST_UDELAY is not set
CONFIG_MEMTEST=y
# CONFIG_TEST_STATIC_KEYS is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
# CONFIG_STRICT_DEVMEM is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_PID_IN_CONTEXTIDR is not set
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
# CONFIG_DEBUG_SET_MODULE_RONX is not set
# CONFIG_DEBUG_RODATA is not set
# CONFIG_CORESIGHT is not set

#
# Security options
#
CONFIG_KEYS=y
# CONFIG_PERSISTENT_KEYRINGS is not set
# CONFIG_BIG_KEYS is not set
# CONFIG_ENCRYPTED_KEYS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SECURITY=y
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
# CONFIG_SECURITY_PATH is not set
# CONFIG_SECURITY_SMACK is not set
# CONFIG_SECURITY_TOMOYO is not set
# CONFIG_SECURITY_APPARMOR is not set
# CONFIG_SECURITY_YAMA is not set
CONFIG_INTEGRITY=y
# CONFIG_INTEGRITY_SIGNATURE is not set
CONFIG_INTEGRITY_AUDIT=y
# CONFIG_IMA is not set
# CONFIG_EVM is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_CRYPTO=y

#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=m
CONFIG_CRYPTO_PCOMP2=y
CONFIG_CRYPTO_AKCIPHER2=y
# CONFIG_CRYPTO_RSA is not set
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_USER is not set
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_NULL2=y
# CONFIG_CRYPTO_PCRYPT is not set
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CRYPTO_CRYPTD=y
# CONFIG_CRYPTO_MCRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
CONFIG_CRYPTO_ABLK_HELPER=y

#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_ECHAINIV=m

#
# Block modes
#
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_KEYWRAP is not set

#
# Hash modes
#
# CONFIG_CRYPTO_CMAC is not set
CONFIG_CRYPTO_HMAC=m
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set

#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32 is not set
# CONFIG_CRYPTO_CRCT10DIF is not set
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_POLY1305 is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
CONFIG_CRYPTO_SHA256=m
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set

#
# Ciphers
#
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set

#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_ZLIB is not set
# CONFIG_CRYPTO_LZO is not set
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set

#
# Random Number Generation
#
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_DRBG_MENU=m
CONFIG_CRYPTO_DRBG_HMAC=y
# CONFIG_CRYPTO_DRBG_HASH is not set
# CONFIG_CRYPTO_DRBG_CTR is not set
CONFIG_CRYPTO_DRBG=m
CONFIG_CRYPTO_JITTERENTROPY=m
# CONFIG_CRYPTO_USER_API_HASH is not set
# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
# CONFIG_CRYPTO_USER_API_RNG is not set
# CONFIG_CRYPTO_USER_API_AEAD is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_CCP is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set

#
# Certificates for signature checking
#
# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
# CONFIG_CRYPTO_CRC32_ARM64 is not set
# CONFIG_BINARY_PRINTF is not set

#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_HAVE_ARCH_BITREVERSE=y
CONFIG_RATIONAL=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
# CONFIG_CRC_CCITT is not set
CONFIG_CRC16=y
# CONFIG_CRC_T10DIF is not set
CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
CONFIG_CRC7=y
# CONFIG_LIBCRC32C is not set
# CONFIG_CRC8 is not set
CONFIG_AUDIT_GENERIC=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_AUDIT_COMPAT_GENERIC=y
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_XZ_DEC=y
CONFIG_XZ_DEC_X86=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_IA64=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_BCJ=y
# CONFIG_XZ_DEC_TEST is not set
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_DMA=y
CONFIG_CPU_RMAP=y
CONFIG_DQL=y
CONFIG_NLATTR=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
# CONFIG_CORDIC is not set
# CONFIG_DDR is not set
# CONFIG_IRQ_POLL is not set
CONFIG_LIBFDT=y
CONFIG_UCS2_STRING=y
CONFIG_FONT_SUPPORT=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
# CONFIG_SG_SPLIT is not set
CONFIG_ARCH_HAS_SG_CHAIN=y

[PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Laurent Pinchart]

Hi Geert,

On Sunday 28 February 2016 09:55:32 Geert Uytterhoeven wrote:
> On Sat, Feb 27, 2016 at 2:53 AM, Laurent Pinchart wrote:
> > After rebasing this series on top of Simon's latest devel branch, I'm
> > experiencing hard system freezes when using the VSP.
> 
> Is this due to the rebasing? Did it work in
> renesas-drivers-2016-02-16-v4.5-rc4 or renesas-drivers-2016-02-23-v4.5-rc5?

I thought it was, but after further investigations I've been unable to get it
working at all even on my older branches, so I think the problem has always
been there.

> > What makes the problem curious is that PM runtime works fine when the VSP
> > instances are probed, the A3VP power domain is turned on and off correctly
> > for each instance. However, after booting the system, if I try to RPM
> > resume the device, the system hangs.
> > 
> > I've traced this (using printk debugging) down to the SYSCISCR write in
> > rcar_sysc_power(). The value written is 0x00000200, which corresponds to
> > the A3VP power domain, and the resume request completion wait loop
> > doesn't time out.
> 
> So the second write to SYSCISCR in that function locks up the system?

Correct, and only after the kernel has booted, there's a bunch of calls to
rcar_sysc_power() to enable/disable the A3VP power domain at boot time when
the vsp devices are probed, and those don't cause any issue.

> > Does this ring any bell ? Do you have a more recent version of this patch
> > series that I could try ?
> 
> No clue, and no more recent version available yet.
> 
> What do I need to reproduce this?

Compile

git://linuxtv.org/pinchartl/media.git drm/du/vsp1-kms/boards

(.config attached), boot it, and run

# cat /dev/video0

You can apply the following patch to see what's going on.

diff --git a/drivers/soc/renesas/pm-rcar.c b/drivers/soc/renesas/pm-rcar.c
index d1bf8c231540..4a5f00d7f84d 100644
--- a/drivers/soc/renesas/pm-rcar.c
+++ b/drivers/soc/renesas/pm-rcar.c
@@ -139,6 +139,9 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
 	int ret = 0;
 	int k;
 
+	if (sysc_ch->isr_bit == 9)
+		printk(KERN_INFO "%s(A3VP, %s)\n", __func__, on ? "on" : "off");
+
 	spin_lock_irqsave(&rcar_sysc_lock, flags);
 
 	iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
@@ -172,7 +175,16 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
 	if (k == SYSCISR_RETRIES)
 		ret = -EIO;
 
+	if (sysc_ch->isr_bit == 9) {
+		udelay(5000);
+		printk(KERN_INFO "%s: will write to SYSISCR\n", __func__);
+		udelay(5000);
+	}
 	iowrite32(isr_mask, rcar_sysc_base + SYSCISCR);
+	if (sysc_ch->isr_bit == 9) {
+		udelay(5000);
+		printk(KERN_INFO "%s: wrote to SYSISCR\n", __func__);
+	}
 
  out:
 	spin_unlock_irqrestore(&rcar_sysc_lock, flags);


On my system it prints the following messages during boot when probing the vsp
instances.

[    0.528433] rcar_sysc_power(A3VP, off)
[    0.535317] rcar_sysc_power: will write to SYSISCR
[    0.547713] rcar_sysc_power: wrote to SYSISCR
[    0.549910] rcar_sysc_power(A3VP, on)
[    0.556759] rcar_sysc_power: will write to SYSISCR
[    0.569155] rcar_sysc_power: wrote to SYSISCR
[    0.571386] rcar_sysc_power(A3VP, off)
[    0.578270] rcar_sysc_power: will write to SYSISCR
[    0.590665] rcar_sysc_power: wrote to SYSISCR
[    0.592857] rcar_sysc_power(A3VP, on)
[    0.599698] rcar_sysc_power: will write to SYSISCR
[    0.612094] rcar_sysc_power: wrote to SYSISCR
[    0.614310] rcar_sysc_power(A3VP, off)
[    0.621197] rcar_sysc_power: will write to SYSISCR
[    0.633592] rcar_sysc_power: wrote to SYSISCR
[    0.635783] rcar_sysc_power(A3VP, on)
[    0.642625] rcar_sysc_power: will write to SYSISCR
[    0.655020] rcar_sysc_power: wrote to SYSISCR
[    0.657237] rcar_sysc_power(A3VP, off)
[    0.664120] rcar_sysc_power: will write to SYSISCR
[    0.676515] rcar_sysc_power: wrote to SYSISCR
[    0.678706] rcar_sysc_power(A3VP, on)
[    0.685550] rcar_sysc_power: will write to SYSISCR
[    0.697945] rcar_sysc_power: wrote to SYSISCR
[    0.700133] rcar_sysc_power(A3VP, off)
[    0.707015] rcar_sysc_power: will write to SYSISCR
[    0.719410] rcar_sysc_power: wrote to SYSISCR
[    0.721736] rcar_sysc_power(A3VP, on)
[    0.728583] rcar_sysc_power: will write to SYSISCR
[    0.740978] rcar_sysc_power: wrote to SYSISCR
[    0.743213] rcar_sysc_power(A3VP, off)
[    0.750099] rcar_sysc_power: will write to SYSISCR
[    0.762495] rcar_sysc_power: wrote to SYSISCR
[    0.765445] rcar_sysc_power(A3VP, on)
[    0.772294] rcar_sysc_power: will write to SYSISCR
[    0.784689] rcar_sysc_power: wrote to SYSISCR
[    0.786897] rcar_sysc_power(A3VP, off)
[    0.793783] rcar_sysc_power: will write to SYSISCR
[    0.806178] rcar_sysc_power: wrote to SYSISCR
[    0.808369] rcar_sysc_power(A3VP, on)
[    0.815211] rcar_sysc_power: will write to SYSISCR
[    0.827606] rcar_sysc_power: wrote to SYSISCR
[    0.829845] rcar_sysc_power(A3VP, off)
[    0.836733] rcar_sysc_power: will write to SYSISCR
[    0.849128] rcar_sysc_power: wrote to SYSISCR
[    0.851985] rcar_sysc_power(A3VP, on)
[    0.858829] rcar_sysc_power: will write to SYSISCR
[    0.871224] rcar_sysc_power: wrote to SYSISCR
[    0.873435] rcar_sysc_power(A3VP, off)
[    0.880323] rcar_sysc_power: will write to SYSISCR
[    0.892719] rcar_sysc_power: wrote to SYSISCR
[    0.894911] rcar_sysc_power(A3VP, on)
[    0.901772] rcar_sysc_power: will write to SYSISCR
[    0.914168] rcar_sysc_power: wrote to SYSISCR
[    0.916395] rcar_sysc_power(A3VP, off)
[    0.923278] rcar_sysc_power: will write to SYSISCR
[    0.935673] rcar_sysc_power: wrote to SYSISCR
[    0.938275] rcar_sysc_power(A3VP, on)
[    0.945129] rcar_sysc_power: will write to SYSISCR
[    0.957525] rcar_sysc_power: wrote to SYSISCR
[    0.959729] rcar_sysc_power(A3VP, off)
[    0.966612] rcar_sysc_power: will write to SYSISCR
[    0.979008] rcar_sysc_power: wrote to SYSISCR
[    0.981204] rcar_sysc_power(A3VP, on)
[    0.988044] rcar_sysc_power: will write to SYSISCR
[    1.000440] rcar_sysc_power: wrote to SYSISCR
[    1.002660] rcar_sysc_power(A3VP, off)
[    1.009546] rcar_sysc_power: will write to SYSISCR
[    1.021941] rcar_sysc_power: wrote to SYSISCR
[    1.024540] rcar_sysc_power(A3VP, on)
[    1.031383] rcar_sysc_power: will write to SYSISCR
[    1.043778] rcar_sysc_power: wrote to SYSISCR
[    1.045980] rcar_sysc_power(A3VP, off)
[    1.052865] rcar_sysc_power: will write to SYSISCR
[    1.065261] rcar_sysc_power: wrote to SYSISCR
[    1.067450] rcar_sysc_power(A3VP, on)
[    1.074292] rcar_sysc_power: will write to SYSISCR
[    1.086687] rcar_sysc_power: wrote to SYSISCR
[    1.088910] rcar_sysc_power(A3VP, off)
[    1.095792] rcar_sysc_power: will write to SYSISCR
[    1.108187] rcar_sysc_power: wrote to SYSISCR
[    1.110781] rcar_sysc_power(A3VP, on)
[    1.117628] rcar_sysc_power: will write to SYSISCR
[    1.130023] rcar_sysc_power: wrote to SYSISCR
[    1.132224] rcar_sysc_power(A3VP, off)
[    1.139106] rcar_sysc_power: will write to SYSISCR
[    1.151501] rcar_sysc_power: wrote to SYSISCR


When I cat /dev/video0 I get the following messages in the kernel log

/ # cat /dev/video0
[    4.673226] rcar_sysc_power(A3VP, on)
[    4.680816] rcar_sysc_power: will write to SYSISCR

and the system then freezes.

-- 
Regards,

Laurent Pinchart
-------------- next part --------------
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.5.0-rc5 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
CONFIG_MMU=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_NO_IOPORT_MAP=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ZONE_DMA=y
CONFIG_HAVE_GENERIC_RCU_GUP=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_SMP=y
CONFIG_SWIOTLB=y
CONFIG_IOMMU_HELPER=y
CONFIG_KERNEL_MODE_NEON=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y

#
# General setup
#
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_FHANDLE=y
CONFIG_USELIB=y
CONFIG_AUDIT=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_AUDITSYSCALL=y
CONFIG_AUDIT_WATCH=y
CONFIG_AUDIT_TREE=y

#
# IRQ subsystem
#
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_HANDLE_DOMAIN_IRQ=y
# CONFIG_IRQ_DOMAIN_DEBUG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y

#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
# CONFIG_NO_HZ_FULL is not set
# CONFIG_NO_HZ is not set
CONFIG_HIGH_RES_TIMERS=y

#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y

#
# RCU Subsystem
#
CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
# CONFIG_TASKS_RCU is not set
CONFIG_RCU_STALL_COMMON=y
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_RCU_EXPEDITE_BOOT is not set
CONFIG_BUILD_BIN2C=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_CGROUPS=y
CONFIG_PAGE_COUNTER=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_MEMCG_SWAP_ENABLED=y
# CONFIG_BLK_CGROUP is not set
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_CFS_BANDWIDTH is not set
# CONFIG_RT_GROUP_SCHED is not set
# CONFIG_CGROUP_PIDS is not set
# CONFIG_CGROUP_FREEZER is not set
# CONFIG_CPUSETS is not set
# CONFIG_CGROUP_DEVICE is not set
# CONFIG_CGROUP_CPUACCT is not set
# CONFIG_CGROUP_PERF is not set
# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CHECKPOINT_RESTORE is not set
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_IPC_NS is not set
# CONFIG_USER_NS is not set
CONFIG_PID_NS=y
# CONFIG_NET_NS is not set
CONFIG_SCHED_AUTOGROUP=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
CONFIG_RD_XZ=y
CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_HAVE_UID16=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_BPF=y
# CONFIG_EXPERT is not set
CONFIG_UID16=y
CONFIG_MULTIUSER=y
# CONFIG_SGETMASK_SYSCALL is not set
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
# CONFIG_BPF_SYSCALL is not set
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_ADVISE_SYSCALLS=y
# CONFIG_USERFAULTFD is not set
CONFIG_MEMBARRIER=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y

#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SLUB_CPU_PARTIAL=y
# CONFIG_SYSTEM_DATA_VERIFICATION is not set
CONFIG_PROFILING=y
CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set
# CONFIG_UPROBES is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
CONFIG_HAVE_CMPXCHG_LOCAL=y
CONFIG_HAVE_CMPXCHG_DOUBLE=y
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_CC_STACKPROTECTOR_NONE=y
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_COMPAT_OLD_SIGACTION=y

#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
# CONFIG_MODULE_COMPRESS is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_CMDLINE_PARSER is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_BLOCK_COMPAT=y

#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_DEADLINE is not set
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_PREEMPT_NOTIFIERS=y
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_FREEZER=y

#
# Platform selection
#
# CONFIG_ARCH_BCM_IPROC is not set
# CONFIG_ARCH_BERLIN is not set
# CONFIG_ARCH_EXYNOS7 is not set
# CONFIG_ARCH_LAYERSCAPE is not set
# CONFIG_ARCH_HISI is not set
# CONFIG_ARCH_MEDIATEK is not set
# CONFIG_ARCH_QCOM is not set
# CONFIG_ARCH_ROCKCHIP is not set
# CONFIG_ARCH_SEATTLE is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_RENESAS=y
CONFIG_ARCH_R8A7795=y
# CONFIG_ARCH_STRATIX10 is not set
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_SPRD is not set
# CONFIG_ARCH_THUNDER is not set
# CONFIG_ARCH_UNIPHIER is not set
# CONFIG_ARCH_VEXPRESS is not set
# CONFIG_ARCH_XGENE is not set
# CONFIG_ARCH_ZYNQMP is not set

#
# Bus support
#
# CONFIG_PCI is not set
# CONFIG_PCI_DOMAINS is not set
# CONFIG_PCI_DOMAINS_GENERIC is not set
# CONFIG_PCI_SYSCALL is not set
CONFIG_PCI_LABEL=y

#
# Kernel Features
#

#
# ARM errata workarounds via the alternatives framework
#
CONFIG_ARM64_ERRATUM_826319=y
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_834220=y
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_ERRATUM_843419=y
# CONFIG_CAVIUM_ERRATUM_22375 is not set
# CONFIG_CAVIUM_ERRATUM_23154 is not set
CONFIG_ARM64_4K_PAGES=y
# CONFIG_ARM64_16K_PAGES is not set
# CONFIG_ARM64_64K_PAGES is not set
CONFIG_ARM64_VA_BITS_39=y
# CONFIG_ARM64_VA_BITS_48 is not set
CONFIG_ARM64_VA_BITS=39
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_SCHED_MC is not set
# CONFIG_SCHED_SMT is not set
CONFIG_NR_CPUS=64
CONFIG_HOTPLUG_CPU=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HW_PERF_EVENTS=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_NO_BOOTMEM=y
CONFIG_MEMORY_ISOLATION=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_COMPACTION=y
CONFIG_MIGRATION=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_MMU_NOTIFIER=y
CONFIG_KSM=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
CONFIG_CMA=y
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_AREAS=7
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
# CONFIG_ZSMALLOC is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_IDLE_PAGE_TRACKING is not set
CONFIG_FRAME_VECTOR=y
# CONFIG_SECCOMP is not set
# CONFIG_PARAVIRT is not set
# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
# CONFIG_XEN is not set
CONFIG_FORCE_MAX_ZONEORDER=11
# CONFIG_ARMV8_DEPRECATED is not set

#
# ARMv8.1 architectural features
#
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_PAN=y
# CONFIG_ARM64_LSE_ATOMICS is not set

#
# Boot options
#
CONFIG_CMDLINE="console=ttyAMA0"
# CONFIG_CMDLINE_FORCE is not set
CONFIG_EFI_STUB=y
CONFIG_EFI=y
CONFIG_DMI=y

#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
CONFIG_COMPAT_BINFMT_ELF=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_BINFMT_SCRIPT=y
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
CONFIG_COMPAT=y
CONFIG_SYSVIPC_COMPAT=y

#
# Power management options
#
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
# CONFIG_PM_AUTOSLEEP is not set
# CONFIG_PM_WAKELOCKS is not set
CONFIG_PM=y
CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
# CONFIG_PM_TEST_SUSPEND is not set
CONFIG_PM_SLEEP_DEBUG=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_CPU_PM=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y

#
# CPU Power Management
#

#
# CPU Idle
#
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_DT_IDLE_STATES=y

#
# ARM CPU Idle Drivers
#
CONFIG_ARM_CPUIDLE=y
# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set

#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
CONFIG_NET=y

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
# CONFIG_UNIX_DIAG is not set
# CONFIG_XFRM_USER is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE_DEMUX is not set
# CONFIG_NET_IP_TUNNEL is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_NET_UDP_TUNNEL is not set
# CONFIG_NET_FOU is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
CONFIG_NET_PTP_CLASSIFY=y
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_L2TP is not set
# CONFIG_BRIDGE is not set
CONFIG_HAVE_NET_DSA=y
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
# CONFIG_DNS_RESOLVER is not set
# CONFIG_BATMAN_ADV is not set
# CONFIG_OPENVSWITCH is not set
# CONFIG_VSOCKETS is not set
# CONFIG_NETLINK_MMAP is not set
# CONFIG_NETLINK_DIAG is not set
# CONFIG_MPLS is not set
# CONFIG_HSR is not set
# CONFIG_NET_SWITCHDEV is not set
# CONFIG_NET_L3_MASTER_DEV is not set
CONFIG_RPS=y
CONFIG_RFS_ACCEL=y
CONFIG_XPS=y
# CONFIG_SOCK_CGROUP_DATA is not set
# CONFIG_CGROUP_NET_PRIO is not set
# CONFIG_CGROUP_NET_CLASSID is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
# CONFIG_BPF_JIT is not set
CONFIG_NET_FLOW_LIMIT=y

#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_WIRELESS is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_RFKILL_REGULATOR is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_HAVE_BPF_JIT=y

#
# Device Drivers
#
CONFIG_ARM_AMBA=y

#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_ALLOW_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_DMA_SHARED_BUFFER=y
# CONFIG_FENCE_TRACE is not set
CONFIG_DMA_CMA=y

#
# Default contiguous memory area size:
#
CONFIG_CMA_SIZE_MBYTES=16
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_ALIGNMENT=8

#
# Bus devices
#
CONFIG_ARM_CCI=y
CONFIG_ARM_CCI_PMU=y
# CONFIG_ARM_CCI400_PMU is not set
CONFIG_ARM_CCI500_PMU=y
# CONFIG_ARM_CCN is not set
# CONFIG_SIMPLE_PM_BUS is not set
CONFIG_VEXPRESS_CONFIG=y
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
CONFIG_DTC=y
CONFIG_OF=y
# CONFIG_OF_UNITTEST is not set
CONFIG_OF_FLATTREE=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_IRQ=y
CONFIG_OF_NET=y
CONFIG_OF_MDIO=y
CONFIG_OF_RESERVED_MEM=y
# CONFIG_OF_OVERLAY is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_DRBD is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_RBD is not set

#
# Misc devices
#
# CONFIG_SENSORS_LIS3LV02D is not set
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1780 is not set
# CONFIG_SENSORS_BH1770 is not set
# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_BMP085_I2C is not set
# CONFIG_USB_SWITCH_FSA9480 is not set
# CONFIG_SRAM is not set
# CONFIG_VEXPRESS_SYSCFG is not set
# CONFIG_C2PORT is not set

#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
# CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set

#
# Texas Instruments shared transport line discipline
#
# CONFIG_TI_ST is not set
# CONFIG_SENSORS_LIS3_I2C is not set

#
# Altera FPGA firmware download module
#
# CONFIG_ALTERA_STAPL is not set

#
# Intel MIC Bus Driver
#

#
# SCIF Bus Driver
#

#
# Intel MIC Host Driver
#

#
# Intel MIC Card Driver
#

#
# SCIF Driver
#

#
# Intel MIC Coprocessor State Management (COSM) Drivers
#
# CONFIG_ECHO is not set
# CONFIG_CXL_BASE is not set
# CONFIG_CXL_KERNEL_API is not set
# CONFIG_CXL_EEH is not set

#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_HAVE_PATA_PLATFORM=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
# CONFIG_DUMMY is not set
# CONFIG_EQUALIZER is not set
# CONFIG_NET_TEAM is not set
# CONFIG_MACVLAN is not set
# CONFIG_VXLAN is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_TUN is not set
# CONFIG_TUN_VNET_CROSS_LE is not set
# CONFIG_VETH is not set
# CONFIG_NLMON is not set

#
# CAIF transport drivers
#
# CONFIG_VHOST_NET is not set
# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set

#
# Distributed Switch Architecture drivers
#
# CONFIG_NET_DSA_MV88E6XXX is not set
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
CONFIG_ETHERNET=y
# CONFIG_ALTERA_TSE is not set
# CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_AURORA is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_DNET is not set
# CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_HISILICON is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_ETHOC is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
CONFIG_NET_VENDOR_RENESAS=y
# CONFIG_SH_ETH is not set
CONFIG_RAVB=y
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PHYLIB=y

#
# MII PHY device drivers
#
# CONFIG_AQUANTIA_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_AMD_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_MICREL_PHY is not set
# CONFIG_DP83848_PHY is not set
# CONFIG_DP83867_PHY is not set
# CONFIG_MICROCHIP_PHY is not set
# CONFIG_FIXED_PHY is not set
CONFIG_MDIO_BITBANG=y
# CONFIG_MDIO_GPIO is not set
# CONFIG_MDIO_OCTEON is not set
# CONFIG_MDIO_BUS_MUX_GPIO is not set
# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
# CONFIG_MDIO_BCM_UNIMAC is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Host-side USB support is needed for USB Network Adapter support
#
# CONFIG_WLAN is not set

#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set
# CONFIG_ISDN is not set
# CONFIG_NVM is not set

#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_LEDS is not set
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set

#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set

#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set

#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set

#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=16
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
CONFIG_DEVMEM=y
CONFIG_DEVKMEM=y

#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
# CONFIG_SERIAL_8250_INGENIC is not set

#
# Non-8250 serial port support
#
# CONFIG_SERIAL_AMBA_PL010 is not set
# CONFIG_SERIAL_AMBA_PL011 is not set
# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=2
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_SC16IS7XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_XILINX_PS_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
# CONFIG_HVC_DCC is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_R3964 is not set

#
# PCMCIA character devices
#
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_XILLYBUS is not set

#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
# CONFIG_I2C_COMPAT is not set
# CONFIG_I2C_CHARDEV is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_ALGOBIT=y

#
# I2C Hardware Bus support
#

#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_CADENCE is not set
# CONFIG_I2C_CBUS_GPIO is not set
# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_NOMADIK is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_PXA_PCI is not set
# CONFIG_I2C_RIIC is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_SH_MOBILE is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set
CONFIG_I2C_RCAR=y

#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set

#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_STUB is not set
CONFIG_I2C_SLAVE=y
# CONFIG_I2C_SLAVE_EEPROM is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_SPI is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set

#
# PPS support
#
CONFIG_PPS=y
# CONFIG_PPS_DEBUG is not set
# CONFIG_NTP_PPS is not set

#
# PPS clients support
#
# CONFIG_PPS_CLIENT_KTIMER is not set
# CONFIG_PPS_CLIENT_LDISC is not set
# CONFIG_PPS_CLIENT_GPIO is not set

#
# PPS generators support
#

#
# PTP clock support
#
CONFIG_PTP_1588_CLOCK=y

#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
CONFIG_PINCTRL=y

#
# Pin controllers
#
CONFIG_PINMUX=y
CONFIG_PINCONF=y
CONFIG_GENERIC_PINCONF=y
# CONFIG_DEBUG_PINCTRL is not set
# CONFIG_PINCTRL_AMD is not set
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PINCTRL_SH_PFC=y
CONFIG_GPIO_SH_PFC=y
CONFIG_PINCTRL_PFC_R8A7795=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_OF_GPIO=y
CONFIG_GPIOLIB_IRQCHIP=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set
CONFIG_GPIO_GENERIC=y

#
# Memory mapped GPIO drivers
#
# CONFIG_GPIO_74XX_MMIO is not set
# CONFIG_GPIO_ALTERA is not set
# CONFIG_GPIO_DWAPB is not set
CONFIG_GPIO_GENERIC_PLATFORM=y
# CONFIG_GPIO_GRGPIO is not set
# CONFIG_GPIO_PL061 is not set
CONFIG_GPIO_RCAR=y
# CONFIG_GPIO_SYSCON is not set
# CONFIG_GPIO_XGENE is not set
# CONFIG_GPIO_XILINX is not set
# CONFIG_GPIO_ZX is not set

#
# I2C GPIO expanders
#
# CONFIG_GPIO_ADP5588 is not set
# CONFIG_GPIO_ADNP is not set
# CONFIG_GPIO_MAX7300 is not set
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set
# CONFIG_GPIO_SX150X is not set

#
# MFD GPIO expanders
#

#
# SPI or I2C GPIO expanders
#
# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_W1 is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
# CONFIG_PDA_POWER is not set
# CONFIG_TEST_POWER is not set
# CONFIG_BATTERY_DS2780 is not set
# CONFIG_BATTERY_DS2781 is not set
# CONFIG_BATTERY_DS2782 is not set
# CONFIG_BATTERY_SBS is not set
# CONFIG_BATTERY_BQ27XXX is not set
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_CHARGER_MAX8903 is not set
# CONFIG_CHARGER_LP8727 is not set
# CONFIG_CHARGER_GPIO is not set
# CONFIG_CHARGER_MANAGER is not set
# CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set
# CONFIG_CHARGER_BQ24735 is not set
# CONFIG_CHARGER_BQ25890 is not set
# CONFIG_CHARGER_SMB347 is not set
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_CHARGER_RT9455 is not set
CONFIG_POWER_RESET=y
# CONFIG_POWER_RESET_GPIO is not set
# CONFIG_POWER_RESET_GPIO_RESTART is not set
# CONFIG_POWER_RESET_LTC2952 is not set
# CONFIG_POWER_RESET_RESTART is not set
# CONFIG_POWER_RESET_VEXPRESS is not set
# CONFIG_POWER_RESET_XGENE is not set
CONFIG_POWER_RESET_SYSCON=y
# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
# CONFIG_POWER_AVS is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y

#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y

#
# Broadcom specific AMBA
#
# CONFIG_BCMA is not set

#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_MFD_AS3722 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_AAT2870_CORE is not set
# CONFIG_MFD_ATMEL_FLEXCOM is not set
# CONFIG_MFD_ATMEL_HLCDC is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_AXP20X is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_I2C is not set
# CONFIG_MFD_DA9055 is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_INTEL_SOC_PMIC is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77686 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_RK808 is not set
# CONFIG_MFD_RN5T618 is not set
# CONFIG_MFD_SEC_CORE is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_SMSC is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_STMPE is not set
CONFIG_MFD_SYSCON=y
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_TPS6105X is not set
# CONFIG_TPS65010 is not set
# CONFIG_TPS6507X is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
# CONFIG_MFD_TPS65912 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS80031 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_VEXPRESS_SYSREG is not set
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_ACT8865 is not set
# CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_ANATOP is not set
# CONFIG_REGULATOR_DA9210 is not set
# CONFIG_REGULATOR_DA9211 is not set
# CONFIG_REGULATOR_FAN53555 is not set
# CONFIG_REGULATOR_GPIO is not set
# CONFIG_REGULATOR_ISL9305 is not set
# CONFIG_REGULATOR_ISL6271A is not set
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_LP3972 is not set
# CONFIG_REGULATOR_LP872X is not set
# CONFIG_REGULATOR_LP8755 is not set
# CONFIG_REGULATOR_LTC3589 is not set
# CONFIG_REGULATOR_MAX1586 is not set
# CONFIG_REGULATOR_MAX8649 is not set
# CONFIG_REGULATOR_MAX8660 is not set
# CONFIG_REGULATOR_MAX8952 is not set
# CONFIG_REGULATOR_MAX8973 is not set
# CONFIG_REGULATOR_MT6311 is not set
# CONFIG_REGULATOR_PFUZE100 is not set
# CONFIG_REGULATOR_PV88060 is not set
# CONFIG_REGULATOR_PV88090 is not set
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS62360 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
# CONFIG_REGULATOR_VEXPRESS is not set
CONFIG_MEDIA_SUPPORT=y

#
# Multimedia core support
#
CONFIG_MEDIA_CAMERA_SUPPORT=y
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
# CONFIG_MEDIA_RADIO_SUPPORT is not set
# CONFIG_MEDIA_SDR_SUPPORT is not set
# CONFIG_MEDIA_RC_SUPPORT is not set
CONFIG_MEDIA_CONTROLLER=y
# CONFIG_MEDIA_CONTROLLER_DVB is not set
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_VIDEO_V4L2=y
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_VIDEOBUF2_CORE=y
CONFIG_VIDEOBUF2_MEMOPS=y
CONFIG_VIDEOBUF2_DMA_CONTIG=y
# CONFIG_TTPCI_EEPROM is not set

#
# Media drivers
#
CONFIG_V4L_PLATFORM_DRIVERS=y
# CONFIG_VIDEO_SH_VOU is not set
# CONFIG_SOC_CAMERA is not set
# CONFIG_VIDEO_XILINX is not set
CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_VIDEO_SH_VEU is not set
# CONFIG_VIDEO_RENESAS_JPU is not set
CONFIG_VIDEO_RENESAS_FCP=y
CONFIG_VIDEO_RENESAS_VSP1=y
# CONFIG_V4L_TEST_DRIVERS is not set

#
# Supported MMC/SDIO adapters
#

#
# Media ancillary drivers (tuners, sensors, i2c, frontends)
#
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set

#
# Encoders, decoders, sensors and other helper chips
#

#
# Audio decoders, processors and mixers
#
# CONFIG_VIDEO_TVAUDIO is not set
# CONFIG_VIDEO_TDA7432 is not set
# CONFIG_VIDEO_TDA9840 is not set
# CONFIG_VIDEO_TEA6415C is not set
# CONFIG_VIDEO_TEA6420 is not set
# CONFIG_VIDEO_MSP3400 is not set
# CONFIG_VIDEO_CS3308 is not set
# CONFIG_VIDEO_CS5345 is not set
# CONFIG_VIDEO_CS53L32A is not set
# CONFIG_VIDEO_TLV320AIC23B is not set
# CONFIG_VIDEO_UDA1342 is not set
# CONFIG_VIDEO_WM8775 is not set
# CONFIG_VIDEO_WM8739 is not set
# CONFIG_VIDEO_VP27SMPX is not set
# CONFIG_VIDEO_SONY_BTF_MPX is not set

#
# RDS decoders
#
# CONFIG_VIDEO_SAA6588 is not set

#
# Video decoders
#
# CONFIG_VIDEO_ADV7180 is not set
# CONFIG_VIDEO_ADV7183 is not set
# CONFIG_VIDEO_ADV7604 is not set
# CONFIG_VIDEO_ADV7842 is not set
# CONFIG_VIDEO_BT819 is not set
# CONFIG_VIDEO_BT856 is not set
# CONFIG_VIDEO_BT866 is not set
# CONFIG_VIDEO_KS0127 is not set
# CONFIG_VIDEO_ML86V7667 is not set
# CONFIG_VIDEO_SAA7110 is not set
# CONFIG_VIDEO_SAA711X is not set
# CONFIG_VIDEO_TC358743 is not set
# CONFIG_VIDEO_TVP514X is not set
# CONFIG_VIDEO_TVP5150 is not set
# CONFIG_VIDEO_TVP7002 is not set
# CONFIG_VIDEO_TW2804 is not set
# CONFIG_VIDEO_TW9903 is not set
# CONFIG_VIDEO_TW9906 is not set
# CONFIG_VIDEO_VPX3220 is not set

#
# Video and audio decoders
#
# CONFIG_VIDEO_SAA717X is not set
# CONFIG_VIDEO_CX25840 is not set

#
# Video encoders
#
# CONFIG_VIDEO_SAA7127 is not set
# CONFIG_VIDEO_SAA7185 is not set
# CONFIG_VIDEO_ADV7170 is not set
# CONFIG_VIDEO_ADV7175 is not set
# CONFIG_VIDEO_ADV7343 is not set
# CONFIG_VIDEO_ADV7393 is not set
# CONFIG_VIDEO_ADV7511 is not set
# CONFIG_VIDEO_AD9389B is not set
# CONFIG_VIDEO_AK881X is not set
# CONFIG_VIDEO_THS8200 is not set

#
# Camera sensor devices
#
# CONFIG_VIDEO_OV2659 is not set
# CONFIG_VIDEO_OV7640 is not set
# CONFIG_VIDEO_OV7670 is not set
# CONFIG_VIDEO_OV9650 is not set
# CONFIG_VIDEO_VS6624 is not set
# CONFIG_VIDEO_MT9M032 is not set
# CONFIG_VIDEO_MT9P031 is not set
# CONFIG_VIDEO_MT9T001 is not set
# CONFIG_VIDEO_MT9V011 is not set
# CONFIG_VIDEO_MT9V032 is not set
# CONFIG_VIDEO_SR030PC30 is not set
# CONFIG_VIDEO_NOON010PC30 is not set
# CONFIG_VIDEO_M5MOLS is not set
# CONFIG_VIDEO_S5K6AA is not set
# CONFIG_VIDEO_S5K6A3 is not set
# CONFIG_VIDEO_S5K4ECGX is not set
# CONFIG_VIDEO_S5K5BAF is not set
# CONFIG_VIDEO_SMIAPP is not set

#
# Flash devices
#
# CONFIG_VIDEO_ADP1653 is not set
# CONFIG_VIDEO_AS3645A is not set
# CONFIG_VIDEO_LM3560 is not set
# CONFIG_VIDEO_LM3646 is not set

#
# Video improvement chips
#
# CONFIG_VIDEO_UPD64031A is not set
# CONFIG_VIDEO_UPD64083 is not set

#
# Audio/Video compression chips
#
# CONFIG_VIDEO_SAA6752HS is not set

#
# Miscellaneous helper chips
#
# CONFIG_VIDEO_THS7303 is not set
# CONFIG_VIDEO_M52790 is not set

#
# Sensors used on soc_camera driver
#

#
# Customise DVB Frontends
#
# CONFIG_DVB_AU8522_V4L is not set
# CONFIG_DVB_TUNER_DIB0070 is not set
# CONFIG_DVB_TUNER_DIB0090 is not set

#
# Tools to develop new frontends
#
# CONFIG_DVB_DUMMY_FE is not set

#
# Graphics support
#
CONFIG_DRM=y
# CONFIG_DRM_DP_AUX_CHARDEV is not set
CONFIG_DRM_KMS_HELPER=y
CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
CONFIG_DRM_GEM_CMA_HELPER=y
CONFIG_DRM_KMS_CMA_HELPER=y

#
# I2C encoder or helper chips
#
# CONFIG_DRM_I2C_ADV7511 is not set
# CONFIG_DRM_I2C_CH7006 is not set
# CONFIG_DRM_I2C_SIL164 is not set
# CONFIG_DRM_I2C_NXP_TDA998X is not set
# CONFIG_DRM_HDLCD is not set

#
# ACP Configuration
#
# CONFIG_DRM_AMD_ACP is not set
# CONFIG_DRM_VGEM is not set
# CONFIG_DRM_UDL is not set
CONFIG_DRM_RCAR_DU=y
CONFIG_DRM_RCAR_HDMI=y
CONFIG_DRM_RCAR_LVDS=y
CONFIG_DRM_RCAR_VSP=y
CONFIG_DRM_BRIDGE=y

#
# Display Interface Bridges
#
# CONFIG_DRM_NXP_PTN3460 is not set
# CONFIG_DRM_PARADE_PS8622 is not set

#
# Frame buffer Devices
#
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FB_CMDLINE=y
CONFIG_FB_NOTIFY=y
# CONFIG_FB_DDC is not set
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_IMAGEBLIT=y
# CONFIG_FB_FOREIGN_ENDIAN is not set
CONFIG_FB_SYS_FOPS=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
CONFIG_FB_MODE_HELPERS=y
# CONFIG_FB_TILEBLITTING is not set

#
# Frame buffer hardware drivers
#
# CONFIG_FB_ARMCLCD is not set
# CONFIG_FB_OPENCORES is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_SH_MOBILE_LCDC is not set
# CONFIG_FB_IBM_GXT4500 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
# CONFIG_FB_BROADSHEET is not set
# CONFIG_FB_AUO_K190X is not set
# CONFIG_FB_SIMPLE is not set
# CONFIG_FB_SH_MOBILE_MERAM is not set
# CONFIG_FB_SSD1307 is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEOMODE_HELPERS=y
CONFIG_HDMI=y

#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_SOUND is not set

#
# HID support
#
# CONFIG_HID is not set

#
# I2C HID support
#
# CONFIG_I2C_HID is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB is not set

#
# USB port drivers
#

#
# USB Physical Layer drivers
#
# CONFIG_USB_PHY is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ULPI is not set
# CONFIG_USB_GADGET is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
# CONFIG_LEDS_CLASS_FLASH is not set

#
# LED drivers
#
# CONFIG_LEDS_BCM6328 is not set
# CONFIG_LEDS_BCM6358 is not set
# CONFIG_LEDS_LM3530 is not set
# CONFIG_LEDS_LM3642 is not set
# CONFIG_LEDS_PCA9532 is not set
# CONFIG_LEDS_GPIO is not set
# CONFIG_LEDS_LP3944 is not set
# CONFIG_LEDS_LP5521 is not set
# CONFIG_LEDS_LP5523 is not set
# CONFIG_LEDS_LP5562 is not set
# CONFIG_LEDS_LP8501 is not set
# CONFIG_LEDS_LP8860 is not set
# CONFIG_LEDS_PCA955X is not set
# CONFIG_LEDS_PCA963X is not set
# CONFIG_LEDS_REGULATOR is not set
# CONFIG_LEDS_BD2802 is not set
# CONFIG_LEDS_LT3593 is not set
# CONFIG_LEDS_TCA6507 is not set
# CONFIG_LEDS_TLC591XX is not set
# CONFIG_LEDS_LM355x is not set

#
# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
#
# CONFIG_LEDS_BLINKM is not set
CONFIG_LEDS_SYSCON=y

#
# LED Triggers
#
CONFIG_LEDS_TRIGGERS=y
# CONFIG_LEDS_TRIGGER_TIMER is not set
# CONFIG_LEDS_TRIGGER_ONESHOT is not set
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
CONFIG_LEDS_TRIGGER_CPU=y
# CONFIG_LEDS_TRIGGER_GPIO is not set
# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set

#
# iptables trigger is under Netfilter config (LED target)
#
# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
# CONFIG_LEDS_TRIGGER_CAMERA is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_EDAC_SUPPORT=y
# CONFIG_EDAC is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set

#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set

#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ABX80X is not set
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_HYM8563 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
# CONFIG_RTC_DRV_ISL12057 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF2127 is not set
# CONFIG_RTC_DRV_PCF8523 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF85063 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_BQ32K is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8010 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
# CONFIG_RTC_DRV_EM3027 is not set
# CONFIG_RTC_DRV_RV3029C2 is not set
# CONFIG_RTC_DRV_RV8803 is not set

#
# SPI RTC drivers
#

#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1685_FAMILY is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_DS2404 is not set
# CONFIG_RTC_DRV_EFI is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set
# CONFIG_RTC_DRV_ZYNQMP is not set

#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_PL030 is not set
# CONFIG_RTC_DRV_PL031 is not set
# CONFIG_RTC_DRV_SNVS is not set

#
# HID Sensor RTC drivers
#
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VIRT_DRIVERS is not set

#
# Virtio drivers
#
# CONFIG_VIRTIO_MMIO is not set

#
# Microsoft Hyper-V guest support
#
# CONFIG_STAGING is not set
# CONFIG_CHROME_PLATFORMS is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_COMMON_CLK=y

#
# Common Clock Framework
#
CONFIG_COMMON_CLK_VERSATILE=y
# CONFIG_CLK_SP810 is not set
# CONFIG_CLK_VEXPRESS_OSC is not set
# CONFIG_COMMON_CLK_SI5351 is not set
# CONFIG_COMMON_CLK_SI514 is not set
# CONFIG_COMMON_CLK_SI570 is not set
# CONFIG_COMMON_CLK_CDCE925 is not set
# CONFIG_COMMON_CLK_CS2000_CP is not set
# CONFIG_CLK_QORIQ is not set
# CONFIG_COMMON_CLK_XGENE is not set
# CONFIG_COMMON_CLK_NXP is not set
# CONFIG_COMMON_CLK_PXA is not set
# CONFIG_COMMON_CLK_CDCE706 is not set

#
# Hardware Spinlock drivers
#

#
# Clock Source drivers
#
CONFIG_CLKSRC_OF=y
CONFIG_CLKSRC_PROBE=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_TIMER_SP804 is not set
# CONFIG_ATMEL_PIT is not set
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
# CONFIG_SH_TIMER_TMU is not set
# CONFIG_EM_TIMER_STI is not set
# CONFIG_MAILBOX is not set
# CONFIG_IOMMU_SUPPORT is not set

#
# Remoteproc drivers
#
# CONFIG_STE_MODEM_RPROC is not set

#
# Rpmsg drivers
#

#
# SOC (System On Chip) specific Drivers
#
CONFIG_RENESAS_RCAR_PM=y
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
# CONFIG_PM_DEVFREQ is not set
# CONFIG_EXTCON is not set
# CONFIG_MEMORY is not set
# CONFIG_IIO is not set
# CONFIG_PWM is not set
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_MAX_NR=1
CONFIG_ARM_GIC_V3=y
CONFIG_RENESAS_IRQC=y
# CONFIG_TS4800_IRQ is not set
# CONFIG_IPACK_BUS is not set
CONFIG_RESET_CONTROLLER=y
# CONFIG_FMC is not set

#
# PHY Subsystem
#
CONFIG_GENERIC_PHY=y
# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# CONFIG_PHY_RCAR_GEN2 is not set
CONFIG_PHY_RCAR_GEN3_USB2=m
# CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_PHY_XGENE is not set
# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set

#
# Performance monitor support
#
CONFIG_ARM_PMU=y
# CONFIG_RAS is not set

#
# Android
#
# CONFIG_ANDROID is not set
# CONFIG_LIBNVDIMM is not set
# CONFIG_NVMEM is not set
# CONFIG_STM is not set
# CONFIG_STM_DUMMY is not set
# CONFIG_STM_SOURCE_CONSOLE is not set
# CONFIG_INTEL_TH is not set

#
# FPGA Configuration Support
#
# CONFIG_FPGA is not set

#
# Firmware Drivers
#
CONFIG_ARM_PSCI_FW=y
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_DMIID=y
# CONFIG_DMI_SYSFS is not set
CONFIG_HAVE_ARM_SMCCC=y

#
# EFI (Extensible Firmware Interface) Support
#
# CONFIG_EFI_VARS is not set
CONFIG_EFI_ESRT=y
CONFIG_EFI_PARAMS_FROM_FDT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
CONFIG_EFI_ARMSTUB=y

#
# File systems
#
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
CONFIG_EXT4_FS=y
# CONFIG_EXT4_FS_POSIX_ACL is not set
# CONFIG_EXT4_FS_SECURITY is not set
# CONFIG_EXT4_ENCRYPTION is not set
# CONFIG_EXT4_DEBUG is not set
CONFIG_JBD2=y
# CONFIG_JBD2_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
# CONFIG_FS_DAX is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_EXPORTFS=y
CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA=y
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
CONFIG_PRINT_QUOTA_WARNING=y
# CONFIG_QUOTA_DEBUG is not set
# CONFIG_QFMT_V1 is not set
# CONFIG_QFMT_V2 is not set
CONFIG_QUOTACTL=y
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=y
# CONFIG_OVERLAY_FS is not set

#
# Caches
#
# CONFIG_FSCACHE is not set

#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set

#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set

#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
# CONFIG_EFIVAR_FS is not set
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_SWAP is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
CONFIG_GRACE_PERIOD=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_DEBUG is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
CONFIG_HAVE_KVM_IRQFD=y
CONFIG_HAVE_KVM_EVENTFD=y
CONFIG_KVM_MMIO=y
CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y
CONFIG_KVM_VFIO=y
CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
CONFIG_KVM_COMPAT=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM_ARM_VGIC_V3=y
CONFIG_KVM=y
CONFIG_KVM_ARM_HOST=y

#
# Kernel hacking
#

#
# printk and dmesg options
#
CONFIG_PRINTK_TIME=y
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_BOOT_PRINTK_DELAY is not set
CONFIG_DYNAMIC_DEBUG=y

#
# Compile-time checks and compiler options
#
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_INFO_REDUCED is not set
# CONFIG_DEBUG_INFO_SPLIT is not set
# CONFIG_DEBUG_INFO_DWARF4 is not set
# CONFIG_GDB_SCRIPTS is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=2048
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_PAGE_OWNER is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SECTION_MISMATCH is not set
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
CONFIG_DEBUG_KERNEL=y

#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_VM is not set
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_PER_CPU_MAPS is not set
CONFIG_HAVE_ARCH_KASAN=y
# CONFIG_KASAN is not set
# CONFIG_DEBUG_SHIRQ is not set

#
# Debug Lockups and Hangs
#
CONFIG_LOCKUP_DETECTOR=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
# CONFIG_WQ_WATCHDOG is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHED_INFO=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_SCHED_STACK_END_CHECK is not set
# CONFIG_DEBUG_TIMEKEEPING is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_PREEMPT is not set

#
# Lock Debugging (spinlocks, mutexes, etc...)
#
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_ATOMIC_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_LOCK_TORTURE_TEST is not set
# CONFIG_STACKTRACE is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_PI_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set

#
# RCU Debugging
#
# CONFIG_PROVE_RCU is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_TORTURE_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set

#
# Runtime Testing
#
# CONFIG_LKDTM is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_RHASHTABLE is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_TEST_LKM is not set
# CONFIG_TEST_USER_COPY is not set
# CONFIG_TEST_BPF is not set
# CONFIG_TEST_FIRMWARE is not set
# CONFIG_TEST_UDELAY is not set
CONFIG_MEMTEST=y
# CONFIG_TEST_STATIC_KEYS is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
# CONFIG_STRICT_DEVMEM is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_PID_IN_CONTEXTIDR is not set
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
# CONFIG_DEBUG_SET_MODULE_RONX is not set
# CONFIG_DEBUG_RODATA is not set
# CONFIG_CORESIGHT is not set

#
# Security options
#
CONFIG_KEYS=y
# CONFIG_PERSISTENT_KEYRINGS is not set
# CONFIG_BIG_KEYS is not set
# CONFIG_ENCRYPTED_KEYS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SECURITY=y
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
# CONFIG_SECURITY_PATH is not set
# CONFIG_SECURITY_SMACK is not set
# CONFIG_SECURITY_TOMOYO is not set
# CONFIG_SECURITY_APPARMOR is not set
# CONFIG_SECURITY_YAMA is not set
CONFIG_INTEGRITY=y
# CONFIG_INTEGRITY_SIGNATURE is not set
CONFIG_INTEGRITY_AUDIT=y
# CONFIG_IMA is not set
# CONFIG_EVM is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_CRYPTO=y

#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=m
CONFIG_CRYPTO_PCOMP2=y
CONFIG_CRYPTO_AKCIPHER2=y
# CONFIG_CRYPTO_RSA is not set
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_USER is not set
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_NULL2=y
# CONFIG_CRYPTO_PCRYPT is not set
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CRYPTO_CRYPTD=y
# CONFIG_CRYPTO_MCRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
CONFIG_CRYPTO_ABLK_HELPER=y

#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_ECHAINIV=m

#
# Block modes
#
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_KEYWRAP is not set

#
# Hash modes
#
# CONFIG_CRYPTO_CMAC is not set
CONFIG_CRYPTO_HMAC=m
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set

#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32 is not set
# CONFIG_CRYPTO_CRCT10DIF is not set
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_POLY1305 is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
CONFIG_CRYPTO_SHA256=m
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set

#
# Ciphers
#
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set

#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_ZLIB is not set
# CONFIG_CRYPTO_LZO is not set
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set

#
# Random Number Generation
#
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_DRBG_MENU=m
CONFIG_CRYPTO_DRBG_HMAC=y
# CONFIG_CRYPTO_DRBG_HASH is not set
# CONFIG_CRYPTO_DRBG_CTR is not set
CONFIG_CRYPTO_DRBG=m
CONFIG_CRYPTO_JITTERENTROPY=m
# CONFIG_CRYPTO_USER_API_HASH is not set
# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
# CONFIG_CRYPTO_USER_API_RNG is not set
# CONFIG_CRYPTO_USER_API_AEAD is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_CCP is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set

#
# Certificates for signature checking
#
# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
# CONFIG_CRYPTO_CRC32_ARM64 is not set
# CONFIG_BINARY_PRINTF is not set

#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_HAVE_ARCH_BITREVERSE=y
CONFIG_RATIONAL=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
# CONFIG_CRC_CCITT is not set
CONFIG_CRC16=y
# CONFIG_CRC_T10DIF is not set
CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
CONFIG_CRC7=y
# CONFIG_LIBCRC32C is not set
# CONFIG_CRC8 is not set
CONFIG_AUDIT_GENERIC=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_AUDIT_COMPAT_GENERIC=y
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_XZ_DEC=y
CONFIG_XZ_DEC_X86=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_IA64=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_BCJ=y
# CONFIG_XZ_DEC_TEST is not set
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_DMA=y
CONFIG_CPU_RMAP=y
CONFIG_DQL=y
CONFIG_NLATTR=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
# CONFIG_CORDIC is not set
# CONFIG_DDR is not set
# CONFIG_IRQ_POLL is not set
CONFIG_LIBFDT=y
CONFIG_UCS2_STRING=y
CONFIG_FONT_SUPPORT=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
# CONFIG_SG_SPLIT is not set
CONFIG_ARCH_HAS_SG_CHAIN=y

Re: [PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Laurent Pinchart]

Hi Geert,

Here's an update.

On Sunday 28 February 2016 17:04:47 Laurent Pinchart wrote:
> On Sunday 28 February 2016 09:55:32 Geert Uytterhoeven wrote:
> > On Sat, Feb 27, 2016 at 2:53 AM, Laurent Pinchart wrote:
> >> After rebasing this series on top of Simon's latest devel branch, I'm
> >> experiencing hard system freezes when using the VSP.
> > 
> > Is this due to the rebasing? Did it work in
> > renesas-drivers-2016-02-16-v4.5-rc4 or
> > renesas-drivers-2016-02-23-v4.5-rc5?
> 
> I thought it was, but after further investigations I've been unable to get
> it working at all even on my older branches, so I think the problem has
> always been there.
> 
> >> What makes the problem curious is that PM runtime works fine when the
> >> VSP instances are probed, the A3VP power domain is turned on and off
> >> correctly for each instance. However, after booting the system, if I try
> >> to RPM resume the device, the system hangs.
> >> 
> >> I've traced this (using printk debugging) down to the SYSCISCR write in
> >> rcar_sysc_power(). The value written is 0x00000200, which corresponds to
> >> the A3VP power domain, and the resume request completion wait loop
> >> doesn't time out.
> > 
> > So the second write to SYSCISCR in that function locks up the system?
> 
> Correct, and only after the kernel has booted, there's a bunch of calls to
> rcar_sysc_power() to enable/disable the A3VP power domain at boot time when
> the vsp devices are probed, and those don't cause any issue.

I've investigated the problem further, and realized the freeze was caused by 
writing to the PWRONCR_OFFS register, not the SYSCISCR register. It doesn't 
occur immediately though, I had to put longer delays between the register 
writes to locate the faulty one.

Furthermore, I've also realized that commenting out the A3SH power domain from 
DT seemed to fix the problem. Unused power domains are powered off at the end 
of the boot sequence, and it looks like powering A3SH there somehow messes up 
the SYSC and hangs the system the next time a power domain is turned on.

Given that the latest version of the datasheet doesn't document the A3SH power 
domain it would probably be a good idea to remove it, at least until we can 
get more information from the hardware team.

-- 
Regards,

Laurent Pinchart

[PATCH/RFC v2 00/11] ARM/arm64: renesas: Add SYSC PM Domain DT Support

[Laurent Pinchart]

Hi Geert,

Here's an update.

On Sunday 28 February 2016 17:04:47 Laurent Pinchart wrote:
> On Sunday 28 February 2016 09:55:32 Geert Uytterhoeven wrote:
> > On Sat, Feb 27, 2016 at 2:53 AM, Laurent Pinchart wrote:
> >> After rebasing this series on top of Simon's latest devel branch, I'm
> >> experiencing hard system freezes when using the VSP.
> > 
> > Is this due to the rebasing? Did it work in
> > renesas-drivers-2016-02-16-v4.5-rc4 or
> > renesas-drivers-2016-02-23-v4.5-rc5?
> 
> I thought it was, but after further investigations I've been unable to get
> it working at all even on my older branches, so I think the problem has
> always been there.
> 
> >> What makes the problem curious is that PM runtime works fine when the
> >> VSP instances are probed, the A3VP power domain is turned on and off
> >> correctly for each instance. However, after booting the system, if I try
> >> to RPM resume the device, the system hangs.
> >> 
> >> I've traced this (using printk debugging) down to the SYSCISCR write in
> >> rcar_sysc_power(). The value written is 0x00000200, which corresponds to
> >> the A3VP power domain, and the resume request completion wait loop
> >> doesn't time out.
> > 
> > So the second write to SYSCISCR in that function locks up the system?
> 
> Correct, and only after the kernel has booted, there's a bunch of calls to
> rcar_sysc_power() to enable/disable the A3VP power domain at boot time when
> the vsp devices are probed, and those don't cause any issue.

I've investigated the problem further, and realized the freeze was caused by 
writing to the PWRONCR_OFFS register, not the SYSCISCR register. It doesn't 
occur immediately though, I had to put longer delays between the register 
writes to locate the faulty one.

Furthermore, I've also realized that commenting out the A3SH power domain from 
DT seemed to fix the problem. Unused power domains are powered off at the end 
of the boot sequence, and it looks like powering A3SH there somehow messes up 
the SYSC and hangs the system the next time a power domain is turned on.

Given that the latest version of the datasheet doesn't document the A3SH power 
domain it would probably be a good idea to remove it, at least until we can 
get more information from the hardware team.

-- 
Regards,

Laurent Pinchart