* [PATCH v4 00/12] Add support for the Armada 3700 SoC an mvebu ARM64 based
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
This series introduce the support of the Armada 3700 family: it is the
first ARM64 SoC of the mvebu family submitted to the mainline!
Currently there are two members of the Armada 3700 family, the only
difference is the number of core: the Armada 3710 comes with one
Cortex-A53 whereas the Armada 3720 comes with 2 Cortex-A53. In this
series we enabled only the minimum to boot, pinctrl and clock tree
will come soon.
The changes in this forth version are even smaller than the former one
(see the changelog).
The first two patches patches are here to be able to use the the
ARCH_MVEBU for the Armada 3700 SoCs. The first ones is only here to
have standalone series but it comes from Thomas Petazzoni's series:
http://thread.gmane.org/gmane.linux.ports.arm.kernel/472625
The third patch introduces a new serial driver for the uart used on
this SoC. The driver remains simple even if the hardware is capable of
doing more.
The forth one adapts the ahci driver to support the Armada 3700 SoC.
The forth patch updates the binding documentation with the new
compatible string.
The fifth patch adds a new entry Kconfig entry for this SoC family.
I took the opportunity of this series to tidy up the Marvell related
files in the binding documentation with the seventh patch.
The eighth patch introduces the compatible string for the SoCs of the
Armada 3700 family.
The ninth patch could be considered as the bulk of this series: it
adds the device tree files for the Armada 3700 SoCs and for the
reference board.
With the introduction of this new family the MAINTAINERS file, the
Marvell README and the ARM64 defconfig files have to be updated: it is
the purpose of the last 3 patches.
The patches 3 and 4 could be taken directly by the maintainer of their
respective subsystem as there is no dependency at all with the rest of
the series. I think that the rest of the series should go through the
arm-soc maintainer but in doubt I also added the ARM64 maintainer as
suggested by get_maintainer.pl.
Thanks,
Gregory
Changelog:
v3 -> v4
- Preserved alphabetical order in arch/arm64/Kconfig.platforms file,
suggested by Jisheng
- Added Rob acked-by on patch 8
- Fix driver_name field in the uart_driver struct: use "mvebu_serial"
instead of "serial"
v2 -> v3
- Renamed the remaining ttyS into ttyMV: reported by Greg KH
- Fixed the order of the compatible in the example of the binding
documentation: pointed by Rob
- Fix a typo in Kconfig entry: pointed by Thomas Petazzoni
v1 -> v2
- Added Rob acked-by on patches 3, 6 and 7
- Used armada3700_uart instead of mvebu_uart for the uart driver:
suggested by Mark
- In mvebu-uart, do not use anymore TTY_MAJOR, or ttyS, but dynamic
major and ttyMV: pointed by Alan
- Use tty_termios_copy_hw in mvebu_uart_set_termios: suggested by Alan
- Use ARCH_MVEBU instead of creating ARCH_ARMADA_3700: suggested by
Jisheng
- Added a new irqchip pacthes to fix build on ARM64 when ARCH_MVEBU is
selected
- Removed marvell,armada3700 from the device tree binding and directly
used marvell,armada3710 for common feature: pointed by Rob
- Fix memory node with coorect size in armada-3720-db.dts: suggested
by Mark
Gregory CLEMENT (9):
irqchip: armada-370-xp: do not enable it by default when ARCH_MVEBU is
selected
arm64: add mvebu architecture entry
Documentation: dt-bindings: Add a new compatible for the Armada 3700
Documentation: dt: Tidy up the Marvell related files
devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC
family
arm64: dts: add the Marvell Armada 3700 family and a development board
MAINTAINERS: Extend dts entry for ARM64 mvebu files
Documentation: arm: update supported Marvell EBU processors
arm64: defconfig: enable Armada 3700 related config
Lior Amsalem (1):
ata: ahci_mvebu: add support for Armada 3700 variant
Thomas Petazzoni (1):
irqchip: armada-370-xp: add Kconfig option for the driver
Wilson Ding (1):
serial: mvebu-uart: initial support for Armada-3700 serial port
Documentation/arm/Marvell/README | 13 +
.../arm/{ => marvell}/armada-370-xp-pmsu.txt | 0
.../bindings/arm/{ => marvell}/armada-370-xp.txt | 0
.../bindings/arm/{ => marvell}/armada-375.txt | 0
.../bindings/arm/marvell/armada-37xx.txt | 16 +
.../{ => marvell}/armada-380-mpcore-soc-ctrl.txt | 0
.../bindings/arm/{ => marvell}/armada-38x.txt | 0
.../bindings/arm/{ => marvell}/armada-39x.txt | 0
.../arm/{ => marvell}/armada-cpu-reset.txt | 0
.../arm/{ => marvell}/coherency-fabric.txt | 0
.../bindings/arm/{ => marvell}/kirkwood.txt | 0
.../bindings/arm/{ => marvell}/marvell,berlin.txt | 0
.../bindings/arm/{ => marvell}/marvell,dove.txt | 0
.../arm/{ => marvell}/marvell,kirkwood.txt | 0
.../arm/{ => marvell}/mvebu-cpu-config.txt | 0
.../arm/{ => marvell}/mvebu-system-controller.txt | 0
.../devicetree/bindings/ata/ahci-platform.txt | 1 +
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt | 6 +
MAINTAINERS | 1 +
arch/arm64/Kconfig.platforms | 6 +
arch/arm64/boot/dts/marvell/Makefile | 4 +
arch/arm64/boot/dts/marvell/armada-371x.dtsi | 53 ++
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 86 +++
arch/arm64/boot/dts/marvell/armada-372x.dtsi | 63 ++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 131 +++++
arch/arm64/configs/defconfig | 5 +
drivers/ata/ahci_mvebu.c | 14 +-
drivers/irqchip/Kconfig | 4 +
drivers/irqchip/Makefile | 2 +-
drivers/tty/serial/Kconfig | 22 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
34 files changed, 1088 insertions(+), 6 deletions(-)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp-pmsu.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-375.txt (100%)
create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-380-mpcore-soc-ctrl.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-38x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-39x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-cpu-reset.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/coherency-fabric.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,berlin.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,dove.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-cpu-config.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-system-controller.txt (100%)
create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
create mode 100644 arch/arm64/boot/dts/marvell/armada-371x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-db.dts
create mode 100644 arch/arm64/boot/dts/marvell/armada-372x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-37xx.dtsi
create mode 100644 drivers/tty/serial/mvebu-uart.c
--
2.5.0
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 00/12] Add support for the Armada 3700 SoC an mvebu ARM64 based
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
This series introduce the support of the Armada 3700 family: it is the
first ARM64 SoC of the mvebu family submitted to the mainline!
Currently there are two members of the Armada 3700 family, the only
difference is the number of core: the Armada 3710 comes with one
Cortex-A53 whereas the Armada 3720 comes with 2 Cortex-A53. In this
series we enabled only the minimum to boot, pinctrl and clock tree
will come soon.
The changes in this forth version are even smaller than the former one
(see the changelog).
The first two patches patches are here to be able to use the the
ARCH_MVEBU for the Armada 3700 SoCs. The first ones is only here to
have standalone series but it comes from Thomas Petazzoni's series:
http://thread.gmane.org/gmane.linux.ports.arm.kernel/472625
The third patch introduces a new serial driver for the uart used on
this SoC. The driver remains simple even if the hardware is capable of
doing more.
The forth one adapts the ahci driver to support the Armada 3700 SoC.
The forth patch updates the binding documentation with the new
compatible string.
The fifth patch adds a new entry Kconfig entry for this SoC family.
I took the opportunity of this series to tidy up the Marvell related
files in the binding documentation with the seventh patch.
The eighth patch introduces the compatible string for the SoCs of the
Armada 3700 family.
The ninth patch could be considered as the bulk of this series: it
adds the device tree files for the Armada 3700 SoCs and for the
reference board.
With the introduction of this new family the MAINTAINERS file, the
Marvell README and the ARM64 defconfig files have to be updated: it is
the purpose of the last 3 patches.
The patches 3 and 4 could be taken directly by the maintainer of their
respective subsystem as there is no dependency at all with the rest of
the series. I think that the rest of the series should go through the
arm-soc maintainer but in doubt I also added the ARM64 maintainer as
suggested by get_maintainer.pl.
Thanks,
Gregory
Changelog:
v3 -> v4
- Preserved alphabetical order in arch/arm64/Kconfig.platforms file,
suggested by Jisheng
- Added Rob acked-by on patch 8
- Fix driver_name field in the uart_driver struct: use "mvebu_serial"
instead of "serial"
v2 -> v3
- Renamed the remaining ttyS into ttyMV: reported by Greg KH
- Fixed the order of the compatible in the example of the binding
documentation: pointed by Rob
- Fix a typo in Kconfig entry: pointed by Thomas Petazzoni
v1 -> v2
- Added Rob acked-by on patches 3, 6 and 7
- Used armada3700_uart instead of mvebu_uart for the uart driver:
suggested by Mark
- In mvebu-uart, do not use anymore TTY_MAJOR, or ttyS, but dynamic
major and ttyMV: pointed by Alan
- Use tty_termios_copy_hw in mvebu_uart_set_termios: suggested by Alan
- Use ARCH_MVEBU instead of creating ARCH_ARMADA_3700: suggested by
Jisheng
- Added a new irqchip pacthes to fix build on ARM64 when ARCH_MVEBU is
selected
- Removed marvell,armada3700 from the device tree binding and directly
used marvell,armada3710 for common feature: pointed by Rob
- Fix memory node with coorect size in armada-3720-db.dts: suggested
by Mark
Gregory CLEMENT (9):
irqchip: armada-370-xp: do not enable it by default when ARCH_MVEBU is
selected
arm64: add mvebu architecture entry
Documentation: dt-bindings: Add a new compatible for the Armada 3700
Documentation: dt: Tidy up the Marvell related files
devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC
family
arm64: dts: add the Marvell Armada 3700 family and a development board
MAINTAINERS: Extend dts entry for ARM64 mvebu files
Documentation: arm: update supported Marvell EBU processors
arm64: defconfig: enable Armada 3700 related config
Lior Amsalem (1):
ata: ahci_mvebu: add support for Armada 3700 variant
Thomas Petazzoni (1):
irqchip: armada-370-xp: add Kconfig option for the driver
Wilson Ding (1):
serial: mvebu-uart: initial support for Armada-3700 serial port
Documentation/arm/Marvell/README | 13 +
.../arm/{ => marvell}/armada-370-xp-pmsu.txt | 0
.../bindings/arm/{ => marvell}/armada-370-xp.txt | 0
.../bindings/arm/{ => marvell}/armada-375.txt | 0
.../bindings/arm/marvell/armada-37xx.txt | 16 +
.../{ => marvell}/armada-380-mpcore-soc-ctrl.txt | 0
.../bindings/arm/{ => marvell}/armada-38x.txt | 0
.../bindings/arm/{ => marvell}/armada-39x.txt | 0
.../arm/{ => marvell}/armada-cpu-reset.txt | 0
.../arm/{ => marvell}/coherency-fabric.txt | 0
.../bindings/arm/{ => marvell}/kirkwood.txt | 0
.../bindings/arm/{ => marvell}/marvell,berlin.txt | 0
.../bindings/arm/{ => marvell}/marvell,dove.txt | 0
.../arm/{ => marvell}/marvell,kirkwood.txt | 0
.../arm/{ => marvell}/mvebu-cpu-config.txt | 0
.../arm/{ => marvell}/mvebu-system-controller.txt | 0
.../devicetree/bindings/ata/ahci-platform.txt | 1 +
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt | 6 +
MAINTAINERS | 1 +
arch/arm64/Kconfig.platforms | 6 +
arch/arm64/boot/dts/marvell/Makefile | 4 +
arch/arm64/boot/dts/marvell/armada-371x.dtsi | 53 ++
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 86 +++
arch/arm64/boot/dts/marvell/armada-372x.dtsi | 63 ++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 131 +++++
arch/arm64/configs/defconfig | 5 +
drivers/ata/ahci_mvebu.c | 14 +-
drivers/irqchip/Kconfig | 4 +
drivers/irqchip/Makefile | 2 +-
drivers/tty/serial/Kconfig | 22 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
34 files changed, 1088 insertions(+), 6 deletions(-)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp-pmsu.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-375.txt (100%)
create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-380-mpcore-soc-ctrl.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-38x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-39x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-cpu-reset.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/coherency-fabric.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,berlin.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,dove.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-cpu-config.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-system-controller.txt (100%)
create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
create mode 100644 arch/arm64/boot/dts/marvell/armada-371x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-db.dts
create mode 100644 arch/arm64/boot/dts/marvell/armada-372x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-37xx.dtsi
create mode 100644 drivers/tty/serial/mvebu-uart.c
--
2.5.0
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 01/12] irqchip: armada-370-xp: add Kconfig option for the driver
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Instead of building the irq-armada-370-xp driver directly when
CONFIG_ARCH_MVEBU is enabled, this commit introduces an intermediate
CONFIG_ARMADA_370_XP_IRQ hidden Kconfig option.
This allows this option to select other interrupt-related Kconfig
options (which will be needed in follow-up commits) rather than having
such selects done from arch/arm/mach-<foo>/.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/irqchip/Kconfig | 5 +++++
drivers/irqchip/Makefile | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 715923d5236c..e2cab879d641 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -60,6 +60,11 @@ config ARM_VIC_NR
The maximum number of VICs available in the system, for
power management.
+config ARMADA_370_XP_IRQ
+ bool
+ default y if ARCH_MVEBU
+ select GENERIC_IRQ_CHIP
+
config ATMEL_AIC_IRQ
bool
select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 18caacb60d58..30dba044d0b8 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -5,7 +5,6 @@ obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
-obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
@@ -28,6 +27,7 @@ obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-g
obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o
obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
obj-$(CONFIG_ARM_VIC) += irq-vic.o
+obj-$(CONFIG_ARMADA_370_XP_IRQ) += irq-armada-370-xp.o
obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o
obj-$(CONFIG_ATMEL_AIC5_IRQ) += irq-atmel-aic-common.o irq-atmel-aic5.o
obj-$(CONFIG_I8259) += irq-i8259.o
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 01/12] irqchip: armada-370-xp: add Kconfig option for the driver
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Instead of building the irq-armada-370-xp driver directly when
CONFIG_ARCH_MVEBU is enabled, this commit introduces an intermediate
CONFIG_ARMADA_370_XP_IRQ hidden Kconfig option.
This allows this option to select other interrupt-related Kconfig
options (which will be needed in follow-up commits) rather than having
such selects done from arch/arm/mach-<foo>/.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/irqchip/Kconfig | 5 +++++
drivers/irqchip/Makefile | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 715923d5236c..e2cab879d641 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -60,6 +60,11 @@ config ARM_VIC_NR
The maximum number of VICs available in the system, for
power management.
+config ARMADA_370_XP_IRQ
+ bool
+ default y if ARCH_MVEBU
+ select GENERIC_IRQ_CHIP
+
config ATMEL_AIC_IRQ
bool
select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 18caacb60d58..30dba044d0b8 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -5,7 +5,6 @@ obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
-obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
@@ -28,6 +27,7 @@ obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-g
obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o
obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
obj-$(CONFIG_ARM_VIC) += irq-vic.o
+obj-$(CONFIG_ARMADA_370_XP_IRQ) += irq-armada-370-xp.o
obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o
obj-$(CONFIG_ATMEL_AIC5_IRQ) += irq-atmel-aic-common.o irq-atmel-aic5.o
obj-$(CONFIG_I8259) += irq-i8259.o
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 02/12] irqchip: armada-370-xp: do not enable it by default when ARCH_MVEBU is selected
2016-02-16 18:14 ` Gregory CLEMENT
(?)
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Mark Rutland, devicetree, linux-ide, Greg Kroah-Hartman,
Omri Itach, linux-kernel, Nadav Haklai, Hans de Goede,
Lior Amsalem, linux-serial, Jiri Slaby, Tejun Heo,
Thomas Petazzoni, linux-arm-kernel
The irq-armada-370-xp driver can only be built for ARM 32 bits. The mvebu
family had grown with a new ARM64 SoC which will also select the
ARCH_MEVBU configuration. Since "ARM: mvebu: use the ARMADA_370_XP_IRQ
option", the ARM32 mvebu SoC directly select this new option. Selecting
it by default when ARCH_MEVBU is selected is no more needed.
This patch removes this dependency, thanks to this, a kernel for ARM64
mvebu SoC can be built without error due this driver.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/irqchip/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index e2cab879d641..b6e7e86a57e1 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -62,7 +62,6 @@ config ARM_VIC_NR
config ARMADA_370_XP_IRQ
bool
- default y if ARCH_MVEBU
select GENERIC_IRQ_CHIP
config ATMEL_AIC_IRQ
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 02/12] irqchip: armada-370-xp: do not enable it by default when ARCH_MVEBU is selected
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
The irq-armada-370-xp driver can only be built for ARM 32 bits. The mvebu
family had grown with a new ARM64 SoC which will also select the
ARCH_MEVBU configuration. Since "ARM: mvebu: use the ARMADA_370_XP_IRQ
option", the ARM32 mvebu SoC directly select this new option. Selecting
it by default when ARCH_MEVBU is selected is no more needed.
This patch removes this dependency, thanks to this, a kernel for ARM64
mvebu SoC can be built without error due this driver.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/irqchip/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index e2cab879d641..b6e7e86a57e1 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -62,7 +62,6 @@ config ARM_VIC_NR
config ARMADA_370_XP_IRQ
bool
- default y if ARCH_MVEBU
select GENERIC_IRQ_CHIP
config ATMEL_AIC_IRQ
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 02/12] irqchip: armada-370-xp: do not enable it by default when ARCH_MVEBU is selected
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
The irq-armada-370-xp driver can only be built for ARM 32 bits. The mvebu
family had grown with a new ARM64 SoC which will also select the
ARCH_MEVBU configuration. Since "ARM: mvebu: use the ARMADA_370_XP_IRQ
option", the ARM32 mvebu SoC directly select this new option. Selecting
it by default when ARCH_MEVBU is selected is no more needed.
This patch removes this dependency, thanks to this, a kernel for ARM64
mvebu SoC can be built without error due this driver.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/irqchip/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index e2cab879d641..b6e7e86a57e1 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -62,7 +62,6 @@ config ARM_VIC_NR
config ARMADA_370_XP_IRQ
bool
- default y if ARCH_MVEBU
select GENERIC_IRQ_CHIP
config ATMEL_AIC_IRQ
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
2016-02-16 18:14 ` Gregory CLEMENT
(?)
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Mark Rutland, devicetree, linux-ide, Greg Kroah-Hartman,
Omri Itach, linux-kernel, Nadav Haklai, Hans de Goede,
Lior Amsalem, linux-serial, Jiri Slaby, Tejun Heo, Wilson Ding,
Thomas Petazzoni, linux-arm-kernel
From: Wilson Ding <dingwei@marvell.com>
Armada-3700's uart is a simple serial port, which doesn't
support. Configuring the modem control lines. The uart port has a 32
bytes Tx FIFO and a 64 bytes Rx FIFO
The uart driver implements the uart core operations. It also support the
system (early) console based on Armada-3700's serial port.
Known Issue:
The uart driver currently doesn't support clock programming, which means
the baud-rate stays with the default value configured by the bootloader
at boot time
[gregory.clement@free-electrons.com: Rewrite many part which are too long
to enumerate]
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt | 6 +
drivers/tty/serial/Kconfig | 22 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
6 files changed, 695 insertions(+)
create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
create mode 100644 drivers/tty/serial/mvebu-uart.c
diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
new file mode 100644
index 000000000000..6087defd9f93
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
@@ -0,0 +1,13 @@
+* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
+
+Required properties:
+- compatible: "marvell,armada-3700-uart"
+- reg: offset and length of the register set for the device.
+- interrupts: device interrupt
+
+Example:
+ serial@12000 {
+ compatible = "marvell,armada-3700-uart";
+ reg = <0x12000 0x400>;
+ interrupts = <43>;
+ };
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 87d40a72f6a1..ea0aba48d616 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
A valid base address must be provided, and the serial
port must already be setup and configured.
+ armada3700_uart,<addr>
+ Start an early, polled-mode console on the
+ Armada 3700 serial port at the specified
+ address. The serial port must already be setup
+ and configured. Options are not yet supported.
+
earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
earlyprintk=vga
earlyprintk=efi
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 39721ec4f415..b291f934d51b 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
depends on SERIAL_STM32=y
select SERIAL_CORE_CONSOLE
+config SERIAL_MVEBU_UART
+ bool "Marvell EBU serial port support"
+ select SERIAL_CORE
+ help
+ This driver is for Marvell EBU SoC's UART. If you have a machine
+ based on the Armada-3700 SoC and wish to use the on-board serial
+ port,
+ say 'Y' here.
+ Otherwise, say 'N'.
+
+config SERIAL_MVEBU_CONSOLE
+ bool "Console on Marvell EBU serial port"
+ depends on SERIAL_MVEBU_UART
+ select SERIAL_CORE_CONSOLE
+ select SERIAL_EARLYCON
+ default y
+ help
+ Say 'Y' here if you wish to use Armada-3700 UART as the system console.
+ (the system console is the device which receives all kernel messages
+ and warnings and which allows logins in single user mode)
+ Otherwise, say 'N'.
+
endmenu
config SERIAL_MCTRL_GPIO
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index b391c9b31960..988167595330 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
+obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
# GPIOLIB helpers for modem control lines
obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
new file mode 100644
index 000000000000..0ff27818bb87
--- /dev/null
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -0,0 +1,650 @@
+/*
+* ***************************************************************************
+* Copyright (C) 2015 Marvell International Ltd.
+* ***************************************************************************
+* This program is free software: you can redistribute it and/or modify it
+* under the terms of the GNU General Public License as published by the Free
+* Software Foundation, either version 2 of the License, or any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program. If not, see <http://www.gnu.org/licenses/>.
+* ***************************************************************************
+*/
+
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+
+/* Register Map */
+#define UART_RBR 0x00
+#define RBR_BRK_DET BIT(15)
+#define RBR_FRM_ERR_DET BIT(14)
+#define RBR_PAR_ERR_DET BIT(13)
+#define RBR_OVR_ERR_DET BIT(12)
+
+#define UART_TSH 0x04
+
+#define UART_CTRL 0x08
+#define CTRL_SOFT_RST BIT(31)
+#define CTRL_TXFIFO_RST BIT(15)
+#define CTRL_RXFIFO_RST BIT(14)
+#define CTRL_ST_MIRR_EN BIT(13)
+#define CTRL_LPBK_EN BIT(12)
+#define CTRL_SND_BRK_SEQ BIT(11)
+#define CTRL_PAR_EN BIT(10)
+#define CTRL_TWO_STOP BIT(9)
+#define CTRL_TX_HFL_INT BIT(8)
+#define CTRL_RX_HFL_INT BIT(7)
+#define CTRL_TX_EMP_INT BIT(6)
+#define CTRL_TX_RDY_INT BIT(5)
+#define CTRL_RX_RDY_INT BIT(4)
+#define CTRL_BRK_DET_INT BIT(3)
+#define CTRL_FRM_ERR_INT BIT(2)
+#define CTRL_PAR_ERR_INT BIT(1)
+#define CTRL_OVR_ERR_INT BIT(0)
+#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
+ CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
+
+#define UART_STAT 0x0c
+#define STAT_TX_FIFO_EMP BIT(13)
+#define STAT_RX_FIFO_EMP BIT(12)
+#define STAT_TX_FIFO_FUL BIT(11)
+#define STAT_TX_FIFO_HFL BIT(10)
+#define STAT_RX_TOGL BIT(9)
+#define STAT_RX_FIFO_FUL BIT(8)
+#define STAT_RX_FIFO_HFL BIT(7)
+#define STAT_TX_EMP BIT(6)
+#define STAT_TX_RDY BIT(5)
+#define STAT_RX_RDY BIT(4)
+#define STAT_BRK_DET BIT(3)
+#define STAT_FRM_ERR BIT(2)
+#define STAT_PAR_ERR BIT(1)
+#define STAT_OVR_ERR BIT(0)
+#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
+ | STAT_PAR_ERR | STAT_OVR_ERR)
+
+#define UART_BRDV 0x10
+
+#define MVEBU_NR_UARTS 1
+
+#define MVEBU_UART_TYPE "mvebu-uart"
+
+static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
+
+struct mvebu_uart_data {
+ struct uart_port *port;
+ struct clk *clk;
+};
+
+/* Core UART Driver Operations */
+static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
+{
+ unsigned long flags;
+ unsigned int st;
+
+ spin_lock_irqsave(&port->lock, flags);
+ st = readl(port->membase + UART_STAT);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
+}
+
+static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
+{
+ return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+}
+
+static void mvebu_uart_set_mctrl(struct uart_port *port,
+ unsigned int mctrl)
+{
+/*
+ * Even if we do not support configuring the modem control lines, this
+ * function must be proided to the serial core
+ */
+}
+
+static void mvebu_uart_stop_tx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl &= ~CTRL_TX_RDY_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_start_tx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl |= CTRL_TX_RDY_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_stop_rx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl &= ~CTRL_RX_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
+{
+ unsigned int ctl;
+ unsigned long flags;
+
+ spin_lock_irqsave(&port->lock, flags);
+ ctl = readl(port->membase + UART_CTRL);
+ if (brk == -1)
+ ctl |= CTRL_SND_BRK_SEQ;
+ else
+ ctl &= ~CTRL_SND_BRK_SEQ;
+ writel(ctl, port->membase + UART_CTRL);
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
+{
+ struct tty_port *tport = &port->state->port;
+ unsigned char ch = 0;
+ char flag = 0;
+
+ do {
+ if (status & STAT_RX_RDY) {
+ ch = readl(port->membase + UART_RBR);
+ ch &= 0xff;
+ flag = TTY_NORMAL;
+ port->icount.rx++;
+
+ if (status & STAT_PAR_ERR)
+ port->icount.parity++;
+ }
+
+ if (status & STAT_BRK_DET) {
+ port->icount.brk++;
+ status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
+ if (uart_handle_break(port))
+ goto ignore_char;
+ }
+
+ if (status & STAT_OVR_ERR)
+ port->icount.overrun++;
+
+ if (status & STAT_FRM_ERR)
+ port->icount.frame++;
+
+ if (uart_handle_sysrq_char(port, ch))
+ goto ignore_char;
+
+ if (status & port->ignore_status_mask & STAT_PAR_ERR)
+ status &= ~STAT_RX_RDY;
+
+ status &= port->read_status_mask;
+
+ if (status & STAT_PAR_ERR)
+ flag = TTY_PARITY;
+
+ status &= ~port->ignore_status_mask;
+
+ if (status & STAT_RX_RDY)
+ tty_insert_flip_char(tport, ch, flag);
+
+ if (status & STAT_BRK_DET)
+ tty_insert_flip_char(tport, 0, TTY_BREAK);
+
+ if (status & STAT_FRM_ERR)
+ tty_insert_flip_char(tport, 0, TTY_FRAME);
+
+ if (status & STAT_OVR_ERR)
+ tty_insert_flip_char(tport, 0, TTY_OVERRUN);
+
+ignore_char:
+ status = readl(port->membase + UART_STAT);
+ } while (status & (STAT_RX_RDY | STAT_BRK_DET));
+
+ tty_flip_buffer_push(tport);
+}
+
+static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
+{
+ struct circ_buf *xmit = &port->state->xmit;
+ unsigned int count;
+ unsigned int st;
+
+ if (port->x_char) {
+ writel(port->x_char, port->membase + UART_TSH);
+ port->icount.tx++;
+ port->x_char = 0;
+ return;
+ }
+
+ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+ mvebu_uart_stop_tx(port);
+ return;
+ }
+
+ for (count = 0; count < port->fifosize; count++) {
+ writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ port->icount.tx++;
+
+ if (uart_circ_empty(xmit))
+ break;
+
+ st = readl(port->membase + UART_STAT);
+ if (st & STAT_TX_FIFO_FUL)
+ break;
+ }
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(port);
+
+ if (uart_circ_empty(xmit))
+ mvebu_uart_stop_tx(port);
+}
+
+static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
+{
+ struct uart_port *port = (struct uart_port *)dev_id;
+ unsigned int st = readl(port->membase + UART_STAT);
+
+ if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
+ mvebu_uart_rx_chars(port, st);
+
+ if (st & STAT_TX_RDY)
+ mvebu_uart_tx_chars(port, st);
+
+ return IRQ_HANDLED;
+}
+
+static int mvebu_uart_startup(struct uart_port *port)
+{
+ int ret;
+
+ writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
+ port->membase + UART_CTRL);
+ udelay(1);
+ writel(CTRL_RX_INT, port->membase + UART_CTRL);
+
+ ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
+ port);
+ if (ret) {
+ dev_err(port->dev, "failed to request irq\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static void mvebu_uart_shutdown(struct uart_port *port)
+{
+ writel(0, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_set_termios(struct uart_port *port,
+ struct ktermios *termios,
+ struct ktermios *old)
+{
+ unsigned long flags;
+ unsigned int baud;
+
+ spin_lock_irqsave(&port->lock, flags);
+
+ port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
+ STAT_TX_RDY | STAT_TX_FIFO_FUL;
+
+ if (termios->c_iflag & INPCK)
+ port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
+
+ port->ignore_status_mask = 0;
+ if (termios->c_iflag & IGNPAR)
+ port->ignore_status_mask |=
+ STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
+
+ if ((termios->c_cflag & CREAD) == 0)
+ port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
+
+ if (old)
+ tty_termios_copy_hw(termios, old);
+
+ baud = uart_get_baud_rate(port, termios, old, 0, 460800);
+ uart_update_timeout(port, termios->c_cflag, baud);
+
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static const char *mvebu_uart_type(struct uart_port *port)
+{
+ return MVEBU_UART_TYPE;
+}
+
+static void mvebu_uart_release_port(struct uart_port *port)
+{
+ /* Nothing to do here */
+}
+
+static int mvebu_uart_request_port(struct uart_port *port)
+{
+ return 0;
+}
+
+#ifdef CONFIG_CONSOLE_POLL
+static int mvebu_uart_get_poll_char(struct uart_port *port)
+{
+ unsigned int st = readl(port->membase + UART_STAT);
+
+ if (!(st & STAT_RX_RDY))
+ return NO_POLL_CHAR;
+
+ return readl(port->membase + UART_RBR);
+}
+
+static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
+{
+ unsigned int st;
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+
+ if (!(st & STAT_TX_FIFO_FUL))
+ break;
+
+ udelay(1);
+ }
+
+ writel(c, port->membase + UART_TSH);
+}
+#endif
+
+static const struct uart_ops mvebu_uart_ops = {
+ .tx_empty = mvebu_uart_tx_empty,
+ .set_mctrl = mvebu_uart_set_mctrl,
+ .get_mctrl = mvebu_uart_get_mctrl,
+ .stop_tx = mvebu_uart_stop_tx,
+ .start_tx = mvebu_uart_start_tx,
+ .stop_rx = mvebu_uart_stop_rx,
+ .break_ctl = mvebu_uart_break_ctl,
+ .startup = mvebu_uart_startup,
+ .shutdown = mvebu_uart_shutdown,
+ .set_termios = mvebu_uart_set_termios,
+ .type = mvebu_uart_type,
+ .release_port = mvebu_uart_release_port,
+ .request_port = mvebu_uart_request_port,
+#ifdef CONFIG_CONSOLE_POLL
+ .poll_get_char = mvebu_uart_get_poll_char,
+ .poll_put_char = mvebu_uart_put_poll_char,
+#endif
+};
+
+/* Console Driver Operations */
+
+#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
+/* Early Console */
+static void mvebu_uart_putc(struct uart_port *port, int c)
+{
+ unsigned int st;
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+ if (!(st & STAT_TX_FIFO_FUL))
+ break;
+ }
+
+ writel(c, port->membase + UART_TSH);
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+ if (st & STAT_TX_FIFO_EMP)
+ break;
+ }
+}
+
+static void mvebu_uart_putc_early_write(struct console *con,
+ const char *s,
+ unsigned n)
+{
+ struct earlycon_device *dev = con->data;
+
+ uart_console_write(&dev->port, s, n, mvebu_uart_putc);
+}
+
+static int __init
+mvebu_uart_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ if (!device->port.membase)
+ return -ENODEV;
+
+ device->con->write = mvebu_uart_putc_early_write;
+
+ return 0;
+}
+
+EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
+OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
+ mvebu_uart_early_console_setup);
+
+static void wait_for_xmitr(struct uart_port *port)
+{
+ u32 val;
+
+ readl_poll_timeout_atomic(port->membase + UART_STAT, val,
+ (val & STAT_TX_EMP), 1, 10000);
+}
+
+static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
+{
+ wait_for_xmitr(port);
+ writel(ch, port->membase + UART_TSH);
+}
+
+static void mvebu_uart_console_write(struct console *co, const char *s,
+ unsigned int count)
+{
+ struct uart_port *port = &mvebu_uart_ports[co->index];
+ unsigned long flags;
+ unsigned int ier;
+ int locked = 1;
+
+ if (oops_in_progress)
+ locked = spin_trylock_irqsave(&port->lock, flags);
+ else
+ spin_lock_irqsave(&port->lock, flags);
+
+ ier = readl(port->membase + UART_CTRL) &
+ (CTRL_RX_INT | CTRL_TX_RDY_INT);
+ writel(0, port->membase + UART_CTRL);
+
+ uart_console_write(port, s, count, mvebu_uart_console_putchar);
+
+ wait_for_xmitr(port);
+
+ if (ier)
+ writel(ier, port->membase + UART_CTRL);
+
+ if (locked)
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static int mvebu_uart_console_setup(struct console *co, char *options)
+{
+ struct uart_port *port;
+ int baud = 9600;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
+ return -EINVAL;
+
+ port = &mvebu_uart_ports[co->index];
+
+ if (!port->mapbase || !port->membase) {
+ pr_debug("console on ttyMV%i not present\n", co->index);
+ return -ENODEV;
+ }
+
+ if (options)
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+ return uart_set_options(port, co, baud, parity, bits, flow);
+}
+
+static struct uart_driver mvebu_uart_driver;
+
+static struct console mvebu_uart_console = {
+ .name = "ttyMV",
+ .write = mvebu_uart_console_write,
+ .device = uart_console_device,
+ .setup = mvebu_uart_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &mvebu_uart_driver,
+};
+
+static int __init mvebu_uart_console_init(void)
+{
+ register_console(&mvebu_uart_console);
+ return 0;
+}
+
+console_initcall(mvebu_uart_console_init);
+
+
+#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
+
+static struct uart_driver mvebu_uart_driver = {
+ .owner = THIS_MODULE,
+ .driver_name = "mvebu_serial",
+ .dev_name = "ttyMV",
+ .nr = MVEBU_NR_UARTS,
+#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
+ .cons = &mvebu_uart_console,
+#endif
+};
+
+static int mvebu_uart_probe(struct platform_device *pdev)
+{
+ struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct uart_port *port;
+ struct mvebu_uart_data *data;
+ int ret;
+
+ if (!reg || !irq) {
+ dev_err(&pdev->dev, "no registers/irq defined\n");
+ return -EINVAL;
+ }
+
+ port = &mvebu_uart_ports[0];
+
+ spin_lock_init(&port->lock);
+
+ port->dev = &pdev->dev;
+ port->type = PORT_MVEBU;
+ port->ops = &mvebu_uart_ops;
+ port->regshift = 0;
+
+ port->fifosize = 32;
+ port->iotype = UPIO_MEM32;
+ port->flags = UPF_FIXED_PORT;
+ port->line = 0; /* single port: force line number to 0 */
+
+ port->irq = irq->start;
+ port->irqflags = 0;
+ port->mapbase = reg->start;
+
+ port->membase = devm_ioremap_resource(&pdev->dev, reg);
+ if (IS_ERR(port->membase))
+ return -PTR_ERR(port->membase);
+
+ data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->port = port;
+
+ port->private_data = data;
+ platform_set_drvdata(pdev, data);
+
+ ret = uart_add_one_port(&mvebu_uart_driver, port);
+ if (ret)
+ return ret;
+ return 0;
+}
+
+static int mvebu_uart_remove(struct platform_device *pdev)
+{
+ struct mvebu_uart_data *data = platform_get_drvdata(pdev);
+
+ uart_remove_one_port(&mvebu_uart_driver, data->port);
+ data->port->private_data = NULL;
+ data->port->mapbase = 0;
+ return 0;
+}
+
+/* Match table for of_platform binding */
+static const struct of_device_id mvebu_uart_of_match[] = {
+ { .compatible = "marvell,armada-3700-uart", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
+
+static struct platform_driver mvebu_uart_platform_driver = {
+ .probe = mvebu_uart_probe,
+ .remove = mvebu_uart_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "mvebu-uart",
+ .of_match_table = of_match_ptr(mvebu_uart_of_match),
+ },
+};
+
+static int __init mvebu_uart_init(void)
+{
+ int ret;
+
+ ret = uart_register_driver(&mvebu_uart_driver);
+ if (ret)
+ return ret;
+
+ ret = platform_driver_register(&mvebu_uart_platform_driver);
+ if (ret)
+ uart_unregister_driver(&mvebu_uart_driver);
+
+ return ret;
+}
+
+static void __exit mvebu_uart_exit(void)
+{
+ platform_driver_unregister(&mvebu_uart_platform_driver);
+ uart_unregister_driver(&mvebu_uart_driver);
+}
+
+arch_initcall(mvebu_uart_init);
+module_exit(mvebu_uart_exit);
+
+MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
+MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
+MODULE_LICENSE("GPL");
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 3e5d757407fb..e513a4ee369b 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -261,4 +261,7 @@
/* STM32 USART */
#define PORT_STM32 113
+/* MVEBU UART */
+#define PORT_MVEBU 114
+
#endif /* _UAPILINUX_SERIAL_CORE_H */
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach, Wilson Ding
From: Wilson Ding <dingwei@marvell.com>
Armada-3700's uart is a simple serial port, which doesn't
support. Configuring the modem control lines. The uart port has a 32
bytes Tx FIFO and a 64 bytes Rx FIFO
The uart driver implements the uart core operations. It also support the
system (early) console based on Armada-3700's serial port.
Known Issue:
The uart driver currently doesn't support clock programming, which means
the baud-rate stays with the default value configured by the bootloader
at boot time
[gregory.clement@free-electrons.com: Rewrite many part which are too long
to enumerate]
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt | 6 +
drivers/tty/serial/Kconfig | 22 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
6 files changed, 695 insertions(+)
create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
create mode 100644 drivers/tty/serial/mvebu-uart.c
diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
new file mode 100644
index 000000000000..6087defd9f93
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
@@ -0,0 +1,13 @@
+* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
+
+Required properties:
+- compatible: "marvell,armada-3700-uart"
+- reg: offset and length of the register set for the device.
+- interrupts: device interrupt
+
+Example:
+ serial@12000 {
+ compatible = "marvell,armada-3700-uart";
+ reg = <0x12000 0x400>;
+ interrupts = <43>;
+ };
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 87d40a72f6a1..ea0aba48d616 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
A valid base address must be provided, and the serial
port must already be setup and configured.
+ armada3700_uart,<addr>
+ Start an early, polled-mode console on the
+ Armada 3700 serial port at the specified
+ address. The serial port must already be setup
+ and configured. Options are not yet supported.
+
earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
earlyprintk=vga
earlyprintk=efi
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 39721ec4f415..b291f934d51b 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
depends on SERIAL_STM32=y
select SERIAL_CORE_CONSOLE
+config SERIAL_MVEBU_UART
+ bool "Marvell EBU serial port support"
+ select SERIAL_CORE
+ help
+ This driver is for Marvell EBU SoC's UART. If you have a machine
+ based on the Armada-3700 SoC and wish to use the on-board serial
+ port,
+ say 'Y' here.
+ Otherwise, say 'N'.
+
+config SERIAL_MVEBU_CONSOLE
+ bool "Console on Marvell EBU serial port"
+ depends on SERIAL_MVEBU_UART
+ select SERIAL_CORE_CONSOLE
+ select SERIAL_EARLYCON
+ default y
+ help
+ Say 'Y' here if you wish to use Armada-3700 UART as the system console.
+ (the system console is the device which receives all kernel messages
+ and warnings and which allows logins in single user mode)
+ Otherwise, say 'N'.
+
endmenu
config SERIAL_MCTRL_GPIO
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index b391c9b31960..988167595330 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
+obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
# GPIOLIB helpers for modem control lines
obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
new file mode 100644
index 000000000000..0ff27818bb87
--- /dev/null
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -0,0 +1,650 @@
+/*
+* ***************************************************************************
+* Copyright (C) 2015 Marvell International Ltd.
+* ***************************************************************************
+* This program is free software: you can redistribute it and/or modify it
+* under the terms of the GNU General Public License as published by the Free
+* Software Foundation, either version 2 of the License, or any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program. If not, see <http://www.gnu.org/licenses/>.
+* ***************************************************************************
+*/
+
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+
+/* Register Map */
+#define UART_RBR 0x00
+#define RBR_BRK_DET BIT(15)
+#define RBR_FRM_ERR_DET BIT(14)
+#define RBR_PAR_ERR_DET BIT(13)
+#define RBR_OVR_ERR_DET BIT(12)
+
+#define UART_TSH 0x04
+
+#define UART_CTRL 0x08
+#define CTRL_SOFT_RST BIT(31)
+#define CTRL_TXFIFO_RST BIT(15)
+#define CTRL_RXFIFO_RST BIT(14)
+#define CTRL_ST_MIRR_EN BIT(13)
+#define CTRL_LPBK_EN BIT(12)
+#define CTRL_SND_BRK_SEQ BIT(11)
+#define CTRL_PAR_EN BIT(10)
+#define CTRL_TWO_STOP BIT(9)
+#define CTRL_TX_HFL_INT BIT(8)
+#define CTRL_RX_HFL_INT BIT(7)
+#define CTRL_TX_EMP_INT BIT(6)
+#define CTRL_TX_RDY_INT BIT(5)
+#define CTRL_RX_RDY_INT BIT(4)
+#define CTRL_BRK_DET_INT BIT(3)
+#define CTRL_FRM_ERR_INT BIT(2)
+#define CTRL_PAR_ERR_INT BIT(1)
+#define CTRL_OVR_ERR_INT BIT(0)
+#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
+ CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
+
+#define UART_STAT 0x0c
+#define STAT_TX_FIFO_EMP BIT(13)
+#define STAT_RX_FIFO_EMP BIT(12)
+#define STAT_TX_FIFO_FUL BIT(11)
+#define STAT_TX_FIFO_HFL BIT(10)
+#define STAT_RX_TOGL BIT(9)
+#define STAT_RX_FIFO_FUL BIT(8)
+#define STAT_RX_FIFO_HFL BIT(7)
+#define STAT_TX_EMP BIT(6)
+#define STAT_TX_RDY BIT(5)
+#define STAT_RX_RDY BIT(4)
+#define STAT_BRK_DET BIT(3)
+#define STAT_FRM_ERR BIT(2)
+#define STAT_PAR_ERR BIT(1)
+#define STAT_OVR_ERR BIT(0)
+#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
+ | STAT_PAR_ERR | STAT_OVR_ERR)
+
+#define UART_BRDV 0x10
+
+#define MVEBU_NR_UARTS 1
+
+#define MVEBU_UART_TYPE "mvebu-uart"
+
+static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
+
+struct mvebu_uart_data {
+ struct uart_port *port;
+ struct clk *clk;
+};
+
+/* Core UART Driver Operations */
+static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
+{
+ unsigned long flags;
+ unsigned int st;
+
+ spin_lock_irqsave(&port->lock, flags);
+ st = readl(port->membase + UART_STAT);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
+}
+
+static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
+{
+ return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+}
+
+static void mvebu_uart_set_mctrl(struct uart_port *port,
+ unsigned int mctrl)
+{
+/*
+ * Even if we do not support configuring the modem control lines, this
+ * function must be proided to the serial core
+ */
+}
+
+static void mvebu_uart_stop_tx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl &= ~CTRL_TX_RDY_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_start_tx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl |= CTRL_TX_RDY_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_stop_rx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl &= ~CTRL_RX_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
+{
+ unsigned int ctl;
+ unsigned long flags;
+
+ spin_lock_irqsave(&port->lock, flags);
+ ctl = readl(port->membase + UART_CTRL);
+ if (brk == -1)
+ ctl |= CTRL_SND_BRK_SEQ;
+ else
+ ctl &= ~CTRL_SND_BRK_SEQ;
+ writel(ctl, port->membase + UART_CTRL);
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
+{
+ struct tty_port *tport = &port->state->port;
+ unsigned char ch = 0;
+ char flag = 0;
+
+ do {
+ if (status & STAT_RX_RDY) {
+ ch = readl(port->membase + UART_RBR);
+ ch &= 0xff;
+ flag = TTY_NORMAL;
+ port->icount.rx++;
+
+ if (status & STAT_PAR_ERR)
+ port->icount.parity++;
+ }
+
+ if (status & STAT_BRK_DET) {
+ port->icount.brk++;
+ status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
+ if (uart_handle_break(port))
+ goto ignore_char;
+ }
+
+ if (status & STAT_OVR_ERR)
+ port->icount.overrun++;
+
+ if (status & STAT_FRM_ERR)
+ port->icount.frame++;
+
+ if (uart_handle_sysrq_char(port, ch))
+ goto ignore_char;
+
+ if (status & port->ignore_status_mask & STAT_PAR_ERR)
+ status &= ~STAT_RX_RDY;
+
+ status &= port->read_status_mask;
+
+ if (status & STAT_PAR_ERR)
+ flag = TTY_PARITY;
+
+ status &= ~port->ignore_status_mask;
+
+ if (status & STAT_RX_RDY)
+ tty_insert_flip_char(tport, ch, flag);
+
+ if (status & STAT_BRK_DET)
+ tty_insert_flip_char(tport, 0, TTY_BREAK);
+
+ if (status & STAT_FRM_ERR)
+ tty_insert_flip_char(tport, 0, TTY_FRAME);
+
+ if (status & STAT_OVR_ERR)
+ tty_insert_flip_char(tport, 0, TTY_OVERRUN);
+
+ignore_char:
+ status = readl(port->membase + UART_STAT);
+ } while (status & (STAT_RX_RDY | STAT_BRK_DET));
+
+ tty_flip_buffer_push(tport);
+}
+
+static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
+{
+ struct circ_buf *xmit = &port->state->xmit;
+ unsigned int count;
+ unsigned int st;
+
+ if (port->x_char) {
+ writel(port->x_char, port->membase + UART_TSH);
+ port->icount.tx++;
+ port->x_char = 0;
+ return;
+ }
+
+ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+ mvebu_uart_stop_tx(port);
+ return;
+ }
+
+ for (count = 0; count < port->fifosize; count++) {
+ writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ port->icount.tx++;
+
+ if (uart_circ_empty(xmit))
+ break;
+
+ st = readl(port->membase + UART_STAT);
+ if (st & STAT_TX_FIFO_FUL)
+ break;
+ }
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(port);
+
+ if (uart_circ_empty(xmit))
+ mvebu_uart_stop_tx(port);
+}
+
+static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
+{
+ struct uart_port *port = (struct uart_port *)dev_id;
+ unsigned int st = readl(port->membase + UART_STAT);
+
+ if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
+ mvebu_uart_rx_chars(port, st);
+
+ if (st & STAT_TX_RDY)
+ mvebu_uart_tx_chars(port, st);
+
+ return IRQ_HANDLED;
+}
+
+static int mvebu_uart_startup(struct uart_port *port)
+{
+ int ret;
+
+ writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
+ port->membase + UART_CTRL);
+ udelay(1);
+ writel(CTRL_RX_INT, port->membase + UART_CTRL);
+
+ ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
+ port);
+ if (ret) {
+ dev_err(port->dev, "failed to request irq\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static void mvebu_uart_shutdown(struct uart_port *port)
+{
+ writel(0, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_set_termios(struct uart_port *port,
+ struct ktermios *termios,
+ struct ktermios *old)
+{
+ unsigned long flags;
+ unsigned int baud;
+
+ spin_lock_irqsave(&port->lock, flags);
+
+ port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
+ STAT_TX_RDY | STAT_TX_FIFO_FUL;
+
+ if (termios->c_iflag & INPCK)
+ port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
+
+ port->ignore_status_mask = 0;
+ if (termios->c_iflag & IGNPAR)
+ port->ignore_status_mask |=
+ STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
+
+ if ((termios->c_cflag & CREAD) == 0)
+ port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
+
+ if (old)
+ tty_termios_copy_hw(termios, old);
+
+ baud = uart_get_baud_rate(port, termios, old, 0, 460800);
+ uart_update_timeout(port, termios->c_cflag, baud);
+
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static const char *mvebu_uart_type(struct uart_port *port)
+{
+ return MVEBU_UART_TYPE;
+}
+
+static void mvebu_uart_release_port(struct uart_port *port)
+{
+ /* Nothing to do here */
+}
+
+static int mvebu_uart_request_port(struct uart_port *port)
+{
+ return 0;
+}
+
+#ifdef CONFIG_CONSOLE_POLL
+static int mvebu_uart_get_poll_char(struct uart_port *port)
+{
+ unsigned int st = readl(port->membase + UART_STAT);
+
+ if (!(st & STAT_RX_RDY))
+ return NO_POLL_CHAR;
+
+ return readl(port->membase + UART_RBR);
+}
+
+static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
+{
+ unsigned int st;
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+
+ if (!(st & STAT_TX_FIFO_FUL))
+ break;
+
+ udelay(1);
+ }
+
+ writel(c, port->membase + UART_TSH);
+}
+#endif
+
+static const struct uart_ops mvebu_uart_ops = {
+ .tx_empty = mvebu_uart_tx_empty,
+ .set_mctrl = mvebu_uart_set_mctrl,
+ .get_mctrl = mvebu_uart_get_mctrl,
+ .stop_tx = mvebu_uart_stop_tx,
+ .start_tx = mvebu_uart_start_tx,
+ .stop_rx = mvebu_uart_stop_rx,
+ .break_ctl = mvebu_uart_break_ctl,
+ .startup = mvebu_uart_startup,
+ .shutdown = mvebu_uart_shutdown,
+ .set_termios = mvebu_uart_set_termios,
+ .type = mvebu_uart_type,
+ .release_port = mvebu_uart_release_port,
+ .request_port = mvebu_uart_request_port,
+#ifdef CONFIG_CONSOLE_POLL
+ .poll_get_char = mvebu_uart_get_poll_char,
+ .poll_put_char = mvebu_uart_put_poll_char,
+#endif
+};
+
+/* Console Driver Operations */
+
+#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
+/* Early Console */
+static void mvebu_uart_putc(struct uart_port *port, int c)
+{
+ unsigned int st;
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+ if (!(st & STAT_TX_FIFO_FUL))
+ break;
+ }
+
+ writel(c, port->membase + UART_TSH);
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+ if (st & STAT_TX_FIFO_EMP)
+ break;
+ }
+}
+
+static void mvebu_uart_putc_early_write(struct console *con,
+ const char *s,
+ unsigned n)
+{
+ struct earlycon_device *dev = con->data;
+
+ uart_console_write(&dev->port, s, n, mvebu_uart_putc);
+}
+
+static int __init
+mvebu_uart_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ if (!device->port.membase)
+ return -ENODEV;
+
+ device->con->write = mvebu_uart_putc_early_write;
+
+ return 0;
+}
+
+EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
+OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
+ mvebu_uart_early_console_setup);
+
+static void wait_for_xmitr(struct uart_port *port)
+{
+ u32 val;
+
+ readl_poll_timeout_atomic(port->membase + UART_STAT, val,
+ (val & STAT_TX_EMP), 1, 10000);
+}
+
+static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
+{
+ wait_for_xmitr(port);
+ writel(ch, port->membase + UART_TSH);
+}
+
+static void mvebu_uart_console_write(struct console *co, const char *s,
+ unsigned int count)
+{
+ struct uart_port *port = &mvebu_uart_ports[co->index];
+ unsigned long flags;
+ unsigned int ier;
+ int locked = 1;
+
+ if (oops_in_progress)
+ locked = spin_trylock_irqsave(&port->lock, flags);
+ else
+ spin_lock_irqsave(&port->lock, flags);
+
+ ier = readl(port->membase + UART_CTRL) &
+ (CTRL_RX_INT | CTRL_TX_RDY_INT);
+ writel(0, port->membase + UART_CTRL);
+
+ uart_console_write(port, s, count, mvebu_uart_console_putchar);
+
+ wait_for_xmitr(port);
+
+ if (ier)
+ writel(ier, port->membase + UART_CTRL);
+
+ if (locked)
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static int mvebu_uart_console_setup(struct console *co, char *options)
+{
+ struct uart_port *port;
+ int baud = 9600;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
+ return -EINVAL;
+
+ port = &mvebu_uart_ports[co->index];
+
+ if (!port->mapbase || !port->membase) {
+ pr_debug("console on ttyMV%i not present\n", co->index);
+ return -ENODEV;
+ }
+
+ if (options)
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+ return uart_set_options(port, co, baud, parity, bits, flow);
+}
+
+static struct uart_driver mvebu_uart_driver;
+
+static struct console mvebu_uart_console = {
+ .name = "ttyMV",
+ .write = mvebu_uart_console_write,
+ .device = uart_console_device,
+ .setup = mvebu_uart_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &mvebu_uart_driver,
+};
+
+static int __init mvebu_uart_console_init(void)
+{
+ register_console(&mvebu_uart_console);
+ return 0;
+}
+
+console_initcall(mvebu_uart_console_init);
+
+
+#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
+
+static struct uart_driver mvebu_uart_driver = {
+ .owner = THIS_MODULE,
+ .driver_name = "mvebu_serial",
+ .dev_name = "ttyMV",
+ .nr = MVEBU_NR_UARTS,
+#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
+ .cons = &mvebu_uart_console,
+#endif
+};
+
+static int mvebu_uart_probe(struct platform_device *pdev)
+{
+ struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct uart_port *port;
+ struct mvebu_uart_data *data;
+ int ret;
+
+ if (!reg || !irq) {
+ dev_err(&pdev->dev, "no registers/irq defined\n");
+ return -EINVAL;
+ }
+
+ port = &mvebu_uart_ports[0];
+
+ spin_lock_init(&port->lock);
+
+ port->dev = &pdev->dev;
+ port->type = PORT_MVEBU;
+ port->ops = &mvebu_uart_ops;
+ port->regshift = 0;
+
+ port->fifosize = 32;
+ port->iotype = UPIO_MEM32;
+ port->flags = UPF_FIXED_PORT;
+ port->line = 0; /* single port: force line number to 0 */
+
+ port->irq = irq->start;
+ port->irqflags = 0;
+ port->mapbase = reg->start;
+
+ port->membase = devm_ioremap_resource(&pdev->dev, reg);
+ if (IS_ERR(port->membase))
+ return -PTR_ERR(port->membase);
+
+ data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->port = port;
+
+ port->private_data = data;
+ platform_set_drvdata(pdev, data);
+
+ ret = uart_add_one_port(&mvebu_uart_driver, port);
+ if (ret)
+ return ret;
+ return 0;
+}
+
+static int mvebu_uart_remove(struct platform_device *pdev)
+{
+ struct mvebu_uart_data *data = platform_get_drvdata(pdev);
+
+ uart_remove_one_port(&mvebu_uart_driver, data->port);
+ data->port->private_data = NULL;
+ data->port->mapbase = 0;
+ return 0;
+}
+
+/* Match table for of_platform binding */
+static const struct of_device_id mvebu_uart_of_match[] = {
+ { .compatible = "marvell,armada-3700-uart", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
+
+static struct platform_driver mvebu_uart_platform_driver = {
+ .probe = mvebu_uart_probe,
+ .remove = mvebu_uart_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "mvebu-uart",
+ .of_match_table = of_match_ptr(mvebu_uart_of_match),
+ },
+};
+
+static int __init mvebu_uart_init(void)
+{
+ int ret;
+
+ ret = uart_register_driver(&mvebu_uart_driver);
+ if (ret)
+ return ret;
+
+ ret = platform_driver_register(&mvebu_uart_platform_driver);
+ if (ret)
+ uart_unregister_driver(&mvebu_uart_driver);
+
+ return ret;
+}
+
+static void __exit mvebu_uart_exit(void)
+{
+ platform_driver_unregister(&mvebu_uart_platform_driver);
+ uart_unregister_driver(&mvebu_uart_driver);
+}
+
+arch_initcall(mvebu_uart_init);
+module_exit(mvebu_uart_exit);
+
+MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
+MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
+MODULE_LICENSE("GPL");
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 3e5d757407fb..e513a4ee369b 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -261,4 +261,7 @@
/* STM32 USART */
#define PORT_STM32 113
+/* MVEBU UART */
+#define PORT_MVEBU 114
+
#endif /* _UAPILINUX_SERIAL_CORE_H */
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Wilson Ding <dingwei@marvell.com>
Armada-3700's uart is a simple serial port, which doesn't
support. Configuring the modem control lines. The uart port has a 32
bytes Tx FIFO and a 64 bytes Rx FIFO
The uart driver implements the uart core operations. It also support the
system (early) console based on Armada-3700's serial port.
Known Issue:
The uart driver currently doesn't support clock programming, which means
the baud-rate stays with the default value configured by the bootloader
at boot time
[gregory.clement at free-electrons.com: Rewrite many part which are too long
to enumerate]
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt | 6 +
drivers/tty/serial/Kconfig | 22 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
6 files changed, 695 insertions(+)
create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
create mode 100644 drivers/tty/serial/mvebu-uart.c
diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
new file mode 100644
index 000000000000..6087defd9f93
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
@@ -0,0 +1,13 @@
+* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
+
+Required properties:
+- compatible: "marvell,armada-3700-uart"
+- reg: offset and length of the register set for the device.
+- interrupts: device interrupt
+
+Example:
+ serial at 12000 {
+ compatible = "marvell,armada-3700-uart";
+ reg = <0x12000 0x400>;
+ interrupts = <43>;
+ };
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 87d40a72f6a1..ea0aba48d616 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
A valid base address must be provided, and the serial
port must already be setup and configured.
+ armada3700_uart,<addr>
+ Start an early, polled-mode console on the
+ Armada 3700 serial port at the specified
+ address. The serial port must already be setup
+ and configured. Options are not yet supported.
+
earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
earlyprintk=vga
earlyprintk=efi
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 39721ec4f415..b291f934d51b 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
depends on SERIAL_STM32=y
select SERIAL_CORE_CONSOLE
+config SERIAL_MVEBU_UART
+ bool "Marvell EBU serial port support"
+ select SERIAL_CORE
+ help
+ This driver is for Marvell EBU SoC's UART. If you have a machine
+ based on the Armada-3700 SoC and wish to use the on-board serial
+ port,
+ say 'Y' here.
+ Otherwise, say 'N'.
+
+config SERIAL_MVEBU_CONSOLE
+ bool "Console on Marvell EBU serial port"
+ depends on SERIAL_MVEBU_UART
+ select SERIAL_CORE_CONSOLE
+ select SERIAL_EARLYCON
+ default y
+ help
+ Say 'Y' here if you wish to use Armada-3700 UART as the system console.
+ (the system console is the device which receives all kernel messages
+ and warnings and which allows logins in single user mode)
+ Otherwise, say 'N'.
+
endmenu
config SERIAL_MCTRL_GPIO
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index b391c9b31960..988167595330 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
+obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
# GPIOLIB helpers for modem control lines
obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
new file mode 100644
index 000000000000..0ff27818bb87
--- /dev/null
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -0,0 +1,650 @@
+/*
+* ***************************************************************************
+* Copyright (C) 2015 Marvell International Ltd.
+* ***************************************************************************
+* This program is free software: you can redistribute it and/or modify it
+* under the terms of the GNU General Public License as published by the Free
+* Software Foundation, either version 2 of the License, or any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program. If not, see <http://www.gnu.org/licenses/>.
+* ***************************************************************************
+*/
+
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+
+/* Register Map */
+#define UART_RBR 0x00
+#define RBR_BRK_DET BIT(15)
+#define RBR_FRM_ERR_DET BIT(14)
+#define RBR_PAR_ERR_DET BIT(13)
+#define RBR_OVR_ERR_DET BIT(12)
+
+#define UART_TSH 0x04
+
+#define UART_CTRL 0x08
+#define CTRL_SOFT_RST BIT(31)
+#define CTRL_TXFIFO_RST BIT(15)
+#define CTRL_RXFIFO_RST BIT(14)
+#define CTRL_ST_MIRR_EN BIT(13)
+#define CTRL_LPBK_EN BIT(12)
+#define CTRL_SND_BRK_SEQ BIT(11)
+#define CTRL_PAR_EN BIT(10)
+#define CTRL_TWO_STOP BIT(9)
+#define CTRL_TX_HFL_INT BIT(8)
+#define CTRL_RX_HFL_INT BIT(7)
+#define CTRL_TX_EMP_INT BIT(6)
+#define CTRL_TX_RDY_INT BIT(5)
+#define CTRL_RX_RDY_INT BIT(4)
+#define CTRL_BRK_DET_INT BIT(3)
+#define CTRL_FRM_ERR_INT BIT(2)
+#define CTRL_PAR_ERR_INT BIT(1)
+#define CTRL_OVR_ERR_INT BIT(0)
+#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
+ CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
+
+#define UART_STAT 0x0c
+#define STAT_TX_FIFO_EMP BIT(13)
+#define STAT_RX_FIFO_EMP BIT(12)
+#define STAT_TX_FIFO_FUL BIT(11)
+#define STAT_TX_FIFO_HFL BIT(10)
+#define STAT_RX_TOGL BIT(9)
+#define STAT_RX_FIFO_FUL BIT(8)
+#define STAT_RX_FIFO_HFL BIT(7)
+#define STAT_TX_EMP BIT(6)
+#define STAT_TX_RDY BIT(5)
+#define STAT_RX_RDY BIT(4)
+#define STAT_BRK_DET BIT(3)
+#define STAT_FRM_ERR BIT(2)
+#define STAT_PAR_ERR BIT(1)
+#define STAT_OVR_ERR BIT(0)
+#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
+ | STAT_PAR_ERR | STAT_OVR_ERR)
+
+#define UART_BRDV 0x10
+
+#define MVEBU_NR_UARTS 1
+
+#define MVEBU_UART_TYPE "mvebu-uart"
+
+static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
+
+struct mvebu_uart_data {
+ struct uart_port *port;
+ struct clk *clk;
+};
+
+/* Core UART Driver Operations */
+static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
+{
+ unsigned long flags;
+ unsigned int st;
+
+ spin_lock_irqsave(&port->lock, flags);
+ st = readl(port->membase + UART_STAT);
+ spin_unlock_irqrestore(&port->lock, flags);
+
+ return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
+}
+
+static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
+{
+ return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+}
+
+static void mvebu_uart_set_mctrl(struct uart_port *port,
+ unsigned int mctrl)
+{
+/*
+ * Even if we do not support configuring the modem control lines, this
+ * function must be proided to the serial core
+ */
+}
+
+static void mvebu_uart_stop_tx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl &= ~CTRL_TX_RDY_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_start_tx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl |= CTRL_TX_RDY_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_stop_rx(struct uart_port *port)
+{
+ unsigned int ctl = readl(port->membase + UART_CTRL);
+
+ ctl &= ~CTRL_RX_INT;
+ writel(ctl, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
+{
+ unsigned int ctl;
+ unsigned long flags;
+
+ spin_lock_irqsave(&port->lock, flags);
+ ctl = readl(port->membase + UART_CTRL);
+ if (brk == -1)
+ ctl |= CTRL_SND_BRK_SEQ;
+ else
+ ctl &= ~CTRL_SND_BRK_SEQ;
+ writel(ctl, port->membase + UART_CTRL);
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
+{
+ struct tty_port *tport = &port->state->port;
+ unsigned char ch = 0;
+ char flag = 0;
+
+ do {
+ if (status & STAT_RX_RDY) {
+ ch = readl(port->membase + UART_RBR);
+ ch &= 0xff;
+ flag = TTY_NORMAL;
+ port->icount.rx++;
+
+ if (status & STAT_PAR_ERR)
+ port->icount.parity++;
+ }
+
+ if (status & STAT_BRK_DET) {
+ port->icount.brk++;
+ status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
+ if (uart_handle_break(port))
+ goto ignore_char;
+ }
+
+ if (status & STAT_OVR_ERR)
+ port->icount.overrun++;
+
+ if (status & STAT_FRM_ERR)
+ port->icount.frame++;
+
+ if (uart_handle_sysrq_char(port, ch))
+ goto ignore_char;
+
+ if (status & port->ignore_status_mask & STAT_PAR_ERR)
+ status &= ~STAT_RX_RDY;
+
+ status &= port->read_status_mask;
+
+ if (status & STAT_PAR_ERR)
+ flag = TTY_PARITY;
+
+ status &= ~port->ignore_status_mask;
+
+ if (status & STAT_RX_RDY)
+ tty_insert_flip_char(tport, ch, flag);
+
+ if (status & STAT_BRK_DET)
+ tty_insert_flip_char(tport, 0, TTY_BREAK);
+
+ if (status & STAT_FRM_ERR)
+ tty_insert_flip_char(tport, 0, TTY_FRAME);
+
+ if (status & STAT_OVR_ERR)
+ tty_insert_flip_char(tport, 0, TTY_OVERRUN);
+
+ignore_char:
+ status = readl(port->membase + UART_STAT);
+ } while (status & (STAT_RX_RDY | STAT_BRK_DET));
+
+ tty_flip_buffer_push(tport);
+}
+
+static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
+{
+ struct circ_buf *xmit = &port->state->xmit;
+ unsigned int count;
+ unsigned int st;
+
+ if (port->x_char) {
+ writel(port->x_char, port->membase + UART_TSH);
+ port->icount.tx++;
+ port->x_char = 0;
+ return;
+ }
+
+ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+ mvebu_uart_stop_tx(port);
+ return;
+ }
+
+ for (count = 0; count < port->fifosize; count++) {
+ writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ port->icount.tx++;
+
+ if (uart_circ_empty(xmit))
+ break;
+
+ st = readl(port->membase + UART_STAT);
+ if (st & STAT_TX_FIFO_FUL)
+ break;
+ }
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(port);
+
+ if (uart_circ_empty(xmit))
+ mvebu_uart_stop_tx(port);
+}
+
+static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
+{
+ struct uart_port *port = (struct uart_port *)dev_id;
+ unsigned int st = readl(port->membase + UART_STAT);
+
+ if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
+ mvebu_uart_rx_chars(port, st);
+
+ if (st & STAT_TX_RDY)
+ mvebu_uart_tx_chars(port, st);
+
+ return IRQ_HANDLED;
+}
+
+static int mvebu_uart_startup(struct uart_port *port)
+{
+ int ret;
+
+ writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
+ port->membase + UART_CTRL);
+ udelay(1);
+ writel(CTRL_RX_INT, port->membase + UART_CTRL);
+
+ ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
+ port);
+ if (ret) {
+ dev_err(port->dev, "failed to request irq\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static void mvebu_uart_shutdown(struct uart_port *port)
+{
+ writel(0, port->membase + UART_CTRL);
+}
+
+static void mvebu_uart_set_termios(struct uart_port *port,
+ struct ktermios *termios,
+ struct ktermios *old)
+{
+ unsigned long flags;
+ unsigned int baud;
+
+ spin_lock_irqsave(&port->lock, flags);
+
+ port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
+ STAT_TX_RDY | STAT_TX_FIFO_FUL;
+
+ if (termios->c_iflag & INPCK)
+ port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
+
+ port->ignore_status_mask = 0;
+ if (termios->c_iflag & IGNPAR)
+ port->ignore_status_mask |=
+ STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
+
+ if ((termios->c_cflag & CREAD) == 0)
+ port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
+
+ if (old)
+ tty_termios_copy_hw(termios, old);
+
+ baud = uart_get_baud_rate(port, termios, old, 0, 460800);
+ uart_update_timeout(port, termios->c_cflag, baud);
+
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static const char *mvebu_uart_type(struct uart_port *port)
+{
+ return MVEBU_UART_TYPE;
+}
+
+static void mvebu_uart_release_port(struct uart_port *port)
+{
+ /* Nothing to do here */
+}
+
+static int mvebu_uart_request_port(struct uart_port *port)
+{
+ return 0;
+}
+
+#ifdef CONFIG_CONSOLE_POLL
+static int mvebu_uart_get_poll_char(struct uart_port *port)
+{
+ unsigned int st = readl(port->membase + UART_STAT);
+
+ if (!(st & STAT_RX_RDY))
+ return NO_POLL_CHAR;
+
+ return readl(port->membase + UART_RBR);
+}
+
+static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
+{
+ unsigned int st;
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+
+ if (!(st & STAT_TX_FIFO_FUL))
+ break;
+
+ udelay(1);
+ }
+
+ writel(c, port->membase + UART_TSH);
+}
+#endif
+
+static const struct uart_ops mvebu_uart_ops = {
+ .tx_empty = mvebu_uart_tx_empty,
+ .set_mctrl = mvebu_uart_set_mctrl,
+ .get_mctrl = mvebu_uart_get_mctrl,
+ .stop_tx = mvebu_uart_stop_tx,
+ .start_tx = mvebu_uart_start_tx,
+ .stop_rx = mvebu_uart_stop_rx,
+ .break_ctl = mvebu_uart_break_ctl,
+ .startup = mvebu_uart_startup,
+ .shutdown = mvebu_uart_shutdown,
+ .set_termios = mvebu_uart_set_termios,
+ .type = mvebu_uart_type,
+ .release_port = mvebu_uart_release_port,
+ .request_port = mvebu_uart_request_port,
+#ifdef CONFIG_CONSOLE_POLL
+ .poll_get_char = mvebu_uart_get_poll_char,
+ .poll_put_char = mvebu_uart_put_poll_char,
+#endif
+};
+
+/* Console Driver Operations */
+
+#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
+/* Early Console */
+static void mvebu_uart_putc(struct uart_port *port, int c)
+{
+ unsigned int st;
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+ if (!(st & STAT_TX_FIFO_FUL))
+ break;
+ }
+
+ writel(c, port->membase + UART_TSH);
+
+ for (;;) {
+ st = readl(port->membase + UART_STAT);
+ if (st & STAT_TX_FIFO_EMP)
+ break;
+ }
+}
+
+static void mvebu_uart_putc_early_write(struct console *con,
+ const char *s,
+ unsigned n)
+{
+ struct earlycon_device *dev = con->data;
+
+ uart_console_write(&dev->port, s, n, mvebu_uart_putc);
+}
+
+static int __init
+mvebu_uart_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ if (!device->port.membase)
+ return -ENODEV;
+
+ device->con->write = mvebu_uart_putc_early_write;
+
+ return 0;
+}
+
+EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
+OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
+ mvebu_uart_early_console_setup);
+
+static void wait_for_xmitr(struct uart_port *port)
+{
+ u32 val;
+
+ readl_poll_timeout_atomic(port->membase + UART_STAT, val,
+ (val & STAT_TX_EMP), 1, 10000);
+}
+
+static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
+{
+ wait_for_xmitr(port);
+ writel(ch, port->membase + UART_TSH);
+}
+
+static void mvebu_uart_console_write(struct console *co, const char *s,
+ unsigned int count)
+{
+ struct uart_port *port = &mvebu_uart_ports[co->index];
+ unsigned long flags;
+ unsigned int ier;
+ int locked = 1;
+
+ if (oops_in_progress)
+ locked = spin_trylock_irqsave(&port->lock, flags);
+ else
+ spin_lock_irqsave(&port->lock, flags);
+
+ ier = readl(port->membase + UART_CTRL) &
+ (CTRL_RX_INT | CTRL_TX_RDY_INT);
+ writel(0, port->membase + UART_CTRL);
+
+ uart_console_write(port, s, count, mvebu_uart_console_putchar);
+
+ wait_for_xmitr(port);
+
+ if (ier)
+ writel(ier, port->membase + UART_CTRL);
+
+ if (locked)
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static int mvebu_uart_console_setup(struct console *co, char *options)
+{
+ struct uart_port *port;
+ int baud = 9600;
+ int bits = 8;
+ int parity = 'n';
+ int flow = 'n';
+
+ if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
+ return -EINVAL;
+
+ port = &mvebu_uart_ports[co->index];
+
+ if (!port->mapbase || !port->membase) {
+ pr_debug("console on ttyMV%i not present\n", co->index);
+ return -ENODEV;
+ }
+
+ if (options)
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
+
+ return uart_set_options(port, co, baud, parity, bits, flow);
+}
+
+static struct uart_driver mvebu_uart_driver;
+
+static struct console mvebu_uart_console = {
+ .name = "ttyMV",
+ .write = mvebu_uart_console_write,
+ .device = uart_console_device,
+ .setup = mvebu_uart_console_setup,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+ .data = &mvebu_uart_driver,
+};
+
+static int __init mvebu_uart_console_init(void)
+{
+ register_console(&mvebu_uart_console);
+ return 0;
+}
+
+console_initcall(mvebu_uart_console_init);
+
+
+#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
+
+static struct uart_driver mvebu_uart_driver = {
+ .owner = THIS_MODULE,
+ .driver_name = "mvebu_serial",
+ .dev_name = "ttyMV",
+ .nr = MVEBU_NR_UARTS,
+#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
+ .cons = &mvebu_uart_console,
+#endif
+};
+
+static int mvebu_uart_probe(struct platform_device *pdev)
+{
+ struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct uart_port *port;
+ struct mvebu_uart_data *data;
+ int ret;
+
+ if (!reg || !irq) {
+ dev_err(&pdev->dev, "no registers/irq defined\n");
+ return -EINVAL;
+ }
+
+ port = &mvebu_uart_ports[0];
+
+ spin_lock_init(&port->lock);
+
+ port->dev = &pdev->dev;
+ port->type = PORT_MVEBU;
+ port->ops = &mvebu_uart_ops;
+ port->regshift = 0;
+
+ port->fifosize = 32;
+ port->iotype = UPIO_MEM32;
+ port->flags = UPF_FIXED_PORT;
+ port->line = 0; /* single port: force line number to 0 */
+
+ port->irq = irq->start;
+ port->irqflags = 0;
+ port->mapbase = reg->start;
+
+ port->membase = devm_ioremap_resource(&pdev->dev, reg);
+ if (IS_ERR(port->membase))
+ return -PTR_ERR(port->membase);
+
+ data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->port = port;
+
+ port->private_data = data;
+ platform_set_drvdata(pdev, data);
+
+ ret = uart_add_one_port(&mvebu_uart_driver, port);
+ if (ret)
+ return ret;
+ return 0;
+}
+
+static int mvebu_uart_remove(struct platform_device *pdev)
+{
+ struct mvebu_uart_data *data = platform_get_drvdata(pdev);
+
+ uart_remove_one_port(&mvebu_uart_driver, data->port);
+ data->port->private_data = NULL;
+ data->port->mapbase = 0;
+ return 0;
+}
+
+/* Match table for of_platform binding */
+static const struct of_device_id mvebu_uart_of_match[] = {
+ { .compatible = "marvell,armada-3700-uart", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
+
+static struct platform_driver mvebu_uart_platform_driver = {
+ .probe = mvebu_uart_probe,
+ .remove = mvebu_uart_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "mvebu-uart",
+ .of_match_table = of_match_ptr(mvebu_uart_of_match),
+ },
+};
+
+static int __init mvebu_uart_init(void)
+{
+ int ret;
+
+ ret = uart_register_driver(&mvebu_uart_driver);
+ if (ret)
+ return ret;
+
+ ret = platform_driver_register(&mvebu_uart_platform_driver);
+ if (ret)
+ uart_unregister_driver(&mvebu_uart_driver);
+
+ return ret;
+}
+
+static void __exit mvebu_uart_exit(void)
+{
+ platform_driver_unregister(&mvebu_uart_platform_driver);
+ uart_unregister_driver(&mvebu_uart_driver);
+}
+
+arch_initcall(mvebu_uart_init);
+module_exit(mvebu_uart_exit);
+
+MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
+MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
+MODULE_LICENSE("GPL");
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 3e5d757407fb..e513a4ee369b 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -261,4 +261,7 @@
/* STM32 USART */
#define PORT_STM32 113
+/* MVEBU UART */
+#define PORT_MVEBU 114
+
#endif /* _UAPILINUX_SERIAL_CORE_H */
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 04/12] ata: ahci_mvebu: add support for Armada 3700 variant
2016-02-16 18:14 ` Gregory CLEMENT
(?)
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Mark Rutland, devicetree, linux-ide, Greg Kroah-Hartman,
Omri Itach, linux-kernel, Nadav Haklai, Hans de Goede,
Lior Amsalem, linux-serial, Jiri Slaby, Tejun Heo,
Thomas Petazzoni, linux-arm-kernel
From: Lior Amsalem <alior@marvell.com>
The main difference in the new Armada 3700 is that no address
decoding needs to take place in the driver probe.
[gregory.clement@free-electrons.com: reformulate the commit log]
Signed-off-by: Lior Amsalem <alior@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Tested-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/ata/ahci_mvebu.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index f7a7fa81740e..de7128d81e9c 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -112,12 +112,15 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
if (rc)
return rc;
- dram = mv_mbus_dram_info();
- if (!dram)
- return -ENODEV;
+ if (of_device_is_compatible(pdev->dev.of_node,
+ "marvell,armada-380-ahci")) {
+ dram = mv_mbus_dram_info();
+ if (!dram)
+ return -ENODEV;
- ahci_mvebu_mbus_config(hpriv, dram);
- ahci_mvebu_regret_option(hpriv);
+ ahci_mvebu_mbus_config(hpriv, dram);
+ ahci_mvebu_regret_option(hpriv);
+ }
rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
&ahci_platform_sht);
@@ -133,6 +136,7 @@ disable_resources:
static const struct of_device_id ahci_mvebu_of_match[] = {
{ .compatible = "marvell,armada-380-ahci", },
+ { .compatible = "marvell,armada-3700-ahci", },
{ },
};
MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 04/12] ata: ahci_mvebu: add support for Armada 3700 variant
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
From: Lior Amsalem <alior@marvell.com>
The main difference in the new Armada 3700 is that no address
decoding needs to take place in the driver probe.
[gregory.clement@free-electrons.com: reformulate the commit log]
Signed-off-by: Lior Amsalem <alior@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Tested-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/ata/ahci_mvebu.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index f7a7fa81740e..de7128d81e9c 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -112,12 +112,15 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
if (rc)
return rc;
- dram = mv_mbus_dram_info();
- if (!dram)
- return -ENODEV;
+ if (of_device_is_compatible(pdev->dev.of_node,
+ "marvell,armada-380-ahci")) {
+ dram = mv_mbus_dram_info();
+ if (!dram)
+ return -ENODEV;
- ahci_mvebu_mbus_config(hpriv, dram);
- ahci_mvebu_regret_option(hpriv);
+ ahci_mvebu_mbus_config(hpriv, dram);
+ ahci_mvebu_regret_option(hpriv);
+ }
rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
&ahci_platform_sht);
@@ -133,6 +136,7 @@ disable_resources:
static const struct of_device_id ahci_mvebu_of_match[] = {
{ .compatible = "marvell,armada-380-ahci", },
+ { .compatible = "marvell,armada-3700-ahci", },
{ },
};
MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 04/12] ata: ahci_mvebu: add support for Armada 3700 variant
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Lior Amsalem <alior@marvell.com>
The main difference in the new Armada 3700 is that no address
decoding needs to take place in the driver probe.
[gregory.clement at free-electrons.com: reformulate the commit log]
Signed-off-by: Lior Amsalem <alior@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Tested-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/ata/ahci_mvebu.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index f7a7fa81740e..de7128d81e9c 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -112,12 +112,15 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
if (rc)
return rc;
- dram = mv_mbus_dram_info();
- if (!dram)
- return -ENODEV;
+ if (of_device_is_compatible(pdev->dev.of_node,
+ "marvell,armada-380-ahci")) {
+ dram = mv_mbus_dram_info();
+ if (!dram)
+ return -ENODEV;
- ahci_mvebu_mbus_config(hpriv, dram);
- ahci_mvebu_regret_option(hpriv);
+ ahci_mvebu_mbus_config(hpriv, dram);
+ ahci_mvebu_regret_option(hpriv);
+ }
rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
&ahci_platform_sht);
@@ -133,6 +136,7 @@ disable_resources:
static const struct of_device_id ahci_mvebu_of_match[] = {
{ .compatible = "marvell,armada-380-ahci", },
+ { .compatible = "marvell,armada-3700-ahci", },
{ },
};
MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 05/12] arm64: add mvebu architecture entry
2016-02-16 18:14 ` Gregory CLEMENT
(?)
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Mark Rutland, devicetree, linux-ide, Greg Kroah-Hartman,
Omri Itach, linux-kernel, Nadav Haklai, Hans de Goede,
Lior Amsalem, linux-serial, Jiri Slaby, Tejun Heo,
Thomas Petazzoni, linux-arm-kernel
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f674bde..85bec422d508 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -48,6 +48,12 @@ config ARCH_MEDIATEK
help
Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
+config ARCH_MVEBU
+ bool "Marvell EBU SoC Family"
+ help
+ This enables support for Marvell EBU family such as the
+ Armada 3700 SoC family.
+
config ARCH_QCOM
bool "Qualcomm Platforms"
select PINCTRL
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 05/12] arm64: add mvebu architecture entry
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f674bde..85bec422d508 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -48,6 +48,12 @@ config ARCH_MEDIATEK
help
Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
+config ARCH_MVEBU
+ bool "Marvell EBU SoC Family"
+ help
+ This enables support for Marvell EBU family such as the
+ Armada 3700 SoC family.
+
config ARCH_QCOM
bool "Qualcomm Platforms"
select PINCTRL
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 05/12] arm64: add mvebu architecture entry
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 21074f674bde..85bec422d508 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -48,6 +48,12 @@ config ARCH_MEDIATEK
help
Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
+config ARCH_MVEBU
+ bool "Marvell EBU SoC Family"
+ help
+ This enables support for Marvell EBU family such as the
+ Armada 3700 SoC family.
+
config ARCH_QCOM
bool "Qualcomm Platforms"
select PINCTRL
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 06/12] Documentation: dt-bindings: Add a new compatible for the Armada 3700
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index c2340eeeb97f..796e2c23e5df 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -13,6 +13,7 @@ Required properties:
- "hisilicon,hisi-ahci"
- "ibm,476gtr-ahci"
- "marvell,armada-380-ahci"
+ - "marvell,armada-3700-ahci"
- "snps,dwc-ahci"
- "snps,exynos5440-ahci"
- "snps,spear-ahci"
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 06/12] Documentation: dt-bindings: Add a new compatible for the Armada 3700
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index c2340eeeb97f..796e2c23e5df 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -13,6 +13,7 @@ Required properties:
- "hisilicon,hisi-ahci"
- "ibm,476gtr-ahci"
- "marvell,armada-380-ahci"
+ - "marvell,armada-3700-ahci"
- "snps,dwc-ahci"
- "snps,exynos5440-ahci"
- "snps,spear-ahci"
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 07/12] Documentation: dt: Tidy up the Marvell related files
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/arm/{ => marvell}/armada-370-xp-pmsu.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-375.txt | 0
.../devicetree/bindings/arm/{ => marvell}/armada-380-mpcore-soc-ctrl.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-38x.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-39x.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-cpu-reset.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/coherency-fabric.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/kirkwood.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/marvell,berlin.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/marvell,dove.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/marvell,kirkwood.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-cpu-config.txt | 0
.../devicetree/bindings/arm/{ => marvell}/mvebu-system-controller.txt | 0
14 files changed, 0 insertions(+), 0 deletions(-)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp-pmsu.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-375.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-380-mpcore-soc-ctrl.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-38x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-39x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-cpu-reset.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/coherency-fabric.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,berlin.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,dove.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-cpu-config.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-system-controller.txt (100%)
diff --git a/Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt b/Documentation/devicetree/bindings/arm/marvell/armada-370-xp-pmsu.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-370-xp-pmsu.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-370-xp.txt b/Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-370-xp.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-375.txt b/Documentation/devicetree/bindings/arm/marvell/armada-375.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-375.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-375.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-380-mpcore-soc-ctrl.txt b/Documentation/devicetree/bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-380-mpcore-soc-ctrl.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-38x.txt b/Documentation/devicetree/bindings/arm/marvell/armada-38x.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-38x.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-38x.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-39x.txt b/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-39x.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-39x.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-cpu-reset.txt b/Documentation/devicetree/bindings/arm/marvell/armada-cpu-reset.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-cpu-reset.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-cpu-reset.txt
diff --git a/Documentation/devicetree/bindings/arm/coherency-fabric.txt b/Documentation/devicetree/bindings/arm/marvell/coherency-fabric.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/coherency-fabric.txt
rename to Documentation/devicetree/bindings/arm/marvell/coherency-fabric.txt
diff --git a/Documentation/devicetree/bindings/arm/kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell/kirkwood.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/kirkwood.txt
rename to Documentation/devicetree/bindings/arm/marvell/kirkwood.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,berlin.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/marvell,berlin.txt
rename to Documentation/devicetree/bindings/arm/marvell/marvell,berlin.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell,dove.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/marvell,dove.txt
rename to Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/marvell,kirkwood.txt
rename to Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt
diff --git a/Documentation/devicetree/bindings/arm/mvebu-cpu-config.txt b/Documentation/devicetree/bindings/arm/marvell/mvebu-cpu-config.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/mvebu-cpu-config.txt
rename to Documentation/devicetree/bindings/arm/marvell/mvebu-cpu-config.txt
diff --git a/Documentation/devicetree/bindings/arm/mvebu-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/mvebu-system-controller.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/mvebu-system-controller.txt
rename to Documentation/devicetree/bindings/arm/marvell/mvebu-system-controller.txt
--
2.5.0
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 07/12] Documentation: dt: Tidy up the Marvell related files
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/arm/{ => marvell}/armada-370-xp-pmsu.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-375.txt | 0
.../devicetree/bindings/arm/{ => marvell}/armada-380-mpcore-soc-ctrl.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-38x.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-39x.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/armada-cpu-reset.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/coherency-fabric.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/kirkwood.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/marvell,berlin.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/marvell,dove.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/marvell,kirkwood.txt | 0
Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-cpu-config.txt | 0
.../devicetree/bindings/arm/{ => marvell}/mvebu-system-controller.txt | 0
14 files changed, 0 insertions(+), 0 deletions(-)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp-pmsu.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-370-xp.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-375.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-380-mpcore-soc-ctrl.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-38x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-39x.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/armada-cpu-reset.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/coherency-fabric.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,berlin.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,dove.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/marvell,kirkwood.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-cpu-config.txt (100%)
rename Documentation/devicetree/bindings/arm/{ => marvell}/mvebu-system-controller.txt (100%)
diff --git a/Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt b/Documentation/devicetree/bindings/arm/marvell/armada-370-xp-pmsu.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-370-xp-pmsu.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-370-xp.txt b/Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-370-xp.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-375.txt b/Documentation/devicetree/bindings/arm/marvell/armada-375.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-375.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-375.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-380-mpcore-soc-ctrl.txt b/Documentation/devicetree/bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-380-mpcore-soc-ctrl.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-38x.txt b/Documentation/devicetree/bindings/arm/marvell/armada-38x.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-38x.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-38x.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-39x.txt b/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-39x.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-39x.txt
diff --git a/Documentation/devicetree/bindings/arm/armada-cpu-reset.txt b/Documentation/devicetree/bindings/arm/marvell/armada-cpu-reset.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/armada-cpu-reset.txt
rename to Documentation/devicetree/bindings/arm/marvell/armada-cpu-reset.txt
diff --git a/Documentation/devicetree/bindings/arm/coherency-fabric.txt b/Documentation/devicetree/bindings/arm/marvell/coherency-fabric.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/coherency-fabric.txt
rename to Documentation/devicetree/bindings/arm/marvell/coherency-fabric.txt
diff --git a/Documentation/devicetree/bindings/arm/kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell/kirkwood.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/kirkwood.txt
rename to Documentation/devicetree/bindings/arm/marvell/kirkwood.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,berlin.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/marvell,berlin.txt
rename to Documentation/devicetree/bindings/arm/marvell/marvell,berlin.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell,dove.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/marvell,dove.txt
rename to Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/marvell,kirkwood.txt
rename to Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt
diff --git a/Documentation/devicetree/bindings/arm/mvebu-cpu-config.txt b/Documentation/devicetree/bindings/arm/marvell/mvebu-cpu-config.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/mvebu-cpu-config.txt
rename to Documentation/devicetree/bindings/arm/marvell/mvebu-cpu-config.txt
diff --git a/Documentation/devicetree/bindings/arm/mvebu-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/mvebu-system-controller.txt
similarity index 100%
rename from Documentation/devicetree/bindings/arm/mvebu-system-controller.txt
rename to Documentation/devicetree/bindings/arm/marvell/mvebu-system-controller.txt
--
2.5.0
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 08/12] devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC family
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/arm/marvell/armada-37xx.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
new file mode 100644
index 000000000000..51336e5fc761
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
@@ -0,0 +1,16 @@
+Marvell Armada 37xx Platforms Device Tree Bindings
+--------------------------------------------------
+
+Boards using a SoC of the Marvell Armada 37xx family must carry the
+following root node property:
+
+ - compatible: must contain "marvell,armada3710"
+
+In addition, boards using the Marvell Armada 3720 SoC shall have the
+following property before the previous one:
+
+ - compatible: must contain "marvell,armada3720"
+
+Example:
+
+compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 08/12] devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC family
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/arm/marvell/armada-37xx.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
new file mode 100644
index 000000000000..51336e5fc761
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
@@ -0,0 +1,16 @@
+Marvell Armada 37xx Platforms Device Tree Bindings
+--------------------------------------------------
+
+Boards using a SoC of the Marvell Armada 37xx family must carry the
+following root node property:
+
+ - compatible: must contain "marvell,armada3710"
+
+In addition, boards using the Marvell Armada 3720 SoC shall have the
+following property before the previous one:
+
+ - compatible: must contain "marvell,armada3720"
+
+Example:
+
+compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 09/12] arm64: dts: add the Marvell Armada 3700 family and a development board
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 18:14 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm64/boot/dts/marvell/Makefile | 4 +
arch/arm64/boot/dts/marvell/armada-371x.dtsi | 53 ++++++++++
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 86 ++++++++++++++++
arch/arm64/boot/dts/marvell/armada-372x.dtsi | 63 ++++++++++++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 131 +++++++++++++++++++++++++
5 files changed, 337 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/armada-371x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-db.dts
create mode 100644 arch/arm64/boot/dts/marvell/armada-372x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-37xx.dtsi
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 348f4db4f313..2114af8d312d 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -1,6 +1,10 @@
+# Berlin SoC Family
dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-dmp.dtb
dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-stb.dtb
+# Mvebu SoC Family
+dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb
+
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/marvell/armada-371x.dtsi b/arch/arm64/boot/dts/marvell/armada-371x.dtsi
new file mode 100644
index 000000000000..c9e5325b8ac3
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-371x.dtsi
@@ -0,0 +1,53 @@
+/*
+ * Device Tree Include file for Marvell Armada 371x family of SoCs
+ * (also named 88F3710)
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armada-37xx.dtsi"
+
+/ {
+ model = "Marvell Armada 3710 SoC";
+ compatible = "marvell,armada3710", "marvell,armada3700";
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
new file mode 100644
index 000000000000..359050154511
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -0,0 +1,86 @@
+/*
+ * Device Tree file for Marvell Armada 3720 development board
+ * (DB-88F3720-DDR3)
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "armada-372x.dtsi"
+
+/ {
+ model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
+ compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
+ };
+
+ soc {
+ internal-regs {
+ /*
+ * Exported on the micro USB connector CON32
+ * through an FTDI
+ */
+ uart0: serial@12000 {
+ status = "okay";
+ };
+
+ /* CON31 */
+ usb3@58000 {
+ status = "okay";
+ };
+
+ /* CON3 */
+ sata@e0000 {
+ status = "okay";
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
new file mode 100644
index 000000000000..f292a00ce97c
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
@@ -0,0 +1,63 @@
+/*
+ * Device Tree Include file for Marvell Armada 372x family of SoCs
+ * (also named 88F3720)
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armada-37xx.dtsi"
+
+/ {
+ model = "Marvell Armada 3720 SoC";
+ compatible = "marvell,armada3720", "marvell,armada3710";
+
+ cpus {
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x1>;
+ enable-method = "psci";
+ };
+ };
+
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
new file mode 100644
index 000000000000..ba9df7ff2a72
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -0,0 +1,131 @@
+/*
+ * Device Tree Include file for Marvell Armada 37xx family of SoCs.
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Marvell Armada 37xx SoC";
+ compatible = "marvell,armada3700";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ internal-regs {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ /* 32M internal register @ 0xd000_0000 */
+ ranges = <0x0 0x0 0xd0000000 0x2000000>;
+
+ uart0: serial@12000 {
+ compatible = "marvell,armada-3700-uart";
+ reg = <0x12000 0x400>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ usb3@58000 {
+ compatible = "generic-xhci";
+ reg = <0x58000 0x4000>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sata@e0000 {
+ compatible = "marvell,armada-3700-ahci";
+ reg = <0xe0000 0x2000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller@1d00000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1d00000 0x10000>, /* GICD */
+ <0x1d40000 0x40000>; /* GICR */
+ };
+ };
+ };
+};
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 09/12] arm64: dts: add the Marvell Armada 3700 family and a development board
@ 2016-02-16 18:14 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:14 UTC (permalink / raw)
To: linux-arm-kernel
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm64/boot/dts/marvell/Makefile | 4 +
arch/arm64/boot/dts/marvell/armada-371x.dtsi | 53 ++++++++++
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 86 ++++++++++++++++
arch/arm64/boot/dts/marvell/armada-372x.dtsi | 63 ++++++++++++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 131 +++++++++++++++++++++++++
5 files changed, 337 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/armada-371x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-db.dts
create mode 100644 arch/arm64/boot/dts/marvell/armada-372x.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/armada-37xx.dtsi
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 348f4db4f313..2114af8d312d 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -1,6 +1,10 @@
+# Berlin SoC Family
dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-dmp.dtb
dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-stb.dtb
+# Mvebu SoC Family
+dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb
+
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/marvell/armada-371x.dtsi b/arch/arm64/boot/dts/marvell/armada-371x.dtsi
new file mode 100644
index 000000000000..c9e5325b8ac3
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-371x.dtsi
@@ -0,0 +1,53 @@
+/*
+ * Device Tree Include file for Marvell Armada 371x family of SoCs
+ * (also named 88F3710)
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armada-37xx.dtsi"
+
+/ {
+ model = "Marvell Armada 3710 SoC";
+ compatible = "marvell,armada3710", "marvell,armada3700";
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
new file mode 100644
index 000000000000..359050154511
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -0,0 +1,86 @@
+/*
+ * Device Tree file for Marvell Armada 3720 development board
+ * (DB-88F3720-DDR3)
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "armada-372x.dtsi"
+
+/ {
+ model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
+ compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
+ };
+
+ soc {
+ internal-regs {
+ /*
+ * Exported on the micro USB connector CON32
+ * through an FTDI
+ */
+ uart0: serial at 12000 {
+ status = "okay";
+ };
+
+ /* CON31 */
+ usb3 at 58000 {
+ status = "okay";
+ };
+
+ /* CON3 */
+ sata at e0000 {
+ status = "okay";
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
new file mode 100644
index 000000000000..f292a00ce97c
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
@@ -0,0 +1,63 @@
+/*
+ * Device Tree Include file for Marvell Armada 372x family of SoCs
+ * (also named 88F3720)
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armada-37xx.dtsi"
+
+/ {
+ model = "Marvell Armada 3720 SoC";
+ compatible = "marvell,armada3720", "marvell,armada3710";
+
+ cpus {
+ cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x1>;
+ enable-method = "psci";
+ };
+ };
+
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
new file mode 100644
index 000000000000..ba9df7ff2a72
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -0,0 +1,131 @@
+/*
+ * Device Tree Include file for Marvell Armada 37xx family of SoCs.
+ *
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Marvell Armada 37xx SoC";
+ compatible = "marvell,armada3700";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ internal-regs {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ /* 32M internal register @ 0xd000_0000 */
+ ranges = <0x0 0x0 0xd0000000 0x2000000>;
+
+ uart0: serial at 12000 {
+ compatible = "marvell,armada-3700-uart";
+ reg = <0x12000 0x400>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ usb3 at 58000 {
+ compatible = "generic-xhci";
+ reg = <0x58000 0x4000>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sata at e0000 {
+ compatible = "marvell,armada-3700-ahci";
+ reg = <0xe0000 0x2000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at 1d00000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1d00000 0x10000>, /* GICD */
+ <0x1d40000 0x40000>; /* GICR */
+ };
+ };
+ };
+};
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 10/12] MAINTAINERS: Extend dts entry for ARM64 mvebu files
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 18:15 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:15 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 30aca4aa5467..ad49b62c5abc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1279,6 +1279,7 @@ F: arch/arm/mach-mvebu/
F: drivers/rtc/rtc-armada38x.c
F: arch/arm/boot/dts/armada*
F: arch/arm/boot/dts/kirkwood*
+F: arch/arm64/boot/dts/marvell/armada*
ARM/Marvell Berlin SoC support
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 10/12] MAINTAINERS: Extend dts entry for ARM64 mvebu files
@ 2016-02-16 18:15 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:15 UTC (permalink / raw)
To: linux-arm-kernel
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 30aca4aa5467..ad49b62c5abc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1279,6 +1279,7 @@ F: arch/arm/mach-mvebu/
F: drivers/rtc/rtc-armada38x.c
F: arch/arm/boot/dts/armada*
F: arch/arm/boot/dts/kirkwood*
+F: arch/arm64/boot/dts/marvell/armada*
ARM/Marvell Berlin SoC support
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 11/12] Documentation: arm: update supported Marvell EBU processors
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 18:15 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:15 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
Documentation/arm/Marvell/README | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index ae89b67d8e23..ddbc048bb467 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -118,6 +118,19 @@ EBU Armada family
Linux kernel mach directory: arch/arm/mach-mvebu
Linux kernel plat directory: none
+EBU Armada family ARMv8
+-----------------------
+
+ Armada 3710/3720 Flavors:
+ 88F3710
+ 88F3720
+
+ Core: ARM Cortex A53 (ARMv8)
+
+ Homepage : http://www.marvell.com/embedded-processors/armada-3700/
+
+ Device tree descritpion located in arch/arm64/boot/dts/marvell/armada-37*
+
Avanta family
-------------
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 11/12] Documentation: arm: update supported Marvell EBU processors
@ 2016-02-16 18:15 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:15 UTC (permalink / raw)
To: linux-arm-kernel
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
Documentation/arm/Marvell/README | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index ae89b67d8e23..ddbc048bb467 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -118,6 +118,19 @@ EBU Armada family
Linux kernel mach directory: arch/arm/mach-mvebu
Linux kernel plat directory: none
+EBU Armada family ARMv8
+-----------------------
+
+ Armada 3710/3720 Flavors:
+ 88F3710
+ 88F3720
+
+ Core: ARM Cortex A53 (ARMv8)
+
+ Homepage : http://www.marvell.com/embedded-processors/armada-3700/
+
+ Device tree descritpion located in arch/arm64/boot/dts/marvell/armada-37*
+
Avanta family
-------------
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 12/12] arm64: defconfig: enable Armada 3700 related config
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 18:15 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:15 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Gregory CLEMENT, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet
Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm64/configs/defconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 18ca9fb9e65f..7ca2f0247ec5 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -31,6 +31,7 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_ARCH_MVEBU=y
CONFIG_ARCH_BCM_IPROC=y
CONFIG_ARCH_BERLIN=y
CONFIG_ARCH_EXYNOS7=y
@@ -93,6 +94,7 @@ CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_CEVA=y
+CONFIG_AHCI_MVEBU=y
CONFIG_AHCI_XGENE=y
CONFIG_SATA_RCAR=y
CONFIG_PATA_PLATFORM=y
@@ -132,6 +134,7 @@ CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_XILINX_PS_UART=y
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+CONFIG_SERIAL_MVEBU_UART=y
CONFIG_VIRTIO_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
@@ -162,6 +165,8 @@ CONFIG_SND_SOC=y
CONFIG_SND_SOC_RCAR=y
CONFIG_SND_SOC_AK4613=y
CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 12/12] arm64: defconfig: enable Armada 3700 related config
@ 2016-02-16 18:15 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-16 18:15 UTC (permalink / raw)
To: linux-arm-kernel
This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm64/configs/defconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 18ca9fb9e65f..7ca2f0247ec5 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -31,6 +31,7 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_ARCH_MVEBU=y
CONFIG_ARCH_BCM_IPROC=y
CONFIG_ARCH_BERLIN=y
CONFIG_ARCH_EXYNOS7=y
@@ -93,6 +94,7 @@ CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_CEVA=y
+CONFIG_AHCI_MVEBU=y
CONFIG_AHCI_XGENE=y
CONFIG_SATA_RCAR=y
CONFIG_PATA_PLATFORM=y
@@ -132,6 +134,7 @@ CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_XILINX_PS_UART=y
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+CONFIG_SERIAL_MVEBU_UART=y
CONFIG_VIRTIO_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
@@ -162,6 +165,8 @@ CONFIG_SND_SOC=y
CONFIG_SND_SOC_RCAR=y
CONFIG_SND_SOC_AK4613=y
CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
--
2.5.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* Re: [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 21:20 ` Arnd Bergmann
-1 siblings, 0 replies; 54+ messages in thread
From: Arnd Bergmann @ 2016-02-16 21:20 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, arm,
Catalin Marinas, Will Deacon, Jonathan Corbet,
Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach, Wilson Ding
On Tuesday 16 February 2016 19:14:53 Gregory CLEMENT wrote:
>
> +config SERIAL_MVEBU_UART
> + bool "Marvell EBU serial port support"
> + select SERIAL_CORE
It would be nice to make this a tristate option with
depends on ARCH_MVEBU || COMPILE_TEST
so we can build it in an allmodconfig kernel as a standalone module
like the other drivers.
> +
> +config SERIAL_MVEBU_CONSOLE
> + bool "Console on Marvell EBU serial port"
> + depends on SERIAL_MVEBU_UART
then this one must become
depends on SERIAL_MVEBU_UART
so it does not get enabled if the driver is not builtin.
Arnd
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
@ 2016-02-16 21:20 ` Arnd Bergmann
0 siblings, 0 replies; 54+ messages in thread
From: Arnd Bergmann @ 2016-02-16 21:20 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 16 February 2016 19:14:53 Gregory CLEMENT wrote:
>
> +config SERIAL_MVEBU_UART
> + bool "Marvell EBU serial port support"
> + select SERIAL_CORE
It would be nice to make this a tristate option with
depends on ARCH_MVEBU || COMPILE_TEST
so we can build it in an allmodconfig kernel as a standalone module
like the other drivers.
> +
> +config SERIAL_MVEBU_CONSOLE
> + bool "Console on Marvell EBU serial port"
> + depends on SERIAL_MVEBU_UART
then this one must become
depends on SERIAL_MVEBU_UART
so it does not get enabled if the driver is not builtin.
Arnd
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 00/12] Add support for the Armada 3700 SoC an mvebu ARM64 based
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-16 21:22 ` Arnd Bergmann
-1 siblings, 0 replies; 54+ messages in thread
From: Arnd Bergmann @ 2016-02-16 21:22 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, arm,
Catalin Marinas, Will Deacon, Jonathan Corbet,
Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
On Tuesday 16 February 2016 19:14:50 Gregory CLEMENT wrote:
> This series introduce the support of the Armada 3700 family: it is the
> first ARM64 SoC of the mvebu family submitted to the mainline!
>
> Currently there are two members of the Armada 3700 family, the only
> difference is the number of core: the Armada 3710 comes with one
> Cortex-A53 whereas the Armada 3720 comes with 2 Cortex-A53. In this
> series we enabled only the minimum to boot, pinctrl and clock tree
> will come soon.
>
Whole series
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 00/12] Add support for the Armada 3700 SoC an mvebu ARM64 based
@ 2016-02-16 21:22 ` Arnd Bergmann
0 siblings, 0 replies; 54+ messages in thread
From: Arnd Bergmann @ 2016-02-16 21:22 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 16 February 2016 19:14:50 Gregory CLEMENT wrote:
> This series introduce the support of the Armada 3700 family: it is the
> first ARM64 SoC of the mvebu family submitted to the mainline!
>
> Currently there are two members of the Armada 3700 family, the only
> difference is the number of core: the Armada 3710 comes with one
> Cortex-A53 whereas the Armada 3720 comes with 2 Cortex-A53. In this
> series we enabled only the minimum to boot, pinctrl and clock tree
> will come soon.
>
Whole series
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
2016-02-16 21:20 ` Arnd Bergmann
@ 2016-02-16 21:27 ` Thomas Petazzoni
-1 siblings, 0 replies; 54+ messages in thread
From: Thomas Petazzoni @ 2016-02-16 21:27 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Gregory CLEMENT, Jason Cooper, Andrew Lunn,
Sebastian Hesselbarth, arm, Catalin Marinas, Will Deacon,
Jonathan Corbet, Greg Kroah-Hartman, Jiri Slaby, linux-serial,
Tejun Heo, Hans de Goede, linux-ide, linux-kernel, Mark Rutland,
devicetree, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach, Wilson Ding
Arnd,
On Tue, 16 Feb 2016 22:20:51 +0100, Arnd Bergmann wrote:
> > +config SERIAL_MVEBU_CONSOLE
> > + bool "Console on Marvell EBU serial port"
> > + depends on SERIAL_MVEBU_UART
>
> then this one must become
>
> depends on SERIAL_MVEBU_UART
>
> so it does not get enabled if the driver is not builtin.
Hm, what's the different between "depends on SERIAL_MVEBU_UART" and
"depends on SERIAL_MVEBU_UART" ? Is it the late time that causes my
eyes to misunderstand what you mean, or some typo on your side ? :-)
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
@ 2016-02-16 21:27 ` Thomas Petazzoni
0 siblings, 0 replies; 54+ messages in thread
From: Thomas Petazzoni @ 2016-02-16 21:27 UTC (permalink / raw)
To: linux-arm-kernel
Arnd,
On Tue, 16 Feb 2016 22:20:51 +0100, Arnd Bergmann wrote:
> > +config SERIAL_MVEBU_CONSOLE
> > + bool "Console on Marvell EBU serial port"
> > + depends on SERIAL_MVEBU_UART
>
> then this one must become
>
> depends on SERIAL_MVEBU_UART
>
> so it does not get enabled if the driver is not builtin.
Hm, what's the different between "depends on SERIAL_MVEBU_UART" and
"depends on SERIAL_MVEBU_UART" ? Is it the late time that causes my
eyes to misunderstand what you mean, or some typo on your side ? :-)
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
2016-02-16 21:27 ` Thomas Petazzoni
@ 2016-02-16 21:35 ` Arnd Bergmann
-1 siblings, 0 replies; 54+ messages in thread
From: Arnd Bergmann @ 2016-02-16 21:35 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Thomas Petazzoni, Mark Rutland, Andrew Lunn, Catalin Marinas,
Will Deacon, Nadav Haklai, linux-ide, Lior Amsalem,
Jonathan Corbet, arm, linux-serial, Jiri Slaby,
Sebastian Hesselbarth, devicetree, Jason Cooper, Omri Itach,
Hans de Goede, Gregory CLEMENT, Greg Kroah-Hartman, linux-kernel,
Tejun Heo, Wilson Ding
On Tuesday 16 February 2016 22:27:06 Thomas Petazzoni wrote:
> Arnd,
>
> On Tue, 16 Feb 2016 22:20:51 +0100, Arnd Bergmann wrote:
>
> > > +config SERIAL_MVEBU_CONSOLE
> > > + bool "Console on Marvell EBU serial port"
> > > + depends on SERIAL_MVEBU_UART
> >
> > then this one must become
> >
> > depends on SERIAL_MVEBU_UART
> >
> > so it does not get enabled if the driver is not builtin.
>
> Hm, what's the different between "depends on SERIAL_MVEBU_UART" and
> "depends on SERIAL_MVEBU_UART" ? Is it the late time that causes my
> eyes to misunderstand what you mean, or some typo on your side ?
>
typo: I meant
depends on SERIAL_MVEBU_UART=y
Arnd
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
@ 2016-02-16 21:35 ` Arnd Bergmann
0 siblings, 0 replies; 54+ messages in thread
From: Arnd Bergmann @ 2016-02-16 21:35 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 16 February 2016 22:27:06 Thomas Petazzoni wrote:
> Arnd,
>
> On Tue, 16 Feb 2016 22:20:51 +0100, Arnd Bergmann wrote:
>
> > > +config SERIAL_MVEBU_CONSOLE
> > > + bool "Console on Marvell EBU serial port"
> > > + depends on SERIAL_MVEBU_UART
> >
> > then this one must become
> >
> > depends on SERIAL_MVEBU_UART
> >
> > so it does not get enabled if the driver is not builtin.
>
> Hm, what's the different between "depends on SERIAL_MVEBU_UART" and
> "depends on SERIAL_MVEBU_UART" ? Is it the late time that causes my
> eyes to misunderstand what you mean, or some typo on your side ?
>
typo: I meant
depends on SERIAL_MVEBU_UART=y
Arnd
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 00/12] Add support for the Armada 3700 SoC an mvebu ARM64 based
2016-02-16 21:22 ` Arnd Bergmann
@ 2016-02-17 16:03 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-17 16:03 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, arm,
Catalin Marinas, Will Deacon, Jonathan Corbet,
Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
Hi Arnd,
On mar., févr. 16 2016, Arnd Bergmann <arnd@arndb.de> wrote:
> On Tuesday 16 February 2016 19:14:50 Gregory CLEMENT wrote:
>> This series introduce the support of the Armada 3700 family: it is the
>> first ARM64 SoC of the mvebu family submitted to the mainline!
>>
>> Currently there are two members of the Armada 3700 family, the only
>> difference is the number of core: the Armada 3710 comes with one
>> Cortex-A53 whereas the Armada 3720 comes with 2 Cortex-A53. In this
>> series we enabled only the minimum to boot, pinctrl and clock tree
>> will come soon.
>>
>
> Whole series
>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
Great!
I am going to do a first pull requests for the mvebu arm64. Let me know
if I do it correctly.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 00/12] Add support for the Armada 3700 SoC an mvebu ARM64 based
@ 2016-02-17 16:03 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-17 16:03 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd,
On mar., f?vr. 16 2016, Arnd Bergmann <arnd@arndb.de> wrote:
> On Tuesday 16 February 2016 19:14:50 Gregory CLEMENT wrote:
>> This series introduce the support of the Armada 3700 family: it is the
>> first ARM64 SoC of the mvebu family submitted to the mainline!
>>
>> Currently there are two members of the Armada 3700 family, the only
>> difference is the number of core: the Armada 3710 comes with one
>> Cortex-A53 whereas the Armada 3720 comes with 2 Cortex-A53. In this
>> series we enabled only the minimum to boot, pinctrl and clock tree
>> will come soon.
>>
>
> Whole series
>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
Great!
I am going to do a first pull requests for the mvebu arm64. Let me know
if I do it correctly.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-18 17:37 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-18 17:37 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby
Cc: Andrew Lunn, Sebastian Hesselbarth, arm, Catalin Marinas,
Will Deacon, Jonathan Corbet, Jason Cooper, linux-serial,
Tejun Heo, Hans de Goede, linux-ide, linux-kernel, Mark Rutland,
devicetree, Thomas Petazzoni, linux-arm-kernel, Lior Amsalem,
Nadav Haklai, Omri Itach, Wilson Ding
Hi Greg and Jiri
On mar., févr. 16 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
> From: Wilson Ding <dingwei@marvell.com>
>
> Armada-3700's uart is a simple serial port, which doesn't
> support. Configuring the modem control lines. The uart port has a 32
> bytes Tx FIFO and a 64 bytes Rx FIFO
>
> The uart driver implements the uart core operations. It also support the
> system (early) console based on Armada-3700's serial port.
>
> Known Issue:
>
> The uart driver currently doesn't support clock programming, which means
> the baud-rate stays with the default value configured by the bootloader
> at boot time
>
> [gregory.clement@free-electrons.com: Rewrite many part which are too long
> to enumerate]
>
> Signed-off-by: Wilson Ding <dingwei@marvell.com>
> Signed-off-by: Nadav Haklai <nadavh@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Acked-by: Rob Herring <robh@kernel.org>
I took care of the arm related part of the series, but I will let you
apply this patch in the serial subsystem once you have reviewed it. But
if for any reason you preferred that I took it through mvebu just tell
me.
Thanks,
Gregory
> ---
> .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
> Documentation/kernel-parameters.txt | 6 +
> drivers/tty/serial/Kconfig | 22 +
> drivers/tty/serial/Makefile | 1 +
> drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
> include/uapi/linux/serial_core.h | 3 +
> 6 files changed, 695 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> create mode 100644 drivers/tty/serial/mvebu-uart.c
>
> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> new file mode 100644
> index 000000000000..6087defd9f93
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> @@ -0,0 +1,13 @@
> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
> +
> +Required properties:
> +- compatible: "marvell,armada-3700-uart"
> +- reg: offset and length of the register set for the device.
> +- interrupts: device interrupt
> +
> +Example:
> + serial@12000 {
> + compatible = "marvell,armada-3700-uart";
> + reg = <0x12000 0x400>;
> + interrupts = <43>;
> + };
> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> index 87d40a72f6a1..ea0aba48d616 100644
> --- a/Documentation/kernel-parameters.txt
> +++ b/Documentation/kernel-parameters.txt
> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
> A valid base address must be provided, and the serial
> port must already be setup and configured.
>
> + armada3700_uart,<addr>
> + Start an early, polled-mode console on the
> + Armada 3700 serial port at the specified
> + address. The serial port must already be setup
> + and configured. Options are not yet supported.
> +
> earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
> earlyprintk=vga
> earlyprintk=efi
> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> index 39721ec4f415..b291f934d51b 100644
> --- a/drivers/tty/serial/Kconfig
> +++ b/drivers/tty/serial/Kconfig
> @@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
> depends on SERIAL_STM32=y
> select SERIAL_CORE_CONSOLE
>
> +config SERIAL_MVEBU_UART
> + bool "Marvell EBU serial port support"
> + select SERIAL_CORE
> + help
> + This driver is for Marvell EBU SoC's UART. If you have a machine
> + based on the Armada-3700 SoC and wish to use the on-board serial
> + port,
> + say 'Y' here.
> + Otherwise, say 'N'.
> +
> +config SERIAL_MVEBU_CONSOLE
> + bool "Console on Marvell EBU serial port"
> + depends on SERIAL_MVEBU_UART
> + select SERIAL_CORE_CONSOLE
> + select SERIAL_EARLYCON
> + default y
> + help
> + Say 'Y' here if you wish to use Armada-3700 UART as the system console.
> + (the system console is the device which receives all kernel messages
> + and warnings and which allows logins in single user mode)
> + Otherwise, say 'N'.
> +
> endmenu
>
> config SERIAL_MCTRL_GPIO
> diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
> index b391c9b31960..988167595330 100644
> --- a/drivers/tty/serial/Makefile
> +++ b/drivers/tty/serial/Makefile
> @@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
> obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
> obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
> obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
> +obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
>
> # GPIOLIB helpers for modem control lines
> obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
> diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
> new file mode 100644
> index 000000000000..0ff27818bb87
> --- /dev/null
> +++ b/drivers/tty/serial/mvebu-uart.c
> @@ -0,0 +1,650 @@
> +/*
> +* ***************************************************************************
> +* Copyright (C) 2015 Marvell International Ltd.
> +* ***************************************************************************
> +* This program is free software: you can redistribute it and/or modify it
> +* under the terms of the GNU General Public License as published by the Free
> +* Software Foundation, either version 2 of the License, or any later version.
> +*
> +* This program is distributed in the hope that it will be useful,
> +* but WITHOUT ANY WARRANTY; without even the implied warranty of
> +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +* GNU General Public License for more details.
> +*
> +* You should have received a copy of the GNU General Public License
> +* along with this program. If not, see <http://www.gnu.org/licenses/>.
> +* ***************************************************************************
> +*/
> +
> +#include <linux/clk.h>
> +#include <linux/console.h>
> +#include <linux/delay.h>
> +#include <linux/device.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/serial.h>
> +#include <linux/serial_core.h>
> +#include <linux/slab.h>
> +#include <linux/tty.h>
> +#include <linux/tty_flip.h>
> +
> +/* Register Map */
> +#define UART_RBR 0x00
> +#define RBR_BRK_DET BIT(15)
> +#define RBR_FRM_ERR_DET BIT(14)
> +#define RBR_PAR_ERR_DET BIT(13)
> +#define RBR_OVR_ERR_DET BIT(12)
> +
> +#define UART_TSH 0x04
> +
> +#define UART_CTRL 0x08
> +#define CTRL_SOFT_RST BIT(31)
> +#define CTRL_TXFIFO_RST BIT(15)
> +#define CTRL_RXFIFO_RST BIT(14)
> +#define CTRL_ST_MIRR_EN BIT(13)
> +#define CTRL_LPBK_EN BIT(12)
> +#define CTRL_SND_BRK_SEQ BIT(11)
> +#define CTRL_PAR_EN BIT(10)
> +#define CTRL_TWO_STOP BIT(9)
> +#define CTRL_TX_HFL_INT BIT(8)
> +#define CTRL_RX_HFL_INT BIT(7)
> +#define CTRL_TX_EMP_INT BIT(6)
> +#define CTRL_TX_RDY_INT BIT(5)
> +#define CTRL_RX_RDY_INT BIT(4)
> +#define CTRL_BRK_DET_INT BIT(3)
> +#define CTRL_FRM_ERR_INT BIT(2)
> +#define CTRL_PAR_ERR_INT BIT(1)
> +#define CTRL_OVR_ERR_INT BIT(0)
> +#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
> + CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
> +
> +#define UART_STAT 0x0c
> +#define STAT_TX_FIFO_EMP BIT(13)
> +#define STAT_RX_FIFO_EMP BIT(12)
> +#define STAT_TX_FIFO_FUL BIT(11)
> +#define STAT_TX_FIFO_HFL BIT(10)
> +#define STAT_RX_TOGL BIT(9)
> +#define STAT_RX_FIFO_FUL BIT(8)
> +#define STAT_RX_FIFO_HFL BIT(7)
> +#define STAT_TX_EMP BIT(6)
> +#define STAT_TX_RDY BIT(5)
> +#define STAT_RX_RDY BIT(4)
> +#define STAT_BRK_DET BIT(3)
> +#define STAT_FRM_ERR BIT(2)
> +#define STAT_PAR_ERR BIT(1)
> +#define STAT_OVR_ERR BIT(0)
> +#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
> + | STAT_PAR_ERR | STAT_OVR_ERR)
> +
> +#define UART_BRDV 0x10
> +
> +#define MVEBU_NR_UARTS 1
> +
> +#define MVEBU_UART_TYPE "mvebu-uart"
> +
> +static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
> +
> +struct mvebu_uart_data {
> + struct uart_port *port;
> + struct clk *clk;
> +};
> +
> +/* Core UART Driver Operations */
> +static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
> +{
> + unsigned long flags;
> + unsigned int st;
> +
> + spin_lock_irqsave(&port->lock, flags);
> + st = readl(port->membase + UART_STAT);
> + spin_unlock_irqrestore(&port->lock, flags);
> +
> + return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
> +}
> +
> +static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
> +{
> + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
> +}
> +
> +static void mvebu_uart_set_mctrl(struct uart_port *port,
> + unsigned int mctrl)
> +{
> +/*
> + * Even if we do not support configuring the modem control lines, this
> + * function must be proided to the serial core
> + */
> +}
> +
> +static void mvebu_uart_stop_tx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl &= ~CTRL_TX_RDY_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_start_tx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl |= CTRL_TX_RDY_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_stop_rx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl &= ~CTRL_RX_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
> +{
> + unsigned int ctl;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&port->lock, flags);
> + ctl = readl(port->membase + UART_CTRL);
> + if (brk == -1)
> + ctl |= CTRL_SND_BRK_SEQ;
> + else
> + ctl &= ~CTRL_SND_BRK_SEQ;
> + writel(ctl, port->membase + UART_CTRL);
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
> +{
> + struct tty_port *tport = &port->state->port;
> + unsigned char ch = 0;
> + char flag = 0;
> +
> + do {
> + if (status & STAT_RX_RDY) {
> + ch = readl(port->membase + UART_RBR);
> + ch &= 0xff;
> + flag = TTY_NORMAL;
> + port->icount.rx++;
> +
> + if (status & STAT_PAR_ERR)
> + port->icount.parity++;
> + }
> +
> + if (status & STAT_BRK_DET) {
> + port->icount.brk++;
> + status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
> + if (uart_handle_break(port))
> + goto ignore_char;
> + }
> +
> + if (status & STAT_OVR_ERR)
> + port->icount.overrun++;
> +
> + if (status & STAT_FRM_ERR)
> + port->icount.frame++;
> +
> + if (uart_handle_sysrq_char(port, ch))
> + goto ignore_char;
> +
> + if (status & port->ignore_status_mask & STAT_PAR_ERR)
> + status &= ~STAT_RX_RDY;
> +
> + status &= port->read_status_mask;
> +
> + if (status & STAT_PAR_ERR)
> + flag = TTY_PARITY;
> +
> + status &= ~port->ignore_status_mask;
> +
> + if (status & STAT_RX_RDY)
> + tty_insert_flip_char(tport, ch, flag);
> +
> + if (status & STAT_BRK_DET)
> + tty_insert_flip_char(tport, 0, TTY_BREAK);
> +
> + if (status & STAT_FRM_ERR)
> + tty_insert_flip_char(tport, 0, TTY_FRAME);
> +
> + if (status & STAT_OVR_ERR)
> + tty_insert_flip_char(tport, 0, TTY_OVERRUN);
> +
> +ignore_char:
> + status = readl(port->membase + UART_STAT);
> + } while (status & (STAT_RX_RDY | STAT_BRK_DET));
> +
> + tty_flip_buffer_push(tport);
> +}
> +
> +static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
> +{
> + struct circ_buf *xmit = &port->state->xmit;
> + unsigned int count;
> + unsigned int st;
> +
> + if (port->x_char) {
> + writel(port->x_char, port->membase + UART_TSH);
> + port->icount.tx++;
> + port->x_char = 0;
> + return;
> + }
> +
> + if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
> + mvebu_uart_stop_tx(port);
> + return;
> + }
> +
> + for (count = 0; count < port->fifosize; count++) {
> + writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
> + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
> + port->icount.tx++;
> +
> + if (uart_circ_empty(xmit))
> + break;
> +
> + st = readl(port->membase + UART_STAT);
> + if (st & STAT_TX_FIFO_FUL)
> + break;
> + }
> +
> + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
> + uart_write_wakeup(port);
> +
> + if (uart_circ_empty(xmit))
> + mvebu_uart_stop_tx(port);
> +}
> +
> +static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
> +{
> + struct uart_port *port = (struct uart_port *)dev_id;
> + unsigned int st = readl(port->membase + UART_STAT);
> +
> + if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
> + mvebu_uart_rx_chars(port, st);
> +
> + if (st & STAT_TX_RDY)
> + mvebu_uart_tx_chars(port, st);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int mvebu_uart_startup(struct uart_port *port)
> +{
> + int ret;
> +
> + writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
> + port->membase + UART_CTRL);
> + udelay(1);
> + writel(CTRL_RX_INT, port->membase + UART_CTRL);
> +
> + ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
> + port);
> + if (ret) {
> + dev_err(port->dev, "failed to request irq\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static void mvebu_uart_shutdown(struct uart_port *port)
> +{
> + writel(0, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_set_termios(struct uart_port *port,
> + struct ktermios *termios,
> + struct ktermios *old)
> +{
> + unsigned long flags;
> + unsigned int baud;
> +
> + spin_lock_irqsave(&port->lock, flags);
> +
> + port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
> + STAT_TX_RDY | STAT_TX_FIFO_FUL;
> +
> + if (termios->c_iflag & INPCK)
> + port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
> +
> + port->ignore_status_mask = 0;
> + if (termios->c_iflag & IGNPAR)
> + port->ignore_status_mask |=
> + STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
> +
> + if ((termios->c_cflag & CREAD) == 0)
> + port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
> +
> + if (old)
> + tty_termios_copy_hw(termios, old);
> +
> + baud = uart_get_baud_rate(port, termios, old, 0, 460800);
> + uart_update_timeout(port, termios->c_cflag, baud);
> +
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static const char *mvebu_uart_type(struct uart_port *port)
> +{
> + return MVEBU_UART_TYPE;
> +}
> +
> +static void mvebu_uart_release_port(struct uart_port *port)
> +{
> + /* Nothing to do here */
> +}
> +
> +static int mvebu_uart_request_port(struct uart_port *port)
> +{
> + return 0;
> +}
> +
> +#ifdef CONFIG_CONSOLE_POLL
> +static int mvebu_uart_get_poll_char(struct uart_port *port)
> +{
> + unsigned int st = readl(port->membase + UART_STAT);
> +
> + if (!(st & STAT_RX_RDY))
> + return NO_POLL_CHAR;
> +
> + return readl(port->membase + UART_RBR);
> +}
> +
> +static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
> +{
> + unsigned int st;
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> +
> + if (!(st & STAT_TX_FIFO_FUL))
> + break;
> +
> + udelay(1);
> + }
> +
> + writel(c, port->membase + UART_TSH);
> +}
> +#endif
> +
> +static const struct uart_ops mvebu_uart_ops = {
> + .tx_empty = mvebu_uart_tx_empty,
> + .set_mctrl = mvebu_uart_set_mctrl,
> + .get_mctrl = mvebu_uart_get_mctrl,
> + .stop_tx = mvebu_uart_stop_tx,
> + .start_tx = mvebu_uart_start_tx,
> + .stop_rx = mvebu_uart_stop_rx,
> + .break_ctl = mvebu_uart_break_ctl,
> + .startup = mvebu_uart_startup,
> + .shutdown = mvebu_uart_shutdown,
> + .set_termios = mvebu_uart_set_termios,
> + .type = mvebu_uart_type,
> + .release_port = mvebu_uart_release_port,
> + .request_port = mvebu_uart_request_port,
> +#ifdef CONFIG_CONSOLE_POLL
> + .poll_get_char = mvebu_uart_get_poll_char,
> + .poll_put_char = mvebu_uart_put_poll_char,
> +#endif
> +};
> +
> +/* Console Driver Operations */
> +
> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
> +/* Early Console */
> +static void mvebu_uart_putc(struct uart_port *port, int c)
> +{
> + unsigned int st;
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> + if (!(st & STAT_TX_FIFO_FUL))
> + break;
> + }
> +
> + writel(c, port->membase + UART_TSH);
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> + if (st & STAT_TX_FIFO_EMP)
> + break;
> + }
> +}
> +
> +static void mvebu_uart_putc_early_write(struct console *con,
> + const char *s,
> + unsigned n)
> +{
> + struct earlycon_device *dev = con->data;
> +
> + uart_console_write(&dev->port, s, n, mvebu_uart_putc);
> +}
> +
> +static int __init
> +mvebu_uart_early_console_setup(struct earlycon_device *device,
> + const char *opt)
> +{
> + if (!device->port.membase)
> + return -ENODEV;
> +
> + device->con->write = mvebu_uart_putc_early_write;
> +
> + return 0;
> +}
> +
> +EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
> +OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
> + mvebu_uart_early_console_setup);
> +
> +static void wait_for_xmitr(struct uart_port *port)
> +{
> + u32 val;
> +
> + readl_poll_timeout_atomic(port->membase + UART_STAT, val,
> + (val & STAT_TX_EMP), 1, 10000);
> +}
> +
> +static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
> +{
> + wait_for_xmitr(port);
> + writel(ch, port->membase + UART_TSH);
> +}
> +
> +static void mvebu_uart_console_write(struct console *co, const char *s,
> + unsigned int count)
> +{
> + struct uart_port *port = &mvebu_uart_ports[co->index];
> + unsigned long flags;
> + unsigned int ier;
> + int locked = 1;
> +
> + if (oops_in_progress)
> + locked = spin_trylock_irqsave(&port->lock, flags);
> + else
> + spin_lock_irqsave(&port->lock, flags);
> +
> + ier = readl(port->membase + UART_CTRL) &
> + (CTRL_RX_INT | CTRL_TX_RDY_INT);
> + writel(0, port->membase + UART_CTRL);
> +
> + uart_console_write(port, s, count, mvebu_uart_console_putchar);
> +
> + wait_for_xmitr(port);
> +
> + if (ier)
> + writel(ier, port->membase + UART_CTRL);
> +
> + if (locked)
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static int mvebu_uart_console_setup(struct console *co, char *options)
> +{
> + struct uart_port *port;
> + int baud = 9600;
> + int bits = 8;
> + int parity = 'n';
> + int flow = 'n';
> +
> + if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
> + return -EINVAL;
> +
> + port = &mvebu_uart_ports[co->index];
> +
> + if (!port->mapbase || !port->membase) {
> + pr_debug("console on ttyMV%i not present\n", co->index);
> + return -ENODEV;
> + }
> +
> + if (options)
> + uart_parse_options(options, &baud, &parity, &bits, &flow);
> +
> + return uart_set_options(port, co, baud, parity, bits, flow);
> +}
> +
> +static struct uart_driver mvebu_uart_driver;
> +
> +static struct console mvebu_uart_console = {
> + .name = "ttyMV",
> + .write = mvebu_uart_console_write,
> + .device = uart_console_device,
> + .setup = mvebu_uart_console_setup,
> + .flags = CON_PRINTBUFFER,
> + .index = -1,
> + .data = &mvebu_uart_driver,
> +};
> +
> +static int __init mvebu_uart_console_init(void)
> +{
> + register_console(&mvebu_uart_console);
> + return 0;
> +}
> +
> +console_initcall(mvebu_uart_console_init);
> +
> +
> +#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
> +
> +static struct uart_driver mvebu_uart_driver = {
> + .owner = THIS_MODULE,
> + .driver_name = "mvebu_serial",
> + .dev_name = "ttyMV",
> + .nr = MVEBU_NR_UARTS,
> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
> + .cons = &mvebu_uart_console,
> +#endif
> +};
> +
> +static int mvebu_uart_probe(struct platform_device *pdev)
> +{
> + struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> + struct uart_port *port;
> + struct mvebu_uart_data *data;
> + int ret;
> +
> + if (!reg || !irq) {
> + dev_err(&pdev->dev, "no registers/irq defined\n");
> + return -EINVAL;
> + }
> +
> + port = &mvebu_uart_ports[0];
> +
> + spin_lock_init(&port->lock);
> +
> + port->dev = &pdev->dev;
> + port->type = PORT_MVEBU;
> + port->ops = &mvebu_uart_ops;
> + port->regshift = 0;
> +
> + port->fifosize = 32;
> + port->iotype = UPIO_MEM32;
> + port->flags = UPF_FIXED_PORT;
> + port->line = 0; /* single port: force line number to 0 */
> +
> + port->irq = irq->start;
> + port->irqflags = 0;
> + port->mapbase = reg->start;
> +
> + port->membase = devm_ioremap_resource(&pdev->dev, reg);
> + if (IS_ERR(port->membase))
> + return -PTR_ERR(port->membase);
> +
> + data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
> + GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + data->port = port;
> +
> + port->private_data = data;
> + platform_set_drvdata(pdev, data);
> +
> + ret = uart_add_one_port(&mvebu_uart_driver, port);
> + if (ret)
> + return ret;
> + return 0;
> +}
> +
> +static int mvebu_uart_remove(struct platform_device *pdev)
> +{
> + struct mvebu_uart_data *data = platform_get_drvdata(pdev);
> +
> + uart_remove_one_port(&mvebu_uart_driver, data->port);
> + data->port->private_data = NULL;
> + data->port->mapbase = 0;
> + return 0;
> +}
> +
> +/* Match table for of_platform binding */
> +static const struct of_device_id mvebu_uart_of_match[] = {
> + { .compatible = "marvell,armada-3700-uart", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
> +
> +static struct platform_driver mvebu_uart_platform_driver = {
> + .probe = mvebu_uart_probe,
> + .remove = mvebu_uart_remove,
> + .driver = {
> + .owner = THIS_MODULE,
> + .name = "mvebu-uart",
> + .of_match_table = of_match_ptr(mvebu_uart_of_match),
> + },
> +};
> +
> +static int __init mvebu_uart_init(void)
> +{
> + int ret;
> +
> + ret = uart_register_driver(&mvebu_uart_driver);
> + if (ret)
> + return ret;
> +
> + ret = platform_driver_register(&mvebu_uart_platform_driver);
> + if (ret)
> + uart_unregister_driver(&mvebu_uart_driver);
> +
> + return ret;
> +}
> +
> +static void __exit mvebu_uart_exit(void)
> +{
> + platform_driver_unregister(&mvebu_uart_platform_driver);
> + uart_unregister_driver(&mvebu_uart_driver);
> +}
> +
> +arch_initcall(mvebu_uart_init);
> +module_exit(mvebu_uart_exit);
> +
> +MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
> +MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
> +MODULE_LICENSE("GPL");
> diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
> index 3e5d757407fb..e513a4ee369b 100644
> --- a/include/uapi/linux/serial_core.h
> +++ b/include/uapi/linux/serial_core.h
> @@ -261,4 +261,7 @@
> /* STM32 USART */
> #define PORT_STM32 113
>
> +/* MVEBU UART */
> +#define PORT_MVEBU 114
> +
> #endif /* _UAPILINUX_SERIAL_CORE_H */
> --
> 2.5.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port
@ 2016-02-18 17:37 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-18 17:37 UTC (permalink / raw)
To: linux-arm-kernel
Hi Greg and Jiri
On mar., f?vr. 16 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
> From: Wilson Ding <dingwei@marvell.com>
>
> Armada-3700's uart is a simple serial port, which doesn't
> support. Configuring the modem control lines. The uart port has a 32
> bytes Tx FIFO and a 64 bytes Rx FIFO
>
> The uart driver implements the uart core operations. It also support the
> system (early) console based on Armada-3700's serial port.
>
> Known Issue:
>
> The uart driver currently doesn't support clock programming, which means
> the baud-rate stays with the default value configured by the bootloader
> at boot time
>
> [gregory.clement at free-electrons.com: Rewrite many part which are too long
> to enumerate]
>
> Signed-off-by: Wilson Ding <dingwei@marvell.com>
> Signed-off-by: Nadav Haklai <nadavh@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Acked-by: Rob Herring <robh@kernel.org>
I took care of the arm related part of the series, but I will let you
apply this patch in the serial subsystem once you have reviewed it. But
if for any reason you preferred that I took it through mvebu just tell
me.
Thanks,
Gregory
> ---
> .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
> Documentation/kernel-parameters.txt | 6 +
> drivers/tty/serial/Kconfig | 22 +
> drivers/tty/serial/Makefile | 1 +
> drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
> include/uapi/linux/serial_core.h | 3 +
> 6 files changed, 695 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> create mode 100644 drivers/tty/serial/mvebu-uart.c
>
> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> new file mode 100644
> index 000000000000..6087defd9f93
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
> @@ -0,0 +1,13 @@
> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
> +
> +Required properties:
> +- compatible: "marvell,armada-3700-uart"
> +- reg: offset and length of the register set for the device.
> +- interrupts: device interrupt
> +
> +Example:
> + serial at 12000 {
> + compatible = "marvell,armada-3700-uart";
> + reg = <0x12000 0x400>;
> + interrupts = <43>;
> + };
> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> index 87d40a72f6a1..ea0aba48d616 100644
> --- a/Documentation/kernel-parameters.txt
> +++ b/Documentation/kernel-parameters.txt
> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
> A valid base address must be provided, and the serial
> port must already be setup and configured.
>
> + armada3700_uart,<addr>
> + Start an early, polled-mode console on the
> + Armada 3700 serial port at the specified
> + address. The serial port must already be setup
> + and configured. Options are not yet supported.
> +
> earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
> earlyprintk=vga
> earlyprintk=efi
> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> index 39721ec4f415..b291f934d51b 100644
> --- a/drivers/tty/serial/Kconfig
> +++ b/drivers/tty/serial/Kconfig
> @@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
> depends on SERIAL_STM32=y
> select SERIAL_CORE_CONSOLE
>
> +config SERIAL_MVEBU_UART
> + bool "Marvell EBU serial port support"
> + select SERIAL_CORE
> + help
> + This driver is for Marvell EBU SoC's UART. If you have a machine
> + based on the Armada-3700 SoC and wish to use the on-board serial
> + port,
> + say 'Y' here.
> + Otherwise, say 'N'.
> +
> +config SERIAL_MVEBU_CONSOLE
> + bool "Console on Marvell EBU serial port"
> + depends on SERIAL_MVEBU_UART
> + select SERIAL_CORE_CONSOLE
> + select SERIAL_EARLYCON
> + default y
> + help
> + Say 'Y' here if you wish to use Armada-3700 UART as the system console.
> + (the system console is the device which receives all kernel messages
> + and warnings and which allows logins in single user mode)
> + Otherwise, say 'N'.
> +
> endmenu
>
> config SERIAL_MCTRL_GPIO
> diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
> index b391c9b31960..988167595330 100644
> --- a/drivers/tty/serial/Makefile
> +++ b/drivers/tty/serial/Makefile
> @@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
> obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
> obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
> obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
> +obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
>
> # GPIOLIB helpers for modem control lines
> obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
> diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
> new file mode 100644
> index 000000000000..0ff27818bb87
> --- /dev/null
> +++ b/drivers/tty/serial/mvebu-uart.c
> @@ -0,0 +1,650 @@
> +/*
> +* ***************************************************************************
> +* Copyright (C) 2015 Marvell International Ltd.
> +* ***************************************************************************
> +* This program is free software: you can redistribute it and/or modify it
> +* under the terms of the GNU General Public License as published by the Free
> +* Software Foundation, either version 2 of the License, or any later version.
> +*
> +* This program is distributed in the hope that it will be useful,
> +* but WITHOUT ANY WARRANTY; without even the implied warranty of
> +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +* GNU General Public License for more details.
> +*
> +* You should have received a copy of the GNU General Public License
> +* along with this program. If not, see <http://www.gnu.org/licenses/>.
> +* ***************************************************************************
> +*/
> +
> +#include <linux/clk.h>
> +#include <linux/console.h>
> +#include <linux/delay.h>
> +#include <linux/device.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/serial.h>
> +#include <linux/serial_core.h>
> +#include <linux/slab.h>
> +#include <linux/tty.h>
> +#include <linux/tty_flip.h>
> +
> +/* Register Map */
> +#define UART_RBR 0x00
> +#define RBR_BRK_DET BIT(15)
> +#define RBR_FRM_ERR_DET BIT(14)
> +#define RBR_PAR_ERR_DET BIT(13)
> +#define RBR_OVR_ERR_DET BIT(12)
> +
> +#define UART_TSH 0x04
> +
> +#define UART_CTRL 0x08
> +#define CTRL_SOFT_RST BIT(31)
> +#define CTRL_TXFIFO_RST BIT(15)
> +#define CTRL_RXFIFO_RST BIT(14)
> +#define CTRL_ST_MIRR_EN BIT(13)
> +#define CTRL_LPBK_EN BIT(12)
> +#define CTRL_SND_BRK_SEQ BIT(11)
> +#define CTRL_PAR_EN BIT(10)
> +#define CTRL_TWO_STOP BIT(9)
> +#define CTRL_TX_HFL_INT BIT(8)
> +#define CTRL_RX_HFL_INT BIT(7)
> +#define CTRL_TX_EMP_INT BIT(6)
> +#define CTRL_TX_RDY_INT BIT(5)
> +#define CTRL_RX_RDY_INT BIT(4)
> +#define CTRL_BRK_DET_INT BIT(3)
> +#define CTRL_FRM_ERR_INT BIT(2)
> +#define CTRL_PAR_ERR_INT BIT(1)
> +#define CTRL_OVR_ERR_INT BIT(0)
> +#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
> + CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
> +
> +#define UART_STAT 0x0c
> +#define STAT_TX_FIFO_EMP BIT(13)
> +#define STAT_RX_FIFO_EMP BIT(12)
> +#define STAT_TX_FIFO_FUL BIT(11)
> +#define STAT_TX_FIFO_HFL BIT(10)
> +#define STAT_RX_TOGL BIT(9)
> +#define STAT_RX_FIFO_FUL BIT(8)
> +#define STAT_RX_FIFO_HFL BIT(7)
> +#define STAT_TX_EMP BIT(6)
> +#define STAT_TX_RDY BIT(5)
> +#define STAT_RX_RDY BIT(4)
> +#define STAT_BRK_DET BIT(3)
> +#define STAT_FRM_ERR BIT(2)
> +#define STAT_PAR_ERR BIT(1)
> +#define STAT_OVR_ERR BIT(0)
> +#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
> + | STAT_PAR_ERR | STAT_OVR_ERR)
> +
> +#define UART_BRDV 0x10
> +
> +#define MVEBU_NR_UARTS 1
> +
> +#define MVEBU_UART_TYPE "mvebu-uart"
> +
> +static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
> +
> +struct mvebu_uart_data {
> + struct uart_port *port;
> + struct clk *clk;
> +};
> +
> +/* Core UART Driver Operations */
> +static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
> +{
> + unsigned long flags;
> + unsigned int st;
> +
> + spin_lock_irqsave(&port->lock, flags);
> + st = readl(port->membase + UART_STAT);
> + spin_unlock_irqrestore(&port->lock, flags);
> +
> + return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
> +}
> +
> +static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
> +{
> + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
> +}
> +
> +static void mvebu_uart_set_mctrl(struct uart_port *port,
> + unsigned int mctrl)
> +{
> +/*
> + * Even if we do not support configuring the modem control lines, this
> + * function must be proided to the serial core
> + */
> +}
> +
> +static void mvebu_uart_stop_tx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl &= ~CTRL_TX_RDY_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_start_tx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl |= CTRL_TX_RDY_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_stop_rx(struct uart_port *port)
> +{
> + unsigned int ctl = readl(port->membase + UART_CTRL);
> +
> + ctl &= ~CTRL_RX_INT;
> + writel(ctl, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
> +{
> + unsigned int ctl;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&port->lock, flags);
> + ctl = readl(port->membase + UART_CTRL);
> + if (brk == -1)
> + ctl |= CTRL_SND_BRK_SEQ;
> + else
> + ctl &= ~CTRL_SND_BRK_SEQ;
> + writel(ctl, port->membase + UART_CTRL);
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
> +{
> + struct tty_port *tport = &port->state->port;
> + unsigned char ch = 0;
> + char flag = 0;
> +
> + do {
> + if (status & STAT_RX_RDY) {
> + ch = readl(port->membase + UART_RBR);
> + ch &= 0xff;
> + flag = TTY_NORMAL;
> + port->icount.rx++;
> +
> + if (status & STAT_PAR_ERR)
> + port->icount.parity++;
> + }
> +
> + if (status & STAT_BRK_DET) {
> + port->icount.brk++;
> + status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
> + if (uart_handle_break(port))
> + goto ignore_char;
> + }
> +
> + if (status & STAT_OVR_ERR)
> + port->icount.overrun++;
> +
> + if (status & STAT_FRM_ERR)
> + port->icount.frame++;
> +
> + if (uart_handle_sysrq_char(port, ch))
> + goto ignore_char;
> +
> + if (status & port->ignore_status_mask & STAT_PAR_ERR)
> + status &= ~STAT_RX_RDY;
> +
> + status &= port->read_status_mask;
> +
> + if (status & STAT_PAR_ERR)
> + flag = TTY_PARITY;
> +
> + status &= ~port->ignore_status_mask;
> +
> + if (status & STAT_RX_RDY)
> + tty_insert_flip_char(tport, ch, flag);
> +
> + if (status & STAT_BRK_DET)
> + tty_insert_flip_char(tport, 0, TTY_BREAK);
> +
> + if (status & STAT_FRM_ERR)
> + tty_insert_flip_char(tport, 0, TTY_FRAME);
> +
> + if (status & STAT_OVR_ERR)
> + tty_insert_flip_char(tport, 0, TTY_OVERRUN);
> +
> +ignore_char:
> + status = readl(port->membase + UART_STAT);
> + } while (status & (STAT_RX_RDY | STAT_BRK_DET));
> +
> + tty_flip_buffer_push(tport);
> +}
> +
> +static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
> +{
> + struct circ_buf *xmit = &port->state->xmit;
> + unsigned int count;
> + unsigned int st;
> +
> + if (port->x_char) {
> + writel(port->x_char, port->membase + UART_TSH);
> + port->icount.tx++;
> + port->x_char = 0;
> + return;
> + }
> +
> + if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
> + mvebu_uart_stop_tx(port);
> + return;
> + }
> +
> + for (count = 0; count < port->fifosize; count++) {
> + writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
> + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
> + port->icount.tx++;
> +
> + if (uart_circ_empty(xmit))
> + break;
> +
> + st = readl(port->membase + UART_STAT);
> + if (st & STAT_TX_FIFO_FUL)
> + break;
> + }
> +
> + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
> + uart_write_wakeup(port);
> +
> + if (uart_circ_empty(xmit))
> + mvebu_uart_stop_tx(port);
> +}
> +
> +static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
> +{
> + struct uart_port *port = (struct uart_port *)dev_id;
> + unsigned int st = readl(port->membase + UART_STAT);
> +
> + if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
> + mvebu_uart_rx_chars(port, st);
> +
> + if (st & STAT_TX_RDY)
> + mvebu_uart_tx_chars(port, st);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int mvebu_uart_startup(struct uart_port *port)
> +{
> + int ret;
> +
> + writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
> + port->membase + UART_CTRL);
> + udelay(1);
> + writel(CTRL_RX_INT, port->membase + UART_CTRL);
> +
> + ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
> + port);
> + if (ret) {
> + dev_err(port->dev, "failed to request irq\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static void mvebu_uart_shutdown(struct uart_port *port)
> +{
> + writel(0, port->membase + UART_CTRL);
> +}
> +
> +static void mvebu_uart_set_termios(struct uart_port *port,
> + struct ktermios *termios,
> + struct ktermios *old)
> +{
> + unsigned long flags;
> + unsigned int baud;
> +
> + spin_lock_irqsave(&port->lock, flags);
> +
> + port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
> + STAT_TX_RDY | STAT_TX_FIFO_FUL;
> +
> + if (termios->c_iflag & INPCK)
> + port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
> +
> + port->ignore_status_mask = 0;
> + if (termios->c_iflag & IGNPAR)
> + port->ignore_status_mask |=
> + STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
> +
> + if ((termios->c_cflag & CREAD) == 0)
> + port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
> +
> + if (old)
> + tty_termios_copy_hw(termios, old);
> +
> + baud = uart_get_baud_rate(port, termios, old, 0, 460800);
> + uart_update_timeout(port, termios->c_cflag, baud);
> +
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static const char *mvebu_uart_type(struct uart_port *port)
> +{
> + return MVEBU_UART_TYPE;
> +}
> +
> +static void mvebu_uart_release_port(struct uart_port *port)
> +{
> + /* Nothing to do here */
> +}
> +
> +static int mvebu_uart_request_port(struct uart_port *port)
> +{
> + return 0;
> +}
> +
> +#ifdef CONFIG_CONSOLE_POLL
> +static int mvebu_uart_get_poll_char(struct uart_port *port)
> +{
> + unsigned int st = readl(port->membase + UART_STAT);
> +
> + if (!(st & STAT_RX_RDY))
> + return NO_POLL_CHAR;
> +
> + return readl(port->membase + UART_RBR);
> +}
> +
> +static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
> +{
> + unsigned int st;
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> +
> + if (!(st & STAT_TX_FIFO_FUL))
> + break;
> +
> + udelay(1);
> + }
> +
> + writel(c, port->membase + UART_TSH);
> +}
> +#endif
> +
> +static const struct uart_ops mvebu_uart_ops = {
> + .tx_empty = mvebu_uart_tx_empty,
> + .set_mctrl = mvebu_uart_set_mctrl,
> + .get_mctrl = mvebu_uart_get_mctrl,
> + .stop_tx = mvebu_uart_stop_tx,
> + .start_tx = mvebu_uart_start_tx,
> + .stop_rx = mvebu_uart_stop_rx,
> + .break_ctl = mvebu_uart_break_ctl,
> + .startup = mvebu_uart_startup,
> + .shutdown = mvebu_uart_shutdown,
> + .set_termios = mvebu_uart_set_termios,
> + .type = mvebu_uart_type,
> + .release_port = mvebu_uart_release_port,
> + .request_port = mvebu_uart_request_port,
> +#ifdef CONFIG_CONSOLE_POLL
> + .poll_get_char = mvebu_uart_get_poll_char,
> + .poll_put_char = mvebu_uart_put_poll_char,
> +#endif
> +};
> +
> +/* Console Driver Operations */
> +
> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
> +/* Early Console */
> +static void mvebu_uart_putc(struct uart_port *port, int c)
> +{
> + unsigned int st;
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> + if (!(st & STAT_TX_FIFO_FUL))
> + break;
> + }
> +
> + writel(c, port->membase + UART_TSH);
> +
> + for (;;) {
> + st = readl(port->membase + UART_STAT);
> + if (st & STAT_TX_FIFO_EMP)
> + break;
> + }
> +}
> +
> +static void mvebu_uart_putc_early_write(struct console *con,
> + const char *s,
> + unsigned n)
> +{
> + struct earlycon_device *dev = con->data;
> +
> + uart_console_write(&dev->port, s, n, mvebu_uart_putc);
> +}
> +
> +static int __init
> +mvebu_uart_early_console_setup(struct earlycon_device *device,
> + const char *opt)
> +{
> + if (!device->port.membase)
> + return -ENODEV;
> +
> + device->con->write = mvebu_uart_putc_early_write;
> +
> + return 0;
> +}
> +
> +EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
> +OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
> + mvebu_uart_early_console_setup);
> +
> +static void wait_for_xmitr(struct uart_port *port)
> +{
> + u32 val;
> +
> + readl_poll_timeout_atomic(port->membase + UART_STAT, val,
> + (val & STAT_TX_EMP), 1, 10000);
> +}
> +
> +static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
> +{
> + wait_for_xmitr(port);
> + writel(ch, port->membase + UART_TSH);
> +}
> +
> +static void mvebu_uart_console_write(struct console *co, const char *s,
> + unsigned int count)
> +{
> + struct uart_port *port = &mvebu_uart_ports[co->index];
> + unsigned long flags;
> + unsigned int ier;
> + int locked = 1;
> +
> + if (oops_in_progress)
> + locked = spin_trylock_irqsave(&port->lock, flags);
> + else
> + spin_lock_irqsave(&port->lock, flags);
> +
> + ier = readl(port->membase + UART_CTRL) &
> + (CTRL_RX_INT | CTRL_TX_RDY_INT);
> + writel(0, port->membase + UART_CTRL);
> +
> + uart_console_write(port, s, count, mvebu_uart_console_putchar);
> +
> + wait_for_xmitr(port);
> +
> + if (ier)
> + writel(ier, port->membase + UART_CTRL);
> +
> + if (locked)
> + spin_unlock_irqrestore(&port->lock, flags);
> +}
> +
> +static int mvebu_uart_console_setup(struct console *co, char *options)
> +{
> + struct uart_port *port;
> + int baud = 9600;
> + int bits = 8;
> + int parity = 'n';
> + int flow = 'n';
> +
> + if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
> + return -EINVAL;
> +
> + port = &mvebu_uart_ports[co->index];
> +
> + if (!port->mapbase || !port->membase) {
> + pr_debug("console on ttyMV%i not present\n", co->index);
> + return -ENODEV;
> + }
> +
> + if (options)
> + uart_parse_options(options, &baud, &parity, &bits, &flow);
> +
> + return uart_set_options(port, co, baud, parity, bits, flow);
> +}
> +
> +static struct uart_driver mvebu_uart_driver;
> +
> +static struct console mvebu_uart_console = {
> + .name = "ttyMV",
> + .write = mvebu_uart_console_write,
> + .device = uart_console_device,
> + .setup = mvebu_uart_console_setup,
> + .flags = CON_PRINTBUFFER,
> + .index = -1,
> + .data = &mvebu_uart_driver,
> +};
> +
> +static int __init mvebu_uart_console_init(void)
> +{
> + register_console(&mvebu_uart_console);
> + return 0;
> +}
> +
> +console_initcall(mvebu_uart_console_init);
> +
> +
> +#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
> +
> +static struct uart_driver mvebu_uart_driver = {
> + .owner = THIS_MODULE,
> + .driver_name = "mvebu_serial",
> + .dev_name = "ttyMV",
> + .nr = MVEBU_NR_UARTS,
> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
> + .cons = &mvebu_uart_console,
> +#endif
> +};
> +
> +static int mvebu_uart_probe(struct platform_device *pdev)
> +{
> + struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> + struct uart_port *port;
> + struct mvebu_uart_data *data;
> + int ret;
> +
> + if (!reg || !irq) {
> + dev_err(&pdev->dev, "no registers/irq defined\n");
> + return -EINVAL;
> + }
> +
> + port = &mvebu_uart_ports[0];
> +
> + spin_lock_init(&port->lock);
> +
> + port->dev = &pdev->dev;
> + port->type = PORT_MVEBU;
> + port->ops = &mvebu_uart_ops;
> + port->regshift = 0;
> +
> + port->fifosize = 32;
> + port->iotype = UPIO_MEM32;
> + port->flags = UPF_FIXED_PORT;
> + port->line = 0; /* single port: force line number to 0 */
> +
> + port->irq = irq->start;
> + port->irqflags = 0;
> + port->mapbase = reg->start;
> +
> + port->membase = devm_ioremap_resource(&pdev->dev, reg);
> + if (IS_ERR(port->membase))
> + return -PTR_ERR(port->membase);
> +
> + data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
> + GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + data->port = port;
> +
> + port->private_data = data;
> + platform_set_drvdata(pdev, data);
> +
> + ret = uart_add_one_port(&mvebu_uart_driver, port);
> + if (ret)
> + return ret;
> + return 0;
> +}
> +
> +static int mvebu_uart_remove(struct platform_device *pdev)
> +{
> + struct mvebu_uart_data *data = platform_get_drvdata(pdev);
> +
> + uart_remove_one_port(&mvebu_uart_driver, data->port);
> + data->port->private_data = NULL;
> + data->port->mapbase = 0;
> + return 0;
> +}
> +
> +/* Match table for of_platform binding */
> +static const struct of_device_id mvebu_uart_of_match[] = {
> + { .compatible = "marvell,armada-3700-uart", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
> +
> +static struct platform_driver mvebu_uart_platform_driver = {
> + .probe = mvebu_uart_probe,
> + .remove = mvebu_uart_remove,
> + .driver = {
> + .owner = THIS_MODULE,
> + .name = "mvebu-uart",
> + .of_match_table = of_match_ptr(mvebu_uart_of_match),
> + },
> +};
> +
> +static int __init mvebu_uart_init(void)
> +{
> + int ret;
> +
> + ret = uart_register_driver(&mvebu_uart_driver);
> + if (ret)
> + return ret;
> +
> + ret = platform_driver_register(&mvebu_uart_platform_driver);
> + if (ret)
> + uart_unregister_driver(&mvebu_uart_driver);
> +
> + return ret;
> +}
> +
> +static void __exit mvebu_uart_exit(void)
> +{
> + platform_driver_unregister(&mvebu_uart_platform_driver);
> + uart_unregister_driver(&mvebu_uart_driver);
> +}
> +
> +arch_initcall(mvebu_uart_init);
> +module_exit(mvebu_uart_exit);
> +
> +MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
> +MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
> +MODULE_LICENSE("GPL");
> diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
> index 3e5d757407fb..e513a4ee369b 100644
> --- a/include/uapi/linux/serial_core.h
> +++ b/include/uapi/linux/serial_core.h
> @@ -261,4 +261,7 @@
> /* STM32 USART */
> #define PORT_STM32 113
>
> +/* MVEBU UART */
> +#define PORT_MVEBU 114
> +
> #endif /* _UAPILINUX_SERIAL_CORE_H */
> --
> 2.5.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 04/12] ata: ahci_mvebu: add support for Armada 3700 variant
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-18 17:39 ` Gregory CLEMENT
-1 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-18 17:39 UTC (permalink / raw)
To: Tejun Heo, Hans de Goede
Cc: Andrew Lunn, Sebastian Hesselbarth, arm, Catalin Marinas,
Will Deacon, Jonathan Corbet, Greg Kroah-Hartman, Jiri Slaby,
linux-serial, Jason Cooper, linux-ide, linux-kernel,
Mark Rutland, devicetree, Thomas Petazzoni, linux-arm-kernel,
Lior Amsalem, Nadav Haklai, Omri Itach
Hi Tejun and Hans,
On mar., févr. 16 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
> From: Lior Amsalem <alior@marvell.com>
>
> The main difference in the new Armada 3700 is that no address
> decoding needs to take place in the driver probe.
>
> [gregory.clement@free-electrons.com: reformulate the commit log]
>
> Signed-off-by: Lior Amsalem <alior@marvell.com>
> Reviewed-by: Nadav Haklai <nadavh@marvell.com>
> Tested-by: Nadav Haklai <nadavh@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
I took care of the arm related part of the series, but I will let you
apply this patch in the sata subsystem once you have reviewed it. But
if for any reason you preferred that I took it through mvebu just tell
me.
Thanks,
Gregory
> ---
> drivers/ata/ahci_mvebu.c | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
> index f7a7fa81740e..de7128d81e9c 100644
> --- a/drivers/ata/ahci_mvebu.c
> +++ b/drivers/ata/ahci_mvebu.c
> @@ -112,12 +112,15 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
> if (rc)
> return rc;
>
> - dram = mv_mbus_dram_info();
> - if (!dram)
> - return -ENODEV;
> + if (of_device_is_compatible(pdev->dev.of_node,
> + "marvell,armada-380-ahci")) {
> + dram = mv_mbus_dram_info();
> + if (!dram)
> + return -ENODEV;
>
> - ahci_mvebu_mbus_config(hpriv, dram);
> - ahci_mvebu_regret_option(hpriv);
> + ahci_mvebu_mbus_config(hpriv, dram);
> + ahci_mvebu_regret_option(hpriv);
> + }
>
> rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
> &ahci_platform_sht);
> @@ -133,6 +136,7 @@ disable_resources:
>
> static const struct of_device_id ahci_mvebu_of_match[] = {
> { .compatible = "marvell,armada-380-ahci", },
> + { .compatible = "marvell,armada-3700-ahci", },
> { },
> };
> MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
> --
> 2.5.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 04/12] ata: ahci_mvebu: add support for Armada 3700 variant
@ 2016-02-18 17:39 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-02-18 17:39 UTC (permalink / raw)
To: linux-arm-kernel
Hi Tejun and Hans,
On mar., f?vr. 16 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
> From: Lior Amsalem <alior@marvell.com>
>
> The main difference in the new Armada 3700 is that no address
> decoding needs to take place in the driver probe.
>
> [gregory.clement at free-electrons.com: reformulate the commit log]
>
> Signed-off-by: Lior Amsalem <alior@marvell.com>
> Reviewed-by: Nadav Haklai <nadavh@marvell.com>
> Tested-by: Nadav Haklai <nadavh@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
I took care of the arm related part of the series, but I will let you
apply this patch in the sata subsystem once you have reviewed it. But
if for any reason you preferred that I took it through mvebu just tell
me.
Thanks,
Gregory
> ---
> drivers/ata/ahci_mvebu.c | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
> index f7a7fa81740e..de7128d81e9c 100644
> --- a/drivers/ata/ahci_mvebu.c
> +++ b/drivers/ata/ahci_mvebu.c
> @@ -112,12 +112,15 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
> if (rc)
> return rc;
>
> - dram = mv_mbus_dram_info();
> - if (!dram)
> - return -ENODEV;
> + if (of_device_is_compatible(pdev->dev.of_node,
> + "marvell,armada-380-ahci")) {
> + dram = mv_mbus_dram_info();
> + if (!dram)
> + return -ENODEV;
>
> - ahci_mvebu_mbus_config(hpriv, dram);
> - ahci_mvebu_regret_option(hpriv);
> + ahci_mvebu_mbus_config(hpriv, dram);
> + ahci_mvebu_regret_option(hpriv);
> + }
>
> rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
> &ahci_platform_sht);
> @@ -133,6 +136,7 @@ disable_resources:
>
> static const struct of_device_id ahci_mvebu_of_match[] = {
> { .compatible = "marvell,armada-380-ahci", },
> + { .compatible = "marvell,armada-3700-ahci", },
> { },
> };
> MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
> --
> 2.5.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 04/12] ata: ahci_mvebu: add support for Armada 3700 variant
2016-02-16 18:14 ` Gregory CLEMENT
@ 2016-02-18 17:41 ` Tejun Heo
-1 siblings, 0 replies; 54+ messages in thread
From: Tejun Heo @ 2016-02-18 17:41 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, arm,
Catalin Marinas, Will Deacon, Jonathan Corbet,
Greg Kroah-Hartman, Jiri Slaby, linux-serial, Hans de Goede,
linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
On Tue, Feb 16, 2016 at 07:14:54PM +0100, Gregory CLEMENT wrote:
> From: Lior Amsalem <alior@marvell.com>
>
> The main difference in the new Armada 3700 is that no address
> decoding needs to take place in the driver probe.
>
> [gregory.clement@free-electrons.com: reformulate the commit log]
>
> Signed-off-by: Lior Amsalem <alior@marvell.com>
> Reviewed-by: Nadav Haklai <nadavh@marvell.com>
> Tested-by: Nadav Haklai <nadavh@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Applied to libata/for-4.6.
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 04/12] ata: ahci_mvebu: add support for Armada 3700 variant
@ 2016-02-18 17:41 ` Tejun Heo
0 siblings, 0 replies; 54+ messages in thread
From: Tejun Heo @ 2016-02-18 17:41 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 16, 2016 at 07:14:54PM +0100, Gregory CLEMENT wrote:
> From: Lior Amsalem <alior@marvell.com>
>
> The main difference in the new Armada 3700 is that no address
> decoding needs to take place in the driver probe.
>
> [gregory.clement at free-electrons.com: reformulate the commit log]
>
> Signed-off-by: Lior Amsalem <alior@marvell.com>
> Reviewed-by: Nadav Haklai <nadavh@marvell.com>
> Tested-by: Nadav Haklai <nadavh@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Applied to libata/for-4.6.
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 12/12] arm64: defconfig: enable Armada 3700 related config
2016-02-16 18:15 ` Gregory CLEMENT
@ 2016-02-25 0:47 ` Olof Johansson
-1 siblings, 0 replies; 54+ messages in thread
From: Olof Johansson @ 2016-02-25 0:47 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, arm,
Catalin Marinas, Will Deacon, Jonathan Corbet,
Greg Kroah-Hartman, Jiri Slaby, linux-serial, Tejun Heo,
Hans de Goede, linux-ide, linux-kernel, Mark Rutland, devicetree,
Thomas Petazzoni, linux-arm-kernel, Lior Amsalem, Nadav Haklai,
Omri Itach
On Tue, Feb 16, 2016 at 07:15:02PM +0100, Gregory CLEMENT wrote:
> This patch enables the configuration for the Armada 3700 family and for
> the related driver it uses.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
> arch/arm64/configs/defconfig | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 18ca9fb9e65f..7ca2f0247ec5 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -31,6 +31,7 @@ CONFIG_MODULES=y
> CONFIG_MODULE_UNLOAD=y
> # CONFIG_BLK_DEV_BSG is not set
> # CONFIG_IOSCHED_DEADLINE is not set
> +CONFIG_ARCH_MVEBU=y
> CONFIG_ARCH_BCM_IPROC=y
> CONFIG_ARCH_BERLIN=y
> CONFIG_ARCH_EXYNOS7=y
How did this end up here? It's in alphabetical order in the Kconfig, and here
you're inserting it first. Savedefconfig inserts it at the expected location.
I've fixed it up in the merge now, which isn't ideal. Maybe you edited
the defconfig by hand?
-Olof
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 12/12] arm64: defconfig: enable Armada 3700 related config
@ 2016-02-25 0:47 ` Olof Johansson
0 siblings, 0 replies; 54+ messages in thread
From: Olof Johansson @ 2016-02-25 0:47 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 16, 2016 at 07:15:02PM +0100, Gregory CLEMENT wrote:
> This patch enables the configuration for the Armada 3700 family and for
> the related driver it uses.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
> arch/arm64/configs/defconfig | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 18ca9fb9e65f..7ca2f0247ec5 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -31,6 +31,7 @@ CONFIG_MODULES=y
> CONFIG_MODULE_UNLOAD=y
> # CONFIG_BLK_DEV_BSG is not set
> # CONFIG_IOSCHED_DEADLINE is not set
> +CONFIG_ARCH_MVEBU=y
> CONFIG_ARCH_BCM_IPROC=y
> CONFIG_ARCH_BERLIN=y
> CONFIG_ARCH_EXYNOS7=y
How did this end up here? It's in alphabetical order in the Kconfig, and here
you're inserting it first. Savedefconfig inserts it at the expected location.
I've fixed it up in the merge now, which isn't ideal. Maybe you edited
the defconfig by hand?
-Olof
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 05/12] arm64: add mvebu architecture entry
@ 2016-03-04 13:23 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-03-04 13:23 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby
Cc: Andrew Lunn, Sebastian Hesselbarth, Jason Cooper, linux-serial,
linux-kernel, devicetree, Thomas Petazzoni, linux-arm-kernel,
Lior Amsalem, Nadav Haklai, Omri Itach
Hi Greg and Jiri,
this is a gentle ping about this patch.
On jeu., févr. 18 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
> Hi Greg and Jiri
>
> On mar., févr. 16 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>> From: Wilson Ding <dingwei@marvell.com>
>>
>> Armada-3700's uart is a simple serial port, which doesn't
>> support. Configuring the modem control lines. The uart port has a 32
>> bytes Tx FIFO and a 64 bytes Rx FIFO
>>
>> The uart driver implements the uart core operations. It also support the
>> system (early) console based on Armada-3700's serial port.
>>
>> Known Issue:
>>
>> The uart driver currently doesn't support clock programming, which means
>> the baud-rate stays with the default value configured by the bootloader
>> at boot time
>>
>> [gregory.clement@free-electrons.com: Rewrite many part which are too long
>> to enumerate]
>>
>> Signed-off-by: Wilson Ding <dingwei@marvell.com>
>> Signed-off-by: Nadav Haklai <nadavh@marvell.com>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>
> I took care of the arm related part of the series, but I will let you
> apply this patch in the serial subsystem once you have reviewed it. But
> if for any reason you preferred that I took it through mvebu just tell
> me.
>
Finally all the other part of the series have all been pulled in their
respective subsystem. The device tree binding for this driver have been
acked by the device tree maintainer. And this patch is the last
remaining piece for having a initial support for the Armada 3700
platform.
So I wondered what was the status of this patch? Do you plan to apply it
or do you have some other comments ?
Thanks,
Gregory
>
>> ---
>> .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
>> Documentation/kernel-parameters.txt | 6 +
>> drivers/tty/serial/Kconfig | 22 +
>> drivers/tty/serial/Makefile | 1 +
>> drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
>> include/uapi/linux/serial_core.h | 3 +
>> 6 files changed, 695 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> create mode 100644 drivers/tty/serial/mvebu-uart.c
>>
>> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> new file mode 100644
>> index 000000000000..6087defd9f93
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> @@ -0,0 +1,13 @@
>> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
>> +
>> +Required properties:
>> +- compatible: "marvell,armada-3700-uart"
>> +- reg: offset and length of the register set for the device.
>> +- interrupts: device interrupt
>> +
>> +Example:
>> + serial@12000 {
>> + compatible = "marvell,armada-3700-uart";
>> + reg = <0x12000 0x400>;
>> + interrupts = <43>;
>> + };
>> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
>> index 87d40a72f6a1..ea0aba48d616 100644
>> --- a/Documentation/kernel-parameters.txt
>> +++ b/Documentation/kernel-parameters.txt
>> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
>> A valid base address must be provided, and the serial
>> port must already be setup and configured.
>>
>> + armada3700_uart,<addr>
>> + Start an early, polled-mode console on the
>> + Armada 3700 serial port at the specified
>> + address. The serial port must already be setup
>> + and configured. Options are not yet supported.
>> +
>> earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
>> earlyprintk=vga
>> earlyprintk=efi
>> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
>> index 39721ec4f415..b291f934d51b 100644
>> --- a/drivers/tty/serial/Kconfig
>> +++ b/drivers/tty/serial/Kconfig
>> @@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
>> depends on SERIAL_STM32=y
>> select SERIAL_CORE_CONSOLE
>>
>> +config SERIAL_MVEBU_UART
>> + bool "Marvell EBU serial port support"
>> + select SERIAL_CORE
>> + help
>> + This driver is for Marvell EBU SoC's UART. If you have a machine
>> + based on the Armada-3700 SoC and wish to use the on-board serial
>> + port,
>> + say 'Y' here.
>> + Otherwise, say 'N'.
>> +
>> +config SERIAL_MVEBU_CONSOLE
>> + bool "Console on Marvell EBU serial port"
>> + depends on SERIAL_MVEBU_UART
>> + select SERIAL_CORE_CONSOLE
>> + select SERIAL_EARLYCON
>> + default y
>> + help
>> + Say 'Y' here if you wish to use Armada-3700 UART as the system console.
>> + (the system console is the device which receives all kernel messages
>> + and warnings and which allows logins in single user mode)
>> + Otherwise, say 'N'.
>> +
>> endmenu
>>
>> config SERIAL_MCTRL_GPIO
>> diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
>> index b391c9b31960..988167595330 100644
>> --- a/drivers/tty/serial/Makefile
>> +++ b/drivers/tty/serial/Makefile
>> @@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
>> obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
>> obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
>> obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
>> +obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
>>
>> # GPIOLIB helpers for modem control lines
>> obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
>> diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
>> new file mode 100644
>> index 000000000000..0ff27818bb87
>> --- /dev/null
>> +++ b/drivers/tty/serial/mvebu-uart.c
>> @@ -0,0 +1,650 @@
>> +/*
>> +* ***************************************************************************
>> +* Copyright (C) 2015 Marvell International Ltd.
>> +* ***************************************************************************
>> +* This program is free software: you can redistribute it and/or modify it
>> +* under the terms of the GNU General Public License as published by the Free
>> +* Software Foundation, either version 2 of the License, or any later version.
>> +*
>> +* This program is distributed in the hope that it will be useful,
>> +* but WITHOUT ANY WARRANTY; without even the implied warranty of
>> +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> +* GNU General Public License for more details.
>> +*
>> +* You should have received a copy of the GNU General Public License
>> +* along with this program. If not, see <http://www.gnu.org/licenses/>.
>> +* ***************************************************************************
>> +*/
>> +
>> +#include <linux/clk.h>
>> +#include <linux/console.h>
>> +#include <linux/delay.h>
>> +#include <linux/device.h>
>> +#include <linux/init.h>
>> +#include <linux/io.h>
>> +#include <linux/iopoll.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/of_device.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/serial.h>
>> +#include <linux/serial_core.h>
>> +#include <linux/slab.h>
>> +#include <linux/tty.h>
>> +#include <linux/tty_flip.h>
>> +
>> +/* Register Map */
>> +#define UART_RBR 0x00
>> +#define RBR_BRK_DET BIT(15)
>> +#define RBR_FRM_ERR_DET BIT(14)
>> +#define RBR_PAR_ERR_DET BIT(13)
>> +#define RBR_OVR_ERR_DET BIT(12)
>> +
>> +#define UART_TSH 0x04
>> +
>> +#define UART_CTRL 0x08
>> +#define CTRL_SOFT_RST BIT(31)
>> +#define CTRL_TXFIFO_RST BIT(15)
>> +#define CTRL_RXFIFO_RST BIT(14)
>> +#define CTRL_ST_MIRR_EN BIT(13)
>> +#define CTRL_LPBK_EN BIT(12)
>> +#define CTRL_SND_BRK_SEQ BIT(11)
>> +#define CTRL_PAR_EN BIT(10)
>> +#define CTRL_TWO_STOP BIT(9)
>> +#define CTRL_TX_HFL_INT BIT(8)
>> +#define CTRL_RX_HFL_INT BIT(7)
>> +#define CTRL_TX_EMP_INT BIT(6)
>> +#define CTRL_TX_RDY_INT BIT(5)
>> +#define CTRL_RX_RDY_INT BIT(4)
>> +#define CTRL_BRK_DET_INT BIT(3)
>> +#define CTRL_FRM_ERR_INT BIT(2)
>> +#define CTRL_PAR_ERR_INT BIT(1)
>> +#define CTRL_OVR_ERR_INT BIT(0)
>> +#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
>> + CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
>> +
>> +#define UART_STAT 0x0c
>> +#define STAT_TX_FIFO_EMP BIT(13)
>> +#define STAT_RX_FIFO_EMP BIT(12)
>> +#define STAT_TX_FIFO_FUL BIT(11)
>> +#define STAT_TX_FIFO_HFL BIT(10)
>> +#define STAT_RX_TOGL BIT(9)
>> +#define STAT_RX_FIFO_FUL BIT(8)
>> +#define STAT_RX_FIFO_HFL BIT(7)
>> +#define STAT_TX_EMP BIT(6)
>> +#define STAT_TX_RDY BIT(5)
>> +#define STAT_RX_RDY BIT(4)
>> +#define STAT_BRK_DET BIT(3)
>> +#define STAT_FRM_ERR BIT(2)
>> +#define STAT_PAR_ERR BIT(1)
>> +#define STAT_OVR_ERR BIT(0)
>> +#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
>> + | STAT_PAR_ERR | STAT_OVR_ERR)
>> +
>> +#define UART_BRDV 0x10
>> +
>> +#define MVEBU_NR_UARTS 1
>> +
>> +#define MVEBU_UART_TYPE "mvebu-uart"
>> +
>> +static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
>> +
>> +struct mvebu_uart_data {
>> + struct uart_port *port;
>> + struct clk *clk;
>> +};
>> +
>> +/* Core UART Driver Operations */
>> +static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
>> +{
>> + unsigned long flags;
>> + unsigned int st;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> + st = readl(port->membase + UART_STAT);
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +
>> + return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
>> +}
>> +
>> +static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
>> +{
>> + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
>> +}
>> +
>> +static void mvebu_uart_set_mctrl(struct uart_port *port,
>> + unsigned int mctrl)
>> +{
>> +/*
>> + * Even if we do not support configuring the modem control lines, this
>> + * function must be proided to the serial core
>> + */
>> +}
>> +
>> +static void mvebu_uart_stop_tx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl &= ~CTRL_TX_RDY_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_start_tx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl |= CTRL_TX_RDY_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_stop_rx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl &= ~CTRL_RX_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
>> +{
>> + unsigned int ctl;
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> + ctl = readl(port->membase + UART_CTRL);
>> + if (brk == -1)
>> + ctl |= CTRL_SND_BRK_SEQ;
>> + else
>> + ctl &= ~CTRL_SND_BRK_SEQ;
>> + writel(ctl, port->membase + UART_CTRL);
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
>> +{
>> + struct tty_port *tport = &port->state->port;
>> + unsigned char ch = 0;
>> + char flag = 0;
>> +
>> + do {
>> + if (status & STAT_RX_RDY) {
>> + ch = readl(port->membase + UART_RBR);
>> + ch &= 0xff;
>> + flag = TTY_NORMAL;
>> + port->icount.rx++;
>> +
>> + if (status & STAT_PAR_ERR)
>> + port->icount.parity++;
>> + }
>> +
>> + if (status & STAT_BRK_DET) {
>> + port->icount.brk++;
>> + status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
>> + if (uart_handle_break(port))
>> + goto ignore_char;
>> + }
>> +
>> + if (status & STAT_OVR_ERR)
>> + port->icount.overrun++;
>> +
>> + if (status & STAT_FRM_ERR)
>> + port->icount.frame++;
>> +
>> + if (uart_handle_sysrq_char(port, ch))
>> + goto ignore_char;
>> +
>> + if (status & port->ignore_status_mask & STAT_PAR_ERR)
>> + status &= ~STAT_RX_RDY;
>> +
>> + status &= port->read_status_mask;
>> +
>> + if (status & STAT_PAR_ERR)
>> + flag = TTY_PARITY;
>> +
>> + status &= ~port->ignore_status_mask;
>> +
>> + if (status & STAT_RX_RDY)
>> + tty_insert_flip_char(tport, ch, flag);
>> +
>> + if (status & STAT_BRK_DET)
>> + tty_insert_flip_char(tport, 0, TTY_BREAK);
>> +
>> + if (status & STAT_FRM_ERR)
>> + tty_insert_flip_char(tport, 0, TTY_FRAME);
>> +
>> + if (status & STAT_OVR_ERR)
>> + tty_insert_flip_char(tport, 0, TTY_OVERRUN);
>> +
>> +ignore_char:
>> + status = readl(port->membase + UART_STAT);
>> + } while (status & (STAT_RX_RDY | STAT_BRK_DET));
>> +
>> + tty_flip_buffer_push(tport);
>> +}
>> +
>> +static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
>> +{
>> + struct circ_buf *xmit = &port->state->xmit;
>> + unsigned int count;
>> + unsigned int st;
>> +
>> + if (port->x_char) {
>> + writel(port->x_char, port->membase + UART_TSH);
>> + port->icount.tx++;
>> + port->x_char = 0;
>> + return;
>> + }
>> +
>> + if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
>> + mvebu_uart_stop_tx(port);
>> + return;
>> + }
>> +
>> + for (count = 0; count < port->fifosize; count++) {
>> + writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
>> + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
>> + port->icount.tx++;
>> +
>> + if (uart_circ_empty(xmit))
>> + break;
>> +
>> + st = readl(port->membase + UART_STAT);
>> + if (st & STAT_TX_FIFO_FUL)
>> + break;
>> + }
>> +
>> + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
>> + uart_write_wakeup(port);
>> +
>> + if (uart_circ_empty(xmit))
>> + mvebu_uart_stop_tx(port);
>> +}
>> +
>> +static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
>> +{
>> + struct uart_port *port = (struct uart_port *)dev_id;
>> + unsigned int st = readl(port->membase + UART_STAT);
>> +
>> + if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
>> + mvebu_uart_rx_chars(port, st);
>> +
>> + if (st & STAT_TX_RDY)
>> + mvebu_uart_tx_chars(port, st);
>> +
>> + return IRQ_HANDLED;
>> +}
>> +
>> +static int mvebu_uart_startup(struct uart_port *port)
>> +{
>> + int ret;
>> +
>> + writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
>> + port->membase + UART_CTRL);
>> + udelay(1);
>> + writel(CTRL_RX_INT, port->membase + UART_CTRL);
>> +
>> + ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
>> + port);
>> + if (ret) {
>> + dev_err(port->dev, "failed to request irq\n");
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static void mvebu_uart_shutdown(struct uart_port *port)
>> +{
>> + writel(0, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_set_termios(struct uart_port *port,
>> + struct ktermios *termios,
>> + struct ktermios *old)
>> +{
>> + unsigned long flags;
>> + unsigned int baud;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> +
>> + port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
>> + STAT_TX_RDY | STAT_TX_FIFO_FUL;
>> +
>> + if (termios->c_iflag & INPCK)
>> + port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
>> +
>> + port->ignore_status_mask = 0;
>> + if (termios->c_iflag & IGNPAR)
>> + port->ignore_status_mask |=
>> + STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
>> +
>> + if ((termios->c_cflag & CREAD) == 0)
>> + port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
>> +
>> + if (old)
>> + tty_termios_copy_hw(termios, old);
>> +
>> + baud = uart_get_baud_rate(port, termios, old, 0, 460800);
>> + uart_update_timeout(port, termios->c_cflag, baud);
>> +
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static const char *mvebu_uart_type(struct uart_port *port)
>> +{
>> + return MVEBU_UART_TYPE;
>> +}
>> +
>> +static void mvebu_uart_release_port(struct uart_port *port)
>> +{
>> + /* Nothing to do here */
>> +}
>> +
>> +static int mvebu_uart_request_port(struct uart_port *port)
>> +{
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_CONSOLE_POLL
>> +static int mvebu_uart_get_poll_char(struct uart_port *port)
>> +{
>> + unsigned int st = readl(port->membase + UART_STAT);
>> +
>> + if (!(st & STAT_RX_RDY))
>> + return NO_POLL_CHAR;
>> +
>> + return readl(port->membase + UART_RBR);
>> +}
>> +
>> +static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
>> +{
>> + unsigned int st;
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> +
>> + if (!(st & STAT_TX_FIFO_FUL))
>> + break;
>> +
>> + udelay(1);
>> + }
>> +
>> + writel(c, port->membase + UART_TSH);
>> +}
>> +#endif
>> +
>> +static const struct uart_ops mvebu_uart_ops = {
>> + .tx_empty = mvebu_uart_tx_empty,
>> + .set_mctrl = mvebu_uart_set_mctrl,
>> + .get_mctrl = mvebu_uart_get_mctrl,
>> + .stop_tx = mvebu_uart_stop_tx,
>> + .start_tx = mvebu_uart_start_tx,
>> + .stop_rx = mvebu_uart_stop_rx,
>> + .break_ctl = mvebu_uart_break_ctl,
>> + .startup = mvebu_uart_startup,
>> + .shutdown = mvebu_uart_shutdown,
>> + .set_termios = mvebu_uart_set_termios,
>> + .type = mvebu_uart_type,
>> + .release_port = mvebu_uart_release_port,
>> + .request_port = mvebu_uart_request_port,
>> +#ifdef CONFIG_CONSOLE_POLL
>> + .poll_get_char = mvebu_uart_get_poll_char,
>> + .poll_put_char = mvebu_uart_put_poll_char,
>> +#endif
>> +};
>> +
>> +/* Console Driver Operations */
>> +
>> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
>> +/* Early Console */
>> +static void mvebu_uart_putc(struct uart_port *port, int c)
>> +{
>> + unsigned int st;
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> + if (!(st & STAT_TX_FIFO_FUL))
>> + break;
>> + }
>> +
>> + writel(c, port->membase + UART_TSH);
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> + if (st & STAT_TX_FIFO_EMP)
>> + break;
>> + }
>> +}
>> +
>> +static void mvebu_uart_putc_early_write(struct console *con,
>> + const char *s,
>> + unsigned n)
>> +{
>> + struct earlycon_device *dev = con->data;
>> +
>> + uart_console_write(&dev->port, s, n, mvebu_uart_putc);
>> +}
>> +
>> +static int __init
>> +mvebu_uart_early_console_setup(struct earlycon_device *device,
>> + const char *opt)
>> +{
>> + if (!device->port.membase)
>> + return -ENODEV;
>> +
>> + device->con->write = mvebu_uart_putc_early_write;
>> +
>> + return 0;
>> +}
>> +
>> +EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
>> +OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
>> + mvebu_uart_early_console_setup);
>> +
>> +static void wait_for_xmitr(struct uart_port *port)
>> +{
>> + u32 val;
>> +
>> + readl_poll_timeout_atomic(port->membase + UART_STAT, val,
>> + (val & STAT_TX_EMP), 1, 10000);
>> +}
>> +
>> +static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
>> +{
>> + wait_for_xmitr(port);
>> + writel(ch, port->membase + UART_TSH);
>> +}
>> +
>> +static void mvebu_uart_console_write(struct console *co, const char *s,
>> + unsigned int count)
>> +{
>> + struct uart_port *port = &mvebu_uart_ports[co->index];
>> + unsigned long flags;
>> + unsigned int ier;
>> + int locked = 1;
>> +
>> + if (oops_in_progress)
>> + locked = spin_trylock_irqsave(&port->lock, flags);
>> + else
>> + spin_lock_irqsave(&port->lock, flags);
>> +
>> + ier = readl(port->membase + UART_CTRL) &
>> + (CTRL_RX_INT | CTRL_TX_RDY_INT);
>> + writel(0, port->membase + UART_CTRL);
>> +
>> + uart_console_write(port, s, count, mvebu_uart_console_putchar);
>> +
>> + wait_for_xmitr(port);
>> +
>> + if (ier)
>> + writel(ier, port->membase + UART_CTRL);
>> +
>> + if (locked)
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static int mvebu_uart_console_setup(struct console *co, char *options)
>> +{
>> + struct uart_port *port;
>> + int baud = 9600;
>> + int bits = 8;
>> + int parity = 'n';
>> + int flow = 'n';
>> +
>> + if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
>> + return -EINVAL;
>> +
>> + port = &mvebu_uart_ports[co->index];
>> +
>> + if (!port->mapbase || !port->membase) {
>> + pr_debug("console on ttyMV%i not present\n", co->index);
>> + return -ENODEV;
>> + }
>> +
>> + if (options)
>> + uart_parse_options(options, &baud, &parity, &bits, &flow);
>> +
>> + return uart_set_options(port, co, baud, parity, bits, flow);
>> +}
>> +
>> +static struct uart_driver mvebu_uart_driver;
>> +
>> +static struct console mvebu_uart_console = {
>> + .name = "ttyMV",
>> + .write = mvebu_uart_console_write,
>> + .device = uart_console_device,
>> + .setup = mvebu_uart_console_setup,
>> + .flags = CON_PRINTBUFFER,
>> + .index = -1,
>> + .data = &mvebu_uart_driver,
>> +};
>> +
>> +static int __init mvebu_uart_console_init(void)
>> +{
>> + register_console(&mvebu_uart_console);
>> + return 0;
>> +}
>> +
>> +console_initcall(mvebu_uart_console_init);
>> +
>> +
>> +#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
>> +
>> +static struct uart_driver mvebu_uart_driver = {
>> + .owner = THIS_MODULE,
>> + .driver_name = "mvebu_serial",
>> + .dev_name = "ttyMV",
>> + .nr = MVEBU_NR_UARTS,
>> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
>> + .cons = &mvebu_uart_console,
>> +#endif
>> +};
>> +
>> +static int mvebu_uart_probe(struct platform_device *pdev)
>> +{
>> + struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
>> + struct uart_port *port;
>> + struct mvebu_uart_data *data;
>> + int ret;
>> +
>> + if (!reg || !irq) {
>> + dev_err(&pdev->dev, "no registers/irq defined\n");
>> + return -EINVAL;
>> + }
>> +
>> + port = &mvebu_uart_ports[0];
>> +
>> + spin_lock_init(&port->lock);
>> +
>> + port->dev = &pdev->dev;
>> + port->type = PORT_MVEBU;
>> + port->ops = &mvebu_uart_ops;
>> + port->regshift = 0;
>> +
>> + port->fifosize = 32;
>> + port->iotype = UPIO_MEM32;
>> + port->flags = UPF_FIXED_PORT;
>> + port->line = 0; /* single port: force line number to 0 */
>> +
>> + port->irq = irq->start;
>> + port->irqflags = 0;
>> + port->mapbase = reg->start;
>> +
>> + port->membase = devm_ioremap_resource(&pdev->dev, reg);
>> + if (IS_ERR(port->membase))
>> + return -PTR_ERR(port->membase);
>> +
>> + data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
>> + GFP_KERNEL);
>> + if (!data)
>> + return -ENOMEM;
>> +
>> + data->port = port;
>> +
>> + port->private_data = data;
>> + platform_set_drvdata(pdev, data);
>> +
>> + ret = uart_add_one_port(&mvebu_uart_driver, port);
>> + if (ret)
>> + return ret;
>> + return 0;
>> +}
>> +
>> +static int mvebu_uart_remove(struct platform_device *pdev)
>> +{
>> + struct mvebu_uart_data *data = platform_get_drvdata(pdev);
>> +
>> + uart_remove_one_port(&mvebu_uart_driver, data->port);
>> + data->port->private_data = NULL;
>> + data->port->mapbase = 0;
>> + return 0;
>> +}
>> +
>> +/* Match table for of_platform binding */
>> +static const struct of_device_id mvebu_uart_of_match[] = {
>> + { .compatible = "marvell,armada-3700-uart", },
>> + {}
>> +};
>> +MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
>> +
>> +static struct platform_driver mvebu_uart_platform_driver = {
>> + .probe = mvebu_uart_probe,
>> + .remove = mvebu_uart_remove,
>> + .driver = {
>> + .owner = THIS_MODULE,
>> + .name = "mvebu-uart",
>> + .of_match_table = of_match_ptr(mvebu_uart_of_match),
>> + },
>> +};
>> +
>> +static int __init mvebu_uart_init(void)
>> +{
>> + int ret;
>> +
>> + ret = uart_register_driver(&mvebu_uart_driver);
>> + if (ret)
>> + return ret;
>> +
>> + ret = platform_driver_register(&mvebu_uart_platform_driver);
>> + if (ret)
>> + uart_unregister_driver(&mvebu_uart_driver);
>> +
>> + return ret;
>> +}
>> +
>> +static void __exit mvebu_uart_exit(void)
>> +{
>> + platform_driver_unregister(&mvebu_uart_platform_driver);
>> + uart_unregister_driver(&mvebu_uart_driver);
>> +}
>> +
>> +arch_initcall(mvebu_uart_init);
>> +module_exit(mvebu_uart_exit);
>> +
>> +MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
>> +MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
>> +MODULE_LICENSE("GPL");
>> diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
>> index 3e5d757407fb..e513a4ee369b 100644
>> --- a/include/uapi/linux/serial_core.h
>> +++ b/include/uapi/linux/serial_core.h
>> @@ -261,4 +261,7 @@
>> /* STM32 USART */
>> #define PORT_STM32 113
>>
>> +/* MVEBU UART */
>> +#define PORT_MVEBU 114
>> +
>> #endif /* _UAPILINUX_SERIAL_CORE_H */
>> --
>> 2.5.0
>>
>
> --
> Gregory Clement, Free Electrons
> Kernel, drivers, real-time and embedded Linux
> development, consulting, training and support.
> http://free-electrons.com
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 05/12] arm64: add mvebu architecture entry
@ 2016-03-04 13:23 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-03-04 13:23 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby
Cc: Andrew Lunn, Sebastian Hesselbarth, Jason Cooper,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lior Amsalem,
Nadav Haklai, Omri Itach
Hi Greg and Jiri,
this is a gentle ping about this patch.
On jeu., févr. 18 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
> Hi Greg and Jiri
>
> On mar., févr. 16 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>> From: Wilson Ding <dingwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
>>
>> Armada-3700's uart is a simple serial port, which doesn't
>> support. Configuring the modem control lines. The uart port has a 32
>> bytes Tx FIFO and a 64 bytes Rx FIFO
>>
>> The uart driver implements the uart core operations. It also support the
>> system (early) console based on Armada-3700's serial port.
>>
>> Known Issue:
>>
>> The uart driver currently doesn't support clock programming, which means
>> the baud-rate stays with the default value configured by the bootloader
>> at boot time
>>
>> [gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org: Rewrite many part which are too long
>> to enumerate]
>>
>> Signed-off-by: Wilson Ding <dingwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
>> Signed-off-by: Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
>> Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>
> I took care of the arm related part of the series, but I will let you
> apply this patch in the serial subsystem once you have reviewed it. But
> if for any reason you preferred that I took it through mvebu just tell
> me.
>
Finally all the other part of the series have all been pulled in their
respective subsystem. The device tree binding for this driver have been
acked by the device tree maintainer. And this patch is the last
remaining piece for having a initial support for the Armada 3700
platform.
So I wondered what was the status of this patch? Do you plan to apply it
or do you have some other comments ?
Thanks,
Gregory
>
>> ---
>> .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
>> Documentation/kernel-parameters.txt | 6 +
>> drivers/tty/serial/Kconfig | 22 +
>> drivers/tty/serial/Makefile | 1 +
>> drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
>> include/uapi/linux/serial_core.h | 3 +
>> 6 files changed, 695 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> create mode 100644 drivers/tty/serial/mvebu-uart.c
>>
>> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> new file mode 100644
>> index 000000000000..6087defd9f93
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> @@ -0,0 +1,13 @@
>> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
>> +
>> +Required properties:
>> +- compatible: "marvell,armada-3700-uart"
>> +- reg: offset and length of the register set for the device.
>> +- interrupts: device interrupt
>> +
>> +Example:
>> + serial@12000 {
>> + compatible = "marvell,armada-3700-uart";
>> + reg = <0x12000 0x400>;
>> + interrupts = <43>;
>> + };
>> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
>> index 87d40a72f6a1..ea0aba48d616 100644
>> --- a/Documentation/kernel-parameters.txt
>> +++ b/Documentation/kernel-parameters.txt
>> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
>> A valid base address must be provided, and the serial
>> port must already be setup and configured.
>>
>> + armada3700_uart,<addr>
>> + Start an early, polled-mode console on the
>> + Armada 3700 serial port at the specified
>> + address. The serial port must already be setup
>> + and configured. Options are not yet supported.
>> +
>> earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
>> earlyprintk=vga
>> earlyprintk=efi
>> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
>> index 39721ec4f415..b291f934d51b 100644
>> --- a/drivers/tty/serial/Kconfig
>> +++ b/drivers/tty/serial/Kconfig
>> @@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
>> depends on SERIAL_STM32=y
>> select SERIAL_CORE_CONSOLE
>>
>> +config SERIAL_MVEBU_UART
>> + bool "Marvell EBU serial port support"
>> + select SERIAL_CORE
>> + help
>> + This driver is for Marvell EBU SoC's UART. If you have a machine
>> + based on the Armada-3700 SoC and wish to use the on-board serial
>> + port,
>> + say 'Y' here.
>> + Otherwise, say 'N'.
>> +
>> +config SERIAL_MVEBU_CONSOLE
>> + bool "Console on Marvell EBU serial port"
>> + depends on SERIAL_MVEBU_UART
>> + select SERIAL_CORE_CONSOLE
>> + select SERIAL_EARLYCON
>> + default y
>> + help
>> + Say 'Y' here if you wish to use Armada-3700 UART as the system console.
>> + (the system console is the device which receives all kernel messages
>> + and warnings and which allows logins in single user mode)
>> + Otherwise, say 'N'.
>> +
>> endmenu
>>
>> config SERIAL_MCTRL_GPIO
>> diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
>> index b391c9b31960..988167595330 100644
>> --- a/drivers/tty/serial/Makefile
>> +++ b/drivers/tty/serial/Makefile
>> @@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
>> obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
>> obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
>> obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
>> +obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
>>
>> # GPIOLIB helpers for modem control lines
>> obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
>> diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
>> new file mode 100644
>> index 000000000000..0ff27818bb87
>> --- /dev/null
>> +++ b/drivers/tty/serial/mvebu-uart.c
>> @@ -0,0 +1,650 @@
>> +/*
>> +* ***************************************************************************
>> +* Copyright (C) 2015 Marvell International Ltd.
>> +* ***************************************************************************
>> +* This program is free software: you can redistribute it and/or modify it
>> +* under the terms of the GNU General Public License as published by the Free
>> +* Software Foundation, either version 2 of the License, or any later version.
>> +*
>> +* This program is distributed in the hope that it will be useful,
>> +* but WITHOUT ANY WARRANTY; without even the implied warranty of
>> +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> +* GNU General Public License for more details.
>> +*
>> +* You should have received a copy of the GNU General Public License
>> +* along with this program. If not, see <http://www.gnu.org/licenses/>.
>> +* ***************************************************************************
>> +*/
>> +
>> +#include <linux/clk.h>
>> +#include <linux/console.h>
>> +#include <linux/delay.h>
>> +#include <linux/device.h>
>> +#include <linux/init.h>
>> +#include <linux/io.h>
>> +#include <linux/iopoll.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/of_device.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/serial.h>
>> +#include <linux/serial_core.h>
>> +#include <linux/slab.h>
>> +#include <linux/tty.h>
>> +#include <linux/tty_flip.h>
>> +
>> +/* Register Map */
>> +#define UART_RBR 0x00
>> +#define RBR_BRK_DET BIT(15)
>> +#define RBR_FRM_ERR_DET BIT(14)
>> +#define RBR_PAR_ERR_DET BIT(13)
>> +#define RBR_OVR_ERR_DET BIT(12)
>> +
>> +#define UART_TSH 0x04
>> +
>> +#define UART_CTRL 0x08
>> +#define CTRL_SOFT_RST BIT(31)
>> +#define CTRL_TXFIFO_RST BIT(15)
>> +#define CTRL_RXFIFO_RST BIT(14)
>> +#define CTRL_ST_MIRR_EN BIT(13)
>> +#define CTRL_LPBK_EN BIT(12)
>> +#define CTRL_SND_BRK_SEQ BIT(11)
>> +#define CTRL_PAR_EN BIT(10)
>> +#define CTRL_TWO_STOP BIT(9)
>> +#define CTRL_TX_HFL_INT BIT(8)
>> +#define CTRL_RX_HFL_INT BIT(7)
>> +#define CTRL_TX_EMP_INT BIT(6)
>> +#define CTRL_TX_RDY_INT BIT(5)
>> +#define CTRL_RX_RDY_INT BIT(4)
>> +#define CTRL_BRK_DET_INT BIT(3)
>> +#define CTRL_FRM_ERR_INT BIT(2)
>> +#define CTRL_PAR_ERR_INT BIT(1)
>> +#define CTRL_OVR_ERR_INT BIT(0)
>> +#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
>> + CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
>> +
>> +#define UART_STAT 0x0c
>> +#define STAT_TX_FIFO_EMP BIT(13)
>> +#define STAT_RX_FIFO_EMP BIT(12)
>> +#define STAT_TX_FIFO_FUL BIT(11)
>> +#define STAT_TX_FIFO_HFL BIT(10)
>> +#define STAT_RX_TOGL BIT(9)
>> +#define STAT_RX_FIFO_FUL BIT(8)
>> +#define STAT_RX_FIFO_HFL BIT(7)
>> +#define STAT_TX_EMP BIT(6)
>> +#define STAT_TX_RDY BIT(5)
>> +#define STAT_RX_RDY BIT(4)
>> +#define STAT_BRK_DET BIT(3)
>> +#define STAT_FRM_ERR BIT(2)
>> +#define STAT_PAR_ERR BIT(1)
>> +#define STAT_OVR_ERR BIT(0)
>> +#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
>> + | STAT_PAR_ERR | STAT_OVR_ERR)
>> +
>> +#define UART_BRDV 0x10
>> +
>> +#define MVEBU_NR_UARTS 1
>> +
>> +#define MVEBU_UART_TYPE "mvebu-uart"
>> +
>> +static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
>> +
>> +struct mvebu_uart_data {
>> + struct uart_port *port;
>> + struct clk *clk;
>> +};
>> +
>> +/* Core UART Driver Operations */
>> +static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
>> +{
>> + unsigned long flags;
>> + unsigned int st;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> + st = readl(port->membase + UART_STAT);
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +
>> + return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
>> +}
>> +
>> +static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
>> +{
>> + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
>> +}
>> +
>> +static void mvebu_uart_set_mctrl(struct uart_port *port,
>> + unsigned int mctrl)
>> +{
>> +/*
>> + * Even if we do not support configuring the modem control lines, this
>> + * function must be proided to the serial core
>> + */
>> +}
>> +
>> +static void mvebu_uart_stop_tx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl &= ~CTRL_TX_RDY_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_start_tx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl |= CTRL_TX_RDY_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_stop_rx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl &= ~CTRL_RX_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
>> +{
>> + unsigned int ctl;
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> + ctl = readl(port->membase + UART_CTRL);
>> + if (brk == -1)
>> + ctl |= CTRL_SND_BRK_SEQ;
>> + else
>> + ctl &= ~CTRL_SND_BRK_SEQ;
>> + writel(ctl, port->membase + UART_CTRL);
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
>> +{
>> + struct tty_port *tport = &port->state->port;
>> + unsigned char ch = 0;
>> + char flag = 0;
>> +
>> + do {
>> + if (status & STAT_RX_RDY) {
>> + ch = readl(port->membase + UART_RBR);
>> + ch &= 0xff;
>> + flag = TTY_NORMAL;
>> + port->icount.rx++;
>> +
>> + if (status & STAT_PAR_ERR)
>> + port->icount.parity++;
>> + }
>> +
>> + if (status & STAT_BRK_DET) {
>> + port->icount.brk++;
>> + status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
>> + if (uart_handle_break(port))
>> + goto ignore_char;
>> + }
>> +
>> + if (status & STAT_OVR_ERR)
>> + port->icount.overrun++;
>> +
>> + if (status & STAT_FRM_ERR)
>> + port->icount.frame++;
>> +
>> + if (uart_handle_sysrq_char(port, ch))
>> + goto ignore_char;
>> +
>> + if (status & port->ignore_status_mask & STAT_PAR_ERR)
>> + status &= ~STAT_RX_RDY;
>> +
>> + status &= port->read_status_mask;
>> +
>> + if (status & STAT_PAR_ERR)
>> + flag = TTY_PARITY;
>> +
>> + status &= ~port->ignore_status_mask;
>> +
>> + if (status & STAT_RX_RDY)
>> + tty_insert_flip_char(tport, ch, flag);
>> +
>> + if (status & STAT_BRK_DET)
>> + tty_insert_flip_char(tport, 0, TTY_BREAK);
>> +
>> + if (status & STAT_FRM_ERR)
>> + tty_insert_flip_char(tport, 0, TTY_FRAME);
>> +
>> + if (status & STAT_OVR_ERR)
>> + tty_insert_flip_char(tport, 0, TTY_OVERRUN);
>> +
>> +ignore_char:
>> + status = readl(port->membase + UART_STAT);
>> + } while (status & (STAT_RX_RDY | STAT_BRK_DET));
>> +
>> + tty_flip_buffer_push(tport);
>> +}
>> +
>> +static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
>> +{
>> + struct circ_buf *xmit = &port->state->xmit;
>> + unsigned int count;
>> + unsigned int st;
>> +
>> + if (port->x_char) {
>> + writel(port->x_char, port->membase + UART_TSH);
>> + port->icount.tx++;
>> + port->x_char = 0;
>> + return;
>> + }
>> +
>> + if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
>> + mvebu_uart_stop_tx(port);
>> + return;
>> + }
>> +
>> + for (count = 0; count < port->fifosize; count++) {
>> + writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
>> + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
>> + port->icount.tx++;
>> +
>> + if (uart_circ_empty(xmit))
>> + break;
>> +
>> + st = readl(port->membase + UART_STAT);
>> + if (st & STAT_TX_FIFO_FUL)
>> + break;
>> + }
>> +
>> + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
>> + uart_write_wakeup(port);
>> +
>> + if (uart_circ_empty(xmit))
>> + mvebu_uart_stop_tx(port);
>> +}
>> +
>> +static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
>> +{
>> + struct uart_port *port = (struct uart_port *)dev_id;
>> + unsigned int st = readl(port->membase + UART_STAT);
>> +
>> + if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
>> + mvebu_uart_rx_chars(port, st);
>> +
>> + if (st & STAT_TX_RDY)
>> + mvebu_uart_tx_chars(port, st);
>> +
>> + return IRQ_HANDLED;
>> +}
>> +
>> +static int mvebu_uart_startup(struct uart_port *port)
>> +{
>> + int ret;
>> +
>> + writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
>> + port->membase + UART_CTRL);
>> + udelay(1);
>> + writel(CTRL_RX_INT, port->membase + UART_CTRL);
>> +
>> + ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
>> + port);
>> + if (ret) {
>> + dev_err(port->dev, "failed to request irq\n");
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static void mvebu_uart_shutdown(struct uart_port *port)
>> +{
>> + writel(0, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_set_termios(struct uart_port *port,
>> + struct ktermios *termios,
>> + struct ktermios *old)
>> +{
>> + unsigned long flags;
>> + unsigned int baud;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> +
>> + port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
>> + STAT_TX_RDY | STAT_TX_FIFO_FUL;
>> +
>> + if (termios->c_iflag & INPCK)
>> + port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
>> +
>> + port->ignore_status_mask = 0;
>> + if (termios->c_iflag & IGNPAR)
>> + port->ignore_status_mask |=
>> + STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
>> +
>> + if ((termios->c_cflag & CREAD) == 0)
>> + port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
>> +
>> + if (old)
>> + tty_termios_copy_hw(termios, old);
>> +
>> + baud = uart_get_baud_rate(port, termios, old, 0, 460800);
>> + uart_update_timeout(port, termios->c_cflag, baud);
>> +
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static const char *mvebu_uart_type(struct uart_port *port)
>> +{
>> + return MVEBU_UART_TYPE;
>> +}
>> +
>> +static void mvebu_uart_release_port(struct uart_port *port)
>> +{
>> + /* Nothing to do here */
>> +}
>> +
>> +static int mvebu_uart_request_port(struct uart_port *port)
>> +{
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_CONSOLE_POLL
>> +static int mvebu_uart_get_poll_char(struct uart_port *port)
>> +{
>> + unsigned int st = readl(port->membase + UART_STAT);
>> +
>> + if (!(st & STAT_RX_RDY))
>> + return NO_POLL_CHAR;
>> +
>> + return readl(port->membase + UART_RBR);
>> +}
>> +
>> +static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
>> +{
>> + unsigned int st;
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> +
>> + if (!(st & STAT_TX_FIFO_FUL))
>> + break;
>> +
>> + udelay(1);
>> + }
>> +
>> + writel(c, port->membase + UART_TSH);
>> +}
>> +#endif
>> +
>> +static const struct uart_ops mvebu_uart_ops = {
>> + .tx_empty = mvebu_uart_tx_empty,
>> + .set_mctrl = mvebu_uart_set_mctrl,
>> + .get_mctrl = mvebu_uart_get_mctrl,
>> + .stop_tx = mvebu_uart_stop_tx,
>> + .start_tx = mvebu_uart_start_tx,
>> + .stop_rx = mvebu_uart_stop_rx,
>> + .break_ctl = mvebu_uart_break_ctl,
>> + .startup = mvebu_uart_startup,
>> + .shutdown = mvebu_uart_shutdown,
>> + .set_termios = mvebu_uart_set_termios,
>> + .type = mvebu_uart_type,
>> + .release_port = mvebu_uart_release_port,
>> + .request_port = mvebu_uart_request_port,
>> +#ifdef CONFIG_CONSOLE_POLL
>> + .poll_get_char = mvebu_uart_get_poll_char,
>> + .poll_put_char = mvebu_uart_put_poll_char,
>> +#endif
>> +};
>> +
>> +/* Console Driver Operations */
>> +
>> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
>> +/* Early Console */
>> +static void mvebu_uart_putc(struct uart_port *port, int c)
>> +{
>> + unsigned int st;
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> + if (!(st & STAT_TX_FIFO_FUL))
>> + break;
>> + }
>> +
>> + writel(c, port->membase + UART_TSH);
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> + if (st & STAT_TX_FIFO_EMP)
>> + break;
>> + }
>> +}
>> +
>> +static void mvebu_uart_putc_early_write(struct console *con,
>> + const char *s,
>> + unsigned n)
>> +{
>> + struct earlycon_device *dev = con->data;
>> +
>> + uart_console_write(&dev->port, s, n, mvebu_uart_putc);
>> +}
>> +
>> +static int __init
>> +mvebu_uart_early_console_setup(struct earlycon_device *device,
>> + const char *opt)
>> +{
>> + if (!device->port.membase)
>> + return -ENODEV;
>> +
>> + device->con->write = mvebu_uart_putc_early_write;
>> +
>> + return 0;
>> +}
>> +
>> +EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
>> +OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
>> + mvebu_uart_early_console_setup);
>> +
>> +static void wait_for_xmitr(struct uart_port *port)
>> +{
>> + u32 val;
>> +
>> + readl_poll_timeout_atomic(port->membase + UART_STAT, val,
>> + (val & STAT_TX_EMP), 1, 10000);
>> +}
>> +
>> +static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
>> +{
>> + wait_for_xmitr(port);
>> + writel(ch, port->membase + UART_TSH);
>> +}
>> +
>> +static void mvebu_uart_console_write(struct console *co, const char *s,
>> + unsigned int count)
>> +{
>> + struct uart_port *port = &mvebu_uart_ports[co->index];
>> + unsigned long flags;
>> + unsigned int ier;
>> + int locked = 1;
>> +
>> + if (oops_in_progress)
>> + locked = spin_trylock_irqsave(&port->lock, flags);
>> + else
>> + spin_lock_irqsave(&port->lock, flags);
>> +
>> + ier = readl(port->membase + UART_CTRL) &
>> + (CTRL_RX_INT | CTRL_TX_RDY_INT);
>> + writel(0, port->membase + UART_CTRL);
>> +
>> + uart_console_write(port, s, count, mvebu_uart_console_putchar);
>> +
>> + wait_for_xmitr(port);
>> +
>> + if (ier)
>> + writel(ier, port->membase + UART_CTRL);
>> +
>> + if (locked)
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static int mvebu_uart_console_setup(struct console *co, char *options)
>> +{
>> + struct uart_port *port;
>> + int baud = 9600;
>> + int bits = 8;
>> + int parity = 'n';
>> + int flow = 'n';
>> +
>> + if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
>> + return -EINVAL;
>> +
>> + port = &mvebu_uart_ports[co->index];
>> +
>> + if (!port->mapbase || !port->membase) {
>> + pr_debug("console on ttyMV%i not present\n", co->index);
>> + return -ENODEV;
>> + }
>> +
>> + if (options)
>> + uart_parse_options(options, &baud, &parity, &bits, &flow);
>> +
>> + return uart_set_options(port, co, baud, parity, bits, flow);
>> +}
>> +
>> +static struct uart_driver mvebu_uart_driver;
>> +
>> +static struct console mvebu_uart_console = {
>> + .name = "ttyMV",
>> + .write = mvebu_uart_console_write,
>> + .device = uart_console_device,
>> + .setup = mvebu_uart_console_setup,
>> + .flags = CON_PRINTBUFFER,
>> + .index = -1,
>> + .data = &mvebu_uart_driver,
>> +};
>> +
>> +static int __init mvebu_uart_console_init(void)
>> +{
>> + register_console(&mvebu_uart_console);
>> + return 0;
>> +}
>> +
>> +console_initcall(mvebu_uart_console_init);
>> +
>> +
>> +#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
>> +
>> +static struct uart_driver mvebu_uart_driver = {
>> + .owner = THIS_MODULE,
>> + .driver_name = "mvebu_serial",
>> + .dev_name = "ttyMV",
>> + .nr = MVEBU_NR_UARTS,
>> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
>> + .cons = &mvebu_uart_console,
>> +#endif
>> +};
>> +
>> +static int mvebu_uart_probe(struct platform_device *pdev)
>> +{
>> + struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
>> + struct uart_port *port;
>> + struct mvebu_uart_data *data;
>> + int ret;
>> +
>> + if (!reg || !irq) {
>> + dev_err(&pdev->dev, "no registers/irq defined\n");
>> + return -EINVAL;
>> + }
>> +
>> + port = &mvebu_uart_ports[0];
>> +
>> + spin_lock_init(&port->lock);
>> +
>> + port->dev = &pdev->dev;
>> + port->type = PORT_MVEBU;
>> + port->ops = &mvebu_uart_ops;
>> + port->regshift = 0;
>> +
>> + port->fifosize = 32;
>> + port->iotype = UPIO_MEM32;
>> + port->flags = UPF_FIXED_PORT;
>> + port->line = 0; /* single port: force line number to 0 */
>> +
>> + port->irq = irq->start;
>> + port->irqflags = 0;
>> + port->mapbase = reg->start;
>> +
>> + port->membase = devm_ioremap_resource(&pdev->dev, reg);
>> + if (IS_ERR(port->membase))
>> + return -PTR_ERR(port->membase);
>> +
>> + data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
>> + GFP_KERNEL);
>> + if (!data)
>> + return -ENOMEM;
>> +
>> + data->port = port;
>> +
>> + port->private_data = data;
>> + platform_set_drvdata(pdev, data);
>> +
>> + ret = uart_add_one_port(&mvebu_uart_driver, port);
>> + if (ret)
>> + return ret;
>> + return 0;
>> +}
>> +
>> +static int mvebu_uart_remove(struct platform_device *pdev)
>> +{
>> + struct mvebu_uart_data *data = platform_get_drvdata(pdev);
>> +
>> + uart_remove_one_port(&mvebu_uart_driver, data->port);
>> + data->port->private_data = NULL;
>> + data->port->mapbase = 0;
>> + return 0;
>> +}
>> +
>> +/* Match table for of_platform binding */
>> +static const struct of_device_id mvebu_uart_of_match[] = {
>> + { .compatible = "marvell,armada-3700-uart", },
>> + {}
>> +};
>> +MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
>> +
>> +static struct platform_driver mvebu_uart_platform_driver = {
>> + .probe = mvebu_uart_probe,
>> + .remove = mvebu_uart_remove,
>> + .driver = {
>> + .owner = THIS_MODULE,
>> + .name = "mvebu-uart",
>> + .of_match_table = of_match_ptr(mvebu_uart_of_match),
>> + },
>> +};
>> +
>> +static int __init mvebu_uart_init(void)
>> +{
>> + int ret;
>> +
>> + ret = uart_register_driver(&mvebu_uart_driver);
>> + if (ret)
>> + return ret;
>> +
>> + ret = platform_driver_register(&mvebu_uart_platform_driver);
>> + if (ret)
>> + uart_unregister_driver(&mvebu_uart_driver);
>> +
>> + return ret;
>> +}
>> +
>> +static void __exit mvebu_uart_exit(void)
>> +{
>> + platform_driver_unregister(&mvebu_uart_platform_driver);
>> + uart_unregister_driver(&mvebu_uart_driver);
>> +}
>> +
>> +arch_initcall(mvebu_uart_init);
>> +module_exit(mvebu_uart_exit);
>> +
>> +MODULE_AUTHOR("Wilson Ding <dingwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>");
>> +MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
>> +MODULE_LICENSE("GPL");
>> diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
>> index 3e5d757407fb..e513a4ee369b 100644
>> --- a/include/uapi/linux/serial_core.h
>> +++ b/include/uapi/linux/serial_core.h
>> @@ -261,4 +261,7 @@
>> /* STM32 USART */
>> #define PORT_STM32 113
>>
>> +/* MVEBU UART */
>> +#define PORT_MVEBU 114
>> +
>> #endif /* _UAPILINUX_SERIAL_CORE_H */
>> --
>> 2.5.0
>>
>
> --
> Gregory Clement, Free Electrons
> Kernel, drivers, real-time and embedded Linux
> development, consulting, training and support.
> http://free-electrons.com
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
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^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 05/12] arm64: add mvebu architecture entry
@ 2016-03-04 13:23 ` Gregory CLEMENT
0 siblings, 0 replies; 54+ messages in thread
From: Gregory CLEMENT @ 2016-03-04 13:23 UTC (permalink / raw)
To: linux-arm-kernel
Hi Greg and Jiri,
this is a gentle ping about this patch.
On jeu., f?vr. 18 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
> Hi Greg and Jiri
>
> On mar., f?vr. 16 2016, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>> From: Wilson Ding <dingwei@marvell.com>
>>
>> Armada-3700's uart is a simple serial port, which doesn't
>> support. Configuring the modem control lines. The uart port has a 32
>> bytes Tx FIFO and a 64 bytes Rx FIFO
>>
>> The uart driver implements the uart core operations. It also support the
>> system (early) console based on Armada-3700's serial port.
>>
>> Known Issue:
>>
>> The uart driver currently doesn't support clock programming, which means
>> the baud-rate stays with the default value configured by the bootloader
>> at boot time
>>
>> [gregory.clement at free-electrons.com: Rewrite many part which are too long
>> to enumerate]
>>
>> Signed-off-by: Wilson Ding <dingwei@marvell.com>
>> Signed-off-by: Nadav Haklai <nadavh@marvell.com>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>
> I took care of the arm related part of the series, but I will let you
> apply this patch in the serial subsystem once you have reviewed it. But
> if for any reason you preferred that I took it through mvebu just tell
> me.
>
Finally all the other part of the series have all been pulled in their
respective subsystem. The device tree binding for this driver have been
acked by the device tree maintainer. And this patch is the last
remaining piece for having a initial support for the Armada 3700
platform.
So I wondered what was the status of this patch? Do you plan to apply it
or do you have some other comments ?
Thanks,
Gregory
>
>> ---
>> .../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
>> Documentation/kernel-parameters.txt | 6 +
>> drivers/tty/serial/Kconfig | 22 +
>> drivers/tty/serial/Makefile | 1 +
>> drivers/tty/serial/mvebu-uart.c | 650 +++++++++++++++++++++
>> include/uapi/linux/serial_core.h | 3 +
>> 6 files changed, 695 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> create mode 100644 drivers/tty/serial/mvebu-uart.c
>>
>> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> new file mode 100644
>> index 000000000000..6087defd9f93
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> @@ -0,0 +1,13 @@
>> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
>> +
>> +Required properties:
>> +- compatible: "marvell,armada-3700-uart"
>> +- reg: offset and length of the register set for the device.
>> +- interrupts: device interrupt
>> +
>> +Example:
>> + serial at 12000 {
>> + compatible = "marvell,armada-3700-uart";
>> + reg = <0x12000 0x400>;
>> + interrupts = <43>;
>> + };
>> diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
>> index 87d40a72f6a1..ea0aba48d616 100644
>> --- a/Documentation/kernel-parameters.txt
>> +++ b/Documentation/kernel-parameters.txt
>> @@ -1058,6 +1058,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
>> A valid base address must be provided, and the serial
>> port must already be setup and configured.
>>
>> + armada3700_uart,<addr>
>> + Start an early, polled-mode console on the
>> + Armada 3700 serial port at the specified
>> + address. The serial port must already be setup
>> + and configured. Options are not yet supported.
>> +
>> earlyprintk= [X86,SH,BLACKFIN,ARM,M68k]
>> earlyprintk=vga
>> earlyprintk=efi
>> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
>> index 39721ec4f415..b291f934d51b 100644
>> --- a/drivers/tty/serial/Kconfig
>> +++ b/drivers/tty/serial/Kconfig
>> @@ -1606,6 +1606,28 @@ config SERIAL_STM32_CONSOLE
>> depends on SERIAL_STM32=y
>> select SERIAL_CORE_CONSOLE
>>
>> +config SERIAL_MVEBU_UART
>> + bool "Marvell EBU serial port support"
>> + select SERIAL_CORE
>> + help
>> + This driver is for Marvell EBU SoC's UART. If you have a machine
>> + based on the Armada-3700 SoC and wish to use the on-board serial
>> + port,
>> + say 'Y' here.
>> + Otherwise, say 'N'.
>> +
>> +config SERIAL_MVEBU_CONSOLE
>> + bool "Console on Marvell EBU serial port"
>> + depends on SERIAL_MVEBU_UART
>> + select SERIAL_CORE_CONSOLE
>> + select SERIAL_EARLYCON
>> + default y
>> + help
>> + Say 'Y' here if you wish to use Armada-3700 UART as the system console.
>> + (the system console is the device which receives all kernel messages
>> + and warnings and which allows logins in single user mode)
>> + Otherwise, say 'N'.
>> +
>> endmenu
>>
>> config SERIAL_MCTRL_GPIO
>> diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
>> index b391c9b31960..988167595330 100644
>> --- a/drivers/tty/serial/Makefile
>> +++ b/drivers/tty/serial/Makefile
>> @@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_CONEXANT_DIGICOLOR) += digicolor-usart.o
>> obj-$(CONFIG_SERIAL_MEN_Z135) += men_z135_uart.o
>> obj-$(CONFIG_SERIAL_SPRD) += sprd_serial.o
>> obj-$(CONFIG_SERIAL_STM32) += stm32-usart.o
>> +obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
>>
>> # GPIOLIB helpers for modem control lines
>> obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
>> diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
>> new file mode 100644
>> index 000000000000..0ff27818bb87
>> --- /dev/null
>> +++ b/drivers/tty/serial/mvebu-uart.c
>> @@ -0,0 +1,650 @@
>> +/*
>> +* ***************************************************************************
>> +* Copyright (C) 2015 Marvell International Ltd.
>> +* ***************************************************************************
>> +* This program is free software: you can redistribute it and/or modify it
>> +* under the terms of the GNU General Public License as published by the Free
>> +* Software Foundation, either version 2 of the License, or any later version.
>> +*
>> +* This program is distributed in the hope that it will be useful,
>> +* but WITHOUT ANY WARRANTY; without even the implied warranty of
>> +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> +* GNU General Public License for more details.
>> +*
>> +* You should have received a copy of the GNU General Public License
>> +* along with this program. If not, see <http://www.gnu.org/licenses/>.
>> +* ***************************************************************************
>> +*/
>> +
>> +#include <linux/clk.h>
>> +#include <linux/console.h>
>> +#include <linux/delay.h>
>> +#include <linux/device.h>
>> +#include <linux/init.h>
>> +#include <linux/io.h>
>> +#include <linux/iopoll.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/of_device.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/serial.h>
>> +#include <linux/serial_core.h>
>> +#include <linux/slab.h>
>> +#include <linux/tty.h>
>> +#include <linux/tty_flip.h>
>> +
>> +/* Register Map */
>> +#define UART_RBR 0x00
>> +#define RBR_BRK_DET BIT(15)
>> +#define RBR_FRM_ERR_DET BIT(14)
>> +#define RBR_PAR_ERR_DET BIT(13)
>> +#define RBR_OVR_ERR_DET BIT(12)
>> +
>> +#define UART_TSH 0x04
>> +
>> +#define UART_CTRL 0x08
>> +#define CTRL_SOFT_RST BIT(31)
>> +#define CTRL_TXFIFO_RST BIT(15)
>> +#define CTRL_RXFIFO_RST BIT(14)
>> +#define CTRL_ST_MIRR_EN BIT(13)
>> +#define CTRL_LPBK_EN BIT(12)
>> +#define CTRL_SND_BRK_SEQ BIT(11)
>> +#define CTRL_PAR_EN BIT(10)
>> +#define CTRL_TWO_STOP BIT(9)
>> +#define CTRL_TX_HFL_INT BIT(8)
>> +#define CTRL_RX_HFL_INT BIT(7)
>> +#define CTRL_TX_EMP_INT BIT(6)
>> +#define CTRL_TX_RDY_INT BIT(5)
>> +#define CTRL_RX_RDY_INT BIT(4)
>> +#define CTRL_BRK_DET_INT BIT(3)
>> +#define CTRL_FRM_ERR_INT BIT(2)
>> +#define CTRL_PAR_ERR_INT BIT(1)
>> +#define CTRL_OVR_ERR_INT BIT(0)
>> +#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
>> + CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
>> +
>> +#define UART_STAT 0x0c
>> +#define STAT_TX_FIFO_EMP BIT(13)
>> +#define STAT_RX_FIFO_EMP BIT(12)
>> +#define STAT_TX_FIFO_FUL BIT(11)
>> +#define STAT_TX_FIFO_HFL BIT(10)
>> +#define STAT_RX_TOGL BIT(9)
>> +#define STAT_RX_FIFO_FUL BIT(8)
>> +#define STAT_RX_FIFO_HFL BIT(7)
>> +#define STAT_TX_EMP BIT(6)
>> +#define STAT_TX_RDY BIT(5)
>> +#define STAT_RX_RDY BIT(4)
>> +#define STAT_BRK_DET BIT(3)
>> +#define STAT_FRM_ERR BIT(2)
>> +#define STAT_PAR_ERR BIT(1)
>> +#define STAT_OVR_ERR BIT(0)
>> +#define STAT_BRK_ERR (STAT_BRK_DET | STAT_FRM_ERR | STAT_FRM_ERR\
>> + | STAT_PAR_ERR | STAT_OVR_ERR)
>> +
>> +#define UART_BRDV 0x10
>> +
>> +#define MVEBU_NR_UARTS 1
>> +
>> +#define MVEBU_UART_TYPE "mvebu-uart"
>> +
>> +static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
>> +
>> +struct mvebu_uart_data {
>> + struct uart_port *port;
>> + struct clk *clk;
>> +};
>> +
>> +/* Core UART Driver Operations */
>> +static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
>> +{
>> + unsigned long flags;
>> + unsigned int st;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> + st = readl(port->membase + UART_STAT);
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +
>> + return (st & STAT_TX_FIFO_EMP) ? TIOCSER_TEMT : 0;
>> +}
>> +
>> +static unsigned int mvebu_uart_get_mctrl(struct uart_port *port)
>> +{
>> + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
>> +}
>> +
>> +static void mvebu_uart_set_mctrl(struct uart_port *port,
>> + unsigned int mctrl)
>> +{
>> +/*
>> + * Even if we do not support configuring the modem control lines, this
>> + * function must be proided to the serial core
>> + */
>> +}
>> +
>> +static void mvebu_uart_stop_tx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl &= ~CTRL_TX_RDY_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_start_tx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl |= CTRL_TX_RDY_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_stop_rx(struct uart_port *port)
>> +{
>> + unsigned int ctl = readl(port->membase + UART_CTRL);
>> +
>> + ctl &= ~CTRL_RX_INT;
>> + writel(ctl, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
>> +{
>> + unsigned int ctl;
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> + ctl = readl(port->membase + UART_CTRL);
>> + if (brk == -1)
>> + ctl |= CTRL_SND_BRK_SEQ;
>> + else
>> + ctl &= ~CTRL_SND_BRK_SEQ;
>> + writel(ctl, port->membase + UART_CTRL);
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
>> +{
>> + struct tty_port *tport = &port->state->port;
>> + unsigned char ch = 0;
>> + char flag = 0;
>> +
>> + do {
>> + if (status & STAT_RX_RDY) {
>> + ch = readl(port->membase + UART_RBR);
>> + ch &= 0xff;
>> + flag = TTY_NORMAL;
>> + port->icount.rx++;
>> +
>> + if (status & STAT_PAR_ERR)
>> + port->icount.parity++;
>> + }
>> +
>> + if (status & STAT_BRK_DET) {
>> + port->icount.brk++;
>> + status &= ~(STAT_FRM_ERR | STAT_PAR_ERR);
>> + if (uart_handle_break(port))
>> + goto ignore_char;
>> + }
>> +
>> + if (status & STAT_OVR_ERR)
>> + port->icount.overrun++;
>> +
>> + if (status & STAT_FRM_ERR)
>> + port->icount.frame++;
>> +
>> + if (uart_handle_sysrq_char(port, ch))
>> + goto ignore_char;
>> +
>> + if (status & port->ignore_status_mask & STAT_PAR_ERR)
>> + status &= ~STAT_RX_RDY;
>> +
>> + status &= port->read_status_mask;
>> +
>> + if (status & STAT_PAR_ERR)
>> + flag = TTY_PARITY;
>> +
>> + status &= ~port->ignore_status_mask;
>> +
>> + if (status & STAT_RX_RDY)
>> + tty_insert_flip_char(tport, ch, flag);
>> +
>> + if (status & STAT_BRK_DET)
>> + tty_insert_flip_char(tport, 0, TTY_BREAK);
>> +
>> + if (status & STAT_FRM_ERR)
>> + tty_insert_flip_char(tport, 0, TTY_FRAME);
>> +
>> + if (status & STAT_OVR_ERR)
>> + tty_insert_flip_char(tport, 0, TTY_OVERRUN);
>> +
>> +ignore_char:
>> + status = readl(port->membase + UART_STAT);
>> + } while (status & (STAT_RX_RDY | STAT_BRK_DET));
>> +
>> + tty_flip_buffer_push(tport);
>> +}
>> +
>> +static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
>> +{
>> + struct circ_buf *xmit = &port->state->xmit;
>> + unsigned int count;
>> + unsigned int st;
>> +
>> + if (port->x_char) {
>> + writel(port->x_char, port->membase + UART_TSH);
>> + port->icount.tx++;
>> + port->x_char = 0;
>> + return;
>> + }
>> +
>> + if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
>> + mvebu_uart_stop_tx(port);
>> + return;
>> + }
>> +
>> + for (count = 0; count < port->fifosize; count++) {
>> + writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
>> + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
>> + port->icount.tx++;
>> +
>> + if (uart_circ_empty(xmit))
>> + break;
>> +
>> + st = readl(port->membase + UART_STAT);
>> + if (st & STAT_TX_FIFO_FUL)
>> + break;
>> + }
>> +
>> + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
>> + uart_write_wakeup(port);
>> +
>> + if (uart_circ_empty(xmit))
>> + mvebu_uart_stop_tx(port);
>> +}
>> +
>> +static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
>> +{
>> + struct uart_port *port = (struct uart_port *)dev_id;
>> + unsigned int st = readl(port->membase + UART_STAT);
>> +
>> + if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
>> + mvebu_uart_rx_chars(port, st);
>> +
>> + if (st & STAT_TX_RDY)
>> + mvebu_uart_tx_chars(port, st);
>> +
>> + return IRQ_HANDLED;
>> +}
>> +
>> +static int mvebu_uart_startup(struct uart_port *port)
>> +{
>> + int ret;
>> +
>> + writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
>> + port->membase + UART_CTRL);
>> + udelay(1);
>> + writel(CTRL_RX_INT, port->membase + UART_CTRL);
>> +
>> + ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags, "serial",
>> + port);
>> + if (ret) {
>> + dev_err(port->dev, "failed to request irq\n");
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static void mvebu_uart_shutdown(struct uart_port *port)
>> +{
>> + writel(0, port->membase + UART_CTRL);
>> +}
>> +
>> +static void mvebu_uart_set_termios(struct uart_port *port,
>> + struct ktermios *termios,
>> + struct ktermios *old)
>> +{
>> + unsigned long flags;
>> + unsigned int baud;
>> +
>> + spin_lock_irqsave(&port->lock, flags);
>> +
>> + port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
>> + STAT_TX_RDY | STAT_TX_FIFO_FUL;
>> +
>> + if (termios->c_iflag & INPCK)
>> + port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
>> +
>> + port->ignore_status_mask = 0;
>> + if (termios->c_iflag & IGNPAR)
>> + port->ignore_status_mask |=
>> + STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
>> +
>> + if ((termios->c_cflag & CREAD) == 0)
>> + port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
>> +
>> + if (old)
>> + tty_termios_copy_hw(termios, old);
>> +
>> + baud = uart_get_baud_rate(port, termios, old, 0, 460800);
>> + uart_update_timeout(port, termios->c_cflag, baud);
>> +
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static const char *mvebu_uart_type(struct uart_port *port)
>> +{
>> + return MVEBU_UART_TYPE;
>> +}
>> +
>> +static void mvebu_uart_release_port(struct uart_port *port)
>> +{
>> + /* Nothing to do here */
>> +}
>> +
>> +static int mvebu_uart_request_port(struct uart_port *port)
>> +{
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_CONSOLE_POLL
>> +static int mvebu_uart_get_poll_char(struct uart_port *port)
>> +{
>> + unsigned int st = readl(port->membase + UART_STAT);
>> +
>> + if (!(st & STAT_RX_RDY))
>> + return NO_POLL_CHAR;
>> +
>> + return readl(port->membase + UART_RBR);
>> +}
>> +
>> +static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
>> +{
>> + unsigned int st;
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> +
>> + if (!(st & STAT_TX_FIFO_FUL))
>> + break;
>> +
>> + udelay(1);
>> + }
>> +
>> + writel(c, port->membase + UART_TSH);
>> +}
>> +#endif
>> +
>> +static const struct uart_ops mvebu_uart_ops = {
>> + .tx_empty = mvebu_uart_tx_empty,
>> + .set_mctrl = mvebu_uart_set_mctrl,
>> + .get_mctrl = mvebu_uart_get_mctrl,
>> + .stop_tx = mvebu_uart_stop_tx,
>> + .start_tx = mvebu_uart_start_tx,
>> + .stop_rx = mvebu_uart_stop_rx,
>> + .break_ctl = mvebu_uart_break_ctl,
>> + .startup = mvebu_uart_startup,
>> + .shutdown = mvebu_uart_shutdown,
>> + .set_termios = mvebu_uart_set_termios,
>> + .type = mvebu_uart_type,
>> + .release_port = mvebu_uart_release_port,
>> + .request_port = mvebu_uart_request_port,
>> +#ifdef CONFIG_CONSOLE_POLL
>> + .poll_get_char = mvebu_uart_get_poll_char,
>> + .poll_put_char = mvebu_uart_put_poll_char,
>> +#endif
>> +};
>> +
>> +/* Console Driver Operations */
>> +
>> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
>> +/* Early Console */
>> +static void mvebu_uart_putc(struct uart_port *port, int c)
>> +{
>> + unsigned int st;
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> + if (!(st & STAT_TX_FIFO_FUL))
>> + break;
>> + }
>> +
>> + writel(c, port->membase + UART_TSH);
>> +
>> + for (;;) {
>> + st = readl(port->membase + UART_STAT);
>> + if (st & STAT_TX_FIFO_EMP)
>> + break;
>> + }
>> +}
>> +
>> +static void mvebu_uart_putc_early_write(struct console *con,
>> + const char *s,
>> + unsigned n)
>> +{
>> + struct earlycon_device *dev = con->data;
>> +
>> + uart_console_write(&dev->port, s, n, mvebu_uart_putc);
>> +}
>> +
>> +static int __init
>> +mvebu_uart_early_console_setup(struct earlycon_device *device,
>> + const char *opt)
>> +{
>> + if (!device->port.membase)
>> + return -ENODEV;
>> +
>> + device->con->write = mvebu_uart_putc_early_write;
>> +
>> + return 0;
>> +}
>> +
>> +EARLYCON_DECLARE(ar3700_uart, mvebu_uart_early_console_setup);
>> +OF_EARLYCON_DECLARE(ar3700_uart, "marvell,armada-3700-uart",
>> + mvebu_uart_early_console_setup);
>> +
>> +static void wait_for_xmitr(struct uart_port *port)
>> +{
>> + u32 val;
>> +
>> + readl_poll_timeout_atomic(port->membase + UART_STAT, val,
>> + (val & STAT_TX_EMP), 1, 10000);
>> +}
>> +
>> +static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
>> +{
>> + wait_for_xmitr(port);
>> + writel(ch, port->membase + UART_TSH);
>> +}
>> +
>> +static void mvebu_uart_console_write(struct console *co, const char *s,
>> + unsigned int count)
>> +{
>> + struct uart_port *port = &mvebu_uart_ports[co->index];
>> + unsigned long flags;
>> + unsigned int ier;
>> + int locked = 1;
>> +
>> + if (oops_in_progress)
>> + locked = spin_trylock_irqsave(&port->lock, flags);
>> + else
>> + spin_lock_irqsave(&port->lock, flags);
>> +
>> + ier = readl(port->membase + UART_CTRL) &
>> + (CTRL_RX_INT | CTRL_TX_RDY_INT);
>> + writel(0, port->membase + UART_CTRL);
>> +
>> + uart_console_write(port, s, count, mvebu_uart_console_putchar);
>> +
>> + wait_for_xmitr(port);
>> +
>> + if (ier)
>> + writel(ier, port->membase + UART_CTRL);
>> +
>> + if (locked)
>> + spin_unlock_irqrestore(&port->lock, flags);
>> +}
>> +
>> +static int mvebu_uart_console_setup(struct console *co, char *options)
>> +{
>> + struct uart_port *port;
>> + int baud = 9600;
>> + int bits = 8;
>> + int parity = 'n';
>> + int flow = 'n';
>> +
>> + if (co->index < 0 || co->index >= MVEBU_NR_UARTS)
>> + return -EINVAL;
>> +
>> + port = &mvebu_uart_ports[co->index];
>> +
>> + if (!port->mapbase || !port->membase) {
>> + pr_debug("console on ttyMV%i not present\n", co->index);
>> + return -ENODEV;
>> + }
>> +
>> + if (options)
>> + uart_parse_options(options, &baud, &parity, &bits, &flow);
>> +
>> + return uart_set_options(port, co, baud, parity, bits, flow);
>> +}
>> +
>> +static struct uart_driver mvebu_uart_driver;
>> +
>> +static struct console mvebu_uart_console = {
>> + .name = "ttyMV",
>> + .write = mvebu_uart_console_write,
>> + .device = uart_console_device,
>> + .setup = mvebu_uart_console_setup,
>> + .flags = CON_PRINTBUFFER,
>> + .index = -1,
>> + .data = &mvebu_uart_driver,
>> +};
>> +
>> +static int __init mvebu_uart_console_init(void)
>> +{
>> + register_console(&mvebu_uart_console);
>> + return 0;
>> +}
>> +
>> +console_initcall(mvebu_uart_console_init);
>> +
>> +
>> +#endif /* CONFIG_SERIAL_MVEBU_CONSOLE */
>> +
>> +static struct uart_driver mvebu_uart_driver = {
>> + .owner = THIS_MODULE,
>> + .driver_name = "mvebu_serial",
>> + .dev_name = "ttyMV",
>> + .nr = MVEBU_NR_UARTS,
>> +#ifdef CONFIG_SERIAL_MVEBU_CONSOLE
>> + .cons = &mvebu_uart_console,
>> +#endif
>> +};
>> +
>> +static int mvebu_uart_probe(struct platform_device *pdev)
>> +{
>> + struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
>> + struct uart_port *port;
>> + struct mvebu_uart_data *data;
>> + int ret;
>> +
>> + if (!reg || !irq) {
>> + dev_err(&pdev->dev, "no registers/irq defined\n");
>> + return -EINVAL;
>> + }
>> +
>> + port = &mvebu_uart_ports[0];
>> +
>> + spin_lock_init(&port->lock);
>> +
>> + port->dev = &pdev->dev;
>> + port->type = PORT_MVEBU;
>> + port->ops = &mvebu_uart_ops;
>> + port->regshift = 0;
>> +
>> + port->fifosize = 32;
>> + port->iotype = UPIO_MEM32;
>> + port->flags = UPF_FIXED_PORT;
>> + port->line = 0; /* single port: force line number to 0 */
>> +
>> + port->irq = irq->start;
>> + port->irqflags = 0;
>> + port->mapbase = reg->start;
>> +
>> + port->membase = devm_ioremap_resource(&pdev->dev, reg);
>> + if (IS_ERR(port->membase))
>> + return -PTR_ERR(port->membase);
>> +
>> + data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
>> + GFP_KERNEL);
>> + if (!data)
>> + return -ENOMEM;
>> +
>> + data->port = port;
>> +
>> + port->private_data = data;
>> + platform_set_drvdata(pdev, data);
>> +
>> + ret = uart_add_one_port(&mvebu_uart_driver, port);
>> + if (ret)
>> + return ret;
>> + return 0;
>> +}
>> +
>> +static int mvebu_uart_remove(struct platform_device *pdev)
>> +{
>> + struct mvebu_uart_data *data = platform_get_drvdata(pdev);
>> +
>> + uart_remove_one_port(&mvebu_uart_driver, data->port);
>> + data->port->private_data = NULL;
>> + data->port->mapbase = 0;
>> + return 0;
>> +}
>> +
>> +/* Match table for of_platform binding */
>> +static const struct of_device_id mvebu_uart_of_match[] = {
>> + { .compatible = "marvell,armada-3700-uart", },
>> + {}
>> +};
>> +MODULE_DEVICE_TABLE(of, mvebu_uart_of_match);
>> +
>> +static struct platform_driver mvebu_uart_platform_driver = {
>> + .probe = mvebu_uart_probe,
>> + .remove = mvebu_uart_remove,
>> + .driver = {
>> + .owner = THIS_MODULE,
>> + .name = "mvebu-uart",
>> + .of_match_table = of_match_ptr(mvebu_uart_of_match),
>> + },
>> +};
>> +
>> +static int __init mvebu_uart_init(void)
>> +{
>> + int ret;
>> +
>> + ret = uart_register_driver(&mvebu_uart_driver);
>> + if (ret)
>> + return ret;
>> +
>> + ret = platform_driver_register(&mvebu_uart_platform_driver);
>> + if (ret)
>> + uart_unregister_driver(&mvebu_uart_driver);
>> +
>> + return ret;
>> +}
>> +
>> +static void __exit mvebu_uart_exit(void)
>> +{
>> + platform_driver_unregister(&mvebu_uart_platform_driver);
>> + uart_unregister_driver(&mvebu_uart_driver);
>> +}
>> +
>> +arch_initcall(mvebu_uart_init);
>> +module_exit(mvebu_uart_exit);
>> +
>> +MODULE_AUTHOR("Wilson Ding <dingwei@marvell.com>");
>> +MODULE_DESCRIPTION("Marvell Armada-3700 Serial Driver");
>> +MODULE_LICENSE("GPL");
>> diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
>> index 3e5d757407fb..e513a4ee369b 100644
>> --- a/include/uapi/linux/serial_core.h
>> +++ b/include/uapi/linux/serial_core.h
>> @@ -261,4 +261,7 @@
>> /* STM32 USART */
>> #define PORT_STM32 113
>>
>> +/* MVEBU UART */
>> +#define PORT_MVEBU 114
>> +
>> #endif /* _UAPILINUX_SERIAL_CORE_H */
>> --
>> 2.5.0
>>
>
> --
> Gregory Clement, Free Electrons
> Kernel, drivers, real-time and embedded Linux
> development, consulting, training and support.
> http://free-electrons.com
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 05/12] arm64: add mvebu architecture entry
@ 2016-03-04 16:55 ` Greg Kroah-Hartman
0 siblings, 0 replies; 54+ messages in thread
From: Greg Kroah-Hartman @ 2016-03-04 16:55 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Jiri Slaby, Andrew Lunn, Sebastian Hesselbarth, Jason Cooper,
linux-serial, linux-kernel, devicetree, Thomas Petazzoni,
linux-arm-kernel, Lior Amsalem, Nadav Haklai, Omri Itach
On Fri, Mar 04, 2016 at 02:23:18PM +0100, Gregory CLEMENT wrote:
> Hi Greg and Jiri,
>
> this is a gentle ping about this patch.
It's in my queue, please be patient given that no one else seems to want
to review this :(
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 05/12] arm64: add mvebu architecture entry
@ 2016-03-04 16:55 ` Greg Kroah-Hartman
0 siblings, 0 replies; 54+ messages in thread
From: Greg Kroah-Hartman @ 2016-03-04 16:55 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Jiri Slaby, Andrew Lunn, Sebastian Hesselbarth, Jason Cooper,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lior Amsalem,
Nadav Haklai, Omri Itach
On Fri, Mar 04, 2016 at 02:23:18PM +0100, Gregory CLEMENT wrote:
> Hi Greg and Jiri,
>
> this is a gentle ping about this patch.
It's in my queue, please be patient given that no one else seems to want
to review this :(
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 05/12] arm64: add mvebu architecture entry
@ 2016-03-04 16:55 ` Greg Kroah-Hartman
0 siblings, 0 replies; 54+ messages in thread
From: Greg Kroah-Hartman @ 2016-03-04 16:55 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Mar 04, 2016 at 02:23:18PM +0100, Gregory CLEMENT wrote:
> Hi Greg and Jiri,
>
> this is a gentle ping about this patch.
It's in my queue, please be patient given that no one else seems to want
to review this :(
^ permalink raw reply [flat|nested] 54+ messages in thread
end of thread, other threads:[~2016-03-04 17:52 UTC | newest]
Thread overview: 54+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-02-16 18:14 [PATCH v4 00/12] Add support for the Armada 3700 SoC an mvebu ARM64 based Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` [PATCH v4 01/12] irqchip: armada-370-xp: add Kconfig option for the driver Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` [PATCH v4 02/12] irqchip: armada-370-xp: do not enable it by default when ARCH_MVEBU is selected Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` [PATCH v4 03/12] serial: mvebu-uart: initial support for Armada-3700 serial port Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 21:20 ` Arnd Bergmann
2016-02-16 21:20 ` Arnd Bergmann
2016-02-16 21:27 ` Thomas Petazzoni
2016-02-16 21:27 ` Thomas Petazzoni
2016-02-16 21:35 ` Arnd Bergmann
2016-02-16 21:35 ` Arnd Bergmann
2016-02-18 17:37 ` Gregory CLEMENT
2016-02-18 17:37 ` Gregory CLEMENT
2016-02-16 18:14 ` [PATCH v4 04/12] ata: ahci_mvebu: add support for Armada 3700 variant Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-18 17:39 ` Gregory CLEMENT
2016-02-18 17:39 ` Gregory CLEMENT
2016-02-18 17:41 ` Tejun Heo
2016-02-18 17:41 ` Tejun Heo
2016-02-16 18:14 ` [PATCH v4 05/12] arm64: add mvebu architecture entry Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-03-04 13:23 ` Gregory CLEMENT
2016-03-04 13:23 ` Gregory CLEMENT
2016-03-04 13:23 ` Gregory CLEMENT
2016-03-04 16:55 ` Greg Kroah-Hartman
2016-03-04 16:55 ` Greg Kroah-Hartman
2016-03-04 16:55 ` Greg Kroah-Hartman
2016-02-16 18:14 ` [PATCH v4 06/12] Documentation: dt-bindings: Add a new compatible for the Armada 3700 Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` [PATCH v4 07/12] Documentation: dt: Tidy up the Marvell related files Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` [PATCH v4 08/12] devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC family Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:14 ` [PATCH v4 09/12] arm64: dts: add the Marvell Armada 3700 family and a development board Gregory CLEMENT
2016-02-16 18:14 ` Gregory CLEMENT
2016-02-16 18:15 ` [PATCH v4 10/12] MAINTAINERS: Extend dts entry for ARM64 mvebu files Gregory CLEMENT
2016-02-16 18:15 ` Gregory CLEMENT
2016-02-16 18:15 ` [PATCH v4 11/12] Documentation: arm: update supported Marvell EBU processors Gregory CLEMENT
2016-02-16 18:15 ` Gregory CLEMENT
2016-02-16 18:15 ` [PATCH v4 12/12] arm64: defconfig: enable Armada 3700 related config Gregory CLEMENT
2016-02-16 18:15 ` Gregory CLEMENT
2016-02-25 0:47 ` Olof Johansson
2016-02-25 0:47 ` Olof Johansson
2016-02-16 21:22 ` [PATCH v4 00/12] Add support for the Armada 3700 SoC an mvebu ARM64 based Arnd Bergmann
2016-02-16 21:22 ` Arnd Bergmann
2016-02-17 16:03 ` Gregory CLEMENT
2016-02-17 16:03 ` Gregory CLEMENT
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