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From: Roger Quadros <rogerq@ti.com>
To: <tony@atomide.com>
Cc: <computersforpeace@gmail.com>, <ezequiel@vanguardiasur.com.ar>,
	<javier@dowhile0.org>, <fcooper@ti.com>, <nsekhar@ti.com>,
	<linux-omap@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, Roger Quadros <rogerq@ti.com>
Subject: [PATCH v7 1/9] ARM: dts: dra7: Fix NAND device nodes.
Date: Tue, 23 Feb 2016 18:37:17 +0200	[thread overview]
Message-ID: <1456245445-31824-2-git-send-email-rogerq@ti.com> (raw)
In-Reply-To: <1456245445-31824-1-git-send-email-rogerq@ti.com>

Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7-evm.dts  | 6 +++++-
 arch/arm/boot/dts/dra7.dtsi     | 2 ++
 arch/arm/boot/dts/dra72-evm.dts | 6 +++++-
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index cfc24e5..28ae95e 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -741,9 +741,13 @@
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&nand_flash_x16>;
-	ranges = <0 0 0 0x01000000>;	/* minimum GPMC partition = 16MB */
+	ranges = <0 0 0x08000000 0x01000000>;	/* minimum GPMC partition = 16MB */
 	nand@0,0 {
+		compatible = "ti,omap2-nand";
 		reg = <0 0 4>;		/* device IO registers */
+		interrupt-parent = <&gpmc>;
+		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+			     <1 IRQ_TYPE_NONE>; /* termcount */
 		ti,nand-ecc-opt = "bch8";
 		ti,elm-id = <&elm>;
 		nand-bus-width = <16>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c4d9175..51ddc98 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1438,6 +1438,8 @@
 			gpmc,num-waitpins = <2>;
 			#address-cells = <2>;
 			#size-cells = <1>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 00b1200..6cf211b 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -492,13 +492,17 @@
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&nand_default>;
-	ranges = <0 0 0 0x01000000>;	/* minimum GPMC partition = 16MB */
+	ranges = <0 0 0x08000000 0x01000000>;	/* minimum GPMC partition = 16MB */
 	nand@0,0 {
 		/* To use NAND, DIP switch SW5 must be set like so:
 		 * SW5.1 (NAND_SELn) = ON (LOW)
 		 * SW5.9 (GPMC_WPN) = OFF (HIGH)
 		 */
+		compatible = "ti,omap2-nand";
 		reg = <0 0 4>;		/* device IO registers */
+		interrupt-parent = <&gpmc>;
+		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+			     <1 IRQ_TYPE_NONE>;	/* termcount */
 		ti,nand-ecc-opt = "bch8";
 		ti,elm-id = <&elm>;
 		nand-bus-width = <16>;
-- 
2.5.0

WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org>
To: tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org
Cc: computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org,
	javier-0uQlZySMnqxg9hUCZPvPmw@public.gmane.org,
	fcooper-l0cyMroinI0@public.gmane.org,
	nsekhar-l0cyMroinI0@public.gmane.org,
	linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org>
Subject: [PATCH v7 1/9] ARM: dts: dra7: Fix NAND device nodes.
Date: Tue, 23 Feb 2016 18:37:17 +0200	[thread overview]
Message-ID: <1456245445-31824-2-git-send-email-rogerq@ti.com> (raw)
In-Reply-To: <1456245445-31824-1-git-send-email-rogerq-l0cyMroinI0@public.gmane.org>

Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs.

Signed-off-by: Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org>
---
 arch/arm/boot/dts/dra7-evm.dts  | 6 +++++-
 arch/arm/boot/dts/dra7.dtsi     | 2 ++
 arch/arm/boot/dts/dra72-evm.dts | 6 +++++-
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index cfc24e5..28ae95e 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -741,9 +741,13 @@
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&nand_flash_x16>;
-	ranges = <0 0 0 0x01000000>;	/* minimum GPMC partition = 16MB */
+	ranges = <0 0 0x08000000 0x01000000>;	/* minimum GPMC partition = 16MB */
 	nand@0,0 {
+		compatible = "ti,omap2-nand";
 		reg = <0 0 4>;		/* device IO registers */
+		interrupt-parent = <&gpmc>;
+		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+			     <1 IRQ_TYPE_NONE>; /* termcount */
 		ti,nand-ecc-opt = "bch8";
 		ti,elm-id = <&elm>;
 		nand-bus-width = <16>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c4d9175..51ddc98 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1438,6 +1438,8 @@
 			gpmc,num-waitpins = <2>;
 			#address-cells = <2>;
 			#size-cells = <1>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 00b1200..6cf211b 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -492,13 +492,17 @@
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&nand_default>;
-	ranges = <0 0 0 0x01000000>;	/* minimum GPMC partition = 16MB */
+	ranges = <0 0 0x08000000 0x01000000>;	/* minimum GPMC partition = 16MB */
 	nand@0,0 {
 		/* To use NAND, DIP switch SW5 must be set like so:
 		 * SW5.1 (NAND_SELn) = ON (LOW)
 		 * SW5.9 (GPMC_WPN) = OFF (HIGH)
 		 */
+		compatible = "ti,omap2-nand";
 		reg = <0 0 4>;		/* device IO registers */
+		interrupt-parent = <&gpmc>;
+		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+			     <1 IRQ_TYPE_NONE>;	/* termcount */
 		ti,nand-ecc-opt = "bch8";
 		ti,elm-id = <&elm>;
 		nand-bus-width = <16>;
-- 
2.5.0

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  reply	other threads:[~2016-02-23 16:37 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-23 16:37 [PATCH v7 0/9] ARM: dts: omap2+: GPMC NAND node fixes Roger Quadros
2016-02-23 16:37 ` Roger Quadros
2016-02-23 16:37 ` Roger Quadros [this message]
2016-02-23 16:37   ` [PATCH v7 1/9] ARM: dts: dra7: Fix NAND device nodes Roger Quadros
2016-02-23 16:37 ` [PATCH v7 2/9] ARM: dts: dra7: Remove redundant nand property Roger Quadros
2016-02-23 16:37   ` Roger Quadros
2016-02-23 16:37 ` [PATCH v7 3/9] ARM: dts: am437x: Fix NAND device nodes Roger Quadros
2016-02-23 16:37   ` Roger Quadros
2016-02-23 16:37 ` [PATCH v7 4/9] ARM: dts: am437x: Disable wait pin monitoring for NAND Roger Quadros
2016-02-23 16:37   ` Roger Quadros
2016-02-23 16:37 ` [PATCH v7 5/9] ARM: dts: am335x: Fix NAND device nodes Roger Quadros
2016-02-23 16:37   ` Roger Quadros
2016-02-23 16:37 ` [PATCH v7 6/9] ARM: dts: am335x: Disable wait pin monitoring for NAND Roger Quadros
2016-02-23 16:37   ` Roger Quadros
2016-02-23 16:37 ` [PATCH v7 7/9] ARM: dts: dm816x: Fix NAND device nodes Roger Quadros
2016-02-23 16:37   ` Roger Quadros
2016-02-23 16:37 ` [PATCH v7 8/9] ARM: dts: dm8168-evm: ARM: dts: Disable wait pin monitoring for NAND Roger Quadros
2016-02-23 16:37   ` Roger Quadros
2016-02-23 16:37 ` [PATCH v7 9/9] ARM: dts: omap3: Fix NAND device nodess Roger Quadros
2016-02-23 16:37   ` Roger Quadros
     [not found]   ` <CAHCN7xJqzgtuSW4KK93tHQh2WVRE4L5Zh6+5sGM+DZGU4qy5zg@mail.gmail.com>
2016-11-24 10:49     ` Roger Quadros
2016-11-24 10:49       ` Roger Quadros
2016-02-26 18:44 ` [PATCH v7 0/9] ARM: dts: omap2+: GPMC NAND node fixes Tony Lindgren
2016-02-29 16:13   ` Roger Quadros
2016-02-29 16:13     ` Roger Quadros
2016-02-29 17:17     ` Tony Lindgren
2016-02-29 17:17       ` Tony Lindgren

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