[PATCH v3 0/8] arm64: dts: apq8016 dt patches (Set2).

[PATCH v3 0/8] arm64: dts: apq8016 dt patches (Set2).

[Srinivas Kandagatla]

Hi Andy, 

Here are few more dt patches (set2) which enables usb and lpass,
with some fixes. I have tested these patches with few changes
to defconfig on DB410C + a usb phy fix.

Thanks,
srini

Changes since v2:
 - fixed usb and usb-id pinctrl nodes as suggested by Bjorn

Changes since v1:
 - moved usb usb2513 and usb_id nodes out of soc
 as suggested by Stephen Boyd.
 - fixed lpass node name, spotted by Stephen Boyd.
 - added new patch to enable bam dma
 - added a fix from Ivan on led mpp pins.


Ivan T. Ivanov (1):
  arm64: dts: qcom: Fix MPP's function used for LED control

Srinivas Kandagatla (7):
  arm64: dts: qcom: add manual pullup setting to otg.
  arm64: dts: qcom: apq8016-sbc: add usb support
  arm64: dts: qcom: add audio pinctrls
  arm64: dts: qcom: add lpass node
  arm64: dts: qcom: apq8016-sbc: enable lpass on DB410c
  arm64: dts: qcom: fix usb digital voltage levels
  arm64: dts: qcom: apq8016-sbc: enable bam dma node.

 .../arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi |   2 +-
 arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi |  14 ++
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi          |  42 ++++
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi         | 216 +++++++++++++++++++++
 arch/arm64/boot/dts/qcom/msm8916.dtsi              |  29 ++-
 5 files changed, 301 insertions(+), 2 deletions(-)

-- 
1.9.1

[PATCH v3 0/8] arm64: dts: apq8016 dt patches (Set2).

[Srinivas Kandagatla]

Hi Andy, 

Here are few more dt patches (set2) which enables usb and lpass,
with some fixes. I have tested these patches with few changes
to defconfig on DB410C + a usb phy fix.

Thanks,
srini

Changes since v2:
 - fixed usb and usb-id pinctrl nodes as suggested by Bjorn

Changes since v1:
 - moved usb usb2513 and usb_id nodes out of soc
 as suggested by Stephen Boyd.
 - fixed lpass node name, spotted by Stephen Boyd.
 - added new patch to enable bam dma
 - added a fix from Ivan on led mpp pins.


Ivan T. Ivanov (1):
  arm64: dts: qcom: Fix MPP's function used for LED control

Srinivas Kandagatla (7):
  arm64: dts: qcom: add manual pullup setting to otg.
  arm64: dts: qcom: apq8016-sbc: add usb support
  arm64: dts: qcom: add audio pinctrls
  arm64: dts: qcom: add lpass node
  arm64: dts: qcom: apq8016-sbc: enable lpass on DB410c
  arm64: dts: qcom: fix usb digital voltage levels
  arm64: dts: qcom: apq8016-sbc: enable bam dma node.

 .../arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi |   2 +-
 arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi |  14 ++
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi          |  42 ++++
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi         | 216 +++++++++++++++++++++
 arch/arm64/boot/dts/qcom/msm8916.dtsi              |  29 ++-
 5 files changed, 301 insertions(+), 2 deletions(-)

-- 
1.9.1

[PATCH v3 1/8] arm64: dts: qcom: add manual pullup setting to otg.

[Srinivas Kandagatla]

This patch adds manual pull up setting for usb otg indicating that the
vbus is vbus is not routed to USB controller/phy therefore enables
pull-up explicitly before starting controller.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index ff7ca44..c1592d4 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -399,6 +399,7 @@
 			qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
 			dr_mode = "peripheral";
 			qcom,otg-control = <2>; // PMIC
+			qcom,manual-pullup;
 
 			clocks = <&gcc GCC_USB_HS_AHB_CLK>,
 				 <&gcc GCC_USB_HS_SYSTEM_CLK>,
-- 
1.9.1

[PATCH v3 1/8] arm64: dts: qcom: add manual pullup setting to otg.

[Srinivas Kandagatla]

This patch adds manual pull up setting for usb otg indicating that the
vbus is vbus is not routed to USB controller/phy therefore enables
pull-up explicitly before starting controller.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index ff7ca44..c1592d4 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -399,6 +399,7 @@
 			qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
 			dr_mode = "peripheral";
 			qcom,otg-control = <2>; // PMIC
+			qcom,manual-pullup;
 
 			clocks = <&gcc GCC_USB_HS_AHB_CLK>,
 				 <&gcc GCC_USB_HS_SYSTEM_CLK>,
-- 
1.9.1

[PATCH v3 2/8] arm64: dts: qcom: apq8016-sbc: add usb support

[Srinivas Kandagatla]

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 14 +++++++++
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi          | 34 ++++++++++++++++++++++
 2 files changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
index cbeee0b..ee828a8 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
@@ -10,4 +10,18 @@
 			output-low;
 		};
 	};
+
+	usb_id_default: usb-id-default {
+		pinmux {
+			function = "gpio";
+			pins = "gpio121";
+		};
+
+		pinconf {
+			pins = "gpio121";
+			drive-strength = <8>;
+			input-enable;
+			bias-pull-up;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 8102929..15bb485 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -133,6 +133,40 @@
 		sdhci@07824000 {
 			status = "okay";
 		};
+
+		usb@78d9000 {
+			extcon = <&usb_id>, <&usb_id>;
+			status = "okay";
+		};
+
+		ehci@78d9000 {
+			status = "okay";
+		};
+
+		phy@78d9000 {
+			v1p8-supply = <&pm8916_l7>;
+			v3p3-supply = <&pm8916_l13>;
+			vddcx-supply = <&pm8916_s1>;
+			extcon = <&usb_id>, <&usb_id>;
+			dr_mode = "otg";
+			status = "okay";
+			switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&usb_sw_sel_pm>;
+		};
+	};
+
+	usb2513 {
+		compatible = "smsc,usb3503";
+		reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
+		initial-mode = <1>;
+	};
+
+	usb_id: usb-id {
+		compatible = "linux,extcon-usb-gpio";
+		id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb_id_default>;
 	};
 };
 
-- 
1.9.1

[PATCH v3 2/8] arm64: dts: qcom: apq8016-sbc: add usb support

[Srinivas Kandagatla]

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 14 +++++++++
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi          | 34 ++++++++++++++++++++++
 2 files changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
index cbeee0b..ee828a8 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
@@ -10,4 +10,18 @@
 			output-low;
 		};
 	};
+
+	usb_id_default: usb-id-default {
+		pinmux {
+			function = "gpio";
+			pins = "gpio121";
+		};
+
+		pinconf {
+			pins = "gpio121";
+			drive-strength = <8>;
+			input-enable;
+			bias-pull-up;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 8102929..15bb485 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -133,6 +133,40 @@
 		sdhci at 07824000 {
 			status = "okay";
 		};
+
+		usb at 78d9000 {
+			extcon = <&usb_id>, <&usb_id>;
+			status = "okay";
+		};
+
+		ehci at 78d9000 {
+			status = "okay";
+		};
+
+		phy at 78d9000 {
+			v1p8-supply = <&pm8916_l7>;
+			v3p3-supply = <&pm8916_l13>;
+			vddcx-supply = <&pm8916_s1>;
+			extcon = <&usb_id>, <&usb_id>;
+			dr_mode = "otg";
+			status = "okay";
+			switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&usb_sw_sel_pm>;
+		};
+	};
+
+	usb2513 {
+		compatible = "smsc,usb3503";
+		reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
+		initial-mode = <1>;
+	};
+
+	usb_id: usb-id {
+		compatible = "linux,extcon-usb-gpio";
+		id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb_id_default>;
 	};
 };
 
-- 
1.9.1

[PATCH v3 3/8] arm64: dts: qcom: add audio pinctrls

[Srinivas Kandagatla]

This patch adds pinctrls required for digital and analog audio via lpass.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 216 +++++++++++++++++++++++++++++
 1 file changed, 216 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 8d05005..e9ea5ca 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -504,4 +504,220 @@
 			};
 		};
 	};
+
+	ext-codec-lines {
+		ext_codec_lines_act: lines_on {
+			pinmux {
+				function = "gpio";
+				pins = "gpio67";
+			};
+			pinconf {
+				pins = "gpio67";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+		};
+		ext_codec_lines_sus: lines_off {
+			pinmux {
+				function = "gpio";
+				pins = "gpio67";
+			};
+			pinconf {
+				pins = "gpio67";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cdc-pdm-lines {
+		cdc_pdm_lines_act: pdm_lines_on {
+			pinmux {
+				function = "cdc_pdm0";
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+			};
+			pinconf {
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		cdc_pdm_lines_sus: pdm_lines_off {
+			pinmux {
+				function = "cdc_pdm0";
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+			};
+			pinconf {
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-pri-tlmm-lines {
+		ext_pri_tlmm_lines_act: ext_pa_on {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+			};
+			pinconf {
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+
+		ext_pri_tlmm_lines_sus: ext_pa_off {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+			};
+			pinconf {
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-pri-ws-line {
+		ext_pri_ws_act: ext_pa_on {
+			pinmux {
+				function = "pri_mi2s_ws";
+				pins = "gpio110";
+			};
+			pinconf {
+				pins = "gpio110";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+
+		ext_pri_ws_sus: ext_pa_off {
+			pinmux {
+				function = "pri_mi2s_ws";
+				pins = "gpio110";
+			};
+			pinconf {
+				pins = "gpio110";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-mclk-tlmm-lines {
+		ext_mclk_tlmm_lines_act: mclk_lines_on {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio116";
+			};
+			pinconf {
+				pins = "gpio116";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		ext_mclk_tlmm_lines_sus: mclk_lines_off {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio116";
+			};
+			pinconf {
+				pins = "gpio116";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	/* secondary Mi2S */
+	ext-sec-tlmm-lines {
+		ext_sec_tlmm_lines_act: tlmm_lines_on {
+			pinmux {
+				function = "sec_mi2s";
+				pins = "gpio112", "gpio117", "gpio118",
+				       "gpio119";
+			};
+			pinconf {
+				pins = "gpio112", "gpio117", "gpio118",
+					"gpio119";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		ext_sec_tlmm_lines_sus: tlmm_lines_off {
+			pinmux {
+				function = "sec_mi2s";
+				pins = "gpio112", "gpio117", "gpio118",
+				       "gpio119";
+			};
+			pinconf {
+				pins = "gpio112", "gpio117", "gpio118",
+					"gpio119";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cdc-dmic-lines {
+		cdc_dmic_lines_act: dmic_lines_on {
+			pinmux_dmic0_clk {
+				function = "dmic0_clk";
+				pins = "gpio0";
+			};
+			pinmux_dmic0_data {
+				function = "dmic0_data";
+				pins = "gpio1";
+			};
+			pinconf {
+				pins = "gpio0", "gpio1";
+				drive-strength = <8>;
+			};
+		};
+		cdc_dmic_lines_sus: dmic_lines_off {
+			pinconf {
+				pins = "gpio0", "gpio1";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cross-conn-det {
+		cross_conn_det_act: lines_on {
+			pinmux {
+				function = "gpio";
+				pins = "gpio120";
+			};
+			pinconf {
+				pins = "gpio120";
+				drive-strength = <8>;
+				output-low;
+				bias-pull-down;
+			};
+		};
+		cross_conn_det_sus: lines_off {
+			pinmux {
+				function = "gpio";
+				pins = "gpio120";
+			};
+			pinconf {
+				pins = "gpio120";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
 };
-- 
1.9.1

[PATCH v3 3/8] arm64: dts: qcom: add audio pinctrls

[Srinivas Kandagatla]

This patch adds pinctrls required for digital and analog audio via lpass.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 216 +++++++++++++++++++++++++++++
 1 file changed, 216 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 8d05005..e9ea5ca 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -504,4 +504,220 @@
 			};
 		};
 	};
+
+	ext-codec-lines {
+		ext_codec_lines_act: lines_on {
+			pinmux {
+				function = "gpio";
+				pins = "gpio67";
+			};
+			pinconf {
+				pins = "gpio67";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+		};
+		ext_codec_lines_sus: lines_off {
+			pinmux {
+				function = "gpio";
+				pins = "gpio67";
+			};
+			pinconf {
+				pins = "gpio67";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cdc-pdm-lines {
+		cdc_pdm_lines_act: pdm_lines_on {
+			pinmux {
+				function = "cdc_pdm0";
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+			};
+			pinconf {
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		cdc_pdm_lines_sus: pdm_lines_off {
+			pinmux {
+				function = "cdc_pdm0";
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+			};
+			pinconf {
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-pri-tlmm-lines {
+		ext_pri_tlmm_lines_act: ext_pa_on {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+			};
+			pinconf {
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+
+		ext_pri_tlmm_lines_sus: ext_pa_off {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+			};
+			pinconf {
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-pri-ws-line {
+		ext_pri_ws_act: ext_pa_on {
+			pinmux {
+				function = "pri_mi2s_ws";
+				pins = "gpio110";
+			};
+			pinconf {
+				pins = "gpio110";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+
+		ext_pri_ws_sus: ext_pa_off {
+			pinmux {
+				function = "pri_mi2s_ws";
+				pins = "gpio110";
+			};
+			pinconf {
+				pins = "gpio110";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-mclk-tlmm-lines {
+		ext_mclk_tlmm_lines_act: mclk_lines_on {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio116";
+			};
+			pinconf {
+				pins = "gpio116";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		ext_mclk_tlmm_lines_sus: mclk_lines_off {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio116";
+			};
+			pinconf {
+				pins = "gpio116";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	/* secondary Mi2S */
+	ext-sec-tlmm-lines {
+		ext_sec_tlmm_lines_act: tlmm_lines_on {
+			pinmux {
+				function = "sec_mi2s";
+				pins = "gpio112", "gpio117", "gpio118",
+				       "gpio119";
+			};
+			pinconf {
+				pins = "gpio112", "gpio117", "gpio118",
+					"gpio119";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		ext_sec_tlmm_lines_sus: tlmm_lines_off {
+			pinmux {
+				function = "sec_mi2s";
+				pins = "gpio112", "gpio117", "gpio118",
+				       "gpio119";
+			};
+			pinconf {
+				pins = "gpio112", "gpio117", "gpio118",
+					"gpio119";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cdc-dmic-lines {
+		cdc_dmic_lines_act: dmic_lines_on {
+			pinmux_dmic0_clk {
+				function = "dmic0_clk";
+				pins = "gpio0";
+			};
+			pinmux_dmic0_data {
+				function = "dmic0_data";
+				pins = "gpio1";
+			};
+			pinconf {
+				pins = "gpio0", "gpio1";
+				drive-strength = <8>;
+			};
+		};
+		cdc_dmic_lines_sus: dmic_lines_off {
+			pinconf {
+				pins = "gpio0", "gpio1";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cross-conn-det {
+		cross_conn_det_act: lines_on {
+			pinmux {
+				function = "gpio";
+				pins = "gpio120";
+			};
+			pinconf {
+				pins = "gpio120";
+				drive-strength = <8>;
+				output-low;
+				bias-pull-down;
+			};
+		};
+		cross_conn_det_sus: lines_off {
+			pinmux {
+				function = "gpio";
+				pins = "gpio120";
+			};
+			pinconf {
+				pins = "gpio120";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
 };
-- 
1.9.1

[PATCH v3 4/8] arm64: dts: qcom: add lpass node

[Srinivas Kandagatla]

This patch adds lpass node to the SOC.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index c1592d4..a6fddce 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -343,6 +343,32 @@
 			status = "disabled";
 		};
 
+		lpass: lpass@07708000 {
+			status = "disabled";
+			compatible = "qcom,lpass-cpu-apq8016";
+			clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
+				 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
+				 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
+
+			clock-names = "ahbix-clk",
+					"pcnoc-mport-clk",
+					"pcnoc-sway-clk",
+					"mi2s-bit-clk0",
+					"mi2s-bit-clk1",
+					"mi2s-bit-clk2",
+					"mi2s-bit-clk3";
+			#sound-dai-cells = <1>;
+
+			interrupts = <0 160 0>;
+			interrupt-names = "lpass-irq-lpaif";
+			reg = <0x07708000 0x10000>;
+			reg-names = "lpass-lpaif";
+		};
+
 		sdhc_1: sdhci@07824000 {
 			compatible = "qcom,sdhci-msm-v4";
 			reg = <0x07824900 0x11c>, <0x07824000 0x800>;
-- 
1.9.1

[PATCH v3 4/8] arm64: dts: qcom: add lpass node

[Srinivas Kandagatla]

This patch adds lpass node to the SOC.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index c1592d4..a6fddce 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -343,6 +343,32 @@
 			status = "disabled";
 		};
 
+		lpass: lpass at 07708000 {
+			status = "disabled";
+			compatible = "qcom,lpass-cpu-apq8016";
+			clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
+				 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
+				 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
+
+			clock-names = "ahbix-clk",
+					"pcnoc-mport-clk",
+					"pcnoc-sway-clk",
+					"mi2s-bit-clk0",
+					"mi2s-bit-clk1",
+					"mi2s-bit-clk2",
+					"mi2s-bit-clk3";
+			#sound-dai-cells = <1>;
+
+			interrupts = <0 160 0>;
+			interrupt-names = "lpass-irq-lpaif";
+			reg = <0x07708000 0x10000>;
+			reg-names = "lpass-lpaif";
+		};
+
 		sdhc_1: sdhci at 07824000 {
 			compatible = "qcom,sdhci-msm-v4";
 			reg = <0x07824900 0x11c>, <0x07824000 0x800>;
-- 
1.9.1

[PATCH v3 5/8] arm64: dts: qcom: apq8016-sbc: enable lpass on DB410c

[Srinivas Kandagatla]

This patch enables the lpass on DB410C. LPASS is used as cpu dai for
both analog and digital audio.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 15bb485..27288ee 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -154,6 +154,10 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&usb_sw_sel_pm>;
 		};
+
+		lpass@07708000 {
+			status = "okay";
+		};
 	};
 
 	usb2513 {
-- 
1.9.1

[PATCH v3 5/8] arm64: dts: qcom: apq8016-sbc: enable lpass on DB410c

[Srinivas Kandagatla]

This patch enables the lpass on DB410C. LPASS is used as cpu dai for
both analog and digital audio.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 15bb485..27288ee 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -154,6 +154,10 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&usb_sw_sel_pm>;
 		};
+
+		lpass at 07708000 {
+			status = "okay";
+		};
 	};
 
 	usb2513 {
-- 
1.9.1

[PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Srinivas Kandagatla]

This patch updates the digital voltage levels from corner values to
microvolts as we are going to use s1 regulator directly for vddcx
instead of s1_corner.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index a6fddce..2f40fdd 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -421,7 +421,7 @@
 			interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
 				     <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
 
-			qcom,vdd-levels = <1 5 7>;
+			qcom,vdd-levels = <500000 1000000 1320000>;
 			qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
 			dr_mode = "peripheral";
 			qcom,otg-control = <2>; // PMIC
-- 
1.9.1

[PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Srinivas Kandagatla]

This patch updates the digital voltage levels from corner values to
microvolts as we are going to use s1 regulator directly for vddcx
instead of s1_corner.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index a6fddce..2f40fdd 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -421,7 +421,7 @@
 			interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
 				     <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
 
-			qcom,vdd-levels = <1 5 7>;
+			qcom,vdd-levels = <500000 1000000 1320000>;
 			qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
 			dr_mode = "peripheral";
 			qcom,otg-control = <2>; // PMIC
-- 
1.9.1

[PATCH v3 7/8] arm64: dts: qcom: apq8016-sbc: enable bam dma node.

[Srinivas Kandagatla]

This patch enables bam dma node, dma is used for both tx and rx on spi
and on high speed serial.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 27288ee..3f15b19 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -33,6 +33,10 @@
 	};
 
 	soc {
+		dma@7884000 {
+			status = "okay";
+		};
+
 		serial@78af000 {
 			label = "LS-UART0";
 			status = "okay";
-- 
1.9.1

[PATCH v3 7/8] arm64: dts: qcom: apq8016-sbc: enable bam dma node.

[Srinivas Kandagatla]

This patch enables bam dma node, dma is used for both tx and rx on spi
and on high speed serial.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 27288ee..3f15b19 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -33,6 +33,10 @@
 	};
 
 	soc {
+		dma at 7884000 {
+			status = "okay";
+		};
+
 		serial at 78af000 {
 			label = "LS-UART0";
 			status = "okay";
-- 
1.9.1

[PATCH v3 8/8] arm64: dts: qcom: Fix MPP's function used for LED control

[Srinivas Kandagatla]

From: "Ivan T. Ivanov" <ivan.ivanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

The qcom-spmi-mpp driver is now using string "digital" to denote
old "normal" functionality. Update DTS file.
Also update the powersource.

Signed-off-by: Ivan T. Ivanov <ivan.ivanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
index e03c11d..f881437 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
@@ -33,7 +33,7 @@
 	pm8916_mpps_leds: pm8916_mpps_leds {
 		pinconf {
 			pins = "mpp2", "mpp3";
-			function = PMIC_GPIO_FUNC_NORMAL;
+			function = "digital";
 			output-low;
 		};
 	};
-- 
1.9.1

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[PATCH v3 8/8] arm64: dts: qcom: Fix MPP's function used for LED control

[Srinivas Kandagatla]

From: "Ivan T. Ivanov" <ivan.ivanov@linaro.org>

The qcom-spmi-mpp driver is now using string "digital" to denote
old "normal" functionality. Update DTS file.
Also update the powersource.

Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
index e03c11d..f881437 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
@@ -33,7 +33,7 @@
 	pm8916_mpps_leds: pm8916_mpps_leds {
 		pinconf {
 			pins = "mpp2", "mpp3";
-			function = PMIC_GPIO_FUNC_NORMAL;
+			function = "digital";
 			output-low;
 		};
 	};
-- 
1.9.1

[PATCH v3 8/8] arm64: dts: qcom: Fix MPP's function used for LED control

[Srinivas Kandagatla]

From: "Ivan T. Ivanov" <ivan.ivanov@linaro.org>

The qcom-spmi-mpp driver is now using string "digital" to denote
old "normal" functionality. Update DTS file.
Also update the powersource.

Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
index e03c11d..f881437 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
@@ -33,7 +33,7 @@
 	pm8916_mpps_leds: pm8916_mpps_leds {
 		pinconf {
 			pins = "mpp2", "mpp3";
-			function = PMIC_GPIO_FUNC_NORMAL;
+			function = "digital";
 			output-low;
 		};
 	};
-- 
1.9.1

Re: [PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Stephen Boyd]

On 02/23/2016 08:50 AM, Srinivas Kandagatla wrote:
> This patch updates the digital voltage levels from corner values to
> microvolts as we are going to use s1 regulator directly for vddcx
> instead of s1_corner.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---

What's the plan for corners? Maybe we should remove the voltage setting
from the usb driver or drop the usb node entirely on msm8916 until we
resolve how we're going to handle corners. I'd like to avoid getting
stuck into some DT binding ABI mess here.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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Re: [PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Stephen Boyd]

On 02/23/2016 08:50 AM, Srinivas Kandagatla wrote:
> This patch updates the digital voltage levels from corner values to
> microvolts as we are going to use s1 regulator directly for vddcx
> instead of s1_corner.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---

What's the plan for corners? Maybe we should remove the voltage setting
from the usb driver or drop the usb node entirely on msm8916 until we
resolve how we're going to handle corners. I'd like to avoid getting
stuck into some DT binding ABI mess here.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Stephen Boyd]

On 02/23/2016 08:50 AM, Srinivas Kandagatla wrote:
> This patch updates the digital voltage levels from corner values to
> microvolts as we are going to use s1 regulator directly for vddcx
> instead of s1_corner.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---

What's the plan for corners? Maybe we should remove the voltage setting
from the usb driver or drop the usb node entirely on msm8916 until we
resolve how we're going to handle corners. I'd like to avoid getting
stuck into some DT binding ABI mess here.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Srinivas Kandagatla]

On 24/02/16 23:06, Stephen Boyd wrote:
> On 02/23/2016 08:50 AM, Srinivas Kandagatla wrote:
>> This patch updates the digital voltage levels from corner values to
>> microvolts as we are going to use s1 regulator directly for vddcx
>> instead of s1_corner.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>
> What's the plan for corners? Maybe we should remove the voltage setting
> from the usb driver or drop the usb node entirely on msm8916 until we
> resolve how we're going to handle corners. I'd like to avoid getting
> stuck into some DT binding ABI mess here.

Andy/Bjorn, any comments on plans on corner regulators?

Please note, that this is a patch to fix what is already in the 
mainline. Without this patch the regulator would be configured with 1uV 
or 5uV or 7uV which would obviously fail.

THB, it does not make sense to drop feature which is functional, and I 
also agree that we should cleanup some of this mess at some point in 
time once we all the bits and pieces ready.

I was surprised to see these usb bindings(qcom,vdd-levels) existed even 
before we had concept of corner regulators in mainline kernel. Which 
also suggests that this driver needs a proper relook once again.

Thanks,
srini

[PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Srinivas Kandagatla]

On 24/02/16 23:06, Stephen Boyd wrote:
> On 02/23/2016 08:50 AM, Srinivas Kandagatla wrote:
>> This patch updates the digital voltage levels from corner values to
>> microvolts as we are going to use s1 regulator directly for vddcx
>> instead of s1_corner.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>
> What's the plan for corners? Maybe we should remove the voltage setting
> from the usb driver or drop the usb node entirely on msm8916 until we
> resolve how we're going to handle corners. I'd like to avoid getting
> stuck into some DT binding ABI mess here.

Andy/Bjorn, any comments on plans on corner regulators?

Please note, that this is a patch to fix what is already in the 
mainline. Without this patch the regulator would be configured with 1uV 
or 5uV or 7uV which would obviously fail.

THB, it does not make sense to drop feature which is functional, and I 
also agree that we should cleanup some of this mess at some point in 
time once we all the bits and pieces ready.

I was surprised to see these usb bindings(qcom,vdd-levels) existed even 
before we had concept of corner regulators in mainline kernel. Which 
also suggests that this driver needs a proper relook once again.

Thanks,
srini

Re: [PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Andy Gross]

[-- Attachment #1: Type: text/plain, Size: 1724 bytes --]

I think the vdd-levels were an oversight.  The voltages definitely need to
be correct.  As for the corner regulators, I believe the CPR driver was
supposed to address this.  The USB requests a specific voltage and
frequency and based on this the CPR would set the corner for the regulator.

Stephen, correct me if i am wrong.

On 25 February 2016 at 05:21, Srinivas Kandagatla <
srinivas.kandagatla@linaro.org> wrote:

>
>
> On 24/02/16 23:06, Stephen Boyd wrote:
>
>> On 02/23/2016 08:50 AM, Srinivas Kandagatla wrote:
>>
>>> This patch updates the digital voltage levels from corner values to
>>> microvolts as we are going to use s1 regulator directly for vddcx
>>> instead of s1_corner.
>>>
>>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>>> ---
>>>
>>
>> What's the plan for corners? Maybe we should remove the voltage setting
>> from the usb driver or drop the usb node entirely on msm8916 until we
>> resolve how we're going to handle corners. I'd like to avoid getting
>> stuck into some DT binding ABI mess here.
>>
>
> Andy/Bjorn, any comments on plans on corner regulators?
>
> Please note, that this is a patch to fix what is already in the mainline.
> Without this patch the regulator would be configured with 1uV or 5uV or 7uV
> which would obviously fail.
>
> THB, it does not make sense to drop feature which is functional, and I
> also agree that we should cleanup some of this mess at some point in time
> once we all the bits and pieces ready.
>
> I was surprised to see these usb bindings(qcom,vdd-levels) existed even
> before we had concept of corner regulators in mainline kernel. Which also
> suggests that this driver needs a proper relook once again.
>
> Thanks,
> srini
>

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Re: [PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Andy Gross]

I think the vdd-levels were an oversight.  The voltages definitely
need to be correct.  As for the corner regulators, I believe the CPR
driver was supposed to address this.  The USB requests a specific
voltage and frequency and based on this the CPR would set the corner
for the regulator.

Stephen, correct me if i am wrong.

On 25 February 2016 at 17:44, Andy Gross <andy.gross@linaro.org> wrote:
> I think the vdd-levels were an oversight.  The voltages definitely need to
> be correct.  As for the corner regulators, I believe the CPR driver was
> supposed to address this.  The USB requests a specific voltage and frequency
> and based on this the CPR would set the corner for the regulator.
>
> Stephen, correct me if i am wrong.
>
> On 25 February 2016 at 05:21, Srinivas Kandagatla
> <srinivas.kandagatla@linaro.org> wrote:
>>
>>
>>
>> On 24/02/16 23:06, Stephen Boyd wrote:
>>>
>>> On 02/23/2016 08:50 AM, Srinivas Kandagatla wrote:
>>>>
>>>> This patch updates the digital voltage levels from corner values to
>>>> microvolts as we are going to use s1 regulator directly for vddcx
>>>> instead of s1_corner.
>>>>
>>>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>>>> ---
>>>
>>>
>>> What's the plan for corners? Maybe we should remove the voltage setting
>>> from the usb driver or drop the usb node entirely on msm8916 until we
>>> resolve how we're going to handle corners. I'd like to avoid getting
>>> stuck into some DT binding ABI mess here.
>>
>>
>> Andy/Bjorn, any comments on plans on corner regulators?
>>
>> Please note, that this is a patch to fix what is already in the mainline.
>> Without this patch the regulator would be configured with 1uV or 5uV or 7uV
>> which would obviously fail.
>>
>> THB, it does not make sense to drop feature which is functional, and I
>> also agree that we should cleanup some of this mess at some point in time
>> once we all the bits and pieces ready.
>>
>> I was surprised to see these usb bindings(qcom,vdd-levels) existed even
>> before we had concept of corner regulators in mainline kernel. Which also
>> suggests that this driver needs a proper relook once again.
>>
>> Thanks,
>> srini
>
>

[PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Andy Gross]

I think the vdd-levels were an oversight.  The voltages definitely
need to be correct.  As for the corner regulators, I believe the CPR
driver was supposed to address this.  The USB requests a specific
voltage and frequency and based on this the CPR would set the corner
for the regulator.

Stephen, correct me if i am wrong.

On 25 February 2016 at 17:44, Andy Gross <andy.gross@linaro.org> wrote:
> I think the vdd-levels were an oversight.  The voltages definitely need to
> be correct.  As for the corner regulators, I believe the CPR driver was
> supposed to address this.  The USB requests a specific voltage and frequency
> and based on this the CPR would set the corner for the regulator.
>
> Stephen, correct me if i am wrong.
>
> On 25 February 2016 at 05:21, Srinivas Kandagatla
> <srinivas.kandagatla@linaro.org> wrote:
>>
>>
>>
>> On 24/02/16 23:06, Stephen Boyd wrote:
>>>
>>> On 02/23/2016 08:50 AM, Srinivas Kandagatla wrote:
>>>>
>>>> This patch updates the digital voltage levels from corner values to
>>>> microvolts as we are going to use s1 regulator directly for vddcx
>>>> instead of s1_corner.
>>>>
>>>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>>>> ---
>>>
>>>
>>> What's the plan for corners? Maybe we should remove the voltage setting
>>> from the usb driver or drop the usb node entirely on msm8916 until we
>>> resolve how we're going to handle corners. I'd like to avoid getting
>>> stuck into some DT binding ABI mess here.
>>
>>
>> Andy/Bjorn, any comments on plans on corner regulators?
>>
>> Please note, that this is a patch to fix what is already in the mainline.
>> Without this patch the regulator would be configured with 1uV or 5uV or 7uV
>> which would obviously fail.
>>
>> THB, it does not make sense to drop feature which is functional, and I
>> also agree that we should cleanup some of this mess at some point in time
>> once we all the bits and pieces ready.
>>
>> I was surprised to see these usb bindings(qcom,vdd-levels) existed even
>> before we had concept of corner regulators in mainline kernel. Which also
>> suggests that this driver needs a proper relook once again.
>>
>> Thanks,
>> srini
>
>

Re: [PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Stephen Boyd]

On 02/25, Andy Gross wrote:
> > On 25 February 2016 at 05:21, Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> >>
> >> Andy/Bjorn, any comments on plans on corner regulators?
> >>
> >> Please note, that this is a patch to fix what is already in the mainline.
> >> Without this patch the regulator would be configured with 1uV or 5uV or 7uV
> >> which would obviously fail.
> >>
> >> THB, it does not make sense to drop feature which is functional, and I
> >> also agree that we should cleanup some of this mess at some point in time
> >> once we all the bits and pieces ready.
> >>
> >> I was surprised to see these usb bindings(qcom,vdd-levels) existed even
> >> before we had concept of corner regulators in mainline kernel. Which also
> >> suggests that this driver needs a proper relook once again.
>
> I think the vdd-levels were an oversight.  The voltages definitely
> need to be correct.  As for the corner regulators, I believe the CPR
> driver was supposed to address this.  The USB requests a specific
> voltage and frequency and based on this the CPR would set the corner
> for the regulator.
> 
> Stephen, correct me if i am wrong.

There's CPR for the CPU voltage and there's CPR for the digital
voltage. The RPM controls the latter, and so all we have on the
Linux side is an API to request corners, not voltages, for
digital logic. Almost everything in the SoC is using the digital
voltage, so having USB be the only consumer of this voltage and
then be the only driver telling the RPM what corner or voltage we
want here is potentially very dangerous.

Consider the case where USB goes to runtime suspend and USB
driver says it only needs "low" voltage. This might cause RPM to
go and lower the voltage because no other master in the system is
asking for anything else besides "low". But we may have other
hardware blocks using the digital logic supply in the system,
e.g. GPU is running at max speed, and those blocks need "high"
voltage. We just browned out the GPU.

So maybe we should just remove this code from the USB driver for
now? By default the voltage is nominal, and when the bus clocks
are maxed out the voltage goes to the highest level. So as long
as RPM bus clocks are maxed this code is not doing anything.

My plan for handling corners is to hide it behind the OPP
framework and/or generic power domains. The digital logic supply
is really a regulator that supplies a large power domain called
CX. All the digital logic in the SoC lives within this power
domain. As an aside, it's quite typical that a hardware block
sits in a few domains: digital, analog, memories, etc. so this
may require us to expand the ability for devices to be in
multiple PM domains at one time. But regardless, the frequency
that a device in the digital logic domain is running at is used
to pick a voltage that is "maxed" across all devices and factors
into the voltage requirement of the domain. Another way to put it
is that each device casts a "vote" for the CX voltage based on
their frequency and the largest uV wins and is set.

This is further complicated by CPR, which takes away the uV units
from this calculation and transforms that into a "corner". Each
hardware block now knows what voltage "corner" it needs for CX
when their clock is at a particular frequency. We'll probably
need to add some sort of "corner" property to the OPP binding to
express this. Hopefully it can be a generic power domain level
thing (keep reading!).

So I'm thinking each device gets an OPP table of frequency to
voltage/corner pairs. Devices would change their OPP through OPP
framework and this would adjust the clk and voltage/corner
appropriately. To make things generic between voltages and
corners, we could hide that part behind the genpd framework by
having OPP pick a "power level" that the power domain should be
at. On SoCs where the power domain is supplied by a regulator the
level would be translated into a uV (probably need some sort of
level to uV table in DT or just put that in the code). On SoCs
where the power domain is supplied by a regulator with corners,
the level would be used as is and sent to the RPM. OPP framework
wouldn't care, as long as the genpd driver handles the voltage
vs. corner stuff.

-- 
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a Linux Foundation Collaborative Project
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Re: [PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Stephen Boyd]

On 02/25, Andy Gross wrote:
> > On 25 February 2016 at 05:21, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote:
> >>
> >> Andy/Bjorn, any comments on plans on corner regulators?
> >>
> >> Please note, that this is a patch to fix what is already in the mainline.
> >> Without this patch the regulator would be configured with 1uV or 5uV or 7uV
> >> which would obviously fail.
> >>
> >> THB, it does not make sense to drop feature which is functional, and I
> >> also agree that we should cleanup some of this mess at some point in time
> >> once we all the bits and pieces ready.
> >>
> >> I was surprised to see these usb bindings(qcom,vdd-levels) existed even
> >> before we had concept of corner regulators in mainline kernel. Which also
> >> suggests that this driver needs a proper relook once again.
>
> I think the vdd-levels were an oversight.  The voltages definitely
> need to be correct.  As for the corner regulators, I believe the CPR
> driver was supposed to address this.  The USB requests a specific
> voltage and frequency and based on this the CPR would set the corner
> for the regulator.
> 
> Stephen, correct me if i am wrong.

There's CPR for the CPU voltage and there's CPR for the digital
voltage. The RPM controls the latter, and so all we have on the
Linux side is an API to request corners, not voltages, for
digital logic. Almost everything in the SoC is using the digital
voltage, so having USB be the only consumer of this voltage and
then be the only driver telling the RPM what corner or voltage we
want here is potentially very dangerous.

Consider the case where USB goes to runtime suspend and USB
driver says it only needs "low" voltage. This might cause RPM to
go and lower the voltage because no other master in the system is
asking for anything else besides "low". But we may have other
hardware blocks using the digital logic supply in the system,
e.g. GPU is running at max speed, and those blocks need "high"
voltage. We just browned out the GPU.

So maybe we should just remove this code from the USB driver for
now? By default the voltage is nominal, and when the bus clocks
are maxed out the voltage goes to the highest level. So as long
as RPM bus clocks are maxed this code is not doing anything.

My plan for handling corners is to hide it behind the OPP
framework and/or generic power domains. The digital logic supply
is really a regulator that supplies a large power domain called
CX. All the digital logic in the SoC lives within this power
domain. As an aside, it's quite typical that a hardware block
sits in a few domains: digital, analog, memories, etc. so this
may require us to expand the ability for devices to be in
multiple PM domains at one time. But regardless, the frequency
that a device in the digital logic domain is running at is used
to pick a voltage that is "maxed" across all devices and factors
into the voltage requirement of the domain. Another way to put it
is that each device casts a "vote" for the CX voltage based on
their frequency and the largest uV wins and is set.

This is further complicated by CPR, which takes away the uV units
from this calculation and transforms that into a "corner". Each
hardware block now knows what voltage "corner" it needs for CX
when their clock is at a particular frequency. We'll probably
need to add some sort of "corner" property to the OPP binding to
express this. Hopefully it can be a generic power domain level
thing (keep reading!).

So I'm thinking each device gets an OPP table of frequency to
voltage/corner pairs. Devices would change their OPP through OPP
framework and this would adjust the clk and voltage/corner
appropriately. To make things generic between voltages and
corners, we could hide that part behind the genpd framework by
having OPP pick a "power level" that the power domain should be
at. On SoCs where the power domain is supplied by a regulator the
level would be translated into a uV (probably need some sort of
level to uV table in DT or just put that in the code). On SoCs
where the power domain is supplied by a regulator with corners,
the level would be used as is and sent to the RPM. OPP framework
wouldn't care, as long as the genpd driver handles the voltage
vs. corner stuff.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels

[Stephen Boyd]

On 02/25, Andy Gross wrote:
> > On 25 February 2016 at 05:21, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote:
> >>
> >> Andy/Bjorn, any comments on plans on corner regulators?
> >>
> >> Please note, that this is a patch to fix what is already in the mainline.
> >> Without this patch the regulator would be configured with 1uV or 5uV or 7uV
> >> which would obviously fail.
> >>
> >> THB, it does not make sense to drop feature which is functional, and I
> >> also agree that we should cleanup some of this mess at some point in time
> >> once we all the bits and pieces ready.
> >>
> >> I was surprised to see these usb bindings(qcom,vdd-levels) existed even
> >> before we had concept of corner regulators in mainline kernel. Which also
> >> suggests that this driver needs a proper relook once again.
>
> I think the vdd-levels were an oversight.  The voltages definitely
> need to be correct.  As for the corner regulators, I believe the CPR
> driver was supposed to address this.  The USB requests a specific
> voltage and frequency and based on this the CPR would set the corner
> for the regulator.
> 
> Stephen, correct me if i am wrong.

There's CPR for the CPU voltage and there's CPR for the digital
voltage. The RPM controls the latter, and so all we have on the
Linux side is an API to request corners, not voltages, for
digital logic. Almost everything in the SoC is using the digital
voltage, so having USB be the only consumer of this voltage and
then be the only driver telling the RPM what corner or voltage we
want here is potentially very dangerous.

Consider the case where USB goes to runtime suspend and USB
driver says it only needs "low" voltage. This might cause RPM to
go and lower the voltage because no other master in the system is
asking for anything else besides "low". But we may have other
hardware blocks using the digital logic supply in the system,
e.g. GPU is running at max speed, and those blocks need "high"
voltage. We just browned out the GPU.

So maybe we should just remove this code from the USB driver for
now? By default the voltage is nominal, and when the bus clocks
are maxed out the voltage goes to the highest level. So as long
as RPM bus clocks are maxed this code is not doing anything.

My plan for handling corners is to hide it behind the OPP
framework and/or generic power domains. The digital logic supply
is really a regulator that supplies a large power domain called
CX. All the digital logic in the SoC lives within this power
domain. As an aside, it's quite typical that a hardware block
sits in a few domains: digital, analog, memories, etc. so this
may require us to expand the ability for devices to be in
multiple PM domains at one time. But regardless, the frequency
that a device in the digital logic domain is running at is used
to pick a voltage that is "maxed" across all devices and factors
into the voltage requirement of the domain. Another way to put it
is that each device casts a "vote" for the CX voltage based on
their frequency and the largest uV wins and is set.

This is further complicated by CPR, which takes away the uV units
from this calculation and transforms that into a "corner". Each
hardware block now knows what voltage "corner" it needs for CX
when their clock is at a particular frequency. We'll probably
need to add some sort of "corner" property to the OPP binding to
express this. Hopefully it can be a generic power domain level
thing (keep reading!).

So I'm thinking each device gets an OPP table of frequency to
voltage/corner pairs. Devices would change their OPP through OPP
framework and this would adjust the clk and voltage/corner
appropriately. To make things generic between voltages and
corners, we could hide that part behind the genpd framework by
having OPP pick a "power level" that the power domain should be
at. On SoCs where the power domain is supplied by a regulator the
level would be translated into a uV (probably need some sort of
level to uV table in DT or just put that in the code). On SoCs
where the power domain is supplied by a regulator with corners,
the level would be used as is and sent to the RPM. OPP framework
wouldn't care, as long as the genpd driver handles the voltage
vs. corner stuff.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project