* [PATCH 01/14] powerpc: Add simple cache inhibited MMIO accessors
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 02/14] KVM: PPC: Book3S HV: Convert kvmppc_read_intr to a C function Suresh Warrier
` (13 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Add simple cache inhibited accessors for memory mapped I/O.
Unlike the accessors built from the DEF_MMIO_* macros, these
don't include any hardware memory barriers, callers need to
manage memory barriers on their own. These can only be called
in hypervisor mode.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/io.h | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 6c1297e..d329a01 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -241,6 +241,34 @@ static inline void out_be64(volatile u64 __iomem *addr, u64 val)
#endif
#endif /* __powerpc64__ */
+
+/*
+ * Simple Cache inhibited accessors
+ * Unlike the DEF_MMIO_* macros, these don't include any h/w memory
+ * barriers, callers need to manage memory barriers on their own.
+ */
+
+static inline u32 _lwzcix(unsigned long addr)
+{
+ u32 ret;
+
+ __asm__ __volatile__("lwzcix %0,0, %1"
+ : "=r" (ret) : "r" (addr) : "memory");
+ return ret;
+}
+
+static inline void _stbcix(u64 addr, u8 val)
+{
+ __asm__ __volatile__("stbcix %0,0,%1"
+ : : "r" (val), "r" (addr) : "memory");
+}
+
+static inline void _stwcix(u64 addr, u32 val)
+{
+ __asm__ __volatile__("stwcix %0,0,%1"
+ : : "r" (val), "r" (addr) : "memory");
+}
+
/*
* Low level IO stream instructions are defined out of line for now
*/
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 02/14] KVM: PPC: Book3S HV: Convert kvmppc_read_intr to a C function
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
2016-02-26 18:40 ` [PATCH 01/14] powerpc: Add simple cache inhibited MMIO accessors Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 03/14] KVM: PPC: select IRQ_BYPASS_MANAGER Suresh Warrier
` (12 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Modify kvmppc_read_intr to make it a C function.
This also adds in the optimization of clearing saved_xirr in the case
where we completely handle and EOI an IPI. Without this, the next
device interrupt will require two trips through the host interrupt
handling code.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/kvm/book3s_hv_builtin.c | 84 +++++++++++++++
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 184 +++++++++++++++++---------------
2 files changed, 179 insertions(+), 89 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
index 5f0380d..5db386a 100644
--- a/arch/powerpc/kvm/book3s_hv_builtin.c
+++ b/arch/powerpc/kvm/book3s_hv_builtin.c
@@ -25,6 +25,7 @@
#include <asm/xics.h>
#include <asm/dbell.h>
#include <asm/cputhreads.h>
+#include <asm/io.h>
#define KVM_CMA_CHUNK_ORDER 18
@@ -286,3 +287,86 @@ void kvmhv_commence_exit(int trap)
struct kvmppc_host_rm_ops *kvmppc_host_rm_ops_hv;
EXPORT_SYMBOL_GPL(kvmppc_host_rm_ops_hv);
+
+/*
+ * Determine what sort of external interrupt is pending (if any).
+ * Returns:
+ * 0 if no interrupt is pending
+ * 1 if an interrupt is pending that needs to be handled by the host
+ * -1 if there was a guest wakeup IPI (which has now been cleared)
+ */
+
+long kvmppc_read_intr(struct kvm_vcpu *vcpu, int path)
+{
+ unsigned long xics_phys;
+ u32 h_xirr;
+ __be32 xirr;
+ u32 xisr;
+ u8 host_ipi;
+
+ /* see if a host IPI is pending */
+ host_ipi = local_paca->kvm_hstate.host_ipi;
+ if (host_ipi)
+ return 1;
+
+ /* Now read the interrupt from the ICP */
+ xics_phys = local_paca->kvm_hstate.xics_phys;
+ if (unlikely(!xics_phys))
+ return 1;
+
+ /*
+ * Save XIRR for later. Since we get control in reverse endian
+ * on LE systems, save it byte reversed and fetch it back in
+ * host endian. Note that xirr is the value read from the
+ * XIRR register, while h_xirr is the host endian version.
+ */
+ xirr = _lwzcix(xics_phys + XICS_XIRR);
+ h_xirr = be32_to_cpu(xirr);
+ local_paca->kvm_hstate.saved_xirr = h_xirr;
+ xisr = h_xirr & 0xffffff;
+ /*
+ * Ensure that the store/load complete to guarantee all side
+ * effects of loading from XIRR has completed
+ */
+ smp_mb();
+
+ /* if nothing pending in the ICP */
+ if (!xisr)
+ return 0;
+
+ /* We found something in the ICP...
+ *
+ * If it is an IPI, clear the MFRR and EOI it.
+ */
+ if (xisr == XICS_IPI) {
+ _stbcix(xics_phys + XICS_MFRR, 0xff);
+ _stwcix(xics_phys + XICS_XIRR, xirr);
+ /*
+ * Need to ensure side effects of above stores
+ * complete before proceeding.
+ */
+ smp_mb();
+
+ /*
+ * We need to re-check host IPI now in case it got set in the
+ * meantime. If it's clear, we bounce the interrupt to the
+ * guest
+ */
+ host_ipi = local_paca->kvm_hstate.host_ipi;
+ if (unlikely(host_ipi != 0)) {
+ /* We raced with the host,
+ * we need to resend that IPI, bummer
+ */
+ _stbcix(xics_phys + XICS_MFRR, IPI_PRIORITY);
+ /* Let side effects complete */
+ smp_mb();
+ return 1;
+ }
+
+ /* OK, it's an IPI for us */
+ local_paca->kvm_hstate.saved_xirr = 0;
+ return -1;
+ }
+
+ return 1;
+}
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index ed16182..29e6a8a 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -220,6 +220,13 @@ kvmppc_primary_no_guest:
li r3, 0 /* Don't wake on privileged (OS) doorbell */
b kvm_do_nap
+/*
+ * kvm_novcpu_wakeup
+ * Entered from kvm_start_guest if kvm_hstate.napping is set
+ * to NAPPING_NOVCPU
+ * r2 = kernel TOC
+ * r13 = paca
+ */
kvm_novcpu_wakeup:
ld r1, HSTATE_HOST_R1(r13)
ld r5, HSTATE_KVM_VCORE(r13)
@@ -227,8 +234,18 @@ kvm_novcpu_wakeup:
stb r0, HSTATE_NAPPING(r13)
/* check the wake reason */
+ ld r3, HSTATE_KVM_VCPU(r13)
bl kvmppc_check_wake_reason
+ /*
+ * Restore volatile registers since we could have called
+ * a C routine in kvmppc_check_wake_reason.
+ * Wake reason (trap) is returned through r31
+ * r5 = VCORE
+ */
+ ld r5, HSTATE_KVM_VCORE(r13)
+ mr r12, r31
+
/* see if any other thread is already exiting */
lwz r0, VCORE_ENTRY_EXIT(r5)
cmpwi r0, 0x100
@@ -320,7 +337,15 @@ kvm_start_guest:
*/
/* Check the wake reason in SRR1 to see why we got here */
+ ld r3, HSTATE_KVM_VCPU(r13)
bl kvmppc_check_wake_reason
+ /*
+ * kvmppc_check_wake_reason could invoke a C routine, but we
+ * have no volatile registers to restore when we return.
+ * Wake reason (trap) is returned through r31.
+ */
+ mr r12, r31
+
cmpdi r3, 0
bge kvm_no_guest
@@ -1230,16 +1255,56 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
/* External interrupt, first check for host_ipi. If this is
* set, we know the host wants us out so let's do it now
*/
+ mr r3, r9
bl kvmppc_read_intr
+
+ /*
+ * Restore the active volatile registers after returning from
+ * a C function.
+ */
+ ld r9, HSTATE_KVM_VCPU(r13)
+ ld r10, VCPU_PC(r9)
+ ld r11, VCPU_MSR(r9)
+ li r12, BOOK3S_INTERRUPT_EXTERNAL
+
+ /*
+ * kvmppc_read_intr return codes:
+ *
+ * Exit to host (r3 > 0)
+ * 1 An interrupt is pending that needs to be handled by the host
+ * Exit guest and return to host by branching to guest_exit_cont
+ *
+ * Before returning to guest, we check if any CPU is heading out
+ * to the host and if so, we head out also. If no CPUs are heading
+ * check return values <= 0.
+ *
+ * If returning to the guest, we need to restore CTR and XER
+ * since these are volatile registers, and deliver_guest_interrupt
+ * does not restore them.
+ *
+ * Return to guest (r3 <= 0)
+ * 0 No external interrupt is pending
+ * -1 A guest wakeup IPI (which has now been cleared)
+ * In either case, we return to guest to deliver any pending
+ * guest interrupts.
+ */
+
cmpdi r3, 0
bgt guest_exit_cont
- /* Check if any CPU is heading out to the host, if so head out too */
+ /* Return code <= 0 */
4: ld r5, HSTATE_KVM_VCORE(r13)
lwz r0, VCORE_ENTRY_EXIT(r5)
cmpwi r0, 0x100
mr r4, r9
- blt deliver_guest_interrupt
+ bge guest_exit_cont
+
+ /* Return code <= 0, return to guest */
+ ld r6, VCPU_CTR(r4)
+ ld r7, VCPU_XER(r4)
+ mtctr r6
+ mtxer r7
+ b deliver_guest_interrupt
guest_exit_cont: /* r9 = vcpu, r12 = trap, r13 = paca */
/* Save more register state */
@@ -2319,6 +2384,22 @@ kvm_end_cede:
subf r3, r7, r3
mtspr SPRN_DEC, r3
+ /* Check the wake reason in SRR1 to see why we got here */
+ mr r3, r4
+ bl kvmppc_check_wake_reason
+
+ /*
+ * Restore volatile registers since we could have called a
+ * C routine in kvmppc_check_wake_reason
+ * r4 = VCPU
+ * Wake reason (trap) is returned through r31
+ * r3 tells us whether we need to return to host or not
+ * WARNING: it gets checked much further down a second time:
+ * should not modify r3 until this check is done.
+ */
+ ld r4, HSTATE_KVM_VCPU(r13)
+ mr r12, r31
+
/* Load NV GPRS */
ld r14, VCPU_GPR(R14)(r4)
ld r15, VCPU_GPR(R15)(r4)
@@ -2338,9 +2419,6 @@ kvm_end_cede:
ld r29, VCPU_GPR(R29)(r4)
ld r30, VCPU_GPR(R30)(r4)
ld r31, VCPU_GPR(R31)(r4)
-
- /* Check the wake reason in SRR1 to see why we got here */
- bl kvmppc_check_wake_reason
/* clear our bit in vcore->napping_threads */
34: ld r5,HSTATE_KVM_VCORE(r13)
@@ -2355,7 +2433,7 @@ kvm_end_cede:
li r0,0
stb r0,HSTATE_NAPPING(r13)
- /* See if the wake reason means we need to exit */
+ /* See if the wake reason saved in r3 means we need to exit */
stw r12, VCPU_TRAP(r4)
mr r9, r4
cmpdi r3, 0
@@ -2423,9 +2501,15 @@ machine_check_realmode:
* 1 if something happened that needs to be handled by the host
* -1 if there was a guest wakeup (IPI or msgsnd)
*
- * Also sets r12 to the interrupt vector for any interrupt that needs
+ * Also sets r31 to the interrupt vector for any interrupt that needs
* to be handled now by the host (0x500 for external interrupt), or zero.
- * Modifies r0, r6, r7, r8.
+ * Modifies all volatile registers (since it may call a C function).
+ * Since this routine modifies r31, it cannot be called by a C function.
+ * This routine branches to kvmppc_read_intr, a C function, if an external
+ * interrupt is pending. Thus, this routine can only be called through
+ * instructions like "bl" which set the link register.
+ *
+ * Entered with r3 = VCPU
*/
kvmppc_check_wake_reason:
mfspr r6, SPRN_SRR1
@@ -2435,10 +2519,10 @@ FTR_SECTION_ELSE
rlwinm r6, r6, 45-31, 0xe /* P7 wake reason field is 3 bits */
ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_207S)
cmpwi r6, 8 /* was it an external interrupt? */
- li r12, BOOK3S_INTERRUPT_EXTERNAL
+ li r31, BOOK3S_INTERRUPT_EXTERNAL
beq kvmppc_read_intr /* if so, see what it was */
li r3, 0
- li r12, 0
+ li r31, 0
cmpwi r6, 6 /* was it the decrementer? */
beq 0f
BEGIN_FTR_SECTION
@@ -2451,7 +2535,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
0: blr
/* hypervisor doorbell */
-3: li r12, BOOK3S_INTERRUPT_H_DOORBELL
+3: li r31, BOOK3S_INTERRUPT_H_DOORBELL
/*
* Clear the doorbell as we will invoke the handler
@@ -2469,84 +2553,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
blr
/*
- * Determine what sort of external interrupt is pending (if any).
- * Returns:
- * 0 if no interrupt is pending
- * 1 if an interrupt is pending that needs to be handled by the host
- * -1 if there was a guest wakeup IPI (which has now been cleared)
- * Modifies r0, r6, r7, r8, returns value in r3.
- */
-kvmppc_read_intr:
- /* see if a host IPI is pending */
- li r3, 1
- lbz r0, HSTATE_HOST_IPI(r13)
- cmpwi r0, 0
- bne 1f
-
- /* Now read the interrupt from the ICP */
- ld r6, HSTATE_XICS_PHYS(r13)
- li r7, XICS_XIRR
- cmpdi r6, 0
- beq- 1f
- lwzcix r0, r6, r7
- /*
- * Save XIRR for later. Since we get in in reverse endian on LE
- * systems, save it byte reversed and fetch it back in host endian.
- */
- li r3, HSTATE_SAVED_XIRR
- STWX_BE r0, r3, r13
-#ifdef __LITTLE_ENDIAN__
- lwz r3, HSTATE_SAVED_XIRR(r13)
-#else
- mr r3, r0
-#endif
- rlwinm. r3, r3, 0, 0xffffff
- sync
- beq 1f /* if nothing pending in the ICP */
-
- /* We found something in the ICP...
- *
- * If it's not an IPI, stash it in the PACA and return to
- * the host, we don't (yet) handle directing real external
- * interrupts directly to the guest
- */
- cmpwi r3, XICS_IPI /* if there is, is it an IPI? */
- bne 42f
-
- /* It's an IPI, clear the MFRR and EOI it */
- li r3, 0xff
- li r8, XICS_MFRR
- stbcix r3, r6, r8 /* clear the IPI */
- stwcix r0, r6, r7 /* EOI it */
- sync
-
- /* We need to re-check host IPI now in case it got set in the
- * meantime. If it's clear, we bounce the interrupt to the
- * guest
- */
- lbz r0, HSTATE_HOST_IPI(r13)
- cmpwi r0, 0
- bne- 43f
-
- /* OK, it's an IPI for us */
- li r12, 0
- li r3, -1
-1: blr
-
-42: /* It's not an IPI and it's for the host. We saved a copy of XIRR in
- * the PACA earlier, it will be picked up by the host ICP driver
- */
- li r3, 1
- b 1b
-
-43: /* We raced with the host, we need to resend that IPI, bummer */
- li r0, IPI_PRIORITY
- stbcix r0, r6, r8 /* set the IPI */
- sync
- li r3, 1
- b 1b
-
-/*
* Save away FP, VMX and VSX registers.
* r3 = vcpu pointer
* N.B. r30 and r31 are volatile across this function,
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 03/14] KVM: PPC: select IRQ_BYPASS_MANAGER
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
2016-02-26 18:40 ` [PATCH 01/14] powerpc: Add simple cache inhibited MMIO accessors Suresh Warrier
2016-02-26 18:40 ` [PATCH 02/14] KVM: PPC: Book3S HV: Convert kvmppc_read_intr to a C function Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 04/14] KVM: PPC: Book3S HV: Introduce kvmppc_passthru_irqmap Suresh Warrier
` (11 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Select IRQ_BYPASS_MANAGER for PPC when CONFIG_KVM is set.
Add the PPC producer functions for add and del producer.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_ppc.h | 4 ++++
arch/powerpc/kvm/Kconfig | 2 ++
arch/powerpc/kvm/book3s.c | 32 ++++++++++++++++++++++++++++++++
3 files changed, 38 insertions(+)
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 197a8ac..780a017 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -287,6 +287,10 @@ struct kvmppc_ops {
long (*arch_vm_ioctl)(struct file *filp, unsigned int ioctl,
unsigned long arg);
int (*hcall_implemented)(unsigned long hcall);
+ int (*irq_bypass_add_producer)(struct irq_bypass_consumer *,
+ struct irq_bypass_producer *);
+ void (*irq_bypass_del_producer)(struct irq_bypass_consumer *,
+ struct irq_bypass_producer *);
};
extern struct kvmppc_ops *kvmppc_hv_ops;
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index c2024ac..7ac0569 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -22,6 +22,8 @@ config KVM
select ANON_INODES
select HAVE_KVM_EVENTFD
select SRCU
+ select IRQ_BYPASS_MANAGER
+ select HAVE_KVM_IRQ_BYPASS
config KVM_BOOK3S_HANDLER
bool
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index b34220d..2492b7e 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -35,6 +35,8 @@
#include <linux/sched.h>
#include <linux/vmalloc.h>
#include <linux/highmem.h>
+#include <linux/irqbypass.h>
+#include <linux/kvm_irqfd.h>
#include "book3s.h"
#include "trace.h"
@@ -921,6 +923,36 @@ int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
return kvm->arch.kvm_ops->hcall_implemented(hcall);
}
+/*
+ * irq_bypass_add_producer and irq_bypass_del_producer are only
+ * useful if the architecture supports PCI passthrough.
+ * irq_bypass_stop and irq_bypass_start are not needed and so
+ * kvm_ops are not defined for them.
+ */
+int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
+ struct irq_bypass_producer *prod)
+{
+ struct kvm_kernel_irqfd *irqfd =
+ container_of(cons, struct kvm_kernel_irqfd, consumer);
+ struct kvm *kvm = irqfd->kvm;
+
+ if (kvm->arch.kvm_ops->irq_bypass_add_producer)
+ return kvm->arch.kvm_ops->irq_bypass_add_producer(cons, prod);
+
+ return 0;
+}
+
+void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
+ struct irq_bypass_producer *prod)
+{
+ struct kvm_kernel_irqfd *irqfd =
+ container_of(cons, struct kvm_kernel_irqfd, consumer);
+ struct kvm *kvm = irqfd->kvm;
+
+ if (kvm->arch.kvm_ops->irq_bypass_del_producer)
+ kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod);
+}
+
static int kvmppc_book3s_init(void)
{
int r;
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 04/14] KVM: PPC: Book3S HV: Introduce kvmppc_passthru_irqmap
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (2 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 03/14] KVM: PPC: select IRQ_BYPASS_MANAGER Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 05/14] KVM: PPC: Book3S HV: Enable IRQ bypass Suresh Warrier
` (10 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
This patch introduces an IRQ mapping structure, the
kvmppc_passthru_irqmap structure that is to be used
to map the real hardware IRQ in the host with the virtual
hardware IRQ (gsi) that is injected into a guest by KVM for
passthrough adapters.
Currently, we assume a separate IRQ mapping structure for
each guest. Each kvmppc_passthru_irqmap has two mapping arrays,
the mapped array contains all defined real<->virtual IRQs, the
cached array can be used to limit the real<->virtual IRQs to
a smaller subset, like a cache of the most frequently used
mappings.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_host.h | 21 +++++++++++++++++++++
arch/powerpc/include/asm/kvm_ppc.h | 15 +++++++++++++++
arch/powerpc/kvm/book3s_hv.c | 19 +++++++++++++++++++
3 files changed, 55 insertions(+)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index ffdbc2d..fc10248 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -191,6 +191,8 @@ struct kvmppc_spapr_tce_table {
struct kvmppc_xics;
struct kvmppc_icp;
+struct kvmppc_passthru_irqmap;
+
/*
* The reverse mapping array has one entry for each HPTE,
* which stores the guest's view of the second word of the HPTE
@@ -261,6 +263,7 @@ struct kvm_arch {
#endif
#ifdef CONFIG_KVM_XICS
struct kvmppc_xics *xics;
+ struct kvmppc_passthru_irqmap *pimap;
#endif
struct kvmppc_ops *kvm_ops;
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
@@ -391,6 +394,24 @@ struct kvmhv_tb_accumulator {
u64 tb_max; /* max time */
};
+#ifdef CONFIG_PPC_BOOK3S_64
+struct kvmppc_irq_map {
+ u32 r_hwirq;
+ u32 v_hwirq;
+ struct irq_desc *desc;
+};
+
+#define KVMPPC_PIRQ_CACHED 16
+#define KVMPPC_PIRQ_MAPPED 1024
+struct kvmppc_passthru_irqmap {
+ int n_cached;
+ int n_mapped;
+ struct irq_chip *irq_chip;
+ struct kvmppc_irq_map cached[KVMPPC_PIRQ_CACHED];
+ struct kvmppc_irq_map mapped[KVMPPC_PIRQ_MAPPED];
+};
+#endif
+
# ifdef CONFIG_PPC_FSL_BOOK3E
#define KVMPPC_BOOKE_IAC_NUM 2
#define KVMPPC_BOOKE_DAC_NUM 2
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 780a017..75d4c64 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -457,8 +457,19 @@ static inline int kvmppc_xics_enabled(struct kvm_vcpu *vcpu)
{
return vcpu->arch.irq_type == KVMPPC_IRQ_XICS;
}
+
+static inline struct kvmppc_passthru_irqmap *kvmppc_get_passthru_irqmap(
+ struct kvm_vcpu *vcpu)
+{
+ if (vcpu)
+ return vcpu->kvm->arch.pimap;
+ else
+ return NULL;
+}
+
extern void kvmppc_alloc_host_rm_ops(void);
extern void kvmppc_free_host_rm_ops(void);
+extern void kvmppc_free_pimap(struct kvm *kvm);
extern void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu);
extern int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server);
extern int kvm_vm_ioctl_xics_irq(struct kvm *kvm, struct kvm_irq_level *args);
@@ -470,8 +481,12 @@ extern int kvmppc_xics_connect_vcpu(struct kvm_device *dev,
extern void kvmppc_xics_ipi_action(void);
extern int h_ipi_redirect;
#else
+static inline struct kvmppc_passthru_irqmap *kvmppc_get_passthru_irqmap(
+ struct kvm_vcpu *vcpu)
+ { return NULL; }
static inline void kvmppc_alloc_host_rm_ops(void) {};
static inline void kvmppc_free_host_rm_ops(void) {};
+static inline void kvmppc_free_pimap(struct kvm *kvm) {};
static inline int kvmppc_xics_enabled(struct kvm_vcpu *vcpu)
{ return 0; }
static inline void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu) { }
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index f47fffe..22d3054 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -3275,6 +3275,25 @@ static int kvmppc_core_check_processor_compat_hv(void)
return 0;
}
+#ifdef CONFIG_KVM_XICS
+
+void kvmppc_free_pimap(struct kvm *kvm)
+{
+ kfree(kvm->arch.pimap);
+}
+
+struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(struct irq_desc *desc)
+{
+ struct kvmppc_passthru_irqmap *pimap;
+
+ pimap = kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL);
+ if (pimap != NULL)
+ pimap->irq_chip = irq_data_get_irq_chip(&desc->irq_data);
+
+ return pimap;
+}
+#endif
+
static long kvm_arch_vm_ioctl_hv(struct file *filp,
unsigned int ioctl, unsigned long arg)
{
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 05/14] KVM: PPC: Book3S HV: Enable IRQ bypass
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (3 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 04/14] KVM: PPC: Book3S HV: Introduce kvmppc_passthru_irqmap Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 06/14] KVM: PPC: Book3S HV: Caching for passthrough IRQ map Suresh Warrier
` (9 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Add the irq_bypass_add_producer and irq_bypass_del_producer
functions. These functions get called whenever a GSI is being
defined for a guest. They create/remove the mapping between
host real IRQ numbers and the guest GSI.
Add the following helper functions to manage the
passthrough IRQ map.
kvmppc_set_passthru_irq()
Creates a mapping in the passthrough IRQ map that maps a host
IRQ to a guest GSI. It allocates the structure (one per guest VM)
the first time it is called.
kvmppc_clr_passthru_irq()
Removes the passthrough IRQ map entry given a guest GSI.
The passthrough IRQ map structure is not freed even when the
number of mapped entries goes to zero. It is only freed when
the VM is destroyed.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/kvm/book3s_hv.c | 158 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 157 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 22d3054..4d802b8 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -55,6 +55,8 @@
#include <linux/vmalloc.h>
#include <linux/highmem.h>
#include <linux/hugetlb.h>
+#include <linux/kvm_irqfd.h>
+#include <linux/irqbypass.h>
#include <linux/module.h>
#include "book3s.h"
@@ -3246,6 +3248,8 @@ static void kvmppc_core_destroy_vm_hv(struct kvm *kvm)
kvmppc_free_vcores(kvm);
kvmppc_free_hpt(kvm);
+
+ kvmppc_free_pimap(kvm);
}
/* We don't need to emulate any privileged instructions or dcbz */
@@ -3282,7 +3286,7 @@ void kvmppc_free_pimap(struct kvm *kvm)
kfree(kvm->arch.pimap);
}
-struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(struct irq_desc *desc)
+static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(struct irq_desc *desc)
{
struct kvmppc_passthru_irqmap *pimap;
@@ -3292,6 +3296,154 @@ struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(struct irq_desc *desc)
return pimap;
}
+
+static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
+{
+ struct irq_desc *desc;
+ struct kvmppc_irq_map *irq_map;
+ struct kvmppc_passthru_irqmap *pimap;
+ struct irq_chip *chip;
+ int i;
+
+ desc = irq_to_desc(host_irq);
+ if (!desc)
+ return -EIO;
+
+ mutex_lock(&kvm->lock);
+
+ if (kvm->arch.pimap == NULL) {
+ /* First call, allocate structure to hold IRQ map */
+ pimap = kvmppc_alloc_pimap(desc);
+ if (pimap == NULL) {
+ mutex_unlock(&kvm->lock);
+ return -ENOMEM;
+ }
+ } else
+ pimap = kvm->arch.pimap;
+
+ /*
+ * For now, we support only a single IRQ chip
+ */
+ chip = irq_data_get_irq_chip(&desc->irq_data);
+ if (!chip || (strcmp(chip->name, pimap->irq_chip->name) != 0)) {
+ pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n",
+ host_irq, guest_gsi);
+ mutex_unlock(&kvm->lock);
+ return -ENOENT;
+ }
+
+ if (pimap->n_mapped == KVMPPC_PIRQ_MAPPED) {
+ mutex_unlock(&kvm->lock);
+ return -EAGAIN;
+ }
+
+ for (i = 0; i < pimap->n_mapped; i++) {
+ if (guest_gsi == pimap->mapped[i].v_hwirq) {
+ mutex_unlock(&kvm->lock);
+ return -EINVAL;
+ }
+ }
+
+ irq_map = &pimap->mapped[pimap->n_mapped];
+
+ irq_map->v_hwirq = guest_gsi;
+ irq_map->r_hwirq = desc->irq_data.hwirq;
+ irq_map->desc = desc;
+
+ pimap->n_mapped++;
+
+ if (!kvm->arch.pimap)
+ kvm->arch.pimap = pimap;
+
+ mutex_unlock(&kvm->lock);
+
+ return 0;
+}
+
+static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
+{
+ struct irq_desc *desc;
+ struct kvmppc_passthru_irqmap *pimap;
+ int i;
+
+ desc = irq_to_desc(host_irq);
+ if (!desc)
+ return -EIO;
+
+ mutex_lock(&kvm->lock);
+
+ if (kvm->arch.pimap == NULL) {
+ mutex_unlock(&kvm->lock);
+ return 0;
+ }
+ pimap = kvm->arch.pimap;
+
+ WARN_ON(pimap->n_mapped < 1);
+
+ for (i = 0; i < pimap->n_mapped; i++) {
+ if (guest_gsi == pimap->mapped[i].v_hwirq)
+ break;
+ }
+
+ if (i == pimap->n_mapped) {
+ mutex_unlock(&kvm->lock);
+ return -ENODEV;
+ }
+
+ /*
+ * Replace mapped entry to be cleared with highest entry (unless
+ * this is already the highest) so as to not leave any holes in
+ * the array of mapped.
+ */
+ pimap->n_mapped--;
+ if (i != pimap->n_mapped)
+ pimap->mapped[i] = pimap->mapped[pimap->n_mapped];
+
+ /*
+ * We don't free this structure even when the count goes to
+ * zero. The structure is freed when we destroy the VM.
+ */
+
+ mutex_unlock(&kvm->lock);
+ return 0;
+}
+
+static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons,
+ struct irq_bypass_producer *prod)
+{
+ int ret = 0;
+ struct kvm_kernel_irqfd *irqfd =
+ container_of(cons, struct kvm_kernel_irqfd, consumer);
+
+ irqfd->producer = prod;
+
+ ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
+ if (ret)
+ pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n",
+ prod->irq, irqfd->gsi, ret);
+
+ return ret;
+}
+
+static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons,
+ struct irq_bypass_producer *prod)
+{
+ int ret;
+ struct kvm_kernel_irqfd *irqfd =
+ container_of(cons, struct kvm_kernel_irqfd, consumer);
+
+ irqfd->producer = NULL;
+
+ /*
+ * When producer of consumer is unregistered, we change back to
+ * default external interrupt handling mode - KVM real mode
+ * will switch back to host.
+ */
+ ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
+ if (ret)
+ pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n",
+ prod->irq, irqfd->gsi, ret);
+}
#endif
static long kvm_arch_vm_ioctl_hv(struct file *filp,
@@ -3412,6 +3564,10 @@ static struct kvmppc_ops kvm_ops_hv = {
.fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,
.arch_vm_ioctl = kvm_arch_vm_ioctl_hv,
.hcall_implemented = kvmppc_hcall_impl_hv,
+#ifdef CONFIG_KVM_XICS
+ .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,
+ .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,
+#endif
};
static int kvmppc_book3s_init_hv(void)
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 06/14] KVM: PPC: Book3S HV: Caching for passthrough IRQ map
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (4 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 05/14] KVM: PPC: Book3S HV: Enable IRQ bypass Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 07/14] KVM: PPC: Book3S HV: Handle passthrough interrupts in guest Suresh Warrier
` (8 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Add the following functions to support caching of the
IRQ mapped entries:
kvmppc_cache_passthru_irq()
Caches an existing mapping in the cached array.
_uncache_passthru_irq()
Uncaches a cached entry. This is an internal function and
is only invoked when unmapping a passthrough IRQ mapping.
There is no support to just uncache an entry.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_ppc.h | 1 +
arch/powerpc/kvm/book3s_hv.c | 97 ++++++++++++++++++++++++++++++++++++++
2 files changed, 98 insertions(+)
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 75d4c64..4107f7f 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -291,6 +291,7 @@ struct kvmppc_ops {
struct irq_bypass_producer *);
void (*irq_bypass_del_producer)(struct irq_bypass_consumer *,
struct irq_bypass_producer *);
+ int (*cache_passthru_irq)(struct kvm *kvm, int irq);
};
extern struct kvmppc_ops *kvmppc_hv_ops;
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 4d802b8..97150f0 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -3297,6 +3297,95 @@ static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(struct irq_desc *desc)
return pimap;
}
+/*
+ * Cache a passthrough IRQ
+ * This is accomplished by copying the IRQ details from the
+ * mapped array to the cached array.
+ *
+ * Return:
+ * 0: if this was accomplished successfully
+ * 1: if the caching could not be done
+ */
+static int kvmppc_cache_passthru_irq_hv(struct kvm *kvm, int irq)
+{
+ struct kvmppc_passthru_irqmap *pimap;
+ int cidx, midx;
+
+ mutex_lock(&kvm->lock);
+
+ if (kvm->arch.pimap == NULL)
+ goto err_out;
+
+ pimap = kvm->arch.pimap;
+
+ /* Look for first empty slot */
+ for (cidx = 0; cidx < KVMPPC_PIRQ_CACHED; cidx++)
+ if (pimap->cached[cidx].r_hwirq == 0)
+ break;
+
+ /* Out of empty cache slots */
+ if (cidx == KVMPPC_PIRQ_CACHED)
+ goto err_out;
+
+ /* Find entry in the mapped array */
+ for (midx = 0; midx < pimap->n_mapped; midx++) {
+ if (irq == pimap->mapped[midx].v_hwirq)
+ break;
+ }
+
+ /* IRQ not found */
+ if (midx == pimap->n_mapped)
+ goto err_out;
+
+ if (pimap->mapped[midx].r_hwirq == 0)
+ /* Someone beat us to caching the IRQ */
+ goto err_out;
+
+ pimap->cached[cidx].v_hwirq = pimap->mapped[midx].v_hwirq;
+ pimap->cached[cidx].desc = pimap->mapped[midx].desc;
+ pimap->cached[cidx].r_hwirq = pimap->mapped[midx].r_hwirq;
+
+ if (cidx >= pimap->n_cached)
+ pimap->n_cached = cidx + 1;
+
+ /* r_hwirq == 0 in mapped array to indicate a cached IRQ */
+ pimap->mapped[midx].r_hwirq = 0;
+
+ mutex_unlock(&kvm->lock);
+ return 0;
+
+err_out:
+ mutex_unlock(&kvm->lock);
+ return 1;
+}
+
+/* Called with kvm->lock already acquired */
+static void _uncache_passthru_irq(struct kvmppc_passthru_irqmap *pimap, int irq)
+{
+ int i;
+
+ for (i = 0; i < pimap->n_cached; i++) {
+ if (irq == pimap->cached[i].v_hwirq) {
+
+ /*
+ * Zero out the IRQ being uncached.
+ */
+ pimap->cached[i].r_hwirq = 0;
+ pimap->cached[i].v_hwirq = 0;
+ pimap->cached[i].desc = NULL;
+
+ /*
+ * Only need to decrement maximum cached count if
+ * this is the highest entry being uncached.
+ */
+ if (i + 1 == pimap->n_cached)
+ pimap->n_cached--;
+ return;
+ }
+ }
+
+}
+
static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
{
struct irq_desc *desc;
@@ -3391,6 +3480,13 @@ static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
}
/*
+ * If this is a cached IRQ, remove it from the cached array also
+ * mapped.r_hwirq is set to zero when we cache an entry.
+ */
+ if (!pimap->mapped[i].r_hwirq)
+ _uncache_passthru_irq(pimap, guest_gsi);
+
+ /*
* Replace mapped entry to be cleared with highest entry (unless
* this is already the highest) so as to not leave any holes in
* the array of mapped.
@@ -3567,6 +3663,7 @@ static struct kvmppc_ops kvm_ops_hv = {
#ifdef CONFIG_KVM_XICS
.irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,
.irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,
+ .cache_passthru_irq = kvmppc_cache_passthru_irq_hv,
#endif
};
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 07/14] KVM: PPC: Book3S HV: Handle passthrough interrupts in guest
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (5 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 06/14] KVM: PPC: Book3S HV: Caching for passthrough IRQ map Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 08/14] KVM: PPC: Book3S HV: Complete passthrough interrupt in host Suresh Warrier
` (7 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Currently, KVM switches back to the host to handle any external
interrupt (when the interrupt is received while running in the
guest). This patch updates real-mode KVM to check if an interrupt
is generated by a passthrough adapter that is owned by this guest.
If so, the real mode KVM will directly inject the corresponding
virtual interrupt to the guest VCPU's ICS and also EOI the interrupt
in hardware. In short, the interrupt is handled entirely in real
mode in the guest context without switching back to the host.
In some rare cases, the interrupt cannot be completely handled in
real mode, for instance, a VCPU that is sleeping needs to be woken
up. In this case, KVM simply switches back to the host with trap
reason set to 0x500. This works, but it is clearly not very efficient.
A following patch will distinguish this case and handle it
correctly in the host. Note that we can use the existing
check_too_hard() routine even though we are not in a hypercall to
determine if there is unfinished business that needs to be
completed in host virtual mode.
The patch assumes that the mapping between hardware interrupt IRQ
and virtual IRQ to be injected to the guest already exists for the
PCI passthrough interrupts that need to be handled in real mode.
If the mapping does not exist, KVM falls back to the default
existing behavior.
The KVM real mode code only reads mappings from the cached array
in the passthrough IRQ map. The caching code fails if there are
no more cache slots available and the uncaching code is only
called a mapping is removed. We also carefully orders the loads
and stores of the fields in the kvmppc_irq_map data structure
using memory barriers to avoid an inconsistent mapping being seen
by the reader. Thus, although it is possible to miss a cache entry,
it is not possible to read a stale value.
One additional complication involves HOT plugging of SRIOV
functions. If a SRIOV function gets removed and then re-added through
HOT plug to the same guest, it is possible for the HW IRQ to
be assigned a new value for the guest GSI. To ensure that the KVM
real mode handlers do not read a stale value for this case, we
call kick_all_cpus_sync() after unmapping which does not return
until every vcpu executing in the guest has come back to the host
at least once.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_ppc.h | 3 ++
arch/powerpc/include/asm/pnv-pci.h | 1 +
arch/powerpc/kvm/book3s_hv.c | 21 ++++++++++
arch/powerpc/kvm/book3s_hv_builtin.c | 64 +++++++++++++++++++++++++++++++
arch/powerpc/kvm/book3s_hv_rm_xics.c | 44 +++++++++++++++++++++
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 16 ++++++++
arch/powerpc/platforms/powernv/pci-ioda.c | 14 +++++--
7 files changed, 160 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 4107f7f..c5c7386 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -226,6 +226,9 @@ extern int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server,
u32 *priority);
extern int kvmppc_xics_int_on(struct kvm *kvm, u32 irq);
extern int kvmppc_xics_int_off(struct kvm *kvm, u32 irq);
+extern long kvmppc_deliver_irq_passthru(struct kvm_vcpu *vcpu, u32 xirr,
+ struct kvmppc_irq_map *irq_map,
+ struct kvmppc_passthru_irqmap *pimap);
void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu);
void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu);
diff --git a/arch/powerpc/include/asm/pnv-pci.h b/arch/powerpc/include/asm/pnv-pci.h
index 6f77f71..f0564ee 100644
--- a/arch/powerpc/include/asm/pnv-pci.h
+++ b/arch/powerpc/include/asm/pnv-pci.h
@@ -20,6 +20,7 @@ int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num);
void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);
int pnv_cxl_get_irq_count(struct pci_dev *dev);
struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev);
+int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq);
#ifdef CONFIG_CXL_BASE
int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs,
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 97150f0..8504a5d 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -3343,6 +3343,12 @@ static int kvmppc_cache_passthru_irq_hv(struct kvm *kvm, int irq)
pimap->cached[cidx].v_hwirq = pimap->mapped[midx].v_hwirq;
pimap->cached[cidx].desc = pimap->mapped[midx].desc;
+
+ /*
+ * Order the above two stores before the next to serialize with
+ * the KVM real mode handler.
+ */
+ smp_wmb();
pimap->cached[cidx].r_hwirq = pimap->mapped[midx].r_hwirq;
if (cidx >= pimap->n_cached)
@@ -3369,6 +3375,10 @@ static void _uncache_passthru_irq(struct kvmppc_passthru_irqmap *pimap, int irq)
/*
* Zero out the IRQ being uncached.
+ * No barriers needed since the IRQ must
+ * be disabled/unmasked before it is uncached,
+ * so real mode code cannot possibly be
+ * searching for this IRQ in the map.
*/
pimap->cached[i].r_hwirq = 0;
pimap->cached[i].v_hwirq = 0;
@@ -3380,6 +3390,17 @@ static void _uncache_passthru_irq(struct kvmppc_passthru_irqmap *pimap, int irq)
*/
if (i + 1 == pimap->n_cached)
pimap->n_cached--;
+ /*
+ * Ensure that all readers have exited any
+ * critical sections in real mode KVM and
+ * come back to the host at least once. This
+ * guarantees that they cannot see any stale
+ * values for the HW IRQ being uncached. This
+ * is required to handle Hot plug re-adding
+ * this function/device and passing through
+ * the HW IRQ with a different guest GSI.
+ */
+ kick_all_cpus_sync();
return;
}
}
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
index 5db386a..403fb50 100644
--- a/arch/powerpc/kvm/book3s_hv_builtin.c
+++ b/arch/powerpc/kvm/book3s_hv_builtin.c
@@ -288,12 +288,52 @@ void kvmhv_commence_exit(int trap)
struct kvmppc_host_rm_ops *kvmppc_host_rm_ops_hv;
EXPORT_SYMBOL_GPL(kvmppc_host_rm_ops_hv);
+static struct kvmppc_irq_map *get_irqmap(struct kvmppc_passthru_irqmap *pimap,
+ u32 xisr)
+{
+ int i;
+
+ /*
+ * We can access the cached array unsafely because if there
+ * is a pending IRQ, its mapping cannot be removed
+ * and replaced with a new mapping (that corresponds to a
+ * different device) while we are accessing it. After
+ * uncaching, we do a kick_all_cpus_sync which guarantees
+ * that we don't see a stale value in here.
+ *
+ * Since we don't take a lock, we might skip over or read
+ * more than the available entries in here (if a different
+ * entry here is * being deleted), and we might thus miss
+ * our hwirq, but we can never get a bad mapping. Missing
+ * an entry is not fatal, in this case, we simply fall back
+ * on the default interrupt handling mechanism - that is,
+ * this interrupt goes through VFIO. Currently, we only
+ * search in the cache for a mapping.
+ *
+ * We have also carefully ordered the stores in the writer
+ * and the loads here in the reader, so that if we find a matching
+ * hwirq here, the associated GSI and irq_desc fields are valid.
+ */
+ for (i = 0; i < pimap->n_cached; i++) {
+ if (xisr == pimap->cached[i].r_hwirq) {
+ /*
+ * Order subsequent reads in the caller to serialize
+ * with the writer.
+ */
+ smp_rmb();
+ return &pimap->cached[i];
+ }
+ }
+ return NULL;
+}
+
/*
* Determine what sort of external interrupt is pending (if any).
* Returns:
* 0 if no interrupt is pending
* 1 if an interrupt is pending that needs to be handled by the host
* -1 if there was a guest wakeup IPI (which has now been cleared)
+ * -2 if there is PCI passthrough external interrupt that was handled
*/
long kvmppc_read_intr(struct kvm_vcpu *vcpu, int path)
@@ -302,6 +342,9 @@ long kvmppc_read_intr(struct kvm_vcpu *vcpu, int path)
u32 h_xirr;
__be32 xirr;
u32 xisr;
+ struct kvmppc_passthru_irqmap *pimap;
+ struct kvmppc_irq_map *irq_map;
+ int r;
u8 host_ipi;
/* see if a host IPI is pending */
@@ -368,5 +411,26 @@ long kvmppc_read_intr(struct kvm_vcpu *vcpu, int path)
return -1;
}
+ /*
+ * If it's not an IPI, check if we have a passthrough adapter and
+ * if so, check if this external interrupt is for the adapter.
+ * We will attempt to deliver the IRQ directly to the target VCPU's
+ * ICP, the virtual ICP (based on affinity - the xive value in ICS).
+ *
+ * If the delivery fails or if this is not for a passthrough adapter,
+ * return to the host to handle this interrupt. We earlier
+ * saved a copy of the XIRR in the PACA, it will be picked up by
+ * the host ICP driver
+ */
+ pimap = kvmppc_get_passthru_irqmap(vcpu);
+ if (pimap) {
+ irq_map = get_irqmap(pimap, xisr);
+ if (irq_map) {
+ r = kvmppc_deliver_irq_passthru(vcpu, xirr,
+ irq_map, pimap);
+ return r;
+ }
+ }
+
return 1;
}
diff --git a/arch/powerpc/kvm/book3s_hv_rm_xics.c b/arch/powerpc/kvm/book3s_hv_rm_xics.c
index 980d8a6..1089bfa 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_xics.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_xics.c
@@ -19,6 +19,7 @@
#include <asm/synch.h>
#include <asm/cputhreads.h>
#include <asm/ppc-opcode.h>
+#include <asm/pnv-pci.h>
#include "book3s_xics.h"
@@ -712,6 +713,49 @@ int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
return check_too_hard(xics, icp);
}
+unsigned long eoi_rc;
+
+static void icp_eoi(struct irq_chip *c, u32 hwirq, u32 xirr)
+{
+ unsigned long xics_phys;
+ int64_t rc;
+
+ rc = pnv_opal_pci_msi_eoi(c, hwirq);
+
+ if (rc)
+ eoi_rc = rc;
+
+ iosync();
+
+ /* EOI it */
+ xics_phys = local_paca->kvm_hstate.xics_phys;
+ _stwcix(xics_phys + XICS_XIRR, xirr);
+}
+
+long kvmppc_deliver_irq_passthru(struct kvm_vcpu *vcpu,
+ u32 xirr,
+ struct kvmppc_irq_map *irq_map,
+ struct kvmppc_passthru_irqmap *pimap)
+{
+ struct kvmppc_xics *xics;
+ struct kvmppc_icp *icp;
+ u32 irq;
+
+ irq = irq_map->v_hwirq;
+ xics = vcpu->kvm->arch.xics;
+ icp = vcpu->arch.icp;
+
+ icp_rm_deliver_irq(xics, icp, irq);
+
+ /* EOI the interrupt */
+ icp_eoi(pimap->irq_chip, irq_map->r_hwirq, xirr);
+
+ if (check_too_hard(xics, icp) == H_TOO_HARD)
+ return 1;
+ else
+ return -2;
+}
+
/* --- Non-real mode XICS-related built-in routines --- */
/**
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 29e6a8a..5e12cb4e 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1287,6 +1287,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
* -1 A guest wakeup IPI (which has now been cleared)
* In either case, we return to guest to deliver any pending
* guest interrupts.
+ *
+ * -2 A PCI passthrough external interrupt was handled
+ * (interrupt was delivered directly to guest)
+ * Return to guest to deliver any pending guest interrupts.
+ * However, we also need to restore SRR0 and SRR1 since we have
+ * made an OPAL call to EOI the interrupt which scratches them.
*/
cmpdi r3, 0
@@ -1300,10 +1306,18 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
bge guest_exit_cont
/* Return code <= 0, return to guest */
+ cmpdi r3, -2
ld r6, VCPU_CTR(r4)
ld r7, VCPU_XER(r4)
mtctr r6
mtxer r7
+ bne deliver_guest_interrupt
+
+ /* Return code = -2 */
+ ld r6, VCPU_SRR0(r4)
+ ld r7, VCPU_SRR1(r4)
+ mtsrr0 r6
+ mtsrr1 r7
b deliver_guest_interrupt
guest_exit_cont: /* r9 = vcpu, r12 = trap, r13 = paca */
@@ -2500,6 +2514,8 @@ machine_check_realmode:
* 0 if nothing needs to be done
* 1 if something happened that needs to be handled by the host
* -1 if there was a guest wakeup (IPI or msgsnd)
+ * -2 if we handled a PCI passthrough interrupt (returned by
+ * kvmppc_read_intr only)
*
* Also sets r31 to the interrupt vector for any interrupt that needs
* to be handled now by the host (0x500 for external interrupt), or zero.
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index f90dc04..2fd8b01 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -2565,15 +2565,23 @@ static void pnv_ioda_setup_dma(struct pnv_phb *phb)
}
#ifdef CONFIG_PCI_MSI
-static void pnv_ioda2_msi_eoi(struct irq_data *d)
+int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq)
{
- unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
- struct irq_chip *chip = irq_data_get_irq_chip(d);
struct pnv_phb *phb = container_of(chip, struct pnv_phb,
ioda.irq_chip);
int64_t rc;
rc = opal_pci_msi_eoi(phb->opal_id, hw_irq);
+ return rc;
+}
+
+static void pnv_ioda2_msi_eoi(struct irq_data *d)
+{
+ int64_t rc;
+ unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+ struct irq_chip *chip = irq_data_get_irq_chip(d);
+
+ rc = pnv_opal_pci_msi_eoi(chip, hw_irq);
WARN_ON_ONCE(rc);
icp_native_eoi(d);
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 08/14] KVM: PPC: Book3S HV: Complete passthrough interrupt in host
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (6 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 07/14] KVM: PPC: Book3S HV: Handle passthrough interrupts in guest Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 09/14] KVM: PPC: Book3S HV: Enable KVM real mode handling of passthrough IRQs Suresh Warrier
` (6 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
In existing real mode ICP code, when updating the virtual ICP
state, if there is a required action that cannot be completely
handled in real mode, as for instance, a VCPU needs to be woken
up, flags are set in the ICP to indicate the required action.
This is checked when returning from hypercalls to decide whether
the call needs switch back to the host where the action can be
performed in virtual mode. Note that if h_ipi_redirect is enabled,
real mode code will first try to message a free host CPU to
complete this job instead of returning the host to do it ourselves.
Currently, the real mode PCI passthrough interrupt handling code
checks if any of these flags are set and simply returns to the host.
This is not good enough as the trap value (0x500) is treated as an
external interrupt by the host code. It is only when the trap value
is a hypercall that the host code searches for and acts on unfinished
work by calling kvmppc_xics_rm_complete.
This patch introduces a special trap BOOK3S_INTERRUPT_HV_RM_HARD
which is returned by KVM if there is unfinished business to be
completed in host virtual mode after handling a PCI passthrough
interrupt. The host checks for this special interrupt condition
and calls into the kvmppc_xics_rm_complete, which is made an
exported function for this reason.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_asm.h | 10 ++++++++++
arch/powerpc/include/asm/kvm_ppc.h | 3 +++
arch/powerpc/kvm/book3s_hv.c | 8 +++++++-
arch/powerpc/kvm/book3s_hv_builtin.c | 1 +
arch/powerpc/kvm/book3s_hv_rm_xics.c | 2 +-
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 26 ++++++++++++++++++++++++++
arch/powerpc/kvm/book3s_xics.c | 3 ++-
7 files changed, 50 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index 5bca220..05cabed 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -105,6 +105,15 @@
#define BOOK3S_INTERRUPT_FAC_UNAVAIL 0xf60
#define BOOK3S_INTERRUPT_H_FAC_UNAVAIL 0xf80
+/* book3s_hv */
+
+/*
+ * Special trap used to indicate to host that this is a
+ * passthrough interrupt that could not be handled
+ * completely in the guest.
+ */
+#define BOOK3S_INTERRUPT_HV_RM_HARD 0x5555
+
#define BOOK3S_IRQPRIO_SYSTEM_RESET 0
#define BOOK3S_IRQPRIO_DATA_SEGMENT 1
#define BOOK3S_IRQPRIO_INST_SEGMENT 2
@@ -136,6 +145,7 @@
#define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */
#define RESUME_FLAG_HOST (1<<1) /* Resume host? */
#define RESUME_FLAG_ARCH1 (1<<2)
+#define RESUME_FLAG_ARCH2 (1<<3)
#define RESUME_GUEST 0
#define RESUME_GUEST_NV RESUME_FLAG_NV
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index c5c7386..b19bb30 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -474,6 +474,7 @@ static inline struct kvmppc_passthru_irqmap *kvmppc_get_passthru_irqmap(
extern void kvmppc_alloc_host_rm_ops(void);
extern void kvmppc_free_host_rm_ops(void);
extern void kvmppc_free_pimap(struct kvm *kvm);
+extern int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall);
extern void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu);
extern int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server);
extern int kvm_vm_ioctl_xics_irq(struct kvm *kvm, struct kvm_irq_level *args);
@@ -491,6 +492,8 @@ static inline struct kvmppc_passthru_irqmap *kvmppc_get_passthru_irqmap(
static inline void kvmppc_alloc_host_rm_ops(void) {};
static inline void kvmppc_free_host_rm_ops(void) {};
static inline void kvmppc_free_pimap(struct kvm *kvm) {};
+static inline int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
+ { return 0; }
static inline int kvmppc_xics_enabled(struct kvm_vcpu *vcpu)
{ return 0; }
static inline void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu) { }
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 8504a5d..cc5aea96 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -70,6 +70,8 @@
/* Used to indicate that a guest page fault needs to be handled */
#define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1)
+/* Used to indicate that a guest passthrough interrupt needs to be handled */
+#define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2)
/* Used as a "null" value for timebase values */
#define TB_NIL (~(u64)0)
@@ -991,6 +993,9 @@ static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
r = RESUME_GUEST;
break;
+ case BOOK3S_INTERRUPT_HV_RM_HARD:
+ r = RESUME_PASSTHROUGH;
+ break;
default:
kvmppc_dump_regs(vcpu);
printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
@@ -2819,7 +2824,8 @@ static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
r = kvmppc_book3s_hv_page_fault(run, vcpu,
vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
- }
+ } else if (r == RESUME_PASSTHROUGH)
+ r = kvmppc_xics_rm_complete(vcpu, 0);
} while (is_kvmppc_resume_guest(r));
out:
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
index 403fb50..62252da 100644
--- a/arch/powerpc/kvm/book3s_hv_builtin.c
+++ b/arch/powerpc/kvm/book3s_hv_builtin.c
@@ -332,6 +332,7 @@ static struct kvmppc_irq_map *get_irqmap(struct kvmppc_passthru_irqmap *pimap,
* Returns:
* 0 if no interrupt is pending
* 1 if an interrupt is pending that needs to be handled by the host
+ * 2 Passthrough that needs completion in the host
* -1 if there was a guest wakeup IPI (which has now been cleared)
* -2 if there is PCI passthrough external interrupt that was handled
*/
diff --git a/arch/powerpc/kvm/book3s_hv_rm_xics.c b/arch/powerpc/kvm/book3s_hv_rm_xics.c
index 1089bfa..8390c50 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_xics.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_xics.c
@@ -751,7 +751,7 @@ long kvmppc_deliver_irq_passthru(struct kvm_vcpu *vcpu,
icp_eoi(pimap->irq_chip, irq_map->r_hwirq, xirr);
if (check_too_hard(xics, icp) == H_TOO_HARD)
- return 1;
+ return 2;
else
return -2;
}
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 5e12cb4e..5b62f95 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1274,6 +1274,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
* 1 An interrupt is pending that needs to be handled by the host
* Exit guest and return to host by branching to guest_exit_cont
*
+ * 2 Passthrough that needs completion in the host
+ * Exit guest and return to host by branching to guest_exit_cont
+ * However, we also set r12 to BOOK3S_INTERRUPT_HV_RM_HARD
+ * to indicate to the host to complete handling the interrupt
+ *
* Before returning to guest, we check if any CPU is heading out
* to the host and if so, we head out also. If no CPUs are heading
* check return values <= 0.
@@ -1295,6 +1300,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
* made an OPAL call to EOI the interrupt which scratches them.
*/
+ cmpdi r3, 1
+ ble 1f
+
+ /* Return code = 2 */
+ li r12, BOOK3S_INTERRUPT_HV_RM_HARD
+ stw r12, VCPU_TRAP(r9)
+ b guest_exit_cont
+
+1:
+ /* Return code <= 1 */
cmpdi r3, 0
bgt guest_exit_cont
@@ -2412,6 +2427,17 @@ kvm_end_cede:
* should not modify r3 until this check is done.
*/
ld r4, HSTATE_KVM_VCPU(r13)
+ cmpdi r3, 1
+ ble 1f
+
+ /*
+ * Return code of 2 means PCI passthrough interrupt, but
+ * we need to return back to host to complete handling the
+ * interrupt. Trap reason is expected in r12 by guest
+ * exit code.
+ */
+ li r31, BOOK3S_INTERRUPT_HV_RM_HARD
+1:
mr r12, r31
/* Load NV GPRS */
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index 905e94a..be23f88 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -812,7 +812,7 @@ static noinline int kvmppc_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
return H_SUCCESS;
}
-static noinline int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
+int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
{
struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
struct kvmppc_icp *icp = vcpu->arch.icp;
@@ -841,6 +841,7 @@ static noinline int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
return H_SUCCESS;
}
+EXPORT_SYMBOL_GPL(kvmppc_xics_rm_complete);
int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
{
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 09/14] KVM: PPC: Book3S HV: Enable KVM real mode handling of passthrough IRQs
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (7 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 08/14] KVM: PPC: Book3S HV: Complete passthrough interrupt in host Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 10/14] KVM: PPC: Book3S HV: Dump irqmap in debugfs Suresh Warrier
` (5 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
The KVM real mode passthrough handling code only searches for
"cached" IRQ maps in the passthrough IRQ map when checking for
passthrough IRQs that can be redirected to the guest.
This patch enables KVM real mode handling of passthrough IRQs
by turning on caching of selected passthrough IRQs. Currently,
we follow a simple method and cache any passthrough IRQ when its
virtual IRQ is first injected into the guest.
Since we have a limit of 16 cache entries per guest, this will
limit passthrough IRQs that are handled in KVM real mode to 16.
This should work well for the general case for VMs with small
number of passthrough adapters or SRIOV VFs. In the future, we
can increase the number of cached entries, but we would then need
to come up with faster search/filtering mechanisms for an IRQ in
the map of cached passthrough IRQs.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/include/asm/kvm_ppc.h | 2 ++
arch/powerpc/kvm/book3s.c | 10 +++++++++
arch/powerpc/kvm/book3s_hv.c | 4 ++++
arch/powerpc/kvm/book3s_xics.c | 41 +++++++++++++++++++++++++++++++++++++
arch/powerpc/kvm/book3s_xics.h | 2 ++
6 files changed, 60 insertions(+)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index fc10248..558d195 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -63,6 +63,7 @@ extern int kvm_unmap_hva_range(struct kvm *kvm,
extern int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
+extern int kvmppc_cache_passthru_irq(struct kvm *kvm, int guest_gsi);
static inline void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
unsigned long address)
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index b19bb30..93531cc 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -484,6 +484,8 @@ extern int kvmppc_xics_set_icp(struct kvm_vcpu *vcpu, u64 icpval);
extern int kvmppc_xics_connect_vcpu(struct kvm_device *dev,
struct kvm_vcpu *vcpu, u32 cpu);
extern void kvmppc_xics_ipi_action(void);
+extern void kvmppc_xics_set_mapped(struct kvm *kvm, unsigned long irq);
+extern void kvmppc_xics_clr_mapped(struct kvm *kvm, unsigned long irq);
extern int h_ipi_redirect;
#else
static inline struct kvmppc_passthru_irqmap *kvmppc_get_passthru_irqmap(
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 2492b7e..1b4f5bd 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -953,6 +953,16 @@ void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod);
}
+int kvmppc_cache_passthru_irq(struct kvm *kvm, int irq)
+{
+ int r = 0;
+
+ if (kvm->arch.kvm_ops->cache_passthru_irq)
+ r = kvm->arch.kvm_ops->cache_passthru_irq(kvm, irq);
+
+ return r;
+}
+
static int kvmppc_book3s_init(void)
{
int r;
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index cc5aea96..487657f 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -3468,6 +3468,8 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
pimap->n_mapped++;
+ kvmppc_xics_set_mapped(kvm, guest_gsi);
+
if (!kvm->arch.pimap)
kvm->arch.pimap = pimap;
@@ -3522,6 +3524,8 @@ static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
if (i != pimap->n_mapped)
pimap->mapped[i] = pimap->mapped[pimap->n_mapped];
+ kvmppc_xics_clr_mapped(kvm, guest_gsi);
+
/*
* We don't free this structure even when the count goes to
* zero. The structure is freed when we destroy the VM.
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index be23f88..b90570c 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -88,6 +88,18 @@ static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level)
return -EINVAL;
/*
+ * If this is a mapped passthrough IRQ that is not cached,
+ * add this to the IRQ cached map so that real mode KVM
+ * will redirect this directly to the guest where possible.
+ * Currently, we will cache a passthrough IRQ the first time
+ * we inject it into the guest.
+ */
+ if (state->pmapped && !state->pcached) {
+ if (kvmppc_cache_passthru_irq(xics->kvm, irq) == 0)
+ state->pcached = 1;
+ }
+
+ /*
* We set state->asserted locklessly. This should be fine as
* we are the only setter, thus concurrent access is undefined
* to begin with.
@@ -1410,3 +1422,32 @@ int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
{
return pin;
}
+
+void kvmppc_xics_set_mapped(struct kvm *kvm, unsigned long irq)
+{
+ struct kvmppc_xics *xics = kvm->arch.xics;
+ struct kvmppc_ics *ics;
+ u16 idx;
+
+ ics = kvmppc_xics_find_ics(xics, irq, &idx);
+ if (!ics)
+ return;
+
+ ics->irq_state[idx].pmapped = 1;
+}
+EXPORT_SYMBOL_GPL(kvmppc_xics_set_mapped);
+
+void kvmppc_xics_clr_mapped(struct kvm *kvm, unsigned long irq)
+{
+ struct kvmppc_xics *xics = kvm->arch.xics;
+ struct kvmppc_ics *ics;
+ u16 idx;
+
+ ics = kvmppc_xics_find_ics(xics, irq, &idx);
+ if (!ics)
+ return;
+
+ ics->irq_state[idx].pmapped = 0;
+ ics->irq_state[idx].pcached = 0;
+}
+EXPORT_SYMBOL_GPL(kvmppc_xics_clr_mapped);
diff --git a/arch/powerpc/kvm/book3s_xics.h b/arch/powerpc/kvm/book3s_xics.h
index 56ea44f..de560f1 100644
--- a/arch/powerpc/kvm/book3s_xics.h
+++ b/arch/powerpc/kvm/book3s_xics.h
@@ -41,6 +41,8 @@ struct ics_irq_state {
u8 masked_pending;
u8 asserted; /* Only for LSI */
u8 exists;
+ u8 pmapped;
+ u8 pcached;
};
/* Atomic ICP state, updated with a single compare & swap */
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 10/14] KVM: PPC: Book3S HV: Dump irqmap in debugfs
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (8 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 09/14] KVM: PPC: Book3S HV: Enable KVM real mode handling of passthrough IRQs Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 11/14] KVM: PPC: Book3S HV: Tunable to disable KVM IRQ bypass Suresh Warrier
` (4 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Dump the passthrough irqmap structure associated with a
guest as part of /sys/kernel/debug/powerpc/kvm-xics-*.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/kvm/book3s_xics.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index b90570c..855d669 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -905,6 +905,21 @@ EXPORT_SYMBOL_GPL(kvmppc_xics_hcall);
/* -- Initialisation code etc. -- */
+static void xics_debugfs_irqmap(struct seq_file *m,
+ struct kvmppc_passthru_irqmap *pimap)
+{
+ int i;
+
+ if (!pimap)
+ return;
+ seq_printf(m, "========\nPIRQMAP Cache: %d maps\n===========\n",
+ pimap->n_cached);
+ for (i = 0; i < pimap->n_cached; i++) {
+ seq_printf(m, "r_hwirq=%x, v_hwirq=%x\n",
+ pimap->cached[i].r_hwirq, pimap->cached[i].v_hwirq);
+ }
+}
+
static int xics_debug_show(struct seq_file *m, void *private)
{
struct kvmppc_xics *xics = m->private;
@@ -926,6 +941,8 @@ static int xics_debug_show(struct seq_file *m, void *private)
t_check_resend = 0;
t_reject = 0;
+ xics_debugfs_irqmap(m, kvm->arch.pimap);
+
seq_printf(m, "=========\nICP state\n=========\n");
kvm_for_each_vcpu(i, vcpu, kvm) {
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 11/14] KVM: PPC: Book3S HV: Tunable to disable KVM IRQ bypass
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (9 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 10/14] KVM: PPC: Book3S HV: Dump irqmap in debugfs Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 12/14] KVM: PPC: Book3S HV: Update irq stats for IRQs handled in real mode Suresh Warrier
` (3 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Add a module parameter kvm_irq_bypass for kvm_hv.ko to
disable IRQ bypass for passthrough interrupts. The default
value of this tunable is 1 - that is enable the feature.
Since the tunable is used by built-in kernel code, we use
the module_param_cb macro to achieve this.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_book3s.h | 1 +
arch/powerpc/include/asm/kvm_ppc.h | 2 +-
arch/powerpc/kvm/book3s_hv.c | 13 +++++++++++++
arch/powerpc/kvm/book3s_hv_rm_xics.c | 2 ++
4 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index 8f39796..8e5fac6 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -191,6 +191,7 @@ extern void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
struct kvm_vcpu *vcpu);
extern void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
struct kvmppc_book3s_shadow_vcpu *svcpu);
+extern int kvm_irq_bypass;
static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
{
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 93531cc..a13fd2b 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -465,7 +465,7 @@ static inline int kvmppc_xics_enabled(struct kvm_vcpu *vcpu)
static inline struct kvmppc_passthru_irqmap *kvmppc_get_passthru_irqmap(
struct kvm_vcpu *vcpu)
{
- if (vcpu)
+ if (vcpu && kvm_irq_bypass)
return vcpu->kvm->arch.pimap;
else
return NULL;
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 487657f..2d82c4d 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -91,6 +91,10 @@ static struct kernel_param_ops module_param_ops = {
.get = param_get_int,
};
+module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass,
+ S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization");
+
module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect,
S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core");
@@ -3317,6 +3321,9 @@ static int kvmppc_cache_passthru_irq_hv(struct kvm *kvm, int irq)
struct kvmppc_passthru_irqmap *pimap;
int cidx, midx;
+ if (!kvm_irq_bypass)
+ return 1;
+
mutex_lock(&kvm->lock);
if (kvm->arch.pimap == NULL)
@@ -3421,6 +3428,9 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
struct irq_chip *chip;
int i;
+ if (!kvm_irq_bypass)
+ return 0;
+
desc = irq_to_desc(host_irq);
if (!desc)
return -EIO;
@@ -3484,6 +3494,9 @@ static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
struct kvmppc_passthru_irqmap *pimap;
int i;
+ if (!kvm_irq_bypass)
+ return 0;
+
desc = irq_to_desc(host_irq);
if (!desc)
return -EIO;
diff --git a/arch/powerpc/kvm/book3s_hv_rm_xics.c b/arch/powerpc/kvm/book3s_hv_rm_xics.c
index 8390c50..97a09c2 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_xics.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_xics.c
@@ -27,6 +27,8 @@
int h_ipi_redirect = 1;
EXPORT_SYMBOL(h_ipi_redirect);
+int kvm_irq_bypass = 1;
+EXPORT_SYMBOL(kvm_irq_bypass);
static void icp_rm_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
u32 new_irq);
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 12/14] KVM: PPC: Book3S HV: Update irq stats for IRQs handled in real mode
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (10 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 11/14] KVM: PPC: Book3S HV: Tunable to disable KVM IRQ bypass Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 13/14] KVM: PPC: Book3S HV: Change affinity for passthrough IRQ Suresh Warrier
` (2 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
When a passthrough IRQ is handled completely within KVM real
mode code, it has to also update the IRQ stats since this
does not go through the generic IRQ handling code.
However, the per CPU kstat_irqs field is an allocated (not static)
field and so cannot be directly accessed in real mode safely.
The function this_cpu_inc_rm() is introduced to safely increment
per CPU fields (currently coded for unsigned integers only) that
are allocated and could thus be vmalloced also.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/kvm/book3s_hv_rm_xics.c | 50 ++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_hv_rm_xics.c b/arch/powerpc/kvm/book3s_hv_rm_xics.c
index 97a09c2..f33c7cc 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_xics.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_xics.c
@@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/kvm_host.h>
#include <linux/err.h>
+#include <linux/kernel_stat.h>
#include <asm/kvm_book3s.h>
#include <asm/kvm_ppc.h>
@@ -18,6 +19,7 @@
#include <asm/debug.h>
#include <asm/synch.h>
#include <asm/cputhreads.h>
+#include <asm/pgtable.h>
#include <asm/ppc-opcode.h>
#include <asm/pnv-pci.h>
@@ -734,6 +736,53 @@ static void icp_eoi(struct irq_chip *c, u32 hwirq, u32 xirr)
_stwcix(xics_phys + XICS_XIRR, xirr);
}
+/*
+ * Increment a per-CPU 32-bit unsigned integer variable.
+ * Safe to call in real-mode. Handles vmalloc'ed addresses
+ *
+ * ToDo: Make this work for any integral type
+ */
+
+static inline void this_cpu_inc_rm(unsigned int __percpu *addr)
+{
+ unsigned long l;
+ unsigned int *raddr;
+ int cpu = smp_processor_id();
+
+ raddr = per_cpu_ptr(addr, cpu);
+ l = (unsigned long)raddr;
+
+ if (REGION_ID(l) == VMALLOC_REGION_ID) {
+ l = vmalloc_to_phys(raddr);
+ raddr = (unsigned int *)l;
+ }
+ ++*raddr;
+}
+
+/*
+ * We don't try to update the flags in the irq_desc 'istate' field in
+ * here as would happen in the normal IRQ handling path for several reasons:
+ * - state flags represent internal IRQ state and are not expected to be
+ * updated outside the IRQ subsystem
+ * - more importantly, these are useful for edge triggered interrupts,
+ * IRQ probing, etc., but we are only handling MSI/MSIx interrupts here
+ * and these states shouldn't apply to us.
+ *
+ * However, we do update irq_stats - we somewhat duplicate the code in
+ * kstat_incr_irqs_this_cpu() for this since this function is defined
+ * in irq/internal.h which we don't want to include here.
+ * The only difference is that desc->kstat_irqs is an allocated per CPU
+ * variable and could have been vmalloc'ed, so we can't directly
+ * call __this_cpu_inc() on it. The kstat structure is a static
+ * per CPU variable and it should be accessible by real-mode KVM.
+ *
+ */
+static void kvmppc_rm_handle_irq_desc(struct irq_desc *desc)
+{
+ this_cpu_inc_rm(desc->kstat_irqs);
+ __this_cpu_inc(kstat.irqs_sum);
+}
+
long kvmppc_deliver_irq_passthru(struct kvm_vcpu *vcpu,
u32 xirr,
struct kvmppc_irq_map *irq_map,
@@ -747,6 +796,7 @@ long kvmppc_deliver_irq_passthru(struct kvm_vcpu *vcpu,
xics = vcpu->kvm->arch.xics;
icp = vcpu->arch.icp;
+ kvmppc_rm_handle_irq_desc(irq_map->desc);
icp_rm_deliver_irq(xics, icp, irq);
/* EOI the interrupt */
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 13/14] KVM: PPC: Book3S HV: Change affinity for passthrough IRQ
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (11 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 12/14] KVM: PPC: Book3S HV: Update irq stats for IRQs handled in real mode Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:40 ` [PATCH 14/14] KVM: PPC: Book3S HV: Counters for passthrough IRQ stats Suresh Warrier
2016-02-26 18:49 ` [PATCH 00/14] KVM: PPC: Book3S HV: PCI Passthrough Interrupt Optimizations Suresh E. Warrier
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Change the affinity in the host for a passthrough interrupt
to the hardware thread running the VCPU which has affinity
to this interrupt in the guest. Since the cores run in single
threaded mode on a PowerKVM host, the affinity is actually
changed to the hardware thread's first sibling thread in its
core. This is only done for IRQs that have been mapped for
IRQ bypass since in this case if the interrupt occurs while
the core is in the guest, the real mode KVM will be able
to simply redirect the interrupt to the appropriate sibling
hardware thread.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/kvm/book3s_hv_builtin.c | 14 +++++--
arch/powerpc/kvm/book3s_hv_rm_xics.c | 78 ++++++++++++++++++++++++++++++++++++
arch/powerpc/kvm/book3s_xics.c | 7 ++++
arch/powerpc/kvm/book3s_xics.h | 3 +-
4 files changed, 98 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
index 62252da..f95aa63 100644
--- a/arch/powerpc/kvm/book3s_hv_builtin.c
+++ b/arch/powerpc/kvm/book3s_hv_builtin.c
@@ -288,8 +288,16 @@ void kvmhv_commence_exit(int trap)
struct kvmppc_host_rm_ops *kvmppc_host_rm_ops_hv;
EXPORT_SYMBOL_GPL(kvmppc_host_rm_ops_hv);
-static struct kvmppc_irq_map *get_irqmap(struct kvmppc_passthru_irqmap *pimap,
- u32 xisr)
+/*
+ * This returns the v_hwirq -> r_hwirq mapping, if any,
+ * when the r_hwirq is passed in as input
+ * There is also the similar get_irqmap_gsi() routine
+ * defined elsewhere, which returns the mapping when passed
+ * the v_hwirq as input.
+ */
+static struct kvmppc_irq_map *get_irqmap_xisr(
+ struct kvmppc_passthru_irqmap *pimap,
+ u32 xisr)
{
int i;
@@ -425,7 +433,7 @@ long kvmppc_read_intr(struct kvm_vcpu *vcpu, int path)
*/
pimap = kvmppc_get_passthru_irqmap(vcpu);
if (pimap) {
- irq_map = get_irqmap(pimap, xisr);
+ irq_map = get_irqmap_xisr(pimap, xisr);
if (irq_map) {
r = kvmppc_deliver_irq_passthru(vcpu, xirr,
irq_map, pimap);
diff --git a/arch/powerpc/kvm/book3s_hv_rm_xics.c b/arch/powerpc/kvm/book3s_hv_rm_xics.c
index f33c7cc..e2bbfdf 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_xics.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_xics.c
@@ -661,6 +661,80 @@ int kvmppc_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr)
return check_too_hard(xics, icp);
}
+/*
+ * This returns the v_hwirq -> r_hwirq mapping, if any,
+ * when the v_hwirq is passed in as input
+ * There is also the similar get_irqmap_xisr() routine
+ * defined elsewhere, which returns the mapping when passed
+ * the r_hwirq as input.
+ */
+
+static struct kvmppc_irq_map *get_irqmap_gsi(
+ struct kvmppc_passthru_irqmap *pimap,
+ u32 gsi)
+{
+ int i;
+
+ /*
+ * We access this array unsafely.
+ * Read comments in get_irqmap_xisr for details of this
+ * as well as the need for the memory barrier used below.
+ */
+ for (i = 0; i < pimap->n_cached; i++) {
+ if (gsi == pimap->cached[i].v_hwirq) {
+ /*
+ * Order subsequent reads in the caller to serialize
+ * with the writer.
+ */
+ smp_rmb();
+ return &pimap->cached[i];
+ }
+ }
+ return NULL;
+}
+
+unsigned long irq_map_err;
+
+/*
+ * Change affinity to CPU running the target VCPU.
+ */
+static void ics_set_affinity_passthru(struct ics_irq_state *state,
+ struct kvm_vcpu *vcpu,
+ u32 irq)
+{
+ struct kvmppc_passthru_irqmap *pimap;
+ struct kvmppc_irq_map *irq_map;
+ struct irq_data *d;
+ s16 intr_cpu;
+ u32 pcpu;
+
+ intr_cpu = state->intr_cpu;
+
+ if (intr_cpu == -1)
+ return;
+
+ state->intr_cpu = -1;
+
+ pcpu = cpu_first_thread_sibling(raw_smp_processor_id());
+ if (intr_cpu == pcpu)
+ return;
+
+ pimap = kvmppc_get_passthru_irqmap(vcpu);
+ if (likely(pimap)) {
+ irq_map = get_irqmap_gsi(pimap, irq);
+ if (unlikely(!irq_map)) {
+ irq_map_err++;
+ return;
+ }
+ d = irq_desc_get_irq_data(irq_map->desc);
+ if (unlikely(!d->chip->irq_set_affinity))
+ return;
+ d->chip->irq_set_affinity(d, cpumask_of(pcpu), false);
+ } else
+ irq_map_err++;
+
+}
+
int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
{
struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
@@ -713,6 +787,10 @@ int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
icp->rm_action |= XICS_RM_NOTIFY_EOI;
icp->rm_eoied_irq = irq;
}
+
+ if (state->pcached)
+ ics_set_affinity_passthru(state, vcpu, irq);
+
bail:
return check_too_hard(xics, icp);
}
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index 855d669..ffaf977 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -93,11 +93,18 @@ static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level)
* will redirect this directly to the guest where possible.
* Currently, we will cache a passthrough IRQ the first time
* we inject it into the guest.
+ * Update ICS state only if we successfully mapped the IRQ.
+ * We check and update ICS fields locklessly:
+ * - pcached and mapped fields (in kvmppc_cache_passthru_irq)
+ * are only set once per IRQ.
+ * - intr_cpu is only used as a hint
*/
if (state->pmapped && !state->pcached) {
if (kvmppc_cache_passthru_irq(xics->kvm, irq) == 0)
state->pcached = 1;
}
+ if (state->pcached)
+ state->intr_cpu = raw_smp_processor_id();
/*
* We set state->asserted locklessly. This should be fine as
diff --git a/arch/powerpc/kvm/book3s_xics.h b/arch/powerpc/kvm/book3s_xics.h
index de560f1..45fec7ac 100644
--- a/arch/powerpc/kvm/book3s_xics.h
+++ b/arch/powerpc/kvm/book3s_xics.h
@@ -41,8 +41,9 @@ struct ics_irq_state {
u8 masked_pending;
u8 asserted; /* Only for LSI */
u8 exists;
- u8 pmapped;
+ u8 pmapped; /* Next 3 only for MSI */
u8 pcached;
+ s16 intr_cpu; /* interrupt received on CPU */
};
/* Atomic ICP state, updated with a single compare & swap */
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH 14/14] KVM: PPC: Book3S HV: Counters for passthrough IRQ stats
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (12 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 13/14] KVM: PPC: Book3S HV: Change affinity for passthrough IRQ Suresh Warrier
@ 2016-02-26 18:40 ` Suresh Warrier
2016-02-26 18:49 ` [PATCH 00/14] KVM: PPC: Book3S HV: PCI Passthrough Interrupt Optimizations Suresh E. Warrier
14 siblings, 0 replies; 16+ messages in thread
From: Suresh Warrier @ 2016-02-26 18:40 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: warrier, paulus, agraf, mpe
Add VCPU stat counters to track affinity for passthrough
interrupts.
pthru_all: Counts all passthrough interrupts whose IRQ mappings have
been cached in the kvmppc_passthru_irq_map cache.
pthru_host: Counts all cached passthrough interrupts that were injected
from the host through kvm_set_irq.
pthru_bad_aff: Counts how many cached passthrough interrupts have
bad affinity (receiving CPU is not running VCPU that is
the target of the virtual interrupt in the guest).
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_host.h | 3 +++
arch/powerpc/kvm/book3s.c | 3 +++
arch/powerpc/kvm/book3s_hv_rm_xics.c | 7 +++++++
3 files changed, 13 insertions(+)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 558d195..9230b1a 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -128,6 +128,9 @@ struct kvm_vcpu_stat {
u32 ld_slow;
u32 st_slow;
#endif
+ u32 pthru_all;
+ u32 pthru_host;
+ u32 pthru_bad_aff;
};
enum kvm_exit_types {
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 1b4f5bd..b3d44b1 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -65,6 +65,9 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
{ "ld_slow", VCPU_STAT(ld_slow) },
{ "st", VCPU_STAT(st) },
{ "st_slow", VCPU_STAT(st_slow) },
+ { "pthru_all", VCPU_STAT(pthru_all) },
+ { "pthru_host", VCPU_STAT(pthru_host) },
+ { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) },
{ NULL }
};
diff --git a/arch/powerpc/kvm/book3s_hv_rm_xics.c b/arch/powerpc/kvm/book3s_hv_rm_xics.c
index e2bbfdf..4004a35 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_xics.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_xics.c
@@ -696,6 +696,7 @@ static struct kvmppc_irq_map *get_irqmap_gsi(
unsigned long irq_map_err;
/*
+ * Count affinity for passthrough IRQs.
* Change affinity to CPU running the target VCPU.
*/
static void ics_set_affinity_passthru(struct ics_irq_state *state,
@@ -708,17 +709,23 @@ static void ics_set_affinity_passthru(struct ics_irq_state *state,
s16 intr_cpu;
u32 pcpu;
+ vcpu->stat.pthru_all++;
+
intr_cpu = state->intr_cpu;
if (intr_cpu == -1)
return;
+ vcpu->stat.pthru_host++;
+
state->intr_cpu = -1;
pcpu = cpu_first_thread_sibling(raw_smp_processor_id());
if (intr_cpu == pcpu)
return;
+ vcpu->stat.pthru_bad_aff++;
+
pimap = kvmppc_get_passthru_irqmap(vcpu);
if (likely(pimap)) {
irq_map = get_irqmap_gsi(pimap, irq);
--
1.8.3.4
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 00/14] KVM: PPC: Book3S HV: PCI Passthrough Interrupt Optimizations
2016-02-26 18:40 [PATCH 00/14] PCI Passthrough Interrupt Optimizations Suresh Warrier
` (13 preceding siblings ...)
2016-02-26 18:40 ` [PATCH 14/14] KVM: PPC: Book3S HV: Counters for passthrough IRQ stats Suresh Warrier
@ 2016-02-26 18:49 ` Suresh E. Warrier
14 siblings, 0 replies; 16+ messages in thread
From: Suresh E. Warrier @ 2016-02-26 18:49 UTC (permalink / raw)
To: kvm, linuxppc-dev; +Cc: paulus, agraf
On 02/26/2016 12:40 PM, Suresh Warrier wrote:
> This patch set adds support for handling interrupts for PCI adapters
> entirely in the guest under the right conditions. When an interrupt
> is received by KVM in real mode, if the interrupt is from a PCI
> passthrough adapter owned by the guest, KVM will update the virtual
> ICP for the VCPU that is the target of the interrupt entirely in
> real mode and generate the virtual interrupt. If the VCPU is not
> running in the guest, it will wake up the VCPU. It will also update
> the affinity of the interrupt to directly target the CPU (core)
> where this VCPU is being scheduled as an optimization.
>
> KVM needs the mapping between hardware interrupt numbers in the host
> to the virtual hardware interrupt (GSI) that needs to get injected
> into the guest. This patch set takes advantage of the IRQ bypass
> manager feature to create this mapping. For now, we allocate and
> manage a separate mapping structure per VM.
>
> Although a mapping is created for every passthrough IRQ requested
> in the guest, we also maintain a cache of mappings that is used to
> speed up search. For now, KVM real mode code only looks in the cache for
> a mapping. If no mapping is found, we fall back on the usual interrupt
> routing mechanism - switch back to host and run the VFIO interrupt
> handler.
>
> This is based on 4.5-rc1 plus the patch set in
> http://www.spinics.net/lists/kvm-ppc/msg11131.html since it has
> dependencies on vmalloc_to_phys() being public.
>
> Suresh Warrier (14):
> powerpc: Add simple cache inhibited MMIO accessors
> KVM: PPC: Book3S HV: Convert kvmppc_read_intr to a C function
> KVM: PPC: select IRQ_BYPASS_MANAGER
> KVM: PPC: Book3S HV: Introduce kvmppc_passthru_irqmap
> KVM: PPC: Book3S HV: Enable IRQ bypass
> KVM: PPC: Book3S HV: Caching for passthrough IRQ map
> KVM: PPC: Book3S HV: Handle passthrough interrupts in guest
> KVM: PPC: Book3S HV: Complete passthrough interrupt in host
> KVM: PPC: Book3S HV: Enable KVM real mode handling of passthrough IRQs
> KVM: PPC: Book3S HV: Dump irqmap in debugfs
> KVM: PPC: Book3S HV: Tunable to disable KVM IRQ bypass
> KVM: PPC: Book3S HV: Update irq stats for IRQs handled in real mode
> KVM: PPC: Book3S HV: Change affinity for passthrough IRQ
> KVM: PPC: Book3S HV: Counters for passthrough IRQ stats
>
> arch/powerpc/include/asm/io.h | 28 +++
> arch/powerpc/include/asm/kvm_asm.h | 10 +
> arch/powerpc/include/asm/kvm_book3s.h | 1 +
> arch/powerpc/include/asm/kvm_host.h | 25 +++
> arch/powerpc/include/asm/kvm_ppc.h | 28 +++
> arch/powerpc/include/asm/pnv-pci.h | 1 +
> arch/powerpc/kvm/Kconfig | 2 +
> arch/powerpc/kvm/book3s.c | 45 +++++
> arch/powerpc/kvm/book3s_hv.c | 318 +++++++++++++++++++++++++++++-
> arch/powerpc/kvm/book3s_hv_builtin.c | 157 +++++++++++++++
> arch/powerpc/kvm/book3s_hv_rm_xics.c | 181 +++++++++++++++++
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 226 ++++++++++++---------
> arch/powerpc/kvm/book3s_xics.c | 68 ++++++-
> arch/powerpc/kvm/book3s_xics.h | 3 +
> arch/powerpc/platforms/powernv/pci-ioda.c | 14 +-
> 15 files changed, 1013 insertions(+), 94 deletions(-)
>
^ permalink raw reply [flat|nested] 16+ messages in thread