[U-Boot] [PATCH 00/12] x86: Support booting SeaBIOS

[U-Boot] [PATCH 00/12] x86: Support booting SeaBIOS

[Bin Meng]

This is the initial attempt to support booting SeaBIOS from U-Boot.

This is tested:
- On Intel Crown Bay board with a PCIe graphics card, booting SeaBIOS
then chain-loading a GRUB on a USB drive, then Linux kernel finally.
- On QEMU x86 target with U-Boot chain-loading SeaBIOS to install/boot
a Windows XP OS.

This series is available on u-boot-x86/seabios-working.

Previous RFC patch @ http://patchwork.ozlabs.org/patch/523764/

Bin Meng (12):
  x86: Move asm/arch-coreboot/tables.h to a common place
  x86: Move sysinfo related to sysinfo.h
  x86: Clean up coreboot_tables.h
  x86: Change to use start/end address pair in write_tables()
  x86: Use a macro for ROM table alignment
  x86: Change write_acpi_tables() signature a little bit
  x86: Simplify codes in write_tables()
  x86: Support writing configuration tables in high area
  x86: Implement functions for writing coreboot table
  x86: Support booting SeaBIOS
  x86: qemu: Enable ACPI table generation by default
  x86: Document how to play with SeaBIOS

 arch/x86/Kconfig                                   |  10 ++
 arch/x86/cpu/coreboot/sdram.c                      |   1 -
 arch/x86/cpu/coreboot/tables.c                     |   1 -
 arch/x86/cpu/qemu/fw_cfg.c                         |   5 +-
 arch/x86/include/asm/acpi_table.h                  |   2 +-
 arch/x86/include/asm/arch-coreboot/sysinfo.h       |   4 +-
 .../{arch-coreboot/tables.h => coreboot_tables.h}  | 167 +++++++++++----------
 arch/x86/include/asm/tables.h                      |   5 +
 arch/x86/lib/Makefile                              |   1 +
 arch/x86/lib/acpi_table.c                          |   4 +-
 arch/x86/lib/coreboot_table.c                      | 136 +++++++++++++++++
 arch/x86/lib/tables.c                              |  77 +++++++---
 configs/qemu-x86_defconfig                         |   1 +
 doc/README.x86                                     |  49 +++++-
 drivers/video/coreboot_fb.c                        |   1 -
 15 files changed, 356 insertions(+), 108 deletions(-)
 rename arch/x86/include/asm/{arch-coreboot/tables.h => coreboot_tables.h} (53%)
 create mode 100644 arch/x86/lib/coreboot_table.c

-- 
1.8.2.1

[U-Boot] [PATCH 01/12] x86: Move asm/arch-coreboot/tables.h to a common place

[Bin Meng]

Move asm/arch-coreboot/tables.h to asm/coreboot_tables.h so that
coreboot table definitions can be used by other x86 builds.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/cpu/coreboot/sdram.c                                      | 1 -
 arch/x86/cpu/coreboot/tables.c                                     | 1 -
 arch/x86/include/asm/arch-coreboot/sysinfo.h                       | 2 +-
 arch/x86/include/asm/{arch-coreboot/tables.h => coreboot_tables.h} | 0
 drivers/video/coreboot_fb.c                                        | 1 -
 5 files changed, 1 insertion(+), 4 deletions(-)
 rename arch/x86/include/asm/{arch-coreboot/tables.h => coreboot_tables.h} (100%)

diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index 32f595d..7115e7a 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -9,7 +9,6 @@
 #include <common.h>
 #include <asm/e820.h>
 #include <asm/arch/sysinfo.h>
-#include <asm/arch/tables.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c
index 2b12b19..543e51d 100644
--- a/arch/x86/cpu/coreboot/tables.c
+++ b/arch/x86/cpu/coreboot/tables.c
@@ -10,7 +10,6 @@
 #include <common.h>
 #include <net.h>
 #include <asm/arch/sysinfo.h>
-#include <asm/arch/tables.h>
 
 /*
  * This needs to be in the .data section so that it's copied over during
diff --git a/arch/x86/include/asm/arch-coreboot/sysinfo.h b/arch/x86/include/asm/arch-coreboot/sysinfo.h
index 2d57245..629088d 100644
--- a/arch/x86/include/asm/arch-coreboot/sysinfo.h
+++ b/arch/x86/include/asm/arch-coreboot/sysinfo.h
@@ -9,7 +9,7 @@
 #ifndef _COREBOOT_SYSINFO_H
 #define _COREBOOT_SYSINFO_H
 
-#include <asm/arch/tables.h>
+#include <asm/coreboot_tables.h>
 
 /* Maximum number of memory range definitions */
 #define SYSINFO_MAX_MEM_RANGES	32
diff --git a/arch/x86/include/asm/arch-coreboot/tables.h b/arch/x86/include/asm/coreboot_tables.h
similarity index 100%
rename from arch/x86/include/asm/arch-coreboot/tables.h
rename to arch/x86/include/asm/coreboot_tables.h
diff --git a/drivers/video/coreboot_fb.c b/drivers/video/coreboot_fb.c
index 4790ef1..feb5463 100644
--- a/drivers/video/coreboot_fb.c
+++ b/drivers/video/coreboot_fb.c
@@ -7,7 +7,6 @@
  */
 
 #include <common.h>
-#include <asm/arch/tables.h>
 #include <asm/arch/sysinfo.h>
 #include <vbe.h>
 #include <video_fb.h>
-- 
1.8.2.1

[U-Boot] [PATCH 02/12] x86: Move sysinfo related to sysinfo.h

[Bin Meng]

coreboot_tables.h should not include sysinfo related stuff.
Move those to asm/arch-coreboot/sysinfo.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/include/asm/arch-coreboot/sysinfo.h | 2 ++
 arch/x86/include/asm/coreboot_tables.h       | 4 ----
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/arch-coreboot/sysinfo.h b/arch/x86/include/asm/arch-coreboot/sysinfo.h
index 629088d..12b3b5d 100644
--- a/arch/x86/include/asm/arch-coreboot/sysinfo.h
+++ b/arch/x86/include/asm/arch-coreboot/sysinfo.h
@@ -56,4 +56,6 @@ struct sysinfo_t {
 
 extern struct sysinfo_t lib_sysinfo;
 
+int get_coreboot_info(struct sysinfo_t *info);
+
 #endif
diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h
index e254484..98a95cd 100644
--- a/arch/x86/include/asm/coreboot_tables.h
+++ b/arch/x86/include/asm/coreboot_tables.h
@@ -262,10 +262,6 @@ struct	cb_cmos_checksum {
 #define UNPACK_CB64(_in) \
 	((((u64) _in.hi) << 32) | _in.lo)
 
-struct sysinfo_t;
-
-int get_coreboot_info(struct sysinfo_t *info);
-
 #define CBMEM_TOC_RESERVED      512
 #define MAX_CBMEM_ENTRIES       16
 #define CBMEM_MAGIC             0x434f5245
-- 
1.8.2.1

[U-Boot] [PATCH 03/12] x86: Clean up coreboot_tables.h

[Bin Meng]

Clean up this file a little bit:
- Remove inclusion of <linux/compiler.h>
- Use tab in the macro definition
- Remove table definitions that are not needed

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/include/asm/coreboot_tables.h | 153 +++++++++++++++++----------------
 1 file changed, 80 insertions(+), 73 deletions(-)

diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h
index 98a95cd..ab4425f 100644
--- a/arch/x86/include/asm/coreboot_tables.h
+++ b/arch/x86/include/asm/coreboot_tables.h
@@ -9,8 +9,6 @@
 #ifndef _COREBOOT_TABLES_H
 #define _COREBOOT_TABLES_H
 
-#include <linux/compiler.h>
-
 struct cbuint64 {
 	u32 lo;
 	u32 hi;
@@ -30,8 +28,8 @@ struct cb_record {
 	u32 size;
 };
 
-#define CB_TAG_UNUSED     0x0000
-#define CB_TAG_MEMORY     0x0001
+#define CB_TAG_UNUSED			0x0000
+#define CB_TAG_MEMORY			0x0001
 
 struct cb_memory_range {
 	struct cbuint64 start;
@@ -39,13 +37,13 @@ struct cb_memory_range {
 	u32 type;
 };
 
-#define CB_MEM_RAM          1
-#define CB_MEM_RESERVED     2
-#define CB_MEM_ACPI         3
-#define CB_MEM_NVS          4
-#define CB_MEM_UNUSABLE     5
-#define CB_MEM_VENDOR_RSVD  6
-#define CB_MEM_TABLE       16
+#define CB_MEM_RAM			1
+#define CB_MEM_RESERVED			2
+#define CB_MEM_ACPI			3
+#define CB_MEM_NVS			4
+#define CB_MEM_UNUSABLE			5
+#define CB_MEM_VENDOR_RSVD		6
+#define CB_MEM_TABLE			16
 
 struct cb_memory {
 	u32 tag;
@@ -53,7 +51,7 @@ struct cb_memory {
 	struct cb_memory_range map[0];
 };
 
-#define CB_TAG_HWRPB      0x0002
+#define CB_TAG_HWRPB			0x0002
 
 struct cb_hwrpb {
 	u32 tag;
@@ -61,7 +59,7 @@ struct cb_hwrpb {
 	u64 hwrpb;
 };
 
-#define CB_TAG_MAINBOARD  0x0003
+#define CB_TAG_MAINBOARD		0x0003
 
 struct cb_mainboard {
 	u32 tag;
@@ -71,16 +69,16 @@ struct cb_mainboard {
 	u8 strings[0];
 };
 
-#define CB_TAG_VERSION        0x0004
-#define CB_TAG_EXTRA_VERSION  0x0005
-#define CB_TAG_BUILD          0x0006
-#define CB_TAG_COMPILE_TIME   0x0007
-#define CB_TAG_COMPILE_BY     0x0008
-#define CB_TAG_COMPILE_HOST   0x0009
-#define CB_TAG_COMPILE_DOMAIN 0x000a
-#define CB_TAG_COMPILER       0x000b
-#define CB_TAG_LINKER         0x000c
-#define CB_TAG_ASSEMBLER      0x000d
+#define CB_TAG_VERSION			0x0004
+#define CB_TAG_EXTRA_VERSION		0x0005
+#define CB_TAG_BUILD			0x0006
+#define CB_TAG_COMPILE_TIME		0x0007
+#define CB_TAG_COMPILE_BY		0x0008
+#define CB_TAG_COMPILE_HOST		0x0009
+#define CB_TAG_COMPILE_DOMAIN		0x000a
+#define CB_TAG_COMPILER			0x000b
+#define CB_TAG_LINKER			0x000c
+#define CB_TAG_ASSEMBLER		0x000d
 
 struct cb_string {
 	u32 tag;
@@ -88,19 +86,19 @@ struct cb_string {
 	u8 string[0];
 };
 
-#define CB_TAG_SERIAL         0x000f
+#define CB_TAG_SERIAL			0x000f
 
 struct cb_serial {
 	u32 tag;
 	u32 size;
-#define CB_SERIAL_TYPE_IO_MAPPED     1
-#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
+#define CB_SERIAL_TYPE_IO_MAPPED	1
+#define CB_SERIAL_TYPE_MEMORY_MAPPED	2
 	u32 type;
 	u32 baseaddr;
 	u32 baud;
 };
 
-#define CB_TAG_CONSOLE       0x00010
+#define CB_TAG_CONSOLE			0x0010
 
 struct cb_console {
 	u32 tag;
@@ -108,14 +106,14 @@ struct cb_console {
 	u16 type;
 };
 
-#define CB_TAG_CONSOLE_SERIAL8250 0
-#define CB_TAG_CONSOLE_VGA        1 /* OBSOLETE */
-#define CB_TAG_CONSOLE_BTEXT      2 /* OBSOLETE */
-#define CB_TAG_CONSOLE_LOGBUF     3
-#define CB_TAG_CONSOLE_SROM       4 /* OBSOLETE */
-#define CB_TAG_CONSOLE_EHCI       5
+#define CB_TAG_CONSOLE_SERIAL8250	0
+#define CB_TAG_CONSOLE_VGA		1 /* OBSOLETE */
+#define CB_TAG_CONSOLE_BTEXT		2 /* OBSOLETE */
+#define CB_TAG_CONSOLE_LOGBUF		3
+#define CB_TAG_CONSOLE_SROM		4 /* OBSOLETE */
+#define CB_TAG_CONSOLE_EHCI		5
 
-#define CB_TAG_FORWARD       0x00011
+#define CB_TAG_FORWARD			0x0011
 
 struct cb_forward {
 	u32 tag;
@@ -123,11 +121,11 @@ struct cb_forward {
 	u64 forward;
 };
 
-#define CB_TAG_FRAMEBUFFER      0x0012
+#define CB_TAG_FRAMEBUFFER		0x0012
+
 struct cb_framebuffer {
 	u32 tag;
 	u32 size;
-
 	u64 physical_address;
 	u32 x_resolution;
 	u32 y_resolution;
@@ -143,8 +141,9 @@ struct cb_framebuffer {
 	u8 reserved_mask_size;
 };
 
-#define CB_TAG_GPIO 0x0013
-#define GPIO_MAX_NAME_LENGTH 16
+#define CB_TAG_GPIO			0x0013
+#define GPIO_MAX_NAME_LENGTH		16
+
 struct cb_gpio {
 	u32 port;
 	u32 polarity;
@@ -155,36 +154,39 @@ struct cb_gpio {
 struct cb_gpios {
 	u32 tag;
 	u32 size;
-
 	u32 count;
 	struct cb_gpio gpios[0];
 };
 
-#define CB_TAG_FDT	0x0014
+#define CB_TAG_FDT			0x0014
+
 struct cb_fdt {
 	uint32_t tag;
 	uint32_t size;	/* size of the entire entry */
 	/* the actual FDT gets placed here */
 };
 
-#define CB_TAG_VDAT	0x0015
+#define CB_TAG_VDAT			0x0015
+
 struct cb_vdat {
 	uint32_t tag;
 	uint32_t size;	/* size of the entire entry */
-	void	 *vdat_addr;
+	void *vdat_addr;
 	uint32_t vdat_size;
 };
 
-#define CB_TAG_TIMESTAMPS	0x0016
-#define CB_TAG_CBMEM_CONSOLE	0x0017
-#define CB_TAG_MRC_CACHE	0x0018
+#define CB_TAG_TIMESTAMPS		0x0016
+#define CB_TAG_CBMEM_CONSOLE		0x0017
+#define CB_TAG_MRC_CACHE		0x0018
+
 struct cb_cbmem_tab {
 	uint32_t tag;
 	uint32_t size;
-	void   *cbmem_tab;
+	void *cbmem_tab;
 };
 
-#define CB_TAG_VBNV		0x0019
+#define CB_TAG_VBNV			0x0019
+
 struct cb_vbnv {
 	uint32_t tag;
 	uint32_t size;
@@ -192,15 +194,18 @@ struct cb_vbnv {
 	uint32_t vbnv_size;
 };
 
-#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
+#define CB_TAG_CMOS_OPTION_TABLE	0x00c8
+
 struct cb_cmos_option_table {
 	u32 tag;
 	u32 size;
 	u32 header_length;
 };
 
-#define CB_TAG_OPTION         0x00c9
-#define CMOS_MAX_NAME_LENGTH    32
+#define CB_TAG_OPTION			0x00c9
+
+#define CMOS_MAX_NAME_LENGTH		32
+
 struct cb_cmos_entries {
 	u32 tag;
 	u32 size;
@@ -211,9 +216,9 @@ struct cb_cmos_entries {
 	u8 name[CMOS_MAX_NAME_LENGTH];
 };
 
+#define CB_TAG_OPTION_ENUM		0x00ca
+#define CMOS_MAX_TEXT_LENGTH		32
 
-#define CB_TAG_OPTION_ENUM    0x00ca
-#define CMOS_MAX_TEXT_LENGTH 32
 struct cb_cmos_enums {
 	u32 tag;
 	u32 size;
@@ -222,8 +227,9 @@ struct cb_cmos_enums {
 	u8 text[CMOS_MAX_TEXT_LENGTH];
 };
 
-#define CB_TAG_OPTION_DEFAULTS 0x00cb
-#define CMOS_IMAGE_BUFFER_SIZE 128
+#define CB_TAG_OPTION_DEFAULTS		0x00cb
+#define CMOS_IMAGE_BUFFER_SIZE		128
+
 struct cb_cmos_defaults {
 	u32 tag;
 	u32 size;
@@ -232,9 +238,10 @@ struct cb_cmos_defaults {
 	u8 default_set[CMOS_IMAGE_BUFFER_SIZE];
 };
 
-#define CB_TAG_OPTION_CHECKSUM 0x00cc
-#define CHECKSUM_NONE	0
-#define CHECKSUM_PCBIOS	1
+#define CB_TAG_OPTION_CHECKSUM		0x00cc
+#define CHECKSUM_NONE			0
+#define CHECKSUM_PCBIOS			1
+
 struct	cb_cmos_checksum {
 	u32 tag;
 	u32 size;
@@ -262,9 +269,9 @@ struct	cb_cmos_checksum {
 #define UNPACK_CB64(_in) \
 	((((u64) _in.hi) << 32) | _in.lo)
 
-#define CBMEM_TOC_RESERVED      512
-#define MAX_CBMEM_ENTRIES       16
-#define CBMEM_MAGIC             0x434f5245
+#define CBMEM_TOC_RESERVED		512
+#define MAX_CBMEM_ENTRIES		16
+#define CBMEM_MAGIC			0x434f5245
 
 struct cbmem_entry {
 	u32 magic;
@@ -273,18 +280,18 @@ struct cbmem_entry {
 	u64 size;
 } __packed;
 
-#define CBMEM_ID_FREESPACE      0x46524545
-#define CBMEM_ID_GDT            0x4c474454
-#define CBMEM_ID_ACPI           0x41435049
-#define CBMEM_ID_CBTABLE        0x43425442
-#define CBMEM_ID_PIRQ           0x49525154
-#define CBMEM_ID_MPTABLE        0x534d5054
-#define CBMEM_ID_RESUME         0x5245534d
-#define CBMEM_ID_RESUME_SCRATCH 0x52455343
-#define CBMEM_ID_SMBIOS         0x534d4254
-#define CBMEM_ID_TIMESTAMP      0x54494d45
-#define CBMEM_ID_MRCDATA        0x4d524344
-#define CBMEM_ID_CONSOLE        0x434f4e53
-#define CBMEM_ID_NONE           0x00000000
+#define CBMEM_ID_FREESPACE		0x46524545
+#define CBMEM_ID_GDT			0x4c474454
+#define CBMEM_ID_ACPI			0x41435049
+#define CBMEM_ID_CBTABLE		0x43425442
+#define CBMEM_ID_PIRQ			0x49525154
+#define CBMEM_ID_MPTABLE		0x534d5054
+#define CBMEM_ID_RESUME			0x5245534d
+#define CBMEM_ID_RESUME_SCRATCH		0x52455343
+#define CBMEM_ID_SMBIOS			0x534d4254
+#define CBMEM_ID_TIMESTAMP		0x54494d45
+#define CBMEM_ID_MRCDATA		0x4d524344
+#define CBMEM_ID_CONSOLE		0x434f4e53
+#define CBMEM_ID_NONE			0x00000000
 
 #endif
-- 
1.8.2.1

[U-Boot] [PATCH 04/12] x86: Change to use start/end address pair in write_tables()

[Bin Meng]

Add a new variable rom_table_start and pass it to ROM table write
routines. This reads better than previous single rom_table_end.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/lib/tables.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 14b15cf..fc6c0d8 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -39,26 +39,32 @@ void table_fill_string(char *dest, const char *src, size_t n, char pad)
 
 void write_tables(void)
 {
-	u32 __maybe_unused rom_table_end = ROM_TABLE_ADDR;
+	u32 __maybe_unused rom_table_start = ROM_TABLE_ADDR;
+	u32 __maybe_unused rom_table_end;
 
 #ifdef CONFIG_GENERATE_PIRQ_TABLE
-	rom_table_end = write_pirq_routing_table(rom_table_end);
+	rom_table_end = write_pirq_routing_table(rom_table_start);
 	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_start = rom_table_end;
 #endif
 #ifdef CONFIG_GENERATE_SFI_TABLE
-	rom_table_end = write_sfi_table(rom_table_end);
+	rom_table_end = write_sfi_table(rom_table_start);
 	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_start = rom_table_end;
 #endif
 #ifdef CONFIG_GENERATE_MP_TABLE
-	rom_table_end = write_mp_table(rom_table_end);
+	rom_table_end = write_mp_table(rom_table_start);
 	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_start = rom_table_end;
 #endif
 #ifdef CONFIG_GENERATE_ACPI_TABLE
-	rom_table_end = write_acpi_tables(rom_table_end);
+	rom_table_end = write_acpi_tables(rom_table_start);
 	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_start = rom_table_end;
 #endif
 #ifdef CONFIG_GENERATE_SMBIOS_TABLE
-	rom_table_end = write_smbios_table(rom_table_end);
+	rom_table_end = write_smbios_table(rom_table_start);
 	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_start = rom_table_end;
 #endif
 }
-- 
1.8.2.1

[U-Boot] [PATCH 05/12] x86: Use a macro for ROM table alignment

[Bin Meng]

Define ROM_TABLE_ALIGN instead of using 1024 directly.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/include/asm/tables.h |  2 ++
 arch/x86/lib/tables.c         | 10 +++++-----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h
index 0aa6d9b..9e6754f 100644
--- a/arch/x86/include/asm/tables.h
+++ b/arch/x86/include/asm/tables.h
@@ -14,6 +14,8 @@
  */
 #define ROM_TABLE_ADDR	0xf0000
 
+#define ROM_TABLE_ALIGN	1024
+
 /**
  * table_compute_checksum() - Compute a table checksum
  *
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index fc6c0d8..19b0260 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -44,27 +44,27 @@ void write_tables(void)
 
 #ifdef CONFIG_GENERATE_PIRQ_TABLE
 	rom_table_end = write_pirq_routing_table(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
 	rom_table_start = rom_table_end;
 #endif
 #ifdef CONFIG_GENERATE_SFI_TABLE
 	rom_table_end = write_sfi_table(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
 	rom_table_start = rom_table_end;
 #endif
 #ifdef CONFIG_GENERATE_MP_TABLE
 	rom_table_end = write_mp_table(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
 	rom_table_start = rom_table_end;
 #endif
 #ifdef CONFIG_GENERATE_ACPI_TABLE
 	rom_table_end = write_acpi_tables(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
 	rom_table_start = rom_table_end;
 #endif
 #ifdef CONFIG_GENERATE_SMBIOS_TABLE
 	rom_table_end = write_smbios_table(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, 1024);
+	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
 	rom_table_start = rom_table_end;
 #endif
 }
-- 
1.8.2.1

[U-Boot] [PATCH 06/12] x86: Change write_acpi_tables() signature a little bit

[Bin Meng]

Change the parameter and return value of write_acpi_tables() to u32
to conform with other table write routines.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/cpu/qemu/fw_cfg.c        | 5 ++---
 arch/x86/include/asm/acpi_table.h | 2 +-
 arch/x86/lib/acpi_table.c         | 4 ++--
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/x86/cpu/qemu/fw_cfg.c b/arch/x86/cpu/qemu/fw_cfg.c
index 5ea7a6e..a0a3d08 100644
--- a/arch/x86/cpu/qemu/fw_cfg.c
+++ b/arch/x86/cpu/qemu/fw_cfg.c
@@ -232,8 +232,7 @@ static struct fw_file *qemu_fwcfg_find_file(const char *name)
  *          be ignored.
  * @return: 0 on success, or negative value on failure
  */
-static int bios_linker_allocate(struct bios_linker_entry *entry,
-			   unsigned long *addr)
+static int bios_linker_allocate(struct bios_linker_entry *entry, u32 *addr)
 {
 	uint32_t size, align;
 	struct fw_file *file;
@@ -383,7 +382,7 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
 }
 
 /* This function loads and patches ACPI tables provided by QEMU */
-unsigned long write_acpi_tables(unsigned long addr)
+u32 write_acpi_tables(u32 addr)
 {
 	int i, ret = 0;
 	struct fw_file *file;
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index 0853248..9856fa6 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -390,4 +390,4 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
 			 void *dsdt);
 int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi, u8 cpu,
 			 u16 flags, u8 lint);
-unsigned long write_acpi_tables(unsigned long start);
+u32 write_acpi_tables(u32 start);
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 2ec5ad2..790f6fb 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -335,9 +335,9 @@ static void acpi_create_ssdt_generator(acpi_header_t *ssdt,
  * QEMU's version of write_acpi_tables is defined in
  * arch/x86/cpu/qemu/fw_cfg.c
  */
-unsigned long write_acpi_tables(unsigned long start)
+u32 write_acpi_tables(u32 start)
 {
-	unsigned long current;
+	u32 current;
 	struct acpi_rsdp *rsdp;
 	struct acpi_rsdt *rsdt;
 	struct acpi_xsdt *xsdt;
-- 
1.8.2.1

[U-Boot] [PATCH 07/12] x86: Simplify codes in write_tables()

[Bin Meng]

Given all table write routines have the same signature, we can use
simplify the codes by using a function table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/lib/tables.c | 61 ++++++++++++++++++++++++++++-----------------------
 1 file changed, 34 insertions(+), 27 deletions(-)

diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 19b0260..9f0d928 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -11,6 +11,32 @@
 #include <asm/tables.h>
 #include <asm/acpi_table.h>
 
+/**
+ * Function prototype to write a specific configuration table
+ *
+ * @addr:	start address to write the table
+ * @return:	end address of the table
+ */
+typedef u32 (*table_write)(u32 addr);
+
+static table_write table_write_funcs[] = {
+#ifdef CONFIG_GENERATE_PIRQ_TABLE
+	write_pirq_routing_table,
+#endif
+#ifdef CONFIG_GENERATE_SFI_TABLE
+	write_sfi_table,
+#endif
+#ifdef CONFIG_GENERATE_MP_TABLE
+	write_mp_table,
+#endif
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+	write_acpi_tables,
+#endif
+#ifdef CONFIG_GENERATE_SMBIOS_TABLE
+	write_smbios_table,
+#endif
+};
+
 u8 table_compute_checksum(void *v, int len)
 {
 	u8 *bytes = v;
@@ -39,32 +65,13 @@ void table_fill_string(char *dest, const char *src, size_t n, char pad)
 
 void write_tables(void)
 {
-	u32 __maybe_unused rom_table_start = ROM_TABLE_ADDR;
-	u32 __maybe_unused rom_table_end;
+	u32 rom_table_start = ROM_TABLE_ADDR;
+	u32 rom_table_end;
+	int i;
 
-#ifdef CONFIG_GENERATE_PIRQ_TABLE
-	rom_table_end = write_pirq_routing_table(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
-	rom_table_start = rom_table_end;
-#endif
-#ifdef CONFIG_GENERATE_SFI_TABLE
-	rom_table_end = write_sfi_table(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
-	rom_table_start = rom_table_end;
-#endif
-#ifdef CONFIG_GENERATE_MP_TABLE
-	rom_table_end = write_mp_table(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
-	rom_table_start = rom_table_end;
-#endif
-#ifdef CONFIG_GENERATE_ACPI_TABLE
-	rom_table_end = write_acpi_tables(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
-	rom_table_start = rom_table_end;
-#endif
-#ifdef CONFIG_GENERATE_SMBIOS_TABLE
-	rom_table_end = write_smbios_table(rom_table_start);
-	rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
-	rom_table_start = rom_table_end;
-#endif
+	for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) {
+		rom_table_end = table_write_funcs[i](rom_table_start);
+		rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
+		rom_table_start = rom_table_end;
+	}
 }
-- 
1.8.2.1

[U-Boot] [PATCH 08/12] x86: Support writing configuration tables in high area

[Bin Meng]

For those secondary bootloaders like SeaBIOS who want to live in
the F segment, which conflicts the configuration table address,
now we allow write_tables() to write the configuration tables in
high area (malloc'ed memory).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/lib/tables.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 9f0d928..eccef8a 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -67,11 +67,22 @@ void write_tables(void)
 {
 	u32 rom_table_start = ROM_TABLE_ADDR;
 	u32 rom_table_end;
+	u32 high_table, table_size;
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) {
 		rom_table_end = table_write_funcs[i](rom_table_start);
 		rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
+
+		table_size = rom_table_end - rom_table_start;
+		high_table = (u32)memalign(ROM_TABLE_ALIGN, table_size);
+		if (high_table) {
+			memset((void *)high_table, 0, table_size);
+			table_write_funcs[i](high_table);
+		} else {
+			printf("%d: no memory for configuration tables\n", i);
+		}
+
 		rom_table_start = rom_table_end;
 	}
 }
-- 
1.8.2.1

[U-Boot] [PATCH 09/12] x86: Implement functions for writing coreboot table

[Bin Meng]

To prepare generating coreboot table from U-Boot, implement functions
to handle the writing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/include/asm/coreboot_tables.h |  10 +++
 arch/x86/lib/Makefile                  |   1 +
 arch/x86/lib/coreboot_table.c          | 136 +++++++++++++++++++++++++++++++++
 3 files changed, 147 insertions(+)
 create mode 100644 arch/x86/lib/coreboot_table.c

diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h
index ab4425f..15ccf9b 100644
--- a/arch/x86/include/asm/coreboot_tables.h
+++ b/arch/x86/include/asm/coreboot_tables.h
@@ -294,4 +294,14 @@ struct cbmem_entry {
 #define CBMEM_ID_CONSOLE		0x434f4e53
 #define CBMEM_ID_NONE			0x00000000
 
+/**
+ * write_coreboot_table() - write coreboot table
+ *
+ * This writes coreboot table at a given address.
+ *
+ * @addr:	start address to write coreboot table
+ * @cfg_tables:	pointer to configuration table memory area
+ */
+void write_coreboot_table(u32 addr, struct memory_area *cfg_tables);
+
 #endif
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 4fc1936..6e0234a 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -10,6 +10,7 @@ obj-y += bios_asm.o
 obj-y += bios_interrupts.o
 obj-$(CONFIG_CMD_BOOTM) += bootm.o
 obj-y	+= cmd_boot.o
+obj-y	+= coreboot_table.o
 obj-$(CONFIG_EFI) += efi/
 obj-y	+= e820.o
 obj-y	+= gcc.o
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
new file mode 100644
index 0000000..cb45a79
--- /dev/null
+++ b/arch/x86/lib/coreboot_table.c
@@ -0,0 +1,136 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <vbe.h>
+#include <asm/coreboot_tables.h>
+#include <asm/e820.h>
+
+/**
+ * cb_table_init() - initialize a coreboot table header
+ *
+ * This fills in the coreboot table header signature and the header bytes.
+ * Other fields are set to zero.
+ *
+ * @cbh:	coreboot table header address
+ */
+static void cb_table_init(struct cb_header *cbh)
+{
+	memset(cbh, 0, sizeof(struct cb_header));
+	memcpy(cbh->signature, "LBIO", 4);
+	cbh->header_bytes = sizeof(struct cb_header);
+}
+
+/**
+ * cb_table_add_entry() - add a coreboot table entry
+ *
+ * This increases the coreboot table entry size with added table entry length
+ * and increases entry count by 1.
+ *
+ * @cbh:	coreboot table header address
+ * @cbr:	to be added table entry address
+ * @return:	pointer to next table entry address
+ */
+static u32 cb_table_add_entry(struct cb_header *cbh, struct cb_record *cbr)
+{
+	cbh->table_bytes += cbr->size;
+	cbh->table_entries++;
+
+	return (u32)cbr + cbr->size;
+}
+
+/**
+ * cb_table_finalize() - finalize the coreboot table
+ *
+ * This calculates the checksum for all coreboot table entries as well as
+ * the checksum for the coreboot header itself.
+ *
+ * @cbh:	coreboot table header address
+ */
+static void cb_table_finalize(struct cb_header *cbh)
+{
+	struct cb_record *cbr = (struct cb_record *)(cbh + 1);
+
+	cbh->table_checksum = compute_ip_checksum(cbr, cbh->table_bytes);
+	cbh->header_checksum = compute_ip_checksum(cbh, cbh->header_bytes);
+}
+
+void write_coreboot_table(u32 addr, struct memory_area *cfg_tables)
+{
+	struct cb_header *cbh = (struct cb_header *)addr;
+	struct cb_record *cbr;
+	struct cb_memory *mem;
+	struct cb_memory_range *map;
+	struct e820entry e820[32];
+	struct cb_framebuffer *fb;
+	struct vesa_mode_info *vesa;
+	int i, num;
+
+	cb_table_init(cbh);
+	cbr = (struct cb_record *)(cbh + 1);
+
+	/*
+	 * Two type of coreboot table entries are generated by us.
+	 * They are 'struct cb_memory' and 'struct cb_framebuffer'.
+	 */
+
+	/* populate memory map table */
+	mem = (struct cb_memory *)cbr;
+	mem->tag = CB_TAG_MEMORY;
+	map = mem->map;
+
+	/* first install e820 defined memory maps */
+	num = install_e820_map(ARRAY_SIZE(e820), e820);
+	for (i = 0; i < num; i++) {
+		map->start.lo = e820[i].addr & 0xffffffff;
+		map->start.hi = e820[i].addr >> 32;
+		map->size.lo = e820[i].size & 0xffffffff;
+		map->size.hi = e820[i].size >> 32;
+		map->type = e820[i].type;
+		map++;
+	}
+
+	/* then install all configuration tables */
+	while (cfg_tables->size) {
+		map->start.lo = cfg_tables->start & 0xffffffff;
+		map->start.hi = cfg_tables->start >> 32;
+		map->size.lo = cfg_tables->size & 0xffffffff;
+		map->size.hi = cfg_tables->size >> 32;
+		map->type = CB_MEM_TABLE;
+		map++;
+		num++;
+		cfg_tables++;
+	}
+	mem->size = num * sizeof(struct cb_memory_range) +
+		    sizeof(struct cb_record);
+	cbr = (struct cb_record *)cb_table_add_entry(cbh, cbr);
+
+	/* populate framebuffer table if we have sane vesa info */
+	vesa = &mode_info.vesa;
+	if (vesa->x_resolution && vesa->y_resolution) {
+		fb = (struct cb_framebuffer *)cbr;
+		fb->tag = CB_TAG_FRAMEBUFFER;
+		fb->size = sizeof(struct cb_framebuffer);
+
+		fb->x_resolution = vesa->x_resolution;
+		fb->y_resolution = vesa->y_resolution;
+		fb->bits_per_pixel = vesa->bits_per_pixel;
+		fb->bytes_per_line = vesa->bytes_per_scanline;
+		fb->physical_address = vesa->phys_base_ptr;
+		fb->red_mask_size = vesa->red_mask_size;
+		fb->red_mask_pos = vesa->red_mask_pos;
+		fb->green_mask_size = vesa->green_mask_size;
+		fb->green_mask_pos = vesa->green_mask_pos;
+		fb->blue_mask_size = vesa->blue_mask_size;
+		fb->blue_mask_pos = vesa->blue_mask_pos;
+		fb->reserved_mask_size = vesa->reserved_mask_size;
+		fb->reserved_mask_pos = vesa->reserved_mask_pos;
+
+		cbr = (struct cb_record *)cb_table_add_entry(cbh, cbr);
+	}
+
+	cb_table_finalize(cbh);
+}
-- 
1.8.2.1

[U-Boot] [PATCH 10/12] x86: Support booting SeaBIOS

[Bin Meng]

SeaBIOS is an open source implementation of a 16-bit x86 BIOS.
It can run in an emulator or natively on x86 hardware with the
use of coreboot. With SeaBIOS's help, we can boot some OSes
that require 16-bit BIOS services like Windows/DOS.

As U-Boot, we have to manually create a table where SeaBIOS gets
system information (eg: E820) from. The table unfortunately has
to follow the coreboot table format as SeaBIOS currently supports
booting as a coreboot payload.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/Kconfig              | 10 ++++++++++
 arch/x86/include/asm/tables.h |  3 +++
 arch/x86/lib/tables.c         | 15 +++++++++++++++
 3 files changed, 28 insertions(+)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a0bd344..5fad794 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -449,6 +449,16 @@ config I8042_KEYB
 config DM_KEYBOARD
 	default y
 
+config SEABIOS
+	bool "Support booting SeaBIOS"
+	help
+	  SeaBIOS is an open source implementation of a 16-bit X86 BIOS.
+	  It can run in an emulator or natively on X86 hardware with the use
+	  of coreboot/U-Boot. By turning on this option, U-Boot prepares
+	  all the configuration tables that are necessary to boot SeaBIOS.
+
+	  Check http://www.seabios.org/SeaBIOS for details.
+
 source "arch/x86/lib/efi/Kconfig"
 
 endmenu
diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h
index 9e6754f..ae9f0d0 100644
--- a/arch/x86/include/asm/tables.h
+++ b/arch/x86/include/asm/tables.h
@@ -16,6 +16,9 @@
 
 #define ROM_TABLE_ALIGN	1024
 
+/* SeaBIOS expects coreboot tables at address range 0x0000-0x1000 */
+#define CB_TABLE_ADDR	0x800
+
 /**
  * table_compute_checksum() - Compute a table checksum
  *
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index eccef8a..a156f2c 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -10,6 +10,7 @@
 #include <asm/smbios.h>
 #include <asm/tables.h>
 #include <asm/acpi_table.h>
+#include <asm/coreboot_tables.h>
 
 /**
  * Function prototype to write a specific configuration table
@@ -67,22 +68,36 @@ void write_tables(void)
 {
 	u32 rom_table_start = ROM_TABLE_ADDR;
 	u32 rom_table_end;
+#ifdef CONFIG_SEABIOS
 	u32 high_table, table_size;
+	struct memory_area cfg_tables[ARRAY_SIZE(table_write_funcs) + 1];
+#endif
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) {
 		rom_table_end = table_write_funcs[i](rom_table_start);
 		rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
 
+#ifdef CONFIG_SEABIOS
 		table_size = rom_table_end - rom_table_start;
 		high_table = (u32)memalign(ROM_TABLE_ALIGN, table_size);
 		if (high_table) {
 			memset((void *)high_table, 0, table_size);
 			table_write_funcs[i](high_table);
+
+			cfg_tables[i].start = high_table;
+			cfg_tables[i].size = table_size;
 		} else {
 			printf("%d: no memory for configuration tables\n", i);
 		}
+#endif
 
 		rom_table_start = rom_table_end;
 	}
+
+#ifdef CONFIG_SEABIOS
+	/* make sure the last item is zero */
+	cfg_tables[i].size = 0;
+	write_coreboot_table(CB_TABLE_ADDR, cfg_tables);
+#endif
 }
-- 
1.8.2.1

[U-Boot] [PATCH 11/12] x86: qemu: Enable ACPI table generation by default

[Bin Meng]

Now that ACPI is supported on QEMU, enable it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 configs/qemu-x86_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index b0c935c..f0e6512 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -4,6 +4,7 @@ CONFIG_SMP=y
 CONFIG_MAX_CPUS=2
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_ACPI_TABLE=y
 CONFIG_CMD_CPU=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
-- 
1.8.2.1

[U-Boot] [PATCH 12/12] x86: Document how to play with SeaBIOS

[Bin Meng]

Boting SeaBIOS is done via U-Boot's bootelf command. Document this.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

 doc/README.x86 | 49 +++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 47 insertions(+), 2 deletions(-)

diff --git a/doc/README.x86 b/doc/README.x86
index d3fea5d..4b6ad42 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -669,6 +669,50 @@ environment variables if you add this to minnowmax.h:
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
 
+Test with SeaBIOS
+-----------------
+SeaBIOS [14] is an open source implementation of a 16-bit x86 BIOS. It can run
+in an emulator or natively on x86 hardware with the use of U-Boot. With its
+help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS.
+
+As U-Boot, we have to manually create a table where SeaBIOS gets various system
+information (eg: E820) from. The table unfortunately has to follow the coreboot
+table format as SeaBIOS currently supports booting as a coreboot payload.
+
+Booting SeaBIOS is done via U-Boot's bootelf command, like below:
+
+   => tftp bios.bin.elf;bootelf
+   Using e1000#0 device
+   TFTP from server 10.10.0.100; our IP address is 10.10.0.108
+   ...
+   Bytes transferred = 122124 (1dd0c hex)
+   ## Starting application at 0x000ff06e ...
+   SeaBIOS (version rel-1.9.0)
+   ...
+
+bios.bin.elf is the SeaBIOS image built from SeaBIOS source tree.
+Make sure it is built as follows:
+
+   $ make menuconfig
+
+Inside the "General Features" menu, select "Build for coreboot" as the
+"Build Target". Inside the "Debugging" menu, turn on "Serial port debugging"
+so that we can see something as soon as SeaBIOS boots. Leave other options
+as in their default state. Then,
+
+   $ make
+   ...
+   Total size: 121888  Fixed: 66496  Free: 9184 (used 93.0% of 128KiB rom)
+   Creating out/bios.bin.elf
+
+Currently this is tested on QEMU x86 target with U-Boot chain-loading SeaBIOS
+to install/boot a Windows XP OS (below for example command to install Windows).
+
+   $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -cdrom winxp.iso -smp 2 -m 512
+
+This is also tested on Intel Crown Bay board with a PCIe graphics card, booting
+SeaBIOS then chain-loading a GRUB on a USB drive, then Linux kernel finally.
+
 
 Development Flow
 ----------------
@@ -736,7 +780,7 @@ debug serial port may be useful here. See setup_internal_uart() for an example.
 During the U-Boot porting, one of the important steps is to write correct PIRQ
 routing information in the board device tree. Without it, device drivers in the
 Linux kernel won't function correctly due to interrupt is not working. Please
-refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router.
+refer to U-Boot doc [15] for the device tree bindings of Intel interrupt router.
 Here we have more details on the intel,pirq-routing property below.
 
 	intel,pirq-routing = <
@@ -833,4 +877,5 @@ References
 [11] https://en.wikipedia.org/wiki/GUID_Partition_Table
 [12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
 [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
-[14] doc/device-tree-bindings/misc/intel,irq-router.txt
+[14] http://www.seabios.org/SeaBIOS
+[15] doc/device-tree-bindings/misc/intel,irq-router.txt
-- 
1.8.2.1

[U-Boot] [PATCH 01/12] x86: Move asm/arch-coreboot/tables.h to a common place

[Simon Glass]

On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
> Move asm/arch-coreboot/tables.h to asm/coreboot_tables.h so that
> coreboot table definitions can be used by other x86 builds.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/cpu/coreboot/sdram.c                                      | 1 -
>  arch/x86/cpu/coreboot/tables.c                                     | 1 -
>  arch/x86/include/asm/arch-coreboot/sysinfo.h                       | 2 +-
>  arch/x86/include/asm/{arch-coreboot/tables.h => coreboot_tables.h} | 0
>  drivers/video/coreboot_fb.c                                        | 1 -
>  5 files changed, 1 insertion(+), 4 deletions(-)
>  rename arch/x86/include/asm/{arch-coreboot/tables.h => coreboot_tables.h} (100%)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 02/12] x86: Move sysinfo related to sysinfo.h

[Simon Glass]

On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
> coreboot_tables.h should not include sysinfo related stuff.
> Move those to asm/arch-coreboot/sysinfo.h.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/include/asm/arch-coreboot/sysinfo.h | 2 ++
>  arch/x86/include/asm/coreboot_tables.h       | 4 ----
>  2 files changed, 2 insertions(+), 4 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 03/12] x86: Clean up coreboot_tables.h

[Simon Glass]

On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
> Clean up this file a little bit:
> - Remove inclusion of <linux/compiler.h>
> - Use tab in the macro definition
> - Remove table definitions that are not needed
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/include/asm/coreboot_tables.h | 153 +++++++++++++++++----------------
>  1 file changed, 80 insertions(+), 73 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 04/12] x86: Change to use start/end address pair in write_tables()

[Simon Glass]

On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
> Add a new variable rom_table_start and pass it to ROM table write
> routines. This reads better than previous single rom_table_end.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/lib/tables.c | 18 ++++++++++++------
>  1 file changed, 12 insertions(+), 6 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 05/12] x86: Use a macro for ROM table alignment

[Simon Glass]

On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
> Define ROM_TABLE_ALIGN instead of using 1024 directly.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/include/asm/tables.h |  2 ++
>  arch/x86/lib/tables.c         | 10 +++++-----
>  2 files changed, 7 insertions(+), 5 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 06/12] x86: Change write_acpi_tables() signature a little bit

[Simon Glass]

On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
> Change the parameter and return value of write_acpi_tables() to u32
> to conform with other table write routines.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/cpu/qemu/fw_cfg.c        | 5 ++---
>  arch/x86/include/asm/acpi_table.h | 2 +-
>  arch/x86/lib/acpi_table.c         | 4 ++--
>  3 files changed, 5 insertions(+), 6 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 07/12] x86: Simplify codes in write_tables()

[Simon Glass]

On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
> Given all table write routines have the same signature, we can use
> simplify the codes by using a function table.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/lib/tables.c | 61 ++++++++++++++++++++++++++++-----------------------
>  1 file changed, 34 insertions(+), 27 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

We could even use a linker list.

[U-Boot] [PATCH 08/12] x86: Support writing configuration tables in high area

[Simon Glass]

On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
> For those secondary bootloaders like SeaBIOS who want to live in
> the F segment, which conflicts the configuration table address,
> now we allow write_tables() to write the configuration tables in
> high area (malloc'ed memory).
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/lib/tables.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 09/12] x86: Implement functions for writing coreboot table

[Simon Glass]

On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
> To prepare generating coreboot table from U-Boot, implement functions
> to handle the writing.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/include/asm/coreboot_tables.h |  10 +++
>  arch/x86/lib/Makefile                  |   1 +
>  arch/x86/lib/coreboot_table.c          | 136 +++++++++++++++++++++++++++++++++
>  3 files changed, 147 insertions(+)
>  create mode 100644 arch/x86/lib/coreboot_table.c

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 11/12] x86: qemu: Enable ACPI table generation by default

[Simon Glass]

On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
> Now that ACPI is supported on QEMU, enable it.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  configs/qemu-x86_defconfig | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 12/12] x86: Document how to play with SeaBIOS

[Simon Glass]

On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
> Boting SeaBIOS is done via U-Boot's bootelf command. Document this.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
>  doc/README.x86 | 49 +++++++++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 47 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

I think it would be good to add instructions on creating disk.img.

Also, when I ran this (64-bit ubuntu) I get:

qemu-system-i386 -serial stdio -bios ~/u/b/qemu-x86/u-boot.rom -hda
disk.img -cdrom /vid/software/win/winxp.iso -smp 2 -m 512
WARNING: Image format was not specified for 'disk.img' and probing guessed raw.
         Automatically detecting the format is dangerous for raw
images, write operations on block 0 will be restricted.
         Specify the 'raw' format explicitly to remove the restrictions.


U-Boot 2016.03-rc2-00072-g67c4eef (Feb 28 2016 - 21:13:33 -0700)

CPU: x86, vendor Intel, device 663h
DRAM:  512 MiB
Using default environment

Video: 640x480x16
Model: QEMU x86 (I440FX)
Net:   e1000: 52:54:00:12:34:56

Warning: e1000#0 using MAC address from ROM
eth0: e1000#0
IDE:   Bus 0: OK Bus 1: OK
  Device 0: Model: QEMU HARDDISK  Firm: 2.3.90 Ser#: QM00001
            Type: Hard Disk
            Supports 48-bit addressing
            Capacity: 2048.0 MB = 2.0 GB (4194304 x 512)
  Device 1: not available
  Device 2: Model: QEMU Firm: 2.3. Ser#: QEMU DVD-ROM
            Type: Removable CD ROM
            Capacity: 585.2 MB = 0.5 GB (299648 x 2048)
qemu: fatal: Trying to execute code outside RAM or ROM at 0xf10002ba

EAX=5bfb0000 EBX=0000f8ec ECX=00000ff3 EDX=00000000
ESI=00000002 EDI=c8000014 EBP=1ffceea5 ESP=00000005
EIP=f10002ba EFL=00000246 [---Z-P-] CPL=0 II=0 A20=1 SMM=0 HLT=0
ES =0000 00000000 00000000 00000000
CS =0010 00000000 ffffffff 00cf9b00 DPL=0 CS32 [-RA]
SS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
DS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
FS =0020 1fd67dc8 ffffffff 00cf9300 DPL=0 DS   [-WA]
GS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
GDT=     1fd67d80 00000047
IDT=     1ffce470 000007ff
CR0=00000033 CR2=00000000 CR3=00000000 CR4=00000000
DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
DR6=ffff0ff0 DR7=00000400
CCS=5bfb0000 CCD=5bfb0000 CCO=ADDB
EFER=0000000000000000
FCW=037f FSW=0000 [ST=0] FTW=00 MXCSR=00001f80
FPR0=0000000000000000 0000 FPR1=0000000000000000 0000
FPR2=0000000000000000 0000 FPR3=0000000000000000 0000
FPR4=0000000000000000 0000 FPR5=0000000000000000 0000
FPR6=0000000000000000 0000 FPR7=0000000000000000 0000
XMM00=00000000000000000000000000000000 XMM01=00000000000000000000000000000000
XMM02=00000000000000000000000000000000 XMM03=00000000000000000000000000000000
XMM04=00000000000000000000000000000000 XMM05=00000000000000000000000000000000
XMM06=00000000000000000000000000000000 XMM07=00000000000000000000000000000000
Aborted

Regards,
Simon

[U-Boot] [PATCH 12/12] x86: Document how to play with SeaBIOS

[Bin Meng]

Hi Simon,

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Boting SeaBIOS is done via U-Boot's bootelf command. Document this.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>>  doc/README.x86 | 49 +++++++++++++++++++++++++++++++++++++++++++++++--
>>  1 file changed, 47 insertions(+), 2 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> I think it would be good to add instructions on creating disk.img.

Sure.

>
> Also, when I ran this (64-bit ubuntu) I get:
>
> qemu-system-i386 -serial stdio -bios ~/u/b/qemu-x86/u-boot.rom -hda
> disk.img -cdrom /vid/software/win/winxp.iso -smp 2 -m 512
> WARNING: Image format was not specified for 'disk.img' and probing guessed raw.
>          Automatically detecting the format is dangerous for raw
> images, write operations on block 0 will be restricted.
>          Specify the 'raw' format explicitly to remove the restrictions.
>
>
> U-Boot 2016.03-rc2-00072-g67c4eef (Feb 28 2016 - 21:13:33 -0700)
>
> CPU: x86, vendor Intel, device 663h
> DRAM:  512 MiB
> Using default environment
>
> Video: 640x480x16
> Model: QEMU x86 (I440FX)
> Net:   e1000: 52:54:00:12:34:56
>
> Warning: e1000#0 using MAC address from ROM
> eth0: e1000#0
> IDE:   Bus 0: OK Bus 1: OK
>   Device 0: Model: QEMU HARDDISK  Firm: 2.3.90 Ser#: QM00001
>             Type: Hard Disk
>             Supports 48-bit addressing
>             Capacity: 2048.0 MB = 2.0 GB (4194304 x 512)
>   Device 1: not available
>   Device 2: Model: QEMU Firm: 2.3. Ser#: QEMU DVD-ROM
>             Type: Removable CD ROM
>             Capacity: 585.2 MB = 0.5 GB (299648 x 2048)
> qemu: fatal: Trying to execute code outside RAM or ROM at 0xf10002ba
>
> EAX=5bfb0000 EBX=0000f8ec ECX=00000ff3 EDX=00000000
> ESI=00000002 EDI=c8000014 EBP=1ffceea5 ESP=00000005
> EIP=f10002ba EFL=00000246 [---Z-P-] CPL=0 II=0 A20=1 SMM=0 HLT=0
> ES =0000 00000000 00000000 00000000
> CS =0010 00000000 ffffffff 00cf9b00 DPL=0 CS32 [-RA]
> SS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
> DS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
> FS =0020 1fd67dc8 ffffffff 00cf9300 DPL=0 DS   [-WA]
> GS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
> LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
> TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
> GDT=     1fd67d80 00000047
> IDT=     1ffce470 000007ff
> CR0=00000033 CR2=00000000 CR3=00000000 CR4=00000000
> DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
> DR6=ffff0ff0 DR7=00000400
> CCS=5bfb0000 CCD=5bfb0000 CCO=ADDB
> EFER=0000000000000000
> FCW=037f FSW=0000 [ST=0] FTW=00 MXCSR=00001f80
> FPR0=0000000000000000 0000 FPR1=0000000000000000 0000
> FPR2=0000000000000000 0000 FPR3=0000000000000000 0000
> FPR4=0000000000000000 0000 FPR5=0000000000000000 0000
> FPR6=0000000000000000 0000 FPR7=0000000000000000 0000
> XMM00=00000000000000000000000000000000 XMM01=00000000000000000000000000000000
> XMM02=00000000000000000000000000000000 XMM03=00000000000000000000000000000000
> XMM04=00000000000000000000000000000000 XMM05=00000000000000000000000000000000
> XMM06=00000000000000000000000000000000 XMM07=00000000000000000000000000000000
> Aborted
>

Which QEMU version is this on your Ubuntu?

Regards,
Bin

[U-Boot] [PATCH 01/12] x86: Move asm/arch-coreboot/tables.h to a common place

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Move asm/arch-coreboot/tables.h to asm/coreboot_tables.h so that
>> coreboot table definitions can be used by other x86 builds.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/cpu/coreboot/sdram.c                                      | 1 -
>>  arch/x86/cpu/coreboot/tables.c                                     | 1 -
>>  arch/x86/include/asm/arch-coreboot/sysinfo.h                       | 2 +-
>>  arch/x86/include/asm/{arch-coreboot/tables.h => coreboot_tables.h} | 0
>>  drivers/video/coreboot_fb.c                                        | 1 -
>>  5 files changed, 1 insertion(+), 4 deletions(-)
>>  rename arch/x86/include/asm/{arch-coreboot/tables.h => coreboot_tables.h} (100%)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 02/12] x86: Move sysinfo related to sysinfo.h

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
>> coreboot_tables.h should not include sysinfo related stuff.
>> Move those to asm/arch-coreboot/sysinfo.h.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/include/asm/arch-coreboot/sysinfo.h | 2 ++
>>  arch/x86/include/asm/coreboot_tables.h       | 4 ----
>>  2 files changed, 2 insertions(+), 4 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 03/12] x86: Clean up coreboot_tables.h

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Clean up this file a little bit:
>> - Remove inclusion of <linux/compiler.h>
>> - Use tab in the macro definition
>> - Remove table definitions that are not needed
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/include/asm/coreboot_tables.h | 153 +++++++++++++++++----------------
>>  1 file changed, 80 insertions(+), 73 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 04/12] x86: Change to use start/end address pair in write_tables()

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Add a new variable rom_table_start and pass it to ROM table write
>> routines. This reads better than previous single rom_table_end.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/lib/tables.c | 18 ++++++++++++------
>>  1 file changed, 12 insertions(+), 6 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 05/12] x86: Use a macro for ROM table alignment

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:57, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Define ROM_TABLE_ALIGN instead of using 1024 directly.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/include/asm/tables.h |  2 ++
>>  arch/x86/lib/tables.c         | 10 +++++-----
>>  2 files changed, 7 insertions(+), 5 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 06/12] x86: Change write_acpi_tables() signature a little bit

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Change the parameter and return value of write_acpi_tables() to u32
>> to conform with other table write routines.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/cpu/qemu/fw_cfg.c        | 5 ++---
>>  arch/x86/include/asm/acpi_table.h | 2 +-
>>  arch/x86/lib/acpi_table.c         | 4 ++--
>>  3 files changed, 5 insertions(+), 6 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 07/12] x86: Simplify codes in write_tables()

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Given all table write routines have the same signature, we can use
>> simplify the codes by using a function table.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/lib/tables.c | 61 ++++++++++++++++++++++++++++-----------------------
>>  1 file changed, 34 insertions(+), 27 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> We could even use a linker list.

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 08/12] x86: Support writing configuration tables in high area

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
>> For those secondary bootloaders like SeaBIOS who want to live in
>> the F segment, which conflicts the configuration table address,
>> now we allow write_tables() to write the configuration tables in
>> high area (malloc'ed memory).
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/lib/tables.c | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 09/12] x86: Implement functions for writing coreboot table

[Bin Meng]

On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
> On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
>> To prepare generating coreboot table from U-Boot, implement functions
>> to handle the writing.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/include/asm/coreboot_tables.h |  10 +++
>>  arch/x86/lib/Makefile                  |   1 +
>>  arch/x86/lib/coreboot_table.c          | 136 +++++++++++++++++++++++++++++++++
>>  3 files changed, 147 insertions(+)
>>  create mode 100644 arch/x86/lib/coreboot_table.c
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86/next, thanks!

[U-Boot] [PATCH 12/12] x86: Document how to play with SeaBIOS

[Simon Glass]

Hi Bin,

On 29 February 2016 at 00:21, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
>> On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> Boting SeaBIOS is done via U-Boot's bootelf command. Document this.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>
>>> ---
>>>
>>>  doc/README.x86 | 49 +++++++++++++++++++++++++++++++++++++++++++++++--
>>>  1 file changed, 47 insertions(+), 2 deletions(-)
>>
>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>
>> I think it would be good to add instructions on creating disk.img.
>
> Sure.
>
>>
>> Also, when I ran this (64-bit ubuntu) I get:
>>
>> qemu-system-i386 -serial stdio -bios ~/u/b/qemu-x86/u-boot.rom -hda
>> disk.img -cdrom /vid/software/win/winxp.iso -smp 2 -m 512
>> WARNING: Image format was not specified for 'disk.img' and probing guessed raw.
>>          Automatically detecting the format is dangerous for raw
>> images, write operations on block 0 will be restricted.
>>          Specify the 'raw' format explicitly to remove the restrictions.
>>
>>
>> U-Boot 2016.03-rc2-00072-g67c4eef (Feb 28 2016 - 21:13:33 -0700)
>>
>> CPU: x86, vendor Intel, device 663h
>> DRAM:  512 MiB
>> Using default environment
>>
>> Video: 640x480x16
>> Model: QEMU x86 (I440FX)
>> Net:   e1000: 52:54:00:12:34:56
>>
>> Warning: e1000#0 using MAC address from ROM
>> eth0: e1000#0
>> IDE:   Bus 0: OK Bus 1: OK
>>   Device 0: Model: QEMU HARDDISK  Firm: 2.3.90 Ser#: QM00001
>>             Type: Hard Disk
>>             Supports 48-bit addressing
>>             Capacity: 2048.0 MB = 2.0 GB (4194304 x 512)
>>   Device 1: not available
>>   Device 2: Model: QEMU Firm: 2.3. Ser#: QEMU DVD-ROM
>>             Type: Removable CD ROM
>>             Capacity: 585.2 MB = 0.5 GB (299648 x 2048)
>> qemu: fatal: Trying to execute code outside RAM or ROM at 0xf10002ba
>>
>> EAX=5bfb0000 EBX=0000f8ec ECX=00000ff3 EDX=00000000
>> ESI=00000002 EDI=c8000014 EBP=1ffceea5 ESP=00000005
>> EIP=f10002ba EFL=00000246 [---Z-P-] CPL=0 II=0 A20=1 SMM=0 HLT=0
>> ES =0000 00000000 00000000 00000000
>> CS =0010 00000000 ffffffff 00cf9b00 DPL=0 CS32 [-RA]
>> SS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
>> DS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
>> FS =0020 1fd67dc8 ffffffff 00cf9300 DPL=0 DS   [-WA]
>> GS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
>> LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
>> TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
>> GDT=     1fd67d80 00000047
>> IDT=     1ffce470 000007ff
>> CR0=00000033 CR2=00000000 CR3=00000000 CR4=00000000
>> DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
>> DR6=ffff0ff0 DR7=00000400
>> CCS=5bfb0000 CCD=5bfb0000 CCO=ADDB
>> EFER=0000000000000000
>> FCW=037f FSW=0000 [ST=0] FTW=00 MXCSR=00001f80
>> FPR0=0000000000000000 0000 FPR1=0000000000000000 0000
>> FPR2=0000000000000000 0000 FPR3=0000000000000000 0000
>> FPR4=0000000000000000 0000 FPR5=0000000000000000 0000
>> FPR6=0000000000000000 0000 FPR7=0000000000000000 0000
>> XMM00=00000000000000000000000000000000 XMM01=00000000000000000000000000000000
>> XMM02=00000000000000000000000000000000 XMM03=00000000000000000000000000000000
>> XMM04=00000000000000000000000000000000 XMM05=00000000000000000000000000000000
>> XMM06=00000000000000000000000000000000 XMM07=00000000000000000000000000000000
>> Aborted
>>
>
> Which QEMU version is this on your Ubuntu?

I am using:

QEMU emulator version 2.3.90, Copyright (c) 2003-2008 Fabrice Bellard

It seems to be the winxp.iso that kills it. Maybe mind is broken? I'm
pretty sure I have installed from it ages ago though.

Regards,
Simon

[U-Boot] [PATCH 12/12] x86: Document how to play with SeaBIOS

[Bin Meng]

Hi Simon,

On Tue, Mar 1, 2016 at 10:03 AM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 29 February 2016 at 00:21, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Hi Simon,
>>
>> On Mon, Feb 29, 2016 at 12:19 PM, Simon Glass <sjg@chromium.org> wrote:
>>> On 27 February 2016 at 23:58, Bin Meng <bmeng.cn@gmail.com> wrote:
>>>> Boting SeaBIOS is done via U-Boot's bootelf command. Document this.
>>>>
>>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>>
>>>> ---
>>>>
>>>>  doc/README.x86 | 49 +++++++++++++++++++++++++++++++++++++++++++++++--
>>>>  1 file changed, 47 insertions(+), 2 deletions(-)
>>>
>>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>>
>>> I think it would be good to add instructions on creating disk.img.
>>
>> Sure.
>>
>>>
>>> Also, when I ran this (64-bit ubuntu) I get:
>>>
>>> qemu-system-i386 -serial stdio -bios ~/u/b/qemu-x86/u-boot.rom -hda
>>> disk.img -cdrom /vid/software/win/winxp.iso -smp 2 -m 512
>>> WARNING: Image format was not specified for 'disk.img' and probing guessed raw.
>>>          Automatically detecting the format is dangerous for raw
>>> images, write operations on block 0 will be restricted.
>>>          Specify the 'raw' format explicitly to remove the restrictions.
>>>
>>>
>>> U-Boot 2016.03-rc2-00072-g67c4eef (Feb 28 2016 - 21:13:33 -0700)
>>>
>>> CPU: x86, vendor Intel, device 663h
>>> DRAM:  512 MiB
>>> Using default environment
>>>
>>> Video: 640x480x16
>>> Model: QEMU x86 (I440FX)
>>> Net:   e1000: 52:54:00:12:34:56
>>>
>>> Warning: e1000#0 using MAC address from ROM
>>> eth0: e1000#0
>>> IDE:   Bus 0: OK Bus 1: OK
>>>   Device 0: Model: QEMU HARDDISK  Firm: 2.3.90 Ser#: QM00001
>>>             Type: Hard Disk
>>>             Supports 48-bit addressing
>>>             Capacity: 2048.0 MB = 2.0 GB (4194304 x 512)
>>>   Device 1: not available
>>>   Device 2: Model: QEMU Firm: 2.3. Ser#: QEMU DVD-ROM
>>>             Type: Removable CD ROM
>>>             Capacity: 585.2 MB = 0.5 GB (299648 x 2048)
>>> qemu: fatal: Trying to execute code outside RAM or ROM at 0xf10002ba
>>>
>>> EAX=5bfb0000 EBX=0000f8ec ECX=00000ff3 EDX=00000000
>>> ESI=00000002 EDI=c8000014 EBP=1ffceea5 ESP=00000005
>>> EIP=f10002ba EFL=00000246 [---Z-P-] CPL=0 II=0 A20=1 SMM=0 HLT=0
>>> ES =0000 00000000 00000000 00000000
>>> CS =0010 00000000 ffffffff 00cf9b00 DPL=0 CS32 [-RA]
>>> SS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
>>> DS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
>>> FS =0020 1fd67dc8 ffffffff 00cf9300 DPL=0 DS   [-WA]
>>> GS =0018 00000000 ffffffff 00cf9300 DPL=0 DS   [-WA]
>>> LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
>>> TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
>>> GDT=     1fd67d80 00000047
>>> IDT=     1ffce470 000007ff
>>> CR0=00000033 CR2=00000000 CR3=00000000 CR4=00000000
>>> DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
>>> DR6=ffff0ff0 DR7=00000400
>>> CCS=5bfb0000 CCD=5bfb0000 CCO=ADDB
>>> EFER=0000000000000000
>>> FCW=037f FSW=0000 [ST=0] FTW=00 MXCSR=00001f80
>>> FPR0=0000000000000000 0000 FPR1=0000000000000000 0000
>>> FPR2=0000000000000000 0000 FPR3=0000000000000000 0000
>>> FPR4=0000000000000000 0000 FPR5=0000000000000000 0000
>>> FPR6=0000000000000000 0000 FPR7=0000000000000000 0000
>>> XMM00=00000000000000000000000000000000 XMM01=00000000000000000000000000000000
>>> XMM02=00000000000000000000000000000000 XMM03=00000000000000000000000000000000
>>> XMM04=00000000000000000000000000000000 XMM05=00000000000000000000000000000000
>>> XMM06=00000000000000000000000000000000 XMM07=00000000000000000000000000000000
>>> Aborted
>>>
>>
>> Which QEMU version is this on your Ubuntu?
>
> I am using:
>
> QEMU emulator version 2.3.90, Copyright (c) 2003-2008 Fabrice Bellard

I am using QEMU 2.3.0, built from source.

> It seems to be the winxp.iso that kills it. Maybe mind is broken? I'm
> pretty sure I have installed from it ages ago though.
>

That's strange. Based on U-Boot log, it seems it just executes to a
place where the U-Boot IDE driver is probing the IDE devices (in this
case, a hard disk and a CD-ROM are identified), but somehow it crashed
without printing the 'Device 3', like my log below.

IDE:   Bus 0: OK Bus 1: OK
  Device 0: Model: QEMU HARDDISK  Firm: 2.3.0  Ser#: QM00001
            Type: Hard Disk
            Supports 48-bit addressing
            Capacity: 10240.0 MB = 10.0 GB (20971520 x 512)
  Device 1: not available
  Device 2: Model: QEMU Firm: 2.3. Ser#: QEMU DVD-ROM
            Type: Removable CD ROM
            Capacity: 694.4 MB = 0.6 GB (355541 x 2048)
  Device 3: not available
Hit any key to stop autoboot:  0

I have no idea, maybe it's something wrong with the iso, or QEMU version (?).

Regards,
Bin