* [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i
@ 2016-03-16 20:07 Hans de Goede
2016-03-16 20:07 ` [U-Boot] [PATCH 2/3] sunxi: Fix clock_twi_onoff for sun8i-a83 Hans de Goede
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Hans de Goede @ 2016-03-16 20:07 UTC (permalink / raw)
To: u-boot
The clock_sun6i.c implementation was not deasserting the reset for
the regular i2c controllers, this commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 700b605..4e1e1a4 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -100,13 +100,18 @@ int clock_twi_onoff(int port, int state)
return 0;
}
- /* set the apb clock gate for twi */
- if (state)
+ /* set the apb clock gate and reset for twi */
+ if (state) {
setbits_le32(&ccm->apb2_gate,
CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
- else
+ setbits_le32(&ccm->apb2_reset_cfg,
+ 1 << (APB2_RESET_TWI_SHIFT + port));
+ } else {
+ clrbits_le32(&ccm->apb2_reset_cfg,
+ 1 << (APB2_RESET_TWI_SHIFT + port));
clrbits_le32(&ccm->apb2_gate,
CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
+ }
return 0;
}
--
2.7.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH 2/3] sunxi: Fix clock_twi_onoff for sun8i-a83
2016-03-16 20:07 [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i Hans de Goede
@ 2016-03-16 20:07 ` Hans de Goede
2016-03-16 20:07 ` [U-Boot] [PATCH 3/3] sunxi: Fix clock_twi_onoff for sun9i Hans de Goede
2016-03-17 9:50 ` [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i Ian Campbell
2 siblings, 0 replies; 4+ messages in thread
From: Hans de Goede @ 2016-03-16 20:07 UTC (permalink / raw)
To: u-boot
clock_sun8i_a83.c did not contain a clock_twi_onoff implementation
at all, this is fixed by moving the clock_sun6i.c implementation,
which is correct for the a83 too, to a shared location.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
arch/arm/cpu/armv7/sunxi/clock.c | 35 ++++++++++++++++++++++++++++++++++
arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 31 ------------------------------
2 files changed, 35 insertions(+), 31 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
index 5cc5d25..0b8fc94 100644
--- a/arch/arm/cpu/armv7/sunxi/clock.c
+++ b/arch/arm/cpu/armv7/sunxi/clock.c
@@ -12,6 +12,7 @@
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
+#include <asm/arch/prcm.h>
#include <asm/arch/sys_proto.h>
__weak void clock_init_sec(void)
@@ -28,3 +29,37 @@ int clock_init(void)
return 0;
}
+
+/* These functions are shared between various SoCs so put them here. */
+#if defined CONFIG_SUNXI_GEN_SUN6I && !defined CONFIG_MACH_SUN9I
+int clock_twi_onoff(int port, int state)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ if (port == 5) {
+ if (state)
+ prcm_apb0_enable(
+ PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
+ else
+ prcm_apb0_disable(
+ PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
+ return 0;
+ }
+
+ /* set the apb clock gate and reset for twi */
+ if (state) {
+ setbits_le32(&ccm->apb2_gate,
+ CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port));
+ setbits_le32(&ccm->apb2_reset_cfg,
+ 1 << (APB2_RESET_TWI_SHIFT + port));
+ } else {
+ clrbits_le32(&ccm->apb2_reset_cfg,
+ 1 << (APB2_RESET_TWI_SHIFT + port));
+ clrbits_le32(&ccm->apb2_gate,
+ CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port));
+ }
+
+ return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 4e1e1a4..15272c9 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -85,37 +85,6 @@ void clock_init_uart(void)
#endif
}
-int clock_twi_onoff(int port, int state)
-{
- struct sunxi_ccm_reg *const ccm =
- (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
- if (port == 5) {
- if (state)
- prcm_apb0_enable(
- PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
- else
- prcm_apb0_disable(
- PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
- return 0;
- }
-
- /* set the apb clock gate and reset for twi */
- if (state) {
- setbits_le32(&ccm->apb2_gate,
- CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
- setbits_le32(&ccm->apb2_reset_cfg,
- 1 << (APB2_RESET_TWI_SHIFT + port));
- } else {
- clrbits_le32(&ccm->apb2_reset_cfg,
- 1 << (APB2_RESET_TWI_SHIFT + port));
- clrbits_le32(&ccm->apb2_gate,
- CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
- }
-
- return 0;
-}
-
#ifdef CONFIG_SPL_BUILD
void clock_set_pll1(unsigned int clk)
{
--
2.7.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH 3/3] sunxi: Fix clock_twi_onoff for sun9i
2016-03-16 20:07 [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i Hans de Goede
2016-03-16 20:07 ` [U-Boot] [PATCH 2/3] sunxi: Fix clock_twi_onoff for sun8i-a83 Hans de Goede
@ 2016-03-16 20:07 ` Hans de Goede
2016-03-17 9:50 ` [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i Ian Campbell
2 siblings, 0 replies; 4+ messages in thread
From: Hans de Goede @ 2016-03-16 20:07 UTC (permalink / raw)
To: u-boot
Fix a copy and paste error which caused us to use the uart rather then
the twi reset bits in clock_twi_onoff for sun9i.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
arch/arm/cpu/armv7/sunxi/clock_sun9i.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun9i.c b/arch/arm/cpu/armv7/sunxi/clock_sun9i.c
index 27179ba..180634c 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun9i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun9i.c
@@ -43,10 +43,10 @@ int clock_twi_onoff(int port, int state)
setbits_le32(&ccm->apb1_gate,
CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port));
setbits_le32(&ccm->apb1_reset_cfg,
- 1 << (APB1_RESET_UART_SHIFT + port));
+ 1 << (APB1_RESET_TWI_SHIFT + port));
} else {
clrbits_le32(&ccm->apb1_reset_cfg,
- 1 << (APB1_RESET_UART_SHIFT + port));
+ 1 << (APB1_RESET_TWI_SHIFT + port));
clrbits_le32(&ccm->apb1_gate,
CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port));
}
--
2.7.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i
2016-03-16 20:07 [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i Hans de Goede
2016-03-16 20:07 ` [U-Boot] [PATCH 2/3] sunxi: Fix clock_twi_onoff for sun8i-a83 Hans de Goede
2016-03-16 20:07 ` [U-Boot] [PATCH 3/3] sunxi: Fix clock_twi_onoff for sun9i Hans de Goede
@ 2016-03-17 9:50 ` Ian Campbell
2 siblings, 0 replies; 4+ messages in thread
From: Ian Campbell @ 2016-03-17 9:50 UTC (permalink / raw)
To: u-boot
On Wed, 2016-03-16 at 21:07 +0100, Hans de Goede wrote:
> The clock_sun6i.c implementation was not deasserting the reset for
> the regular i2c controllers, this commit fixes this.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
All 3 patches: Acked-by: Ian Campbell <ijc@hellion.org.uk>
> ---
> ?arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 11 ++++++++---
> ?1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
> b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
> index 700b605..4e1e1a4 100644
> --- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
> +++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
> @@ -100,13 +100,18 @@ int clock_twi_onoff(int port, int state)
> ? return 0;
> ? }
> ?
> - /* set the apb clock gate for twi */
> - if (state)
> + /* set the apb clock gate and reset for twi */
> + if (state) {
> ? setbits_le32(&ccm->apb2_gate,
> ? ?????CLK_GATE_OPEN <<
> (APB2_GATE_TWI_SHIFT+port));
> - else
> + setbits_le32(&ccm->apb2_reset_cfg,
> + ?????1 << (APB2_RESET_TWI_SHIFT + port));
> + } else {
> + clrbits_le32(&ccm->apb2_reset_cfg,
> + ?????1 << (APB2_RESET_TWI_SHIFT + port));
> ? clrbits_le32(&ccm->apb2_gate,
> ? ?????CLK_GATE_OPEN <<
> (APB2_GATE_TWI_SHIFT+port));
> + }
> ?
> ? return 0;
> ?}
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-03-17 9:50 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-03-16 20:07 [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i Hans de Goede
2016-03-16 20:07 ` [U-Boot] [PATCH 2/3] sunxi: Fix clock_twi_onoff for sun8i-a83 Hans de Goede
2016-03-16 20:07 ` [U-Boot] [PATCH 3/3] sunxi: Fix clock_twi_onoff for sun9i Hans de Goede
2016-03-17 9:50 ` [U-Boot] [PATCH 1/3] sunxi: Fix clock_twi_onoff for sun6i Ian Campbell
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.