* [U-Boot] [PATCH] [v3] armv8: fsl-layerscape: Updating entries in Serdes Table
@ 2016-03-18 11:44 Pratiyush Mohan Srivastava
2016-03-22 15:41 ` york sun
0 siblings, 1 reply; 2+ messages in thread
From: Pratiyush Mohan Srivastava @ 2016-03-18 11:44 UTC (permalink / raw)
To: u-boot
The serdes protocol entries in Serdes table 1 for protocol
0x03, 0x33, 0x35 and in Serdes table 2 for protocols 0x45
and 0x47 are updated to reflect the entries in
current Reference Manual.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Reported-by: Jose Rivera <german.rivera@nxp.com>
---
Changes for v3
Rebased to latest master Branch
arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
index ea3114c..eaa44a7 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
@@ -14,7 +14,7 @@ struct serdes_config {
static struct serdes_config serdes1_cfg_tbl[] = {
/* SerDes 1 */
- {0x03, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2 } },
+ {0x03, {PCIE2, PCIE2, PCIE2, PCIE2, PCIE1, PCIE1, PCIE1, PCIE1 } },
{0x05, {PCIE2, PCIE2, PCIE2, PCIE2, SGMII4, SGMII3, SGMII2, SGMII1 } },
{0x07, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2,
SGMII1 } },
@@ -31,9 +31,9 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0x2A, {XFI8, XFI7, XFI6, XFI5, XFI4, XFI3, XFI2, XFI1 } },
{0x2B, {SGMII8, SGMII7, SGMII6, SGMII5, XAUI1, XAUI1, XAUI1, XAUI1 } },
{0x32, {XAUI2, XAUI2, XAUI2, XAUI2, XAUI1, XAUI1, XAUI1, XAUI1 } },
- {0x33, {PCIE2, PCIE2, PCIE2, PCIE2, QSGMII_C, QSGMII_D, QSGMII_A,
- QSGMII_B} },
- {0x35, {QSGMII_C, QSGMII_D, QSGMII_A, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
+ {0x33, {PCIE2, PCIE2, PCIE2, PCIE2, QSGMII_D, QSGMII_C, QSGMII_B,
+ QSGMII_A} },
+ {0x35, {QSGMII_D, QSGMII_C, QSGMII_B, PCIE2, XFI4, XFI3, XFI2, XFI1 } },
{}
};
static struct serdes_config serdes2_cfg_tbl[] = {
@@ -56,10 +56,10 @@ static struct serdes_config serdes2_cfg_tbl[] = {
{0x42, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SATA1, SATA2 } },
{0x43, {PCIE3, PCIE3, PCIE3, PCIE3, NONE, NONE, SATA1, SATA2 } },
{0x44, {PCIE3, PCIE3, PCIE3, PCIE3, NONE, NONE, SATA1, SATA2 } },
- {0x45, {PCIE3, SGMII10, SGMII11, SGMII12, PCIE4, SGMII14, SGMII15,
- SGMII16 } },
- {0x47, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, PCIE4,
+ {0x45, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, PCIE4,
PCIE4 } },
+ {0x47, {PCIE3, SGMII10, SGMII11, SGMII12, PCIE4, SGMII14, SGMII15,
+ SGMII16 } },
{0x49, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
SATA2 } },
{0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
--
1.9.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH] [v3] armv8: fsl-layerscape: Updating entries in Serdes Table
2016-03-18 11:44 [U-Boot] [PATCH] [v3] armv8: fsl-layerscape: Updating entries in Serdes Table Pratiyush Mohan Srivastava
@ 2016-03-22 15:41 ` york sun
0 siblings, 0 replies; 2+ messages in thread
From: york sun @ 2016-03-22 15:41 UTC (permalink / raw)
To: u-boot
On 03/18/2016 04:44 AM, Pratiyush Mohan Srivastava wrote:
> The serdes protocol entries in Serdes table 1 for protocol
> 0x03, 0x33, 0x35 and in Serdes table 2 for protocols 0x45
> and 0x47 are updated to reflect the entries in
> current Reference Manual.
>
> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
> Reported-by: Jose Rivera <german.rivera@nxp.com>
> ---
> Changes for v3
> Rebased to latest master Branch
>
> arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
Applied to u-boot-fsl-qoriq, awaiting upstream.
Thanks.
York
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2016-03-18 11:44 [U-Boot] [PATCH] [v3] armv8: fsl-layerscape: Updating entries in Serdes Table Pratiyush Mohan Srivastava
2016-03-22 15:41 ` york sun
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