* [PATCH v3 00/16] DTS for hi6220 and HiKey
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Guodong Xu
This patchset include dts changes for hi6220 SoC and HiKey board. These
patches apply well one by one on top of next-20160401. All tested on HiKey
and pass.
To avoid merge conflicts with patches already ack'ed by maintainers,
I picked all hi6220/hikey dts related patches into this single patchset.
And they passed the tests on HiKey.
Patch 1~3 are from hi6220 cpuidle support. It has been reviewed and
ack'ed in maillist.
[PATCH v2 RESEND 0/4] arm64: Hi6220: enable CPU idle states:
http://archive.arm.linux.org.uk/lurker/message/20160121.105346.7d3b0470.en.html
Patch 4 is for hi6220 gpio.
Patch 5 is for pinctl.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Patch 6 is for spi configuration.
Patch 7 adds hi6220 i2c nodes, and
patch 8 enables them for hikey board usage.
Patch 9 adds add hi6220 usb node. It has been sent to maillist.
[PATCH] arm64: dts: add hi6220 usb node
http://thread.gmane.org/gmane.linux.drivers.devicetree/146062
http://thread.gmane.org/gmane.linux.drivers.devicetree/144335/focus=134022
Acked-by: Rob Herring <robh@kernel.org>
Patch 10 and 11 are from hi6220 mailbox support. It has been reviewed and
ack'ed in maillist.
[PATCH v7 RESEND 0/4] mailbox: hisilicon: add Hi6220 mailbox driver
http://thread.gmane.org/gmane.linux.kernel/2152759/focus=2152768
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Patch 13 adds gpio LEDs device nodes.
Patch 14 adds hi655x pmic dts node and regulator support.
[PATCH v8 5/5] arm64: dts: hisilicon: Add hi655x pmic dts node
http://thread.gmane.org/gmane.linux.kernel/2151688
Acked-by: Lee Jones <lee.jones@linaro.org>
Patch 15 adds dwmmc nodes description for hi6220. It refers to two LDO's
which are defined above.
Patch 16 adds wifi device node (TI's wl1835) for HiKey board.
v3:
- update patch 2 sp804 clocks and clock-names
- add Acked-by into commits where applies.
v2:
- picked hi655x pmic dts node.
- removed dw_mmc resets property, as it is still under review.
- add 'non-removable' into dw_mmc2 for wifi
Chen Feng (1):
arm64: dts: hikey: Add hi655x pmic dts node
Guodong Xu (4):
arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine
boards
arm64: dts: hi6220: add pinctrl for uarts and enable them
arm64: dts: add LED nodes for hi6220-hikey
arm64: dts: add wifi nodes support for hi6220-hikey
Leo Yan (5):
arm64: dts: Reserve memory regions for hi6220
arm64: dts: add sp804 timer node for Hi6220
arm64: dts: enable idle states for Hi6220
arm64: dts: add mailbox node for Hi6220
arm64: dts: add Hi6220's stub clock node
Xinwei Kong (2):
arm64: dts: add all hi6220 i2c nodes
arm64: dts: add dwmmc nodes for hi6220
Zhangfei Gao (1):
arm64: dts: add hi6220 usb node
Zhong Kaihua (3):
arm64: dts: Add Hi6220 gpio configuration nodes
arm64: dts: add Hi6220 pinctrl configuration nodes
arm64: dts: add Hi6220 spi configuration nodes
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 198 ++++++-
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 584 +++++++++++++++++++
arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi | 607 +++++++++++++++++++
arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi | 705 +++++++++++++++++++++++
include/dt-bindings/pinctrl/hisi.h | 59 ++
5 files changed, 2149 insertions(+), 4 deletions(-)
create mode 100644 arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
create mode 100644 arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
create mode 100644 include/dt-bindings/pinctrl/hisi.h
--
1.9.1
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 00/16] DTS for hi6220 and HiKey
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
This patchset include dts changes for hi6220 SoC and HiKey board. These
patches apply well one by one on top of next-20160401. All tested on HiKey
and pass.
To avoid merge conflicts with patches already ack'ed by maintainers,
I picked all hi6220/hikey dts related patches into this single patchset.
And they passed the tests on HiKey.
Patch 1~3 are from hi6220 cpuidle support. It has been reviewed and
ack'ed in maillist.
[PATCH v2 RESEND 0/4] arm64: Hi6220: enable CPU idle states:
http://archive.arm.linux.org.uk/lurker/message/20160121.105346.7d3b0470.en.html
Patch 4 is for hi6220 gpio.
Patch 5 is for pinctl.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Patch 6 is for spi configuration.
Patch 7 adds hi6220 i2c nodes, and
patch 8 enables them for hikey board usage.
Patch 9 adds add hi6220 usb node. It has been sent to maillist.
[PATCH] arm64: dts: add hi6220 usb node
http://thread.gmane.org/gmane.linux.drivers.devicetree/146062
http://thread.gmane.org/gmane.linux.drivers.devicetree/144335/focus=134022
Acked-by: Rob Herring <robh@kernel.org>
Patch 10 and 11 are from hi6220 mailbox support. It has been reviewed and
ack'ed in maillist.
[PATCH v7 RESEND 0/4] mailbox: hisilicon: add Hi6220 mailbox driver
http://thread.gmane.org/gmane.linux.kernel/2152759/focus=2152768
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Patch 13 adds gpio LEDs device nodes.
Patch 14 adds hi655x pmic dts node and regulator support.
[PATCH v8 5/5] arm64: dts: hisilicon: Add hi655x pmic dts node
http://thread.gmane.org/gmane.linux.kernel/2151688
Acked-by: Lee Jones <lee.jones@linaro.org>
Patch 15 adds dwmmc nodes description for hi6220. It refers to two LDO's
which are defined above.
Patch 16 adds wifi device node (TI's wl1835) for HiKey board.
v3:
- update patch 2 sp804 clocks and clock-names
- add Acked-by into commits where applies.
v2:
- picked hi655x pmic dts node.
- removed dw_mmc resets property, as it is still under review.
- add 'non-removable' into dw_mmc2 for wifi
Chen Feng (1):
arm64: dts: hikey: Add hi655x pmic dts node
Guodong Xu (4):
arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine
boards
arm64: dts: hi6220: add pinctrl for uarts and enable them
arm64: dts: add LED nodes for hi6220-hikey
arm64: dts: add wifi nodes support for hi6220-hikey
Leo Yan (5):
arm64: dts: Reserve memory regions for hi6220
arm64: dts: add sp804 timer node for Hi6220
arm64: dts: enable idle states for Hi6220
arm64: dts: add mailbox node for Hi6220
arm64: dts: add Hi6220's stub clock node
Xinwei Kong (2):
arm64: dts: add all hi6220 i2c nodes
arm64: dts: add dwmmc nodes for hi6220
Zhangfei Gao (1):
arm64: dts: add hi6220 usb node
Zhong Kaihua (3):
arm64: dts: Add Hi6220 gpio configuration nodes
arm64: dts: add Hi6220 pinctrl configuration nodes
arm64: dts: add Hi6220 spi configuration nodes
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 198 ++++++-
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 584 +++++++++++++++++++
arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi | 607 +++++++++++++++++++
arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi | 705 +++++++++++++++++++++++
include/dt-bindings/pinctrl/hisi.h | 59 ++
5 files changed, 2149 insertions(+), 4 deletions(-)
create mode 100644 arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
create mode 100644 arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
create mode 100644 include/dt-bindings/pinctrl/hisi.h
--
1.9.1
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 01/16] arm64: dts: Reserve memory regions for hi6220
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Leo Yan
From: Leo Yan <leo.yan@linaro.org>
On Hi6220, below memory regions in DDR have specific purpose:
0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime;
0x06df,f000 - 0x06df,ffff: For mailbox message data;
0x0740,f000 - 0x0740,ffff: For MCU firmware's section;
0x3e00,0000 - 0x3fff,ffff: For OP-TEE.
This patch reserves these memory regions in DT.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 8185251..17bd793 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -7,9 +7,6 @@
/dts-v1/;
-/*Reserved 1MB memory for MCU*/
-/memreserve/ 0x05e00000 0x00100000;
-
#include "hi6220.dtsi"
/ {
@@ -27,9 +24,20 @@
stdout-path = "serial3:115200n8";
};
+ /*
+ * Reserve below regions from memory node:
+ *
+ * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
+ * 0x06df,f000 - 0x06df,ffff: Mailbox message data
+ * 0x0740,f000 - 0x0740,ffff: MCU firmware section
+ * 0x3e00,0000 - 0x3fff,ffff: OP-TEE
+ */
memory@0 {
device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
+ reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
+ <0x00000000 0x05f00000 0x00000000 0x00eff000>,
+ <0x00000000 0x06e00000 0x00000000 0x0060f000>,
+ <0x00000000 0x07410000 0x00000000 0x36bf0000>;
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 01/16] arm64: dts: Reserve memory regions for hi6220
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Leo Yan <leo.yan@linaro.org>
On Hi6220, below memory regions in DDR have specific purpose:
0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime;
0x06df,f000 - 0x06df,ffff: For mailbox message data;
0x0740,f000 - 0x0740,ffff: For MCU firmware's section;
0x3e00,0000 - 0x3fff,ffff: For OP-TEE.
This patch reserves these memory regions in DT.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 8185251..17bd793 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -7,9 +7,6 @@
/dts-v1/;
-/*Reserved 1MB memory for MCU*/
-/memreserve/ 0x05e00000 0x00100000;
-
#include "hi6220.dtsi"
/ {
@@ -27,9 +24,20 @@
stdout-path = "serial3:115200n8";
};
+ /*
+ * Reserve below regions from memory node:
+ *
+ * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
+ * 0x06df,f000 - 0x06df,ffff: Mailbox message data
+ * 0x0740,f000 - 0x0740,ffff: MCU firmware section
+ * 0x3e00,0000 - 0x3fff,ffff: OP-TEE
+ */
memory at 0 {
device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
+ reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
+ <0x00000000 0x05f00000 0x00000000 0x00eff000>,
+ <0x00000000 0x06e00000 0x00000000 0x0060f000>,
+ <0x00000000 0x07410000 0x00000000 0x36bf0000>;
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 02/16] arm64: dts: add sp804 timer node for Hi6220
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Leo Yan
From: Leo Yan <leo.yan@linaro.org>
Add sp804 timer for hi6220, so it can be used as broadcast timer.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index ad1f1eb..b975286 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -209,5 +209,16 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ dual_timer0: timer@f8008000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x0 0xf8008000 0x0 0x1000>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ao_ctrl HI6220_TIMER0_PCLK>,
+ <&ao_ctrl HI6220_TIMER0_PCLK>,
+ <&ao_ctrl HI6220_TIMER0_PCLK>;
+ clock-names = "timer1", "timer2", "apb_pclk";
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 02/16] arm64: dts: add sp804 timer node for Hi6220
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Leo Yan <leo.yan@linaro.org>
Add sp804 timer for hi6220, so it can be used as broadcast timer.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index ad1f1eb..b975286 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -209,5 +209,16 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ dual_timer0: timer at f8008000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x0 0xf8008000 0x0 0x1000>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ao_ctrl HI6220_TIMER0_PCLK>,
+ <&ao_ctrl HI6220_TIMER0_PCLK>,
+ <&ao_ctrl HI6220_TIMER0_PCLK>;
+ clock-names = "timer1", "timer2", "apb_pclk";
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 03/16] arm64: dts: enable idle states for Hi6220
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Leo Yan
From: Leo Yan <leo.yan@linaro.org>
Add cpu and cluster level's low power state for Hi6220.
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index b975286..dc7f21a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -53,11 +53,35 @@
};
};
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP: cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x0010000>;
+ entry-latency-us = <700>;
+ exit-latency-us = <250>;
+ min-residency-us = <1000>;
+ };
+
+ CLUSTER_SLEEP: cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <1000>;
+ exit-latency-us = <700>;
+ min-residency-us = <2700>;
+ wakeup-latency-us = <1500>;
+ };
+ };
+
cpu0: cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu1: cpu@1 {
@@ -65,6 +89,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu2: cpu@2 {
@@ -72,6 +97,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu3: cpu@3 {
@@ -79,6 +105,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu4: cpu@100 {
@@ -86,6 +113,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu5: cpu@101 {
@@ -93,6 +121,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu6: cpu@102 {
@@ -100,6 +129,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu7: cpu@103 {
@@ -107,6 +137,7 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 03/16] arm64: dts: enable idle states for Hi6220
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Leo Yan <leo.yan@linaro.org>
Add cpu and cluster level's low power state for Hi6220.
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index b975286..dc7f21a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -53,11 +53,35 @@
};
};
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP: cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x0010000>;
+ entry-latency-us = <700>;
+ exit-latency-us = <250>;
+ min-residency-us = <1000>;
+ };
+
+ CLUSTER_SLEEP: cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <1000>;
+ exit-latency-us = <700>;
+ min-residency-us = <2700>;
+ wakeup-latency-us = <1500>;
+ };
+ };
+
cpu0: cpu at 0 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu1: cpu at 1 {
@@ -65,6 +89,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu2: cpu at 2 {
@@ -72,6 +97,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu3: cpu at 3 {
@@ -79,6 +105,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu4: cpu at 100 {
@@ -86,6 +113,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu5: cpu at 101 {
@@ -93,6 +121,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu6: cpu at 102 {
@@ -100,6 +129,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
cpu7: cpu at 103 {
@@ -107,6 +137,7 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei,
Zhong Kaihua
From: Zhong Kaihua <zhongkaihua@huawei.com>
Add Hi6220 gpio configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 +
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 259 +++++++++++
arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi | 607 +++++++++++++++++++++++++
3 files changed, 867 insertions(+)
create mode 100644 arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 17bd793..f9b2d1e 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "hi6220.dtsi"
+#include "hikey-gpio.dtsi"
/ {
model = "HiKey Development Board";
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index dc7f21a..7b7149b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -251,5 +251,264 @@
<&ao_ctrl HI6220_TIMER0_PCLK>;
clock-names = "timer1", "timer2", "apb_pclk";
};
+
+ gpio0: gpio@f8011000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf8011000 0x0 0x1000>;
+ interrupts = <0 52 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio1: gpio@f8012000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf8012000 0x0 0x1000>;
+ interrupts = <0 53 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio2: gpio@f8013000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf8013000 0x0 0x1000>;
+ interrupts = <0 54 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio3: gpio@f8014000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf8014000 0x0 0x1000>;
+ interrupts = <0 55 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio4: gpio@f7020000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7020000 0x0 0x1000>;
+ interrupts = <0 56 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio5: gpio@f7021000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7021000 0x0 0x1000>;
+ interrupts = <0 57 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio6: gpio@f7022000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7022000 0x0 0x1000>;
+ interrupts = <0 58 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio7: gpio@f7023000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7023000 0x0 0x1000>;
+ interrupts = <0 59 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio8: gpio@f7024000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7024000 0x0 0x1000>;
+ interrupts = <0 60 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio9: gpio@f7025000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7025000 0x0 0x1000>;
+ interrupts = <0 61 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio10: gpio@f7026000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7026000 0x0 0x1000>;
+ interrupts = <0 62 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio11: gpio@f7027000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7027000 0x0 0x1000>;
+ interrupts = <0 63 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio12: gpio@f7028000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7028000 0x0 0x1000>;
+ interrupts = <0 64 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio13: gpio@f7029000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7029000 0x0 0x1000>;
+ interrupts = <0 65 0x4>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio14: gpio@f702a000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702a000 0x0 0x1000>;
+ interrupts = <0 66 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio15: gpio@f702b000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702b000 0x0 0x1000>;
+ interrupts = <0 67 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio16: gpio@f702c000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702c000 0x0 0x1000>;
+ interrupts = <0 68 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio17: gpio@f702d000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702d000 0x0 0x1000>;
+ interrupts = <0 69 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio18: gpio@f702e000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702e000 0x0 0x1000>;
+ interrupts = <0 70 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio19: gpio@f702f000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702f000 0x0 0x1000>;
+ interrupts = <0 71 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
new file mode 100644
index 0000000..09242f0
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
@@ -0,0 +1,607 @@
+/ {
+ gpio_rstout_n:gpio_rstout_n {
+ gpios;
+ };
+ gpio_pmu_peri_en:gpio_pmu_peri_en {
+ gpios;
+ };
+ gpio_sysclk0_en:gpio_sysclk0_en {
+ gpios;
+ };
+ gpio_jtag_tdo:gpio_jtag_tdo {
+ gpios;
+ };
+ /* LCB: PWR_HOLD_GPIO0_0 */
+ gpio_pwr_hold:gpio_pwr_hold {
+ gpios = <&gpio0 0 0>;
+ };
+ /* LCB: DSI_SEL_GPIO0_1 */
+ gpio_dsi_sel:gpio_dsi_sel {
+ gpios = <&gpio0 1 0>;
+ };
+ /* LCB: USB_HUB_RESET_N_GPIO0_2 */
+ gpio_usb_hub_reset_n:gpio_usb_hub_reset_n {
+ gpios = <&gpio0 2 0>;
+ };
+ /* LCB: USB_SEL_GPIO0_3 */
+ gpio_usb_sel:gpio_usb_sel {
+ gpios = <&gpio0 3 0>;
+ };
+ /* LCB: HDMI_PD_GPIO0_4 */
+ gpio_hdmi_pd:gpio_hdmi_pd {
+ gpios = <&gpio0 4 0>;
+ };
+ /* LCB: WL_REG_ON_GPIO0_5 */
+ gpio_wl_en:gpio_wl_en {
+ gpios = <&gpio0 5 0>;
+ };
+ /* LCB: PWRON_DET_GPIO0_6 */
+ gpio_pwron_det:gpio_pwron_det {
+ gpios = <&gpio0 6 0>;
+ };
+ /* LCB: 5V_HUB_EN_GPIO0_7 */
+ gpio_usb_dev_det:gpio_usb_dev_det {
+ gpios = <&gpio0 7 0>;
+ };
+ /* LCB: SD_DET_GPIO1_0 */
+ gpio_sd_det:gpio_sd_det {
+ gpios = <&gpio1 0 0>;
+ };
+ /* LCB: HDMI_INT_GPIO1_1 */
+ gpio_hdmi_int:gpio_hdmi_int {
+ gpios = <&gpio1 1 0>;
+ };
+ /* LCB: PMU_IRQ_N_GPIO1_2 */
+ gpio_pmu_irq_n:gpio_pmu_irq_n {
+ gpios = <&gpio1 2 0>;
+ };
+ /* LCB: WL_HOST_WAKE_GPIO1_3 */
+ gpio_wl_host_wake:gpio_wl_host_wake {
+ gpios = <&gpio1 3 0>;
+ };
+ gpio_nfc_int:gpio_nfc_int {
+ gpios = <&gpio1 4 0>;
+ };
+ gpio_unused_001:gpio_unused_001 {
+ gpios = <&gpio1 5 0>;
+ };
+ /* LCB: BT_REG_ON_GPIO1_7 */
+ gpio_bt_reg_on:gpio_bt_reg_on {
+ gpios = <&gpio1 7 0>;
+ };
+ /* LCB: GPIO2_0, J2 */
+ gpio_j2_2_0:gpio_j2_2_0 {
+ gpios = <&gpio2 0 0>;
+ };
+ /* LCB: GPIO2_1, J2 */
+ gpio_j2_2_1:gpio_j2_2_1 {
+ gpios = <&gpio2 1 0>;
+ };
+ /* LCB: GPIO2_2, J2 */
+ gpio_j2_2_2:gpio_j2_2_2 {
+ gpios = <&gpio2 2 0>;
+ };
+ /* LCB: GPIO2_3, J2 */
+ gpio_j2_2_3:gpio_j2_2_3 {
+ gpios = <&gpio2 3 0>;
+ };
+ /* LCB: GPIO2_4, J2 */
+ gpio_j2_2_4:gpio_j2_2_4 {
+ gpios = <&gpio2 4 0>;
+ };
+ /* LCB: USB_ID_DET_GPIO2_5 */
+ gpio_usb_id_det:gpio_usb_id_det {
+ gpios = <&gpio2 5 0>;
+ };
+ /* LCB: USB_VBUS_DET_GPIO2_6 */
+ gpio_vbus_det:gpio_vbus_det {
+ gpios = <&gpio2 6 0>;
+ };
+ /* LCB: GPIO2_7, J2 */
+ gpio_j2_2_7:gpio_j2_2_7 {
+ gpios = <&gpio2 7 0>;
+ };
+ gpio_rf_reset0:gpio_rf_reset0 {
+ gpios;
+ };
+ gpio_rf_reset1:gpio_rf_reset1 {
+ gpios;
+ };
+ gpio_boot_sel:gpio_boot_sel {
+ gpios = <&gpio10 0 0>;
+ };
+ gpio_pmu_ssi:gpio_pmu_ssi {
+ gpios;
+ };
+ gpio_gps_ref_clk:gpio_gps_ref_clk {
+ gpios = <&gpio8 2 0>;
+ };
+ gpio_sd_clk:gpio_sd_clk {
+ gpios = <&gpio8 3 0>;
+ };
+ gpio_sd_cmd:gpio_sd_cmd {
+ gpios = <&gpio8 4 0>;
+ };
+ gpio_sd_data0:gpio_sd_data0 {
+ gpios = <&gpio8 5 0>;
+ };
+ gpio_sd_data1:gpio_sd_data1 {
+ gpios = <&gpio8 6 0>;
+ };
+ gpio_sd_data2:gpio_sd_data2 {
+ gpios = <&gpio8 7 0>;
+ };
+ gpio_sd_data3:gpio_sd_data3 {
+ gpios = <&gpio9 0 0>;
+ };
+ gpio_unused_002:gpio_unused_002 {
+ gpios;
+ };
+ gpio_mcam_pwdn:gpio_mcam_pwdn {
+ gpios = <&gpio9 1 0>;
+ };
+ gpio_vcm_pwdn:gpio_vcm_pwdn {
+ gpios = <&gpio9 2 0>;
+ };
+ gpio_scam_pwdn:gpio_scam_pwdn {
+ gpios = <&gpio9 3 0>;
+ };
+ gpio_cam_id0:gpio_cam_id0 {
+ gpios = <&gpio9 4 0>;
+ };
+ gpio_cam_id1:gpio_cam_id1 {
+ gpios = <&gpio9 5 0>;
+ };
+ gpio_flash_strobe:gpio_flash_strobe {
+ gpios = <&gpio9 6 0>;
+ };
+ gpio_mcam_mclk:gpio_mcam_mclk {
+ gpios = <&gpio9 7 0>;
+ };
+ gpio_scam_mclk:gpio_scam_mclk {
+ gpios = <&gpio10 1 0>;
+ };
+ gpio_cam_reset0:gpio_cam_reset0 {
+ gpios = <&gpio10 2 0>;
+ };
+ gpio_cam_reset1:gpio_cam_reset1 {
+ gpios = <&gpio10 3 0>;
+ };
+ gpio_tp_rst_n:gpio_tp_rst_n {
+ gpios = <&gpio10 4 0>;
+ };
+ gpio_unused_003:gpio_unused_003 {
+ gpios = <&gpio10 5 0>;
+ };
+ gpio_isp_sda0:gpio_isp_sda0 {
+ gpios = <&gpio10 6 0>;
+ };
+ gpio_isp_scl0:gpio_isp_scl0 {
+ gpios = <&gpio10 7 0>;
+ };
+ gpio_isp_sda1:gpio_isp_sda1 {
+ gpios = <&gpio11 0 0>;
+ };
+ gpio_isp_scl1:gpio_isp_scl1 {
+ gpios = <&gpio11 1 0>;
+ };
+ gpio_mdm_rst:gpio_mdm_rst {
+ gpios = <&gpio11 2 0>;
+ };
+ gpio_hkadc_ssi:gpio_hkadc_ssi {
+ gpios;
+ };
+ gpio_codec_clk:gpio_codec_clk {
+ gpios;
+ };
+ gpio_ap_wakeup_mdm:gpio_ap_wakeup_mdm {
+ gpios = <&gpio11 3 0>;
+ };
+ gpio_codec_sync:gpio_codec_sync {
+ gpios = <&gpio11 4 0>;
+ };
+ gpio_codec_datain:gpio_codec_datain {
+ gpios = <&gpio11 5 0>;
+ };
+ gpio_codec_dataout:gpio_codec_dataout {
+ gpios = <&gpio11 6 0>;
+ };
+ gpio_fm_xclk:gpio_fm_xclk {
+ gpios = <&gpio11 7 0>;
+ };
+ gpio_fm_xfs:gpio_fm_xfs {
+ gpios = <&gpio12 0 0>;
+ };
+ gpio_fm_di:gpio_fm_di {
+ gpios = <&gpio12 1 0>;
+ };
+ gpio_fm_do:gpio_fm_do {
+ gpios = <&gpio12 2 0>;
+ };
+ gpio_bt_xclk:gpio_bt_xclk {
+ gpios;
+ };
+ gpio_bt_xfs:gpio_bt_xfs {
+ gpios;
+ };
+ gpio_bt_di:gpio_bt_di {
+ gpios;
+ };
+ gpio_bt_do:gpio_bt_do {
+ gpios;
+ };
+ gpio_usim0_clk:gpio_usim0_clk {
+ gpios;
+ };
+ gpio_usim0_data:gpio_usim0_data {
+ gpios;
+ };
+ gpio_usim0_rst:gpio_usim0_rst {
+ gpios;
+ };
+ gpio_usim1_clk:gpio_usim1_clk {
+ gpios = <&gpio12 3 0>;
+ };
+ gpio_usim1_data:gpio_usim1_data {
+ gpios = <&gpio12 4 0>;
+ };
+ gpio_usim1_rst:gpio_usim1_rst {
+ gpios = <&gpio12 5 0>;
+ };
+ gpio_unused_004:gpio_unused_004 {
+ gpios = <&gpio12 6 0>;
+ };
+ gpio_unused_005:gpio_unused_005 {
+ gpios = <&gpio12 7 0>;
+ };
+ gpio_uart0_rxd:gpio_uart0_rxd {
+ gpios = <&gpio13 0 0>;
+ };
+ gpio_uart0_txd:gpio_uart0_txd {
+ gpios = <&gpio13 1 0>;
+ };
+ gpio_bt_uart_cts_n:gpio_bt_uart_cts_n {
+ gpios = <&gpio13 2 0>;
+ };
+ gpio_bt_uart_rts_n:gpio_bt_uart_rts_n {
+ gpios = <&gpio13 3 0>;
+ };
+ gpio_bt_uart_rxd:gpio_bt_uart_rxd {
+ gpios = <&gpio13 4 0>;
+ };
+ gpio_bt_uart_txd:gpio_bt_uart_txd {
+ gpios = <&gpio13 5 0>;
+ };
+ gpio_gps_uart_cts_n:gpio_gps_uart_cts_n {
+ gpios = <&gpio13 6 0>;
+ };
+ gpio_gps_uart_rts_n:gpio_gps_uart_rts_n {
+ gpios = <&gpio13 7 0>;
+ };
+ gpio_gps_uart_rxd:gpio_gps_uart_rxd {
+ gpios = <&gpio14 0 0>;
+ };
+ gpio_gps_uart_txd:gpio_gps_uart_txd {
+ gpios = <&gpio14 1 0>;
+ };
+ gpio_i2c0_scl:gpio_i2c0_scl {
+ gpios = <&gpio14 2 0>;
+ };
+ gpio_i2c0_sda:gpio_i2c0_sda {
+ gpios = <&gpio14 3 0>;
+ };
+ gpio_i2c1_scl:gpio_i2c1_scl {
+ gpios = <&gpio14 4 0>;
+ };
+ gpio_i2c1_sda:gpio_i2c1_sda {
+ gpios = <&gpio14 5 0>;
+ };
+ gpio_i2c2_scl:gpio_i2c2_scl {
+ gpios = <&gpio14 6 0>;
+ };
+ gpio_i2c2_sda:gpio_i2c2_sda {
+ gpios = <&gpio14 7 0>;
+ };
+ gpio_emmc_clk:gpio_emmc_clk {
+ gpios;
+ };
+ gpio_emmc_cmd:gpio_emmc_cmd {
+ gpios;
+ };
+ gpio_emmc_data0:gpio_emmc_data0 {
+ gpios;
+ };
+ gpio_emmc_data1:gpio_emmc_data1 {
+ gpios;
+ };
+ gpio_emmc_data2:gpio_emmc_data2 {
+ gpios;
+ };
+ gpio_emmc_data3:gpio_emmc_data3 {
+ gpios;
+ };
+ gpio_emmc_data4:gpio_emmc_data4 {
+ gpios;
+ };
+ gpio_emmc_data5:gpio_emmc_data5 {
+ gpios;
+ };
+ gpio_emmc_data6:gpio_emmc_data6 {
+ gpios;
+ };
+ gpio_emmc_data7:gpio_emmc_data7 {
+ gpios;
+ };
+ gpio_emmc_rst_n:gpio_emmc_rst_n {
+ gpios;
+ };
+ gpio_unused_006:gpio_unused_006 {
+ gpios;
+ };
+ gpio_sdio_clk:gpio_sdio_clk {
+ gpios = <&gpio15 0 0>;
+ };
+ gpio_sdio_cmd:gpio_sdio_cmd {
+ gpios = <&gpio15 1 0>;
+ };
+ gpio_sdio_data0:gpio_sdio_data0 {
+ gpios = <&gpio15 2 0>;
+ };
+ gpio_sdio_data1:gpio_sdio_data1 {
+ gpios = <&gpio15 3 0>;
+ };
+ gpio_sdio_data2:gpio_sdio_data2 {
+ gpios = <&gpio15 4 0>;
+ };
+ gpio_sdio_data3:gpio_sdio_data3 {
+ gpios = <&gpio15 5 0>;
+ };
+ gpio_unused_007:gpio_unused_007 {
+ gpios;
+ };
+ /* LCB: GPIO3_0, on J15, as general purpose input */
+ gpio_j15_3_0:gpio_j15_3_0 {
+ gpios = <&gpio3 0 0>;
+ };
+ gpio_jtag_sel0:gpio_jtag_sel0 {
+ gpios = <&gpio3 1 0>;
+ };
+ gpio_jtag_sel1:gpio_jtag_sel1 {
+ gpios = <&gpio3 2 0>;
+ };
+ gpio_lcd_rst_n:gpio_lcd_rst_n {
+ gpios = <&gpio3 3 0>;
+ };
+ gpio_aux_ssi0:gpio_aux_ssi0 {
+ gpios = <&gpio3 4 0>;
+ };
+ /* LCB: WLAN_ACTIVE_GPIO3_5, connects to led, as general purpose */
+ gpio_wlan_active_led:gpio_wlan_active_led {
+ gpios = <&gpio3 5 0>;
+ };
+ gpio_unused_008:gpio_unused_008 {
+ gpios = <&gpio3 6 0>;
+ };
+ gpio_ap_wakeup_bt:gpio_ap_wakeup_bt {
+ gpios = <&gpio3 7 0>;
+ };
+ /* LCB: USER_LED1_GPIO4_0 */
+ gpio_user_led_1:gpio_user_led_1 {
+ gpios = <&gpio4 0 0>;
+ };
+ /* LCB: USER_LED1_GPIO4_1 */
+ gpio_user_led_2:gpio_user_led_2 {
+ gpios = <&gpio4 1 0>;
+ };
+ /* LCB: USER_LED1_GPIO4_2 */
+ gpio_user_led_3:gpio_user_led_3 {
+ gpios = <&gpio4 2 0>;
+ };
+ /* LCB: USER_LED1_GPIO4_3 */
+ gpio_user_led_4:gpio_user_led_4 {
+ gpios = <&gpio4 3 0>;
+ };
+ gpio_i2c3_scl:gpio_i2c3_scl {
+ gpios = <&gpio4 4 0>;
+ };
+ gpio_i2c3_sda:gpio_i2c3_sda {
+ gpios = <&gpio4 5 0>;
+ };
+ gpio_wlan_bt_priority:gpio_wlan_bt_priority {
+ gpios = <&gpio4 6 0>;
+ };
+ /* LCB: BT_ACTIVE_GPIO4_7, connects to led, as general purpose */
+ gpio_bt_active_led:gpio_bt_active_led {
+ gpios = <&gpio4 7 0>;
+ };
+ gpio_uart3_cts_n:gpio_uart3_cts_n {
+ gpios = <&gpio5 0 0>;
+ };
+ gpio_uart3_rts_n:gpio_uart3_rts_n {
+ gpios = <&gpio5 1 0>;
+ };
+ gpio_uart3_rxd:gpio_uart3_rxd {
+ gpios = <&gpio5 2 0>;
+ };
+ gpio_uart3_txd:gpio_uart3_txd {
+ gpios = <&gpio5 3 0>;
+ };
+ gpio_aux_ssi1:gpio_aux_ssi1 {
+ gpios = <&gpio5 4 0>;
+ };
+ gpio_unused_009:gpio_unused_009 {
+ gpios = <&gpio5 5 0>;
+ };
+ gpio_modem_pcm_xclk:gpio_modem_pcm_xclk {
+ gpios = <&gpio5 6 0>;
+ };
+ gpio_modem_pcm_xfs:gpio_modem_pcm_xfs {
+ gpios = <&gpio5 7 0>;
+ };
+ gpio_spi0_di:gpio_spi0_di {
+ gpios = <&gpio6 0 0>;
+ };
+ gpio_spi0_do:gpio_spi0_do {
+ gpios = <&gpio6 1 0>;
+ };
+ gpio_spi0_cs_n:gpio_spi0_cs_n {
+ gpios = <&gpio6 2 0>;
+ };
+ gpio_spi0_clk:gpio_spi0_clk {
+ gpios = <&gpio6 3 0>;
+ };
+ gpio_lte_tx_active:gpio_lte_tx_active {
+ gpios = <&gpio6 4 0>;
+ };
+ gpio_lte_rx_active:gpio_lte_rx_active {
+ gpios = <&gpio6 5 0>;
+ };
+ gpio_lcd_id0:gpio_lcd_id0 {
+ gpios = <&gpio6 6 0>;
+ };
+ /* LCB: GPIO6_7_DSI_TE0 */
+ gpio_dsi_te0:gpio_dsi_te0 {
+ gpios = <&gpio6 7 0>;
+ };
+ gpio_lcd_id1:gpio_lcd_id1 {
+ gpios = <&gpio7 0 0>;
+ };
+ gpio_volume1_n:gpio_volume1_n {
+ gpios = <&gpio7 1 0>;
+ };
+ gpio_uart5_rxd:gpio_uart5_rxd {
+ gpios = <&gpio7 2 0>;
+ };
+ gpio_uart5_txd:gpio_uart5_txd {
+ gpios = <&gpio7 3 0>;
+ };
+ gpio_modem_pcm_di:gpio_modem_pcm_di {
+ gpios = <&gpio7 4 0>;
+ };
+ gpio_modem_pcm_do:gpio_modem_pcm_do {
+ gpios = <&gpio7 5 0>;
+ };
+ gpio_uart4_rxd:gpio_uart4_rxd {
+ gpios = <&gpio7 6 0>;
+ };
+ gpio_uart4_txd:gpio_uart4_txd {
+ gpios = <&gpio7 7 0>;
+ };
+ gpio_ap_wakeup_wl:gpio_ap_wakeup_wl {
+ gpios = <&gpio8 0 0>;
+ };
+ gpio_mdm_pwr_en:gpio_mdm_pwr_en {
+ gpios = <&gpio8 1 0>;
+ };
+ gpio_tcxo0_afc:gpio_tcxo0_afc {
+ gpios = <&gpio15 6 0>;
+ };
+ gpio_rf_ssi0:gpio_rf_ssi0 {
+ gpios;
+ };
+ gpio_rf_tcvr_on0:gpio_rf_tcvr_on0 {
+ gpios;
+ };
+ gpio_rf_mipi_clk0:gpio_rf_mipi_clk0 {
+ gpios;
+ };
+ gpio_rf_mipi_data0:gpio_rf_mipi_data0 {
+ gpios = <&gpio15 7 0>;
+ };
+ gpio_flash_mask:gpio_flash_mask {
+ gpios = <&gpio16 0 0>;
+ };
+ gpio_gps_blanking:gpio_gps_blanking {
+ gpios = <&gpio16 1 0>;
+ };
+ gpio_rf_gpio_2:gpio_rf_gpio_2 {
+ gpios = <&gpio16 2 0>;
+ };
+ gpio_rf_gpio_3:gpio_rf_gpio_3 {
+ gpios = <&gpio16 3 0>;
+ };
+ gpio_rf_gpio_4:gpio_rf_gpio_4 {
+ gpios = <&gpio16 4 0>;
+ };
+ gpio_rf_gpio_5:gpio_rf_gpio_5 {
+ gpios = <&gpio16 5 0>;
+ };
+ gpio_rf_gpio_6:gpio_rf_gpio_6 {
+ gpios = <&gpio16 6 0>;
+ };
+ gpio_rf_gpio_7:gpio_rf_gpio_7 {
+ gpios = <&gpio16 7 0>;
+ };
+ gpio_rf_gpio_8:gpio_rf_gpio_8 {
+ gpios = <&gpio17 0 0>;
+ };
+ gpio_rf_gpio_9:gpio_rf_gpio_9 {
+ gpios = <&gpio17 1 0>;
+ };
+ gpio_rf_gpio_10:gpio_rf_gpio_10 {
+ gpios = <&gpio17 2 0>;
+ };
+ gpio_rf_gpio_11:gpio_rf_gpio_11 {
+ gpios = <&gpio17 3 0>;
+ };
+ gpio_rf_gpio_12:gpio_rf_gpio_12 {
+ gpios = <&gpio17 4 0>;
+ };
+ gpio_rf_gpio_13:gpio_rf_gpio_13 {
+ gpios = <&gpio17 5 0>;
+ };
+ gpio_rf_gpio_14:gpio_rf_gpio_14 {
+ gpios = <&gpio17 6 0>;
+ };
+ gpio_rf_gpio_15:gpio_rf_gpio_15 {
+ gpios = <&gpio17 7 0>;
+ };
+ gpio_rf_gpio_16:gpio_rf_gpio_16 {
+ gpios = <&gpio18 0 0>;
+ };
+ gpio_rf_gpio_17:gpio_rf_gpio_17 {
+ gpios = <&gpio18 1 0>;
+ };
+ gpio_rf_gpio_18:gpio_rf_gpio_18 {
+ gpios = <&gpio18 2 0>;
+ };
+ gpio_rf_gpio_19:gpio_rf_gpio_19 {
+ gpios = <&gpio18 3 0>;
+ };
+ gpio_rf_gpio_20:gpio_rf_gpio_20 {
+ gpios = <&gpio18 4 0>;
+ };
+ gpio_rf_gpio_21:gpio_rf_gpio_21 {
+ gpios = <&gpio18 5 0>;
+ };
+ gpio_rf_gpio_22:gpio_rf_gpio_22 {
+ gpios = <&gpio18 6 0>;
+ };
+ gpio_rf_gpio_23:gpio_rf_gpio_23 {
+ gpios = <&gpio18 7 0>;
+ };
+ gpio_rf_gpio_24:gpio_rf_gpio_24 {
+ gpios = <&gpio19 0 0>;
+ };
+ gpio_rf_gpio_25:gpio_rf_gpio_25 {
+ gpios = <&gpio19 1 0>;
+ };
+ gpio_rf_gpio_26:gpio_rf_gpio_26 {
+ gpios = <&gpio19 2 0>;
+ };
+ gpio_rf_ssi1:gpio_rf_ssi1 {
+ gpios = <&gpio19 3 0>;
+ };
+ gpio_rf_tcvr_on1:gpio_rf_tcvr_on1 {
+ gpios = <&gpio19 4 0>;
+ };
+ gpio_rf_gpio_29:gpio_rf_gpio_29 {
+ gpios = <&gpio19 5 0>;
+ };
+ gpio_rf_gpio_30:gpio_rf_gpio_30 {
+ gpios = <&gpio19 6 0>;
+ };
+ gpio_apt_pdm0:gpio_apt_pdm0 {
+ gpios = <&gpio19 7 0>;
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Zhong Kaihua <zhongkaihua@huawei.com>
Add Hi6220 gpio configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 +
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 259 +++++++++++
arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi | 607 +++++++++++++++++++++++++
3 files changed, 867 insertions(+)
create mode 100644 arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 17bd793..f9b2d1e 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "hi6220.dtsi"
+#include "hikey-gpio.dtsi"
/ {
model = "HiKey Development Board";
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index dc7f21a..7b7149b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -251,5 +251,264 @@
<&ao_ctrl HI6220_TIMER0_PCLK>;
clock-names = "timer1", "timer2", "apb_pclk";
};
+
+ gpio0: gpio at f8011000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf8011000 0x0 0x1000>;
+ interrupts = <0 52 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio1: gpio at f8012000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf8012000 0x0 0x1000>;
+ interrupts = <0 53 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio2: gpio at f8013000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf8013000 0x0 0x1000>;
+ interrupts = <0 54 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio3: gpio at f8014000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf8014000 0x0 0x1000>;
+ interrupts = <0 55 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio4: gpio at f7020000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7020000 0x0 0x1000>;
+ interrupts = <0 56 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio5: gpio at f7021000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7021000 0x0 0x1000>;
+ interrupts = <0 57 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio6: gpio at f7022000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7022000 0x0 0x1000>;
+ interrupts = <0 58 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio7: gpio at f7023000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7023000 0x0 0x1000>;
+ interrupts = <0 59 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio8: gpio at f7024000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7024000 0x0 0x1000>;
+ interrupts = <0 60 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio9: gpio at f7025000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7025000 0x0 0x1000>;
+ interrupts = <0 61 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio10: gpio at f7026000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7026000 0x0 0x1000>;
+ interrupts = <0 62 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio11: gpio at f7027000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7027000 0x0 0x1000>;
+ interrupts = <0 63 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio12: gpio at f7028000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7028000 0x0 0x1000>;
+ interrupts = <0 64 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio13: gpio at f7029000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf7029000 0x0 0x1000>;
+ interrupts = <0 65 0x4>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio14: gpio at f702a000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702a000 0x0 0x1000>;
+ interrupts = <0 66 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio15: gpio at f702b000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702b000 0x0 0x1000>;
+ interrupts = <0 67 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio16: gpio at f702c000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702c000 0x0 0x1000>;
+ interrupts = <0 68 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio17: gpio at f702d000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702d000 0x0 0x1000>;
+ interrupts = <0 69 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio18: gpio at f702e000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702e000 0x0 0x1000>;
+ interrupts = <0 70 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
+
+ gpio19: gpio at f702f000 {
+ compatible = "arm,pl061", "arm,primecell";
+ reg = <0x0 0xf702f000 0x0 0x1000>;
+ interrupts = <0 71 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&ao_ctrl 2>;
+ clock-names = "apb_pclk";
+ status = "ok";
+ };
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
new file mode 100644
index 0000000..09242f0
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
@@ -0,0 +1,607 @@
+/ {
+ gpio_rstout_n:gpio_rstout_n {
+ gpios;
+ };
+ gpio_pmu_peri_en:gpio_pmu_peri_en {
+ gpios;
+ };
+ gpio_sysclk0_en:gpio_sysclk0_en {
+ gpios;
+ };
+ gpio_jtag_tdo:gpio_jtag_tdo {
+ gpios;
+ };
+ /* LCB: PWR_HOLD_GPIO0_0 */
+ gpio_pwr_hold:gpio_pwr_hold {
+ gpios = <&gpio0 0 0>;
+ };
+ /* LCB: DSI_SEL_GPIO0_1 */
+ gpio_dsi_sel:gpio_dsi_sel {
+ gpios = <&gpio0 1 0>;
+ };
+ /* LCB: USB_HUB_RESET_N_GPIO0_2 */
+ gpio_usb_hub_reset_n:gpio_usb_hub_reset_n {
+ gpios = <&gpio0 2 0>;
+ };
+ /* LCB: USB_SEL_GPIO0_3 */
+ gpio_usb_sel:gpio_usb_sel {
+ gpios = <&gpio0 3 0>;
+ };
+ /* LCB: HDMI_PD_GPIO0_4 */
+ gpio_hdmi_pd:gpio_hdmi_pd {
+ gpios = <&gpio0 4 0>;
+ };
+ /* LCB: WL_REG_ON_GPIO0_5 */
+ gpio_wl_en:gpio_wl_en {
+ gpios = <&gpio0 5 0>;
+ };
+ /* LCB: PWRON_DET_GPIO0_6 */
+ gpio_pwron_det:gpio_pwron_det {
+ gpios = <&gpio0 6 0>;
+ };
+ /* LCB: 5V_HUB_EN_GPIO0_7 */
+ gpio_usb_dev_det:gpio_usb_dev_det {
+ gpios = <&gpio0 7 0>;
+ };
+ /* LCB: SD_DET_GPIO1_0 */
+ gpio_sd_det:gpio_sd_det {
+ gpios = <&gpio1 0 0>;
+ };
+ /* LCB: HDMI_INT_GPIO1_1 */
+ gpio_hdmi_int:gpio_hdmi_int {
+ gpios = <&gpio1 1 0>;
+ };
+ /* LCB: PMU_IRQ_N_GPIO1_2 */
+ gpio_pmu_irq_n:gpio_pmu_irq_n {
+ gpios = <&gpio1 2 0>;
+ };
+ /* LCB: WL_HOST_WAKE_GPIO1_3 */
+ gpio_wl_host_wake:gpio_wl_host_wake {
+ gpios = <&gpio1 3 0>;
+ };
+ gpio_nfc_int:gpio_nfc_int {
+ gpios = <&gpio1 4 0>;
+ };
+ gpio_unused_001:gpio_unused_001 {
+ gpios = <&gpio1 5 0>;
+ };
+ /* LCB: BT_REG_ON_GPIO1_7 */
+ gpio_bt_reg_on:gpio_bt_reg_on {
+ gpios = <&gpio1 7 0>;
+ };
+ /* LCB: GPIO2_0, J2 */
+ gpio_j2_2_0:gpio_j2_2_0 {
+ gpios = <&gpio2 0 0>;
+ };
+ /* LCB: GPIO2_1, J2 */
+ gpio_j2_2_1:gpio_j2_2_1 {
+ gpios = <&gpio2 1 0>;
+ };
+ /* LCB: GPIO2_2, J2 */
+ gpio_j2_2_2:gpio_j2_2_2 {
+ gpios = <&gpio2 2 0>;
+ };
+ /* LCB: GPIO2_3, J2 */
+ gpio_j2_2_3:gpio_j2_2_3 {
+ gpios = <&gpio2 3 0>;
+ };
+ /* LCB: GPIO2_4, J2 */
+ gpio_j2_2_4:gpio_j2_2_4 {
+ gpios = <&gpio2 4 0>;
+ };
+ /* LCB: USB_ID_DET_GPIO2_5 */
+ gpio_usb_id_det:gpio_usb_id_det {
+ gpios = <&gpio2 5 0>;
+ };
+ /* LCB: USB_VBUS_DET_GPIO2_6 */
+ gpio_vbus_det:gpio_vbus_det {
+ gpios = <&gpio2 6 0>;
+ };
+ /* LCB: GPIO2_7, J2 */
+ gpio_j2_2_7:gpio_j2_2_7 {
+ gpios = <&gpio2 7 0>;
+ };
+ gpio_rf_reset0:gpio_rf_reset0 {
+ gpios;
+ };
+ gpio_rf_reset1:gpio_rf_reset1 {
+ gpios;
+ };
+ gpio_boot_sel:gpio_boot_sel {
+ gpios = <&gpio10 0 0>;
+ };
+ gpio_pmu_ssi:gpio_pmu_ssi {
+ gpios;
+ };
+ gpio_gps_ref_clk:gpio_gps_ref_clk {
+ gpios = <&gpio8 2 0>;
+ };
+ gpio_sd_clk:gpio_sd_clk {
+ gpios = <&gpio8 3 0>;
+ };
+ gpio_sd_cmd:gpio_sd_cmd {
+ gpios = <&gpio8 4 0>;
+ };
+ gpio_sd_data0:gpio_sd_data0 {
+ gpios = <&gpio8 5 0>;
+ };
+ gpio_sd_data1:gpio_sd_data1 {
+ gpios = <&gpio8 6 0>;
+ };
+ gpio_sd_data2:gpio_sd_data2 {
+ gpios = <&gpio8 7 0>;
+ };
+ gpio_sd_data3:gpio_sd_data3 {
+ gpios = <&gpio9 0 0>;
+ };
+ gpio_unused_002:gpio_unused_002 {
+ gpios;
+ };
+ gpio_mcam_pwdn:gpio_mcam_pwdn {
+ gpios = <&gpio9 1 0>;
+ };
+ gpio_vcm_pwdn:gpio_vcm_pwdn {
+ gpios = <&gpio9 2 0>;
+ };
+ gpio_scam_pwdn:gpio_scam_pwdn {
+ gpios = <&gpio9 3 0>;
+ };
+ gpio_cam_id0:gpio_cam_id0 {
+ gpios = <&gpio9 4 0>;
+ };
+ gpio_cam_id1:gpio_cam_id1 {
+ gpios = <&gpio9 5 0>;
+ };
+ gpio_flash_strobe:gpio_flash_strobe {
+ gpios = <&gpio9 6 0>;
+ };
+ gpio_mcam_mclk:gpio_mcam_mclk {
+ gpios = <&gpio9 7 0>;
+ };
+ gpio_scam_mclk:gpio_scam_mclk {
+ gpios = <&gpio10 1 0>;
+ };
+ gpio_cam_reset0:gpio_cam_reset0 {
+ gpios = <&gpio10 2 0>;
+ };
+ gpio_cam_reset1:gpio_cam_reset1 {
+ gpios = <&gpio10 3 0>;
+ };
+ gpio_tp_rst_n:gpio_tp_rst_n {
+ gpios = <&gpio10 4 0>;
+ };
+ gpio_unused_003:gpio_unused_003 {
+ gpios = <&gpio10 5 0>;
+ };
+ gpio_isp_sda0:gpio_isp_sda0 {
+ gpios = <&gpio10 6 0>;
+ };
+ gpio_isp_scl0:gpio_isp_scl0 {
+ gpios = <&gpio10 7 0>;
+ };
+ gpio_isp_sda1:gpio_isp_sda1 {
+ gpios = <&gpio11 0 0>;
+ };
+ gpio_isp_scl1:gpio_isp_scl1 {
+ gpios = <&gpio11 1 0>;
+ };
+ gpio_mdm_rst:gpio_mdm_rst {
+ gpios = <&gpio11 2 0>;
+ };
+ gpio_hkadc_ssi:gpio_hkadc_ssi {
+ gpios;
+ };
+ gpio_codec_clk:gpio_codec_clk {
+ gpios;
+ };
+ gpio_ap_wakeup_mdm:gpio_ap_wakeup_mdm {
+ gpios = <&gpio11 3 0>;
+ };
+ gpio_codec_sync:gpio_codec_sync {
+ gpios = <&gpio11 4 0>;
+ };
+ gpio_codec_datain:gpio_codec_datain {
+ gpios = <&gpio11 5 0>;
+ };
+ gpio_codec_dataout:gpio_codec_dataout {
+ gpios = <&gpio11 6 0>;
+ };
+ gpio_fm_xclk:gpio_fm_xclk {
+ gpios = <&gpio11 7 0>;
+ };
+ gpio_fm_xfs:gpio_fm_xfs {
+ gpios = <&gpio12 0 0>;
+ };
+ gpio_fm_di:gpio_fm_di {
+ gpios = <&gpio12 1 0>;
+ };
+ gpio_fm_do:gpio_fm_do {
+ gpios = <&gpio12 2 0>;
+ };
+ gpio_bt_xclk:gpio_bt_xclk {
+ gpios;
+ };
+ gpio_bt_xfs:gpio_bt_xfs {
+ gpios;
+ };
+ gpio_bt_di:gpio_bt_di {
+ gpios;
+ };
+ gpio_bt_do:gpio_bt_do {
+ gpios;
+ };
+ gpio_usim0_clk:gpio_usim0_clk {
+ gpios;
+ };
+ gpio_usim0_data:gpio_usim0_data {
+ gpios;
+ };
+ gpio_usim0_rst:gpio_usim0_rst {
+ gpios;
+ };
+ gpio_usim1_clk:gpio_usim1_clk {
+ gpios = <&gpio12 3 0>;
+ };
+ gpio_usim1_data:gpio_usim1_data {
+ gpios = <&gpio12 4 0>;
+ };
+ gpio_usim1_rst:gpio_usim1_rst {
+ gpios = <&gpio12 5 0>;
+ };
+ gpio_unused_004:gpio_unused_004 {
+ gpios = <&gpio12 6 0>;
+ };
+ gpio_unused_005:gpio_unused_005 {
+ gpios = <&gpio12 7 0>;
+ };
+ gpio_uart0_rxd:gpio_uart0_rxd {
+ gpios = <&gpio13 0 0>;
+ };
+ gpio_uart0_txd:gpio_uart0_txd {
+ gpios = <&gpio13 1 0>;
+ };
+ gpio_bt_uart_cts_n:gpio_bt_uart_cts_n {
+ gpios = <&gpio13 2 0>;
+ };
+ gpio_bt_uart_rts_n:gpio_bt_uart_rts_n {
+ gpios = <&gpio13 3 0>;
+ };
+ gpio_bt_uart_rxd:gpio_bt_uart_rxd {
+ gpios = <&gpio13 4 0>;
+ };
+ gpio_bt_uart_txd:gpio_bt_uart_txd {
+ gpios = <&gpio13 5 0>;
+ };
+ gpio_gps_uart_cts_n:gpio_gps_uart_cts_n {
+ gpios = <&gpio13 6 0>;
+ };
+ gpio_gps_uart_rts_n:gpio_gps_uart_rts_n {
+ gpios = <&gpio13 7 0>;
+ };
+ gpio_gps_uart_rxd:gpio_gps_uart_rxd {
+ gpios = <&gpio14 0 0>;
+ };
+ gpio_gps_uart_txd:gpio_gps_uart_txd {
+ gpios = <&gpio14 1 0>;
+ };
+ gpio_i2c0_scl:gpio_i2c0_scl {
+ gpios = <&gpio14 2 0>;
+ };
+ gpio_i2c0_sda:gpio_i2c0_sda {
+ gpios = <&gpio14 3 0>;
+ };
+ gpio_i2c1_scl:gpio_i2c1_scl {
+ gpios = <&gpio14 4 0>;
+ };
+ gpio_i2c1_sda:gpio_i2c1_sda {
+ gpios = <&gpio14 5 0>;
+ };
+ gpio_i2c2_scl:gpio_i2c2_scl {
+ gpios = <&gpio14 6 0>;
+ };
+ gpio_i2c2_sda:gpio_i2c2_sda {
+ gpios = <&gpio14 7 0>;
+ };
+ gpio_emmc_clk:gpio_emmc_clk {
+ gpios;
+ };
+ gpio_emmc_cmd:gpio_emmc_cmd {
+ gpios;
+ };
+ gpio_emmc_data0:gpio_emmc_data0 {
+ gpios;
+ };
+ gpio_emmc_data1:gpio_emmc_data1 {
+ gpios;
+ };
+ gpio_emmc_data2:gpio_emmc_data2 {
+ gpios;
+ };
+ gpio_emmc_data3:gpio_emmc_data3 {
+ gpios;
+ };
+ gpio_emmc_data4:gpio_emmc_data4 {
+ gpios;
+ };
+ gpio_emmc_data5:gpio_emmc_data5 {
+ gpios;
+ };
+ gpio_emmc_data6:gpio_emmc_data6 {
+ gpios;
+ };
+ gpio_emmc_data7:gpio_emmc_data7 {
+ gpios;
+ };
+ gpio_emmc_rst_n:gpio_emmc_rst_n {
+ gpios;
+ };
+ gpio_unused_006:gpio_unused_006 {
+ gpios;
+ };
+ gpio_sdio_clk:gpio_sdio_clk {
+ gpios = <&gpio15 0 0>;
+ };
+ gpio_sdio_cmd:gpio_sdio_cmd {
+ gpios = <&gpio15 1 0>;
+ };
+ gpio_sdio_data0:gpio_sdio_data0 {
+ gpios = <&gpio15 2 0>;
+ };
+ gpio_sdio_data1:gpio_sdio_data1 {
+ gpios = <&gpio15 3 0>;
+ };
+ gpio_sdio_data2:gpio_sdio_data2 {
+ gpios = <&gpio15 4 0>;
+ };
+ gpio_sdio_data3:gpio_sdio_data3 {
+ gpios = <&gpio15 5 0>;
+ };
+ gpio_unused_007:gpio_unused_007 {
+ gpios;
+ };
+ /* LCB: GPIO3_0, on J15, as general purpose input */
+ gpio_j15_3_0:gpio_j15_3_0 {
+ gpios = <&gpio3 0 0>;
+ };
+ gpio_jtag_sel0:gpio_jtag_sel0 {
+ gpios = <&gpio3 1 0>;
+ };
+ gpio_jtag_sel1:gpio_jtag_sel1 {
+ gpios = <&gpio3 2 0>;
+ };
+ gpio_lcd_rst_n:gpio_lcd_rst_n {
+ gpios = <&gpio3 3 0>;
+ };
+ gpio_aux_ssi0:gpio_aux_ssi0 {
+ gpios = <&gpio3 4 0>;
+ };
+ /* LCB: WLAN_ACTIVE_GPIO3_5, connects to led, as general purpose */
+ gpio_wlan_active_led:gpio_wlan_active_led {
+ gpios = <&gpio3 5 0>;
+ };
+ gpio_unused_008:gpio_unused_008 {
+ gpios = <&gpio3 6 0>;
+ };
+ gpio_ap_wakeup_bt:gpio_ap_wakeup_bt {
+ gpios = <&gpio3 7 0>;
+ };
+ /* LCB: USER_LED1_GPIO4_0 */
+ gpio_user_led_1:gpio_user_led_1 {
+ gpios = <&gpio4 0 0>;
+ };
+ /* LCB: USER_LED1_GPIO4_1 */
+ gpio_user_led_2:gpio_user_led_2 {
+ gpios = <&gpio4 1 0>;
+ };
+ /* LCB: USER_LED1_GPIO4_2 */
+ gpio_user_led_3:gpio_user_led_3 {
+ gpios = <&gpio4 2 0>;
+ };
+ /* LCB: USER_LED1_GPIO4_3 */
+ gpio_user_led_4:gpio_user_led_4 {
+ gpios = <&gpio4 3 0>;
+ };
+ gpio_i2c3_scl:gpio_i2c3_scl {
+ gpios = <&gpio4 4 0>;
+ };
+ gpio_i2c3_sda:gpio_i2c3_sda {
+ gpios = <&gpio4 5 0>;
+ };
+ gpio_wlan_bt_priority:gpio_wlan_bt_priority {
+ gpios = <&gpio4 6 0>;
+ };
+ /* LCB: BT_ACTIVE_GPIO4_7, connects to led, as general purpose */
+ gpio_bt_active_led:gpio_bt_active_led {
+ gpios = <&gpio4 7 0>;
+ };
+ gpio_uart3_cts_n:gpio_uart3_cts_n {
+ gpios = <&gpio5 0 0>;
+ };
+ gpio_uart3_rts_n:gpio_uart3_rts_n {
+ gpios = <&gpio5 1 0>;
+ };
+ gpio_uart3_rxd:gpio_uart3_rxd {
+ gpios = <&gpio5 2 0>;
+ };
+ gpio_uart3_txd:gpio_uart3_txd {
+ gpios = <&gpio5 3 0>;
+ };
+ gpio_aux_ssi1:gpio_aux_ssi1 {
+ gpios = <&gpio5 4 0>;
+ };
+ gpio_unused_009:gpio_unused_009 {
+ gpios = <&gpio5 5 0>;
+ };
+ gpio_modem_pcm_xclk:gpio_modem_pcm_xclk {
+ gpios = <&gpio5 6 0>;
+ };
+ gpio_modem_pcm_xfs:gpio_modem_pcm_xfs {
+ gpios = <&gpio5 7 0>;
+ };
+ gpio_spi0_di:gpio_spi0_di {
+ gpios = <&gpio6 0 0>;
+ };
+ gpio_spi0_do:gpio_spi0_do {
+ gpios = <&gpio6 1 0>;
+ };
+ gpio_spi0_cs_n:gpio_spi0_cs_n {
+ gpios = <&gpio6 2 0>;
+ };
+ gpio_spi0_clk:gpio_spi0_clk {
+ gpios = <&gpio6 3 0>;
+ };
+ gpio_lte_tx_active:gpio_lte_tx_active {
+ gpios = <&gpio6 4 0>;
+ };
+ gpio_lte_rx_active:gpio_lte_rx_active {
+ gpios = <&gpio6 5 0>;
+ };
+ gpio_lcd_id0:gpio_lcd_id0 {
+ gpios = <&gpio6 6 0>;
+ };
+ /* LCB: GPIO6_7_DSI_TE0 */
+ gpio_dsi_te0:gpio_dsi_te0 {
+ gpios = <&gpio6 7 0>;
+ };
+ gpio_lcd_id1:gpio_lcd_id1 {
+ gpios = <&gpio7 0 0>;
+ };
+ gpio_volume1_n:gpio_volume1_n {
+ gpios = <&gpio7 1 0>;
+ };
+ gpio_uart5_rxd:gpio_uart5_rxd {
+ gpios = <&gpio7 2 0>;
+ };
+ gpio_uart5_txd:gpio_uart5_txd {
+ gpios = <&gpio7 3 0>;
+ };
+ gpio_modem_pcm_di:gpio_modem_pcm_di {
+ gpios = <&gpio7 4 0>;
+ };
+ gpio_modem_pcm_do:gpio_modem_pcm_do {
+ gpios = <&gpio7 5 0>;
+ };
+ gpio_uart4_rxd:gpio_uart4_rxd {
+ gpios = <&gpio7 6 0>;
+ };
+ gpio_uart4_txd:gpio_uart4_txd {
+ gpios = <&gpio7 7 0>;
+ };
+ gpio_ap_wakeup_wl:gpio_ap_wakeup_wl {
+ gpios = <&gpio8 0 0>;
+ };
+ gpio_mdm_pwr_en:gpio_mdm_pwr_en {
+ gpios = <&gpio8 1 0>;
+ };
+ gpio_tcxo0_afc:gpio_tcxo0_afc {
+ gpios = <&gpio15 6 0>;
+ };
+ gpio_rf_ssi0:gpio_rf_ssi0 {
+ gpios;
+ };
+ gpio_rf_tcvr_on0:gpio_rf_tcvr_on0 {
+ gpios;
+ };
+ gpio_rf_mipi_clk0:gpio_rf_mipi_clk0 {
+ gpios;
+ };
+ gpio_rf_mipi_data0:gpio_rf_mipi_data0 {
+ gpios = <&gpio15 7 0>;
+ };
+ gpio_flash_mask:gpio_flash_mask {
+ gpios = <&gpio16 0 0>;
+ };
+ gpio_gps_blanking:gpio_gps_blanking {
+ gpios = <&gpio16 1 0>;
+ };
+ gpio_rf_gpio_2:gpio_rf_gpio_2 {
+ gpios = <&gpio16 2 0>;
+ };
+ gpio_rf_gpio_3:gpio_rf_gpio_3 {
+ gpios = <&gpio16 3 0>;
+ };
+ gpio_rf_gpio_4:gpio_rf_gpio_4 {
+ gpios = <&gpio16 4 0>;
+ };
+ gpio_rf_gpio_5:gpio_rf_gpio_5 {
+ gpios = <&gpio16 5 0>;
+ };
+ gpio_rf_gpio_6:gpio_rf_gpio_6 {
+ gpios = <&gpio16 6 0>;
+ };
+ gpio_rf_gpio_7:gpio_rf_gpio_7 {
+ gpios = <&gpio16 7 0>;
+ };
+ gpio_rf_gpio_8:gpio_rf_gpio_8 {
+ gpios = <&gpio17 0 0>;
+ };
+ gpio_rf_gpio_9:gpio_rf_gpio_9 {
+ gpios = <&gpio17 1 0>;
+ };
+ gpio_rf_gpio_10:gpio_rf_gpio_10 {
+ gpios = <&gpio17 2 0>;
+ };
+ gpio_rf_gpio_11:gpio_rf_gpio_11 {
+ gpios = <&gpio17 3 0>;
+ };
+ gpio_rf_gpio_12:gpio_rf_gpio_12 {
+ gpios = <&gpio17 4 0>;
+ };
+ gpio_rf_gpio_13:gpio_rf_gpio_13 {
+ gpios = <&gpio17 5 0>;
+ };
+ gpio_rf_gpio_14:gpio_rf_gpio_14 {
+ gpios = <&gpio17 6 0>;
+ };
+ gpio_rf_gpio_15:gpio_rf_gpio_15 {
+ gpios = <&gpio17 7 0>;
+ };
+ gpio_rf_gpio_16:gpio_rf_gpio_16 {
+ gpios = <&gpio18 0 0>;
+ };
+ gpio_rf_gpio_17:gpio_rf_gpio_17 {
+ gpios = <&gpio18 1 0>;
+ };
+ gpio_rf_gpio_18:gpio_rf_gpio_18 {
+ gpios = <&gpio18 2 0>;
+ };
+ gpio_rf_gpio_19:gpio_rf_gpio_19 {
+ gpios = <&gpio18 3 0>;
+ };
+ gpio_rf_gpio_20:gpio_rf_gpio_20 {
+ gpios = <&gpio18 4 0>;
+ };
+ gpio_rf_gpio_21:gpio_rf_gpio_21 {
+ gpios = <&gpio18 5 0>;
+ };
+ gpio_rf_gpio_22:gpio_rf_gpio_22 {
+ gpios = <&gpio18 6 0>;
+ };
+ gpio_rf_gpio_23:gpio_rf_gpio_23 {
+ gpios = <&gpio18 7 0>;
+ };
+ gpio_rf_gpio_24:gpio_rf_gpio_24 {
+ gpios = <&gpio19 0 0>;
+ };
+ gpio_rf_gpio_25:gpio_rf_gpio_25 {
+ gpios = <&gpio19 1 0>;
+ };
+ gpio_rf_gpio_26:gpio_rf_gpio_26 {
+ gpios = <&gpio19 2 0>;
+ };
+ gpio_rf_ssi1:gpio_rf_ssi1 {
+ gpios = <&gpio19 3 0>;
+ };
+ gpio_rf_tcvr_on1:gpio_rf_tcvr_on1 {
+ gpios = <&gpio19 4 0>;
+ };
+ gpio_rf_gpio_29:gpio_rf_gpio_29 {
+ gpios = <&gpio19 5 0>;
+ };
+ gpio_rf_gpio_30:gpio_rf_gpio_30 {
+ gpios = <&gpio19 6 0>;
+ };
+ gpio_apt_pdm0:gpio_apt_pdm0 {
+ gpios = <&gpio19 7 0>;
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 05/16] arm64: dts: add Hi6220 pinctrl configuration nodes
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei,
Zhong Kaihua
From: Zhong Kaihua <zhongkaihua@huawei.com>
Add Hi6220 pinctrl configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 +
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 77 +++
arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi | 684 +++++++++++++++++++++++
include/dt-bindings/pinctrl/hisi.h | 59 ++
4 files changed, 821 insertions(+)
create mode 100644 arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
create mode 100644 include/dt-bindings/pinctrl/hisi.h
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index f9b2d1e..985a2ad 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -9,6 +9,7 @@
#include "hi6220.dtsi"
#include "hikey-gpio.dtsi"
+#include "hikey-pinctrl.dtsi"
/ {
model = "HiKey Development Board";
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 7b7149b..c65d8dc 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/hi6220-clock.h>
+#include <dt-bindings/pinctrl/hisi.h>
/ {
compatible = "hisilicon,hi6220";
@@ -252,6 +253,60 @@
clock-names = "timer1", "timer2", "apb_pclk";
};
+ pmx0: pinmux@f7010000 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0xf7010000 0x0 0x27c>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #gpio-range-cells = <3>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <7>;
+ pinctrl-single,gpio-range = <
+ &range 80 8 MUX_M0 /* gpio 3: [0..7] */
+ &range 88 8 MUX_M0 /* gpio 4: [0..7] */
+ &range 96 8 MUX_M0 /* gpio 5: [0..7] */
+ &range 104 8 MUX_M0 /* gpio 6: [0..7] */
+ &range 112 8 MUX_M0 /* gpio 7: [0..7] */
+ &range 120 2 MUX_M0 /* gpio 8: [0..1] */
+ &range 2 6 MUX_M1 /* gpio 8: [2..7] */
+ &range 8 8 MUX_M1 /* gpio 9: [0..7] */
+ &range 0 1 MUX_M1 /* gpio 10: [0] */
+ &range 16 7 MUX_M1 /* gpio 10: [1..7] */
+ &range 23 3 MUX_M1 /* gpio 11: [0..2] */
+ &range 28 5 MUX_M1 /* gpio 11: [3..7] */
+ &range 33 3 MUX_M1 /* gpio 12: [0..2] */
+ &range 43 5 MUX_M1 /* gpio 12: [3..7] */
+ &range 48 8 MUX_M1 /* gpio 13: [0..7] */
+ &range 56 8 MUX_M1 /* gpio 14: [0..7] */
+ &range 74 6 MUX_M1 /* gpio 15: [0..5] */
+ &range 122 1 MUX_M1 /* gpio 15: [6] */
+ &range 126 1 MUX_M1 /* gpio 15: [7] */
+ &range 127 8 MUX_M1 /* gpio 16: [0..7] */
+ &range 135 8 MUX_M1 /* gpio 17: [0..7] */
+ &range 143 8 MUX_M1 /* gpio 18: [0..7] */
+ &range 151 8 MUX_M1 /* gpio 19: [0..7] */
+ >;
+ range: gpio-range {
+ #pinctrl-single,gpio-range-cells = <3>;
+ };
+ };
+
+ pmx1: pinmux@f7010800 {
+ compatible = "pinconf-single";
+ reg = <0x0 0xf7010800 0x0 0x28c>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ };
+
+ pmx2: pinmux@f8001800 {
+ compatible = "pinconf-single";
+ reg = <0x0 0xf8001800 0x0 0x78>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ };
+
gpio0: gpio@f8011000 {
compatible = "arm,pl061", "arm,primecell";
reg = <0x0 0xf8011000 0x0 0x1000>;
@@ -297,6 +352,7 @@
interrupts = <0 55 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 80 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -310,6 +366,7 @@
interrupts = <0 56 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 88 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -323,6 +380,7 @@
interrupts = <0 57 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 96 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -336,6 +394,7 @@
interrupts = <0 58 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 104 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -349,6 +408,7 @@
interrupts = <0 59 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 112 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -362,6 +422,7 @@
interrupts = <0 60 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 120 2 &pmx0 2 2 6>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -375,6 +436,7 @@
interrupts = <0 61 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 8 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -388,6 +450,7 @@
interrupts = <0 62 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 0 1 &pmx0 1 16 7>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -401,6 +464,7 @@
interrupts = <0 63 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 23 3 &pmx0 3 28 5>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -414,6 +478,7 @@
interrupts = <0 64 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 33 3 &pmx0 3 43 5>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -426,6 +491,8 @@
reg = <0x0 0xf7029000 0x0 0x1000>;
interrupts = <0 65 0x4>;
gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 48 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -439,6 +506,7 @@
interrupts = <0 66 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 56 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -452,6 +520,11 @@
interrupts = <0 67 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <
+ &pmx0 0 74 6
+ &pmx0 6 122 1
+ &pmx0 7 126 1
+ >;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -465,6 +538,7 @@
interrupts = <0 68 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 127 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -478,6 +552,7 @@
interrupts = <0 69 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 135 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -491,6 +566,7 @@
interrupts = <0 70 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 143 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -504,6 +580,7 @@
interrupts = <0 71 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 151 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
diff --git a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
new file mode 100644
index 0000000..28806df
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
@@ -0,0 +1,684 @@
+/*
+ * pinctrl dts fils for Hislicon HiKey development board
+ *
+ */
+#include <dt-bindings/pinctrl/hisi.h>
+
+/ {
+ soc {
+ pmx0: pinmux@f7010000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &boot_sel_pmx_func
+ &hkadc_ssi_pmx_func
+ &codec_clk_pmx_func
+ &pwm_in_pmx_func
+ &bl_pwm_pmx_func
+ >;
+
+ boot_sel_pmx_func: boot_sel_pmx_func {
+ pinctrl-single,pins = <
+ 0x0 MUX_M0 /* BOOT_SEL (IOMG000) */
+ >;
+ };
+
+ emmc_pmx_func: emmc_pmx_func {
+ pinctrl-single,pins = <
+ 0x100 MUX_M0 /* EMMC_CLK (IOMG064) */
+ 0x104 MUX_M0 /* EMMC_CMD (IOMG065) */
+ 0x108 MUX_M0 /* EMMC_DATA0 (IOMG066) */
+ 0x10c MUX_M0 /* EMMC_DATA1 (IOMG067) */
+ 0x110 MUX_M0 /* EMMC_DATA2 (IOMG068) */
+ 0x114 MUX_M0 /* EMMC_DATA3 (IOMG069) */
+ 0x118 MUX_M0 /* EMMC_DATA4 (IOMG070) */
+ 0x11c MUX_M0 /* EMMC_DATA5 (IOMG071) */
+ 0x120 MUX_M0 /* EMMC_DATA6 (IOMG072) */
+ 0x124 MUX_M0 /* EMMC_DATA7 (IOMG073) */
+ >;
+ };
+
+ sd_pmx_func: sd_pmx_func {
+ pinctrl-single,pins = <
+ 0xc MUX_M0 /* SD_CLK (IOMG003) */
+ 0x10 MUX_M0 /* SD_CMD (IOMG004) */
+ 0x14 MUX_M0 /* SD_DATA0 (IOMG005) */
+ 0x18 MUX_M0 /* SD_DATA1 (IOMG006) */
+ 0x1c MUX_M0 /* SD_DATA2 (IOMG007) */
+ 0x20 MUX_M0 /* SD_DATA3 (IOMG008) */
+ >;
+ };
+ sd_pmx_idle: sd_pmx_idle {
+ pinctrl-single,pins = <
+ 0xc MUX_M1 /* SD_CLK (IOMG003) */
+ 0x10 MUX_M1 /* SD_CMD (IOMG004) */
+ 0x14 MUX_M1 /* SD_DATA0 (IOMG005) */
+ 0x18 MUX_M1 /* SD_DATA1 (IOMG006) */
+ 0x1c MUX_M1 /* SD_DATA2 (IOMG007) */
+ 0x20 MUX_M1 /* SD_DATA3 (IOMG008) */
+ >;
+ };
+
+ sdio_pmx_func: sdio_pmx_func {
+ pinctrl-single,pins = <
+ 0x128 MUX_M0 /* SDIO_CLK (IOMG074) */
+ 0x12c MUX_M0 /* SDIO_CMD (IOMG075) */
+ 0x130 MUX_M0 /* SDIO_DATA0 (IOMG076) */
+ 0x134 MUX_M0 /* SDIO_DATA1 (IOMG077) */
+ 0x138 MUX_M0 /* SDIO_DATA2 (IOMG078) */
+ 0x13c MUX_M0 /* SDIO_DATA3 (IOMG079) */
+ >;
+ };
+ sdio_pmx_idle: sdio_pmx_idle {
+ pinctrl-single,pins = <
+ 0x128 MUX_M1 /* SDIO_CLK (IOMG074) */
+ 0x12c MUX_M1 /* SDIO_CMD (IOMG075) */
+ 0x130 MUX_M1 /* SDIO_DATA0 (IOMG076) */
+ 0x134 MUX_M1 /* SDIO_DATA1 (IOMG077) */
+ 0x138 MUX_M1 /* SDIO_DATA2 (IOMG078) */
+ 0x13c MUX_M1 /* SDIO_DATA3 (IOMG079) */
+ >;
+ };
+
+ isp_pmx_func: isp_pmx_func {
+ pinctrl-single,pins = <
+ 0x24 MUX_M0 /* ISP_PWDN0 (IOMG009) */
+ 0x28 MUX_M0 /* ISP_PWDN1 (IOMG010) */
+ 0x2c MUX_M0 /* ISP_PWDN2 (IOMG011) */
+ 0x30 MUX_M1 /* ISP_SHUTTER0 (IOMG012) */
+ 0x34 MUX_M1 /* ISP_SHUTTER1 (IOMG013) */
+ 0x38 MUX_M1 /* ISP_PWM (IOMG014) */
+ 0x3c MUX_M0 /* ISP_CCLK0 (IOMG015) */
+ 0x40 MUX_M0 /* ISP_CCLK1 (IOMG016) */
+ 0x44 MUX_M0 /* ISP_RESETB0 (IOMG017) */
+ 0x48 MUX_M0 /* ISP_RESETB1 (IOMG018) */
+ 0x4c MUX_M1 /* ISP_STROBE0 (IOMG019) */
+ 0x50 MUX_M1 /* ISP_STROBE1 (IOMG020) */
+ 0x54 MUX_M0 /* ISP_SDA0 (IOMG021) */
+ 0x58 MUX_M0 /* ISP_SCL0 (IOMG022) */
+ 0x5c MUX_M0 /* ISP_SDA1 (IOMG023) */
+ 0x60 MUX_M0 /* ISP_SCL1 (IOMG024) */
+ >;
+ };
+
+ hkadc_ssi_pmx_func: hkadc_ssi_pmx_func {
+ pinctrl-single,pins = <
+ 0x68 MUX_M0 /* HKADC_SSI (IOMG026) */
+ >;
+ };
+
+ codec_clk_pmx_func: codec_clk_pmx_func {
+ pinctrl-single,pins = <
+ 0x6c MUX_M0 /* CODEC_CLK (IOMG027) */
+ >;
+ };
+
+ codec_pmx_func: codec_pmx_func {
+ pinctrl-single,pins = <
+ 0x70 MUX_M1 /* DMIC_CLK (IOMG028) */
+ 0x74 MUX_M0 /* CODEC_SYNC (IOMG029) */
+ 0x78 MUX_M0 /* CODEC_DI (IOMG030) */
+ 0x7c MUX_M0 /* CODEC_DO (IOMG031) */
+ >;
+ };
+
+ fm_pmx_func: fm_pmx_func {
+ pinctrl-single,pins = <
+ 0x80 MUX_M1 /* FM_XCLK (IOMG032) */
+ 0x84 MUX_M1 /* FM_XFS (IOMG033) */
+ 0x88 MUX_M1 /* FM_DI (IOMG034) */
+ 0x8c MUX_M1 /* FM_DO (IOMG035) */
+ >;
+ };
+
+ bt_pmx_func: bt_pmx_func {
+ pinctrl-single,pins = <
+ 0x90 MUX_M0 /* BT_XCLK (IOMG036) */
+ 0x94 MUX_M0 /* BT_XFS (IOMG037) */
+ 0x98 MUX_M0 /* BT_DI (IOMG038) */
+ 0x9c MUX_M0 /* BT_DO (IOMG039) */
+ >;
+ };
+
+ pwm_in_pmx_func: pwm_in_pmx_func {
+ pinctrl-single,pins = <
+ 0xb8 MUX_M1 /* PWM_IN (IOMG046) */
+ >;
+ };
+
+ bl_pwm_pmx_func: bl_pwm_pmx_func {
+ pinctrl-single,pins = <
+ 0xbc MUX_M1 /* BL_PWM (IOMG047) */
+ >;
+ };
+
+ uart0_pmx_func: uart0_pmx_func {
+ pinctrl-single,pins = <
+ 0xc0 MUX_M0 /* UART0_RXD (IOMG048) */
+ 0xc4 MUX_M0 /* UART0_TXD (IOMG049) */
+ >;
+ };
+
+ uart1_pmx_func: uart1_pmx_func {
+ pinctrl-single,pins = <
+ 0xc8 MUX_M0 /* UART1_CTS_N (IOMG050) */
+ 0xcc MUX_M0 /* UART1_RTS_N (IOMG051) */
+ 0xd0 MUX_M0 /* UART1_RXD (IOMG052) */
+ 0xd4 MUX_M0 /* UART1_TXD (IOMG053) */
+ >;
+ };
+
+ uart2_pmx_func: uart2_pmx_func {
+ pinctrl-single,pins = <
+ 0xd8 MUX_M0 /* UART2_CTS_N (IOMG054) */
+ 0xdc MUX_M0 /* UART2_RTS_N (IOMG055) */
+ 0xe0 MUX_M0 /* UART2_RXD (IOMG056) */
+ 0xe4 MUX_M0 /* UART2_TXD (IOMG057) */
+ >;
+ };
+
+ uart3_pmx_func: uart3_pmx_func {
+ pinctrl-single,pins = <
+ 0x180 MUX_M1 /* UART3_CTS_N (IOMG096) */
+ 0x184 MUX_M1 /* UART3_RTS_N (IOMG097) */
+ 0x188 MUX_M1 /* UART3_RXD (IOMG098) */
+ 0x18c MUX_M1 /* UART3_TXD (IOMG099) */
+ >;
+ };
+
+ uart4_pmx_func: uart4_pmx_func {
+ pinctrl-single,pins = <
+ 0x1d0 MUX_M1 /* UART4_CTS_N (IOMG116) */
+ 0x1d4 MUX_M1 /* UART4_RTS_N (IOMG117) */
+ 0x1d8 MUX_M1 /* UART4_RXD (IOMG118) */
+ 0x1dc MUX_M1 /* UART4_TXD (IOMG119) */
+ >;
+ };
+
+ uart5_pmx_func: uart5_pmx_func {
+ pinctrl-single,pins = <
+ 0x1c8 MUX_M1 /* UART5_RXD (IOMG114) */
+ 0x1cc MUX_M1 /* UART5_TXD (IOMG115) */
+ >;
+ };
+
+ i2c0_pmx_func: i2c0_pmx_func {
+ pinctrl-single,pins = <
+ 0xe8 MUX_M0 /* I2C0_SCL (IOMG058) */
+ 0xec MUX_M0 /* I2C0_SDA (IOMG059) */
+ >;
+ };
+
+ i2c1_pmx_func: i2c1_pmx_func {
+ pinctrl-single,pins = <
+ 0xf0 MUX_M0 /* I2C1_SCL (IOMG060) */
+ 0xf4 MUX_M0 /* I2C1_SDA (IOMG061) */
+ >;
+ };
+
+ i2c2_pmx_func: i2c2_pmx_func {
+ pinctrl-single,pins = <
+ 0xf8 MUX_M0 /* I2C2_SCL (IOMG062) */
+ 0xfc MUX_M0 /* I2C2_SDA (IOMG063) */
+ >;
+ };
+ };
+
+ pmx1: pinmux@f7010800 {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &boot_sel_cfg_func
+ &hkadc_ssi_cfg_func
+ &codec_clk_cfg_func
+ &pwm_in_cfg_func
+ &bl_pwm_cfg_func
+ >;
+
+ boot_sel_cfg_func: boot_sel_cfg_func {
+ pinctrl-single,pins = <
+ 0x0 0x0 /* BOOT_SEL (IOCFG000) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ hkadc_ssi_cfg_func: hkadc_ssi_cfg_func {
+ pinctrl-single,pins = <
+ 0x6c 0x0 /* HKADC_SSI (IOCFG027) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ emmc_clk_cfg_func: emmc_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x104 0x0 /* EMMC_CLK (IOCFG065) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>;
+ };
+
+ emmc_cfg_func: emmc_cfg_func {
+ pinctrl-single,pins = <
+ 0x108 0x0 /* EMMC_CMD (IOCFG066) */
+ 0x10c 0x0 /* EMMC_DATA0 (IOCFG067) */
+ 0x110 0x0 /* EMMC_DATA1 (IOCFG068) */
+ 0x114 0x0 /* EMMC_DATA2 (IOCFG069) */
+ 0x118 0x0 /* EMMC_DATA3 (IOCFG070) */
+ 0x11c 0x0 /* EMMC_DATA4 (IOCFG071) */
+ 0x120 0x0 /* EMMC_DATA5 (IOCFG072) */
+ 0x124 0x0 /* EMMC_DATA6 (IOCFG073) */
+ 0x128 0x0 /* EMMC_DATA7 (IOCFG074) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+
+ emmc_rst_cfg_func: emmc_rst_cfg_func {
+ pinctrl-single,pins = <
+ 0x12c 0x0 /* EMMC_RST_N (IOCFG075) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+
+ sd_clk_cfg_func: sd_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0xc 0x0 /* SD_CLK (IOCFG003) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_10MA DRIVE_MASK>;
+ };
+ sd_clk_cfg_idle: sd_clk_cfg_idle {
+ pinctrl-single,pins = <
+ 0xc 0x0 /* SD_CLK (IOCFG003) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ sd_cfg_func: sd_cfg_func {
+ pinctrl-single,pins = <
+ 0x10 0x0 /* SD_CMD (IOCFG004) */
+ 0x14 0x0 /* SD_DATA0 (IOCFG005) */
+ 0x18 0x0 /* SD_DATA1 (IOCFG006) */
+ 0x1c 0x0 /* SD_DATA2 (IOCFG007) */
+ 0x20 0x0 /* SD_DATA3 (IOCFG008) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>;
+ };
+ sd_cfg_idle: sd_cfg_idle {
+ pinctrl-single,pins = <
+ 0x10 0x0 /* SD_CMD (IOCFG004) */
+ 0x14 0x0 /* SD_DATA0 (IOCFG005) */
+ 0x18 0x0 /* SD_DATA1 (IOCFG006) */
+ 0x1c 0x0 /* SD_DATA2 (IOCFG007) */
+ 0x20 0x0 /* SD_DATA3 (IOCFG008) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ sdio_clk_cfg_func: sdio_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x134 0x0 /* SDIO_CLK (IOCFG077) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>;
+ };
+ sdio_clk_cfg_idle: sdio_clk_cfg_idle {
+ pinctrl-single,pins = <
+ 0x134 0x0 /* SDIO_CLK (IOCFG077) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ sdio_cfg_func: sdio_cfg_func {
+ pinctrl-single,pins = <
+ 0x138 0x0 /* SDIO_CMD (IOCFG078) */
+ 0x13c 0x0 /* SDIO_DATA0 (IOCFG079) */
+ 0x140 0x0 /* SDIO_DATA1 (IOCFG080) */
+ 0x144 0x0 /* SDIO_DATA2 (IOCFG081) */
+ 0x148 0x0 /* SDIO_DATA3 (IOCFG082) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+ sdio_cfg_idle: sdio_cfg_idle {
+ pinctrl-single,pins = <
+ 0x138 0x0 /* SDIO_CMD (IOCFG078) */
+ 0x13c 0x0 /* SDIO_DATA0 (IOCFG079) */
+ 0x140 0x0 /* SDIO_DATA1 (IOCFG080) */
+ 0x144 0x0 /* SDIO_DATA2 (IOCFG081) */
+ 0x148 0x0 /* SDIO_DATA3 (IOCFG082) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ isp_cfg_func1: isp_cfg_func1 {
+ pinctrl-single,pins = <
+ 0x28 0x0 /* ISP_PWDN0 (IOCFG010) */
+ 0x2c 0x0 /* ISP_PWDN1 (IOCFG011) */
+ 0x30 0x0 /* ISP_PWDN2 (IOCFG012) */
+ 0x34 0x0 /* ISP_SHUTTER0 (IOCFG013) */
+ 0x38 0x0 /* ISP_SHUTTER1 (IOCFG014) */
+ 0x3c 0x0 /* ISP_PWM (IOCFG015) */
+ 0x40 0x0 /* ISP_CCLK0 (IOCFG016) */
+ 0x44 0x0 /* ISP_CCLK1 (IOCFG017) */
+ 0x48 0x0 /* ISP_RESETB0 (IOCFG018) */
+ 0x4c 0x0 /* ISP_RESETB1 (IOCFG019) */
+ 0x50 0x0 /* ISP_STROBE0 (IOCFG020) */
+ 0x58 0x0 /* ISP_SDA0 (IOCFG022) */
+ 0x5c 0x0 /* ISP_SCL0 (IOCFG023) */
+ 0x60 0x0 /* ISP_SDA1 (IOCFG024) */
+ 0x64 0x0 /* ISP_SCL1 (IOCFG025) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+ isp_cfg_idle1: isp_cfg_idle1 {
+ pinctrl-single,pins = <
+ 0x34 0x0 /* ISP_SHUTTER0 (IOCFG013) */
+ 0x38 0x0 /* ISP_SHUTTER1 (IOCFG014) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ isp_cfg_func2: isp_cfg_func2 {
+ pinctrl-single,pins = <
+ 0x54 0x0 /* ISP_STROBE1 (IOCFG021) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ codec_clk_cfg_func: codec_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x70 0x0 /* CODEC_CLK (IOCFG028) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+ codec_clk_cfg_idle: codec_clk_cfg_idle {
+ pinctrl-single,pins = <
+ 0x70 0x0 /* CODEC_CLK (IOCFG028) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ codec_cfg_func1: codec_cfg_func1 {
+ pinctrl-single,pins = <
+ 0x74 0x0 /* DMIC_CLK (IOCFG029) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ codec_cfg_func2: codec_cfg_func2 {
+ pinctrl-single,pins = <
+ 0x78 0x0 /* CODEC_SYNC (IOCFG030) */
+ 0x7c 0x0 /* CODEC_DI (IOCFG031) */
+ 0x80 0x0 /* CODEC_DO (IOCFG032) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+ codec_cfg_idle2: codec_cfg_idle2 {
+ pinctrl-single,pins = <
+ 0x78 0x0 /* CODEC_SYNC (IOCFG030) */
+ 0x7c 0x0 /* CODEC_DI (IOCFG031) */
+ 0x80 0x0 /* CODEC_DO (IOCFG032) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ fm_cfg_func: fm_cfg_func {
+ pinctrl-single,pins = <
+ 0x84 0x0 /* FM_XCLK (IOCFG033) */
+ 0x88 0x0 /* FM_XFS (IOCFG034) */
+ 0x8c 0x0 /* FM_DI (IOCFG035) */
+ 0x90 0x0 /* FM_DO (IOCFG036) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ bt_cfg_func: bt_cfg_func {
+ pinctrl-single,pins = <
+ 0x94 0x0 /* BT_XCLK (IOCFG037) */
+ 0x98 0x0 /* BT_XFS (IOCFG038) */
+ 0x9c 0x0 /* BT_DI (IOCFG039) */
+ 0xa0 0x0 /* BT_DO (IOCFG040) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+ bt_cfg_idle: bt_cfg_idle {
+ pinctrl-single,pins = <
+ 0x94 0x0 /* BT_XCLK (IOCFG037) */
+ 0x98 0x0 /* BT_XFS (IOCFG038) */
+ 0x9c 0x0 /* BT_DI (IOCFG039) */
+ 0xa0 0x0 /* BT_DO (IOCFG040) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ pwm_in_cfg_func: pwm_in_cfg_func {
+ pinctrl-single,pins = <
+ 0xbc 0x0 /* PWM_IN (IOCFG047) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ bl_pwm_cfg_func: bl_pwm_cfg_func {
+ pinctrl-single,pins = <
+ 0xc0 0x0 /* BL_PWM (IOCFG048) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart0_cfg_func1: uart0_cfg_func1 {
+ pinctrl-single,pins = <
+ 0xc4 0x0 /* UART0_RXD (IOCFG049) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart0_cfg_func2: uart0_cfg_func2 {
+ pinctrl-single,pins = <
+ 0xc8 0x0 /* UART0_TXD (IOCFG050) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+
+ uart1_cfg_func1: uart1_cfg_func1 {
+ pinctrl-single,pins = <
+ 0xcc 0x0 /* UART1_CTS_N (IOCFG051) */
+ 0xd4 0x0 /* UART1_RXD (IOCFG053) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart1_cfg_func2: uart1_cfg_func2 {
+ pinctrl-single,pins = <
+ 0xd0 0x0 /* UART1_RTS_N (IOCFG052) */
+ 0xd8 0x0 /* UART1_TXD (IOCFG054) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart2_cfg_func: uart2_cfg_func {
+ pinctrl-single,pins = <
+ 0xdc 0x0 /* UART2_CTS_N (IOCFG055) */
+ 0xe0 0x0 /* UART2_RTS_N (IOCFG056) */
+ 0xe4 0x0 /* UART2_RXD (IOCFG057) */
+ 0xe8 0x0 /* UART2_TXD (IOCFG058) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart3_cfg_func: uart3_cfg_func {
+ pinctrl-single,pins = <
+ 0x190 0x0 /* UART3_CTS_N (IOCFG100) */
+ 0x194 0x0 /* UART3_RTS_N (IOCFG101) */
+ 0x198 0x0 /* UART3_RXD (IOCFG102) */
+ 0x19c 0x0 /* UART3_TXD (IOCFG103) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart4_cfg_func: uart4_cfg_func {
+ pinctrl-single,pins = <
+ 0x1e0 0x0 /* UART4_CTS_N (IOCFG120) */
+ 0x1e4 0x0 /* UART4_RTS_N (IOCFG121) */
+ 0x1e8 0x0 /* UART4_RXD (IOCFG122) */
+ 0x1ec 0x0 /* UART4_TXD (IOCFG123) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart5_cfg_func: uart5_cfg_func {
+ pinctrl-single,pins = <
+ 0x1d8 0x0 /* UART4_RXD (IOCFG118) */
+ 0x1dc 0x0 /* UART4_TXD (IOCFG119) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ i2c0_cfg_func: i2c0_cfg_func {
+ pinctrl-single,pins = <
+ 0xec 0x0 /* I2C0_SCL (IOCFG059) */
+ 0xf0 0x0 /* I2C0_SDA (IOCFG060) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ i2c1_cfg_func: i2c1_cfg_func {
+ pinctrl-single,pins = <
+ 0xf4 0x0 /* I2C1_SCL (IOCFG061) */
+ 0xf8 0x0 /* I2C1_SDA (IOCFG062) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ i2c2_cfg_func: i2c2_cfg_func {
+ pinctrl-single,pins = <
+ 0xfc 0x0 /* I2C2_SCL (IOCFG063) */
+ 0x100 0x0 /* I2C2_SDA (IOCFG064) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+ };
+
+ pmx2: pinmux@f8001800 {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &rstout_n_cfg_func
+ >;
+
+ rstout_n_cfg_func: rstout_n_cfg_func {
+ pinctrl-single,pins = <
+ 0x0 0x0 /* RSTOUT_N (IOCFG000) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ pmu_peri_en_cfg_func: pmu_peri_en_cfg_func {
+ pinctrl-single,pins = <
+ 0x4 0x0 /* PMU_PERI_EN (IOCFG001) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ sysclk0_en_cfg_func: sysclk0_en_cfg_func {
+ pinctrl-single,pins = <
+ 0x8 0x0 /* SYSCLK0_EN (IOCFG002) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ jtag_tdo_cfg_func: jtag_tdo_cfg_func {
+ pinctrl-single,pins = <
+ 0xc 0x0 /* JTAG_TDO (IOCFG003) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>;
+ };
+
+ rf_reset_cfg_func: rf_reset_cfg_func {
+ pinctrl-single,pins = <
+ 0x70 0x0 /* RF_RESET0 (IOCFG028) */
+ 0x74 0x0 /* RF_RESET1 (IOCFG029) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+ };
+ };
+};
diff --git a/include/dt-bindings/pinctrl/hisi.h b/include/dt-bindings/pinctrl/hisi.h
new file mode 100644
index 0000000..38f1ea8
--- /dev/null
+++ b/include/dt-bindings/pinctrl/hisi.h
@@ -0,0 +1,59 @@
+/*
+ * This header provides constants for hisilicon pinctrl bindings.
+ *
+ * Copyright (c) 2015 Hisilicon Limited.
+ * Copyright (c) 2015 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_HISI_H
+#define _DT_BINDINGS_PINCTRL_HISI_H
+
+/* iomg bit definition */
+#define MUX_M0 0
+#define MUX_M1 1
+#define MUX_M2 2
+#define MUX_M3 3
+#define MUX_M4 4
+#define MUX_M5 5
+#define MUX_M6 6
+#define MUX_M7 7
+
+/* iocg bit definition */
+#define PULL_MASK (3)
+#define PULL_DIS (0)
+#define PULL_UP (1 << 0)
+#define PULL_DOWN (1 << 1)
+
+/* drive strength definition */
+#define DRIVE_MASK (7 << 4)
+#define DRIVE1_02MA (0 << 4)
+#define DRIVE1_04MA (1 << 4)
+#define DRIVE1_08MA (2 << 4)
+#define DRIVE1_10MA (3 << 4)
+#define DRIVE2_02MA (0 << 4)
+#define DRIVE2_04MA (1 << 4)
+#define DRIVE2_08MA (2 << 4)
+#define DRIVE2_10MA (3 << 4)
+#define DRIVE3_04MA (0 << 4)
+#define DRIVE3_08MA (1 << 4)
+#define DRIVE3_12MA (2 << 4)
+#define DRIVE3_16MA (3 << 4)
+#define DRIVE3_20MA (4 << 4)
+#define DRIVE3_24MA (5 << 4)
+#define DRIVE3_32MA (6 << 4)
+#define DRIVE3_40MA (7 << 4)
+#define DRIVE4_02MA (0 << 4)
+#define DRIVE4_04MA (2 << 4)
+#define DRIVE4_08MA (4 << 4)
+#define DRIVE4_10MA (6 << 4)
+
+#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 05/16] arm64: dts: add Hi6220 pinctrl configuration nodes
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Zhong Kaihua <zhongkaihua@huawei.com>
Add Hi6220 pinctrl configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 +
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 77 +++
arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi | 684 +++++++++++++++++++++++
include/dt-bindings/pinctrl/hisi.h | 59 ++
4 files changed, 821 insertions(+)
create mode 100644 arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
create mode 100644 include/dt-bindings/pinctrl/hisi.h
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index f9b2d1e..985a2ad 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -9,6 +9,7 @@
#include "hi6220.dtsi"
#include "hikey-gpio.dtsi"
+#include "hikey-pinctrl.dtsi"
/ {
model = "HiKey Development Board";
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 7b7149b..c65d8dc 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/hi6220-clock.h>
+#include <dt-bindings/pinctrl/hisi.h>
/ {
compatible = "hisilicon,hi6220";
@@ -252,6 +253,60 @@
clock-names = "timer1", "timer2", "apb_pclk";
};
+ pmx0: pinmux at f7010000 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0xf7010000 0x0 0x27c>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #gpio-range-cells = <3>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <7>;
+ pinctrl-single,gpio-range = <
+ &range 80 8 MUX_M0 /* gpio 3: [0..7] */
+ &range 88 8 MUX_M0 /* gpio 4: [0..7] */
+ &range 96 8 MUX_M0 /* gpio 5: [0..7] */
+ &range 104 8 MUX_M0 /* gpio 6: [0..7] */
+ &range 112 8 MUX_M0 /* gpio 7: [0..7] */
+ &range 120 2 MUX_M0 /* gpio 8: [0..1] */
+ &range 2 6 MUX_M1 /* gpio 8: [2..7] */
+ &range 8 8 MUX_M1 /* gpio 9: [0..7] */
+ &range 0 1 MUX_M1 /* gpio 10: [0] */
+ &range 16 7 MUX_M1 /* gpio 10: [1..7] */
+ &range 23 3 MUX_M1 /* gpio 11: [0..2] */
+ &range 28 5 MUX_M1 /* gpio 11: [3..7] */
+ &range 33 3 MUX_M1 /* gpio 12: [0..2] */
+ &range 43 5 MUX_M1 /* gpio 12: [3..7] */
+ &range 48 8 MUX_M1 /* gpio 13: [0..7] */
+ &range 56 8 MUX_M1 /* gpio 14: [0..7] */
+ &range 74 6 MUX_M1 /* gpio 15: [0..5] */
+ &range 122 1 MUX_M1 /* gpio 15: [6] */
+ &range 126 1 MUX_M1 /* gpio 15: [7] */
+ &range 127 8 MUX_M1 /* gpio 16: [0..7] */
+ &range 135 8 MUX_M1 /* gpio 17: [0..7] */
+ &range 143 8 MUX_M1 /* gpio 18: [0..7] */
+ &range 151 8 MUX_M1 /* gpio 19: [0..7] */
+ >;
+ range: gpio-range {
+ #pinctrl-single,gpio-range-cells = <3>;
+ };
+ };
+
+ pmx1: pinmux at f7010800 {
+ compatible = "pinconf-single";
+ reg = <0x0 0xf7010800 0x0 0x28c>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ };
+
+ pmx2: pinmux at f8001800 {
+ compatible = "pinconf-single";
+ reg = <0x0 0xf8001800 0x0 0x78>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ };
+
gpio0: gpio at f8011000 {
compatible = "arm,pl061", "arm,primecell";
reg = <0x0 0xf8011000 0x0 0x1000>;
@@ -297,6 +352,7 @@
interrupts = <0 55 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 80 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -310,6 +366,7 @@
interrupts = <0 56 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 88 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -323,6 +380,7 @@
interrupts = <0 57 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 96 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -336,6 +394,7 @@
interrupts = <0 58 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 104 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -349,6 +408,7 @@
interrupts = <0 59 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 112 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -362,6 +422,7 @@
interrupts = <0 60 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 120 2 &pmx0 2 2 6>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -375,6 +436,7 @@
interrupts = <0 61 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 8 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -388,6 +450,7 @@
interrupts = <0 62 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 0 1 &pmx0 1 16 7>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -401,6 +464,7 @@
interrupts = <0 63 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 23 3 &pmx0 3 28 5>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -414,6 +478,7 @@
interrupts = <0 64 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 33 3 &pmx0 3 43 5>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -426,6 +491,8 @@
reg = <0x0 0xf7029000 0x0 0x1000>;
interrupts = <0 65 0x4>;
gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 48 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -439,6 +506,7 @@
interrupts = <0 66 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 56 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -452,6 +520,11 @@
interrupts = <0 67 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <
+ &pmx0 0 74 6
+ &pmx0 6 122 1
+ &pmx0 7 126 1
+ >;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -465,6 +538,7 @@
interrupts = <0 68 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 127 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -478,6 +552,7 @@
interrupts = <0 69 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 135 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -491,6 +566,7 @@
interrupts = <0 70 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 143 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
@@ -504,6 +580,7 @@
interrupts = <0 71 0x4>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-ranges = <&pmx0 0 151 8>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&ao_ctrl 2>;
diff --git a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
new file mode 100644
index 0000000..28806df
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
@@ -0,0 +1,684 @@
+/*
+ * pinctrl dts fils for Hislicon HiKey development board
+ *
+ */
+#include <dt-bindings/pinctrl/hisi.h>
+
+/ {
+ soc {
+ pmx0: pinmux at f7010000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &boot_sel_pmx_func
+ &hkadc_ssi_pmx_func
+ &codec_clk_pmx_func
+ &pwm_in_pmx_func
+ &bl_pwm_pmx_func
+ >;
+
+ boot_sel_pmx_func: boot_sel_pmx_func {
+ pinctrl-single,pins = <
+ 0x0 MUX_M0 /* BOOT_SEL (IOMG000) */
+ >;
+ };
+
+ emmc_pmx_func: emmc_pmx_func {
+ pinctrl-single,pins = <
+ 0x100 MUX_M0 /* EMMC_CLK (IOMG064) */
+ 0x104 MUX_M0 /* EMMC_CMD (IOMG065) */
+ 0x108 MUX_M0 /* EMMC_DATA0 (IOMG066) */
+ 0x10c MUX_M0 /* EMMC_DATA1 (IOMG067) */
+ 0x110 MUX_M0 /* EMMC_DATA2 (IOMG068) */
+ 0x114 MUX_M0 /* EMMC_DATA3 (IOMG069) */
+ 0x118 MUX_M0 /* EMMC_DATA4 (IOMG070) */
+ 0x11c MUX_M0 /* EMMC_DATA5 (IOMG071) */
+ 0x120 MUX_M0 /* EMMC_DATA6 (IOMG072) */
+ 0x124 MUX_M0 /* EMMC_DATA7 (IOMG073) */
+ >;
+ };
+
+ sd_pmx_func: sd_pmx_func {
+ pinctrl-single,pins = <
+ 0xc MUX_M0 /* SD_CLK (IOMG003) */
+ 0x10 MUX_M0 /* SD_CMD (IOMG004) */
+ 0x14 MUX_M0 /* SD_DATA0 (IOMG005) */
+ 0x18 MUX_M0 /* SD_DATA1 (IOMG006) */
+ 0x1c MUX_M0 /* SD_DATA2 (IOMG007) */
+ 0x20 MUX_M0 /* SD_DATA3 (IOMG008) */
+ >;
+ };
+ sd_pmx_idle: sd_pmx_idle {
+ pinctrl-single,pins = <
+ 0xc MUX_M1 /* SD_CLK (IOMG003) */
+ 0x10 MUX_M1 /* SD_CMD (IOMG004) */
+ 0x14 MUX_M1 /* SD_DATA0 (IOMG005) */
+ 0x18 MUX_M1 /* SD_DATA1 (IOMG006) */
+ 0x1c MUX_M1 /* SD_DATA2 (IOMG007) */
+ 0x20 MUX_M1 /* SD_DATA3 (IOMG008) */
+ >;
+ };
+
+ sdio_pmx_func: sdio_pmx_func {
+ pinctrl-single,pins = <
+ 0x128 MUX_M0 /* SDIO_CLK (IOMG074) */
+ 0x12c MUX_M0 /* SDIO_CMD (IOMG075) */
+ 0x130 MUX_M0 /* SDIO_DATA0 (IOMG076) */
+ 0x134 MUX_M0 /* SDIO_DATA1 (IOMG077) */
+ 0x138 MUX_M0 /* SDIO_DATA2 (IOMG078) */
+ 0x13c MUX_M0 /* SDIO_DATA3 (IOMG079) */
+ >;
+ };
+ sdio_pmx_idle: sdio_pmx_idle {
+ pinctrl-single,pins = <
+ 0x128 MUX_M1 /* SDIO_CLK (IOMG074) */
+ 0x12c MUX_M1 /* SDIO_CMD (IOMG075) */
+ 0x130 MUX_M1 /* SDIO_DATA0 (IOMG076) */
+ 0x134 MUX_M1 /* SDIO_DATA1 (IOMG077) */
+ 0x138 MUX_M1 /* SDIO_DATA2 (IOMG078) */
+ 0x13c MUX_M1 /* SDIO_DATA3 (IOMG079) */
+ >;
+ };
+
+ isp_pmx_func: isp_pmx_func {
+ pinctrl-single,pins = <
+ 0x24 MUX_M0 /* ISP_PWDN0 (IOMG009) */
+ 0x28 MUX_M0 /* ISP_PWDN1 (IOMG010) */
+ 0x2c MUX_M0 /* ISP_PWDN2 (IOMG011) */
+ 0x30 MUX_M1 /* ISP_SHUTTER0 (IOMG012) */
+ 0x34 MUX_M1 /* ISP_SHUTTER1 (IOMG013) */
+ 0x38 MUX_M1 /* ISP_PWM (IOMG014) */
+ 0x3c MUX_M0 /* ISP_CCLK0 (IOMG015) */
+ 0x40 MUX_M0 /* ISP_CCLK1 (IOMG016) */
+ 0x44 MUX_M0 /* ISP_RESETB0 (IOMG017) */
+ 0x48 MUX_M0 /* ISP_RESETB1 (IOMG018) */
+ 0x4c MUX_M1 /* ISP_STROBE0 (IOMG019) */
+ 0x50 MUX_M1 /* ISP_STROBE1 (IOMG020) */
+ 0x54 MUX_M0 /* ISP_SDA0 (IOMG021) */
+ 0x58 MUX_M0 /* ISP_SCL0 (IOMG022) */
+ 0x5c MUX_M0 /* ISP_SDA1 (IOMG023) */
+ 0x60 MUX_M0 /* ISP_SCL1 (IOMG024) */
+ >;
+ };
+
+ hkadc_ssi_pmx_func: hkadc_ssi_pmx_func {
+ pinctrl-single,pins = <
+ 0x68 MUX_M0 /* HKADC_SSI (IOMG026) */
+ >;
+ };
+
+ codec_clk_pmx_func: codec_clk_pmx_func {
+ pinctrl-single,pins = <
+ 0x6c MUX_M0 /* CODEC_CLK (IOMG027) */
+ >;
+ };
+
+ codec_pmx_func: codec_pmx_func {
+ pinctrl-single,pins = <
+ 0x70 MUX_M1 /* DMIC_CLK (IOMG028) */
+ 0x74 MUX_M0 /* CODEC_SYNC (IOMG029) */
+ 0x78 MUX_M0 /* CODEC_DI (IOMG030) */
+ 0x7c MUX_M0 /* CODEC_DO (IOMG031) */
+ >;
+ };
+
+ fm_pmx_func: fm_pmx_func {
+ pinctrl-single,pins = <
+ 0x80 MUX_M1 /* FM_XCLK (IOMG032) */
+ 0x84 MUX_M1 /* FM_XFS (IOMG033) */
+ 0x88 MUX_M1 /* FM_DI (IOMG034) */
+ 0x8c MUX_M1 /* FM_DO (IOMG035) */
+ >;
+ };
+
+ bt_pmx_func: bt_pmx_func {
+ pinctrl-single,pins = <
+ 0x90 MUX_M0 /* BT_XCLK (IOMG036) */
+ 0x94 MUX_M0 /* BT_XFS (IOMG037) */
+ 0x98 MUX_M0 /* BT_DI (IOMG038) */
+ 0x9c MUX_M0 /* BT_DO (IOMG039) */
+ >;
+ };
+
+ pwm_in_pmx_func: pwm_in_pmx_func {
+ pinctrl-single,pins = <
+ 0xb8 MUX_M1 /* PWM_IN (IOMG046) */
+ >;
+ };
+
+ bl_pwm_pmx_func: bl_pwm_pmx_func {
+ pinctrl-single,pins = <
+ 0xbc MUX_M1 /* BL_PWM (IOMG047) */
+ >;
+ };
+
+ uart0_pmx_func: uart0_pmx_func {
+ pinctrl-single,pins = <
+ 0xc0 MUX_M0 /* UART0_RXD (IOMG048) */
+ 0xc4 MUX_M0 /* UART0_TXD (IOMG049) */
+ >;
+ };
+
+ uart1_pmx_func: uart1_pmx_func {
+ pinctrl-single,pins = <
+ 0xc8 MUX_M0 /* UART1_CTS_N (IOMG050) */
+ 0xcc MUX_M0 /* UART1_RTS_N (IOMG051) */
+ 0xd0 MUX_M0 /* UART1_RXD (IOMG052) */
+ 0xd4 MUX_M0 /* UART1_TXD (IOMG053) */
+ >;
+ };
+
+ uart2_pmx_func: uart2_pmx_func {
+ pinctrl-single,pins = <
+ 0xd8 MUX_M0 /* UART2_CTS_N (IOMG054) */
+ 0xdc MUX_M0 /* UART2_RTS_N (IOMG055) */
+ 0xe0 MUX_M0 /* UART2_RXD (IOMG056) */
+ 0xe4 MUX_M0 /* UART2_TXD (IOMG057) */
+ >;
+ };
+
+ uart3_pmx_func: uart3_pmx_func {
+ pinctrl-single,pins = <
+ 0x180 MUX_M1 /* UART3_CTS_N (IOMG096) */
+ 0x184 MUX_M1 /* UART3_RTS_N (IOMG097) */
+ 0x188 MUX_M1 /* UART3_RXD (IOMG098) */
+ 0x18c MUX_M1 /* UART3_TXD (IOMG099) */
+ >;
+ };
+
+ uart4_pmx_func: uart4_pmx_func {
+ pinctrl-single,pins = <
+ 0x1d0 MUX_M1 /* UART4_CTS_N (IOMG116) */
+ 0x1d4 MUX_M1 /* UART4_RTS_N (IOMG117) */
+ 0x1d8 MUX_M1 /* UART4_RXD (IOMG118) */
+ 0x1dc MUX_M1 /* UART4_TXD (IOMG119) */
+ >;
+ };
+
+ uart5_pmx_func: uart5_pmx_func {
+ pinctrl-single,pins = <
+ 0x1c8 MUX_M1 /* UART5_RXD (IOMG114) */
+ 0x1cc MUX_M1 /* UART5_TXD (IOMG115) */
+ >;
+ };
+
+ i2c0_pmx_func: i2c0_pmx_func {
+ pinctrl-single,pins = <
+ 0xe8 MUX_M0 /* I2C0_SCL (IOMG058) */
+ 0xec MUX_M0 /* I2C0_SDA (IOMG059) */
+ >;
+ };
+
+ i2c1_pmx_func: i2c1_pmx_func {
+ pinctrl-single,pins = <
+ 0xf0 MUX_M0 /* I2C1_SCL (IOMG060) */
+ 0xf4 MUX_M0 /* I2C1_SDA (IOMG061) */
+ >;
+ };
+
+ i2c2_pmx_func: i2c2_pmx_func {
+ pinctrl-single,pins = <
+ 0xf8 MUX_M0 /* I2C2_SCL (IOMG062) */
+ 0xfc MUX_M0 /* I2C2_SDA (IOMG063) */
+ >;
+ };
+ };
+
+ pmx1: pinmux at f7010800 {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &boot_sel_cfg_func
+ &hkadc_ssi_cfg_func
+ &codec_clk_cfg_func
+ &pwm_in_cfg_func
+ &bl_pwm_cfg_func
+ >;
+
+ boot_sel_cfg_func: boot_sel_cfg_func {
+ pinctrl-single,pins = <
+ 0x0 0x0 /* BOOT_SEL (IOCFG000) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ hkadc_ssi_cfg_func: hkadc_ssi_cfg_func {
+ pinctrl-single,pins = <
+ 0x6c 0x0 /* HKADC_SSI (IOCFG027) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ emmc_clk_cfg_func: emmc_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x104 0x0 /* EMMC_CLK (IOCFG065) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>;
+ };
+
+ emmc_cfg_func: emmc_cfg_func {
+ pinctrl-single,pins = <
+ 0x108 0x0 /* EMMC_CMD (IOCFG066) */
+ 0x10c 0x0 /* EMMC_DATA0 (IOCFG067) */
+ 0x110 0x0 /* EMMC_DATA1 (IOCFG068) */
+ 0x114 0x0 /* EMMC_DATA2 (IOCFG069) */
+ 0x118 0x0 /* EMMC_DATA3 (IOCFG070) */
+ 0x11c 0x0 /* EMMC_DATA4 (IOCFG071) */
+ 0x120 0x0 /* EMMC_DATA5 (IOCFG072) */
+ 0x124 0x0 /* EMMC_DATA6 (IOCFG073) */
+ 0x128 0x0 /* EMMC_DATA7 (IOCFG074) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+
+ emmc_rst_cfg_func: emmc_rst_cfg_func {
+ pinctrl-single,pins = <
+ 0x12c 0x0 /* EMMC_RST_N (IOCFG075) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+
+ sd_clk_cfg_func: sd_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0xc 0x0 /* SD_CLK (IOCFG003) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_10MA DRIVE_MASK>;
+ };
+ sd_clk_cfg_idle: sd_clk_cfg_idle {
+ pinctrl-single,pins = <
+ 0xc 0x0 /* SD_CLK (IOCFG003) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ sd_cfg_func: sd_cfg_func {
+ pinctrl-single,pins = <
+ 0x10 0x0 /* SD_CMD (IOCFG004) */
+ 0x14 0x0 /* SD_DATA0 (IOCFG005) */
+ 0x18 0x0 /* SD_DATA1 (IOCFG006) */
+ 0x1c 0x0 /* SD_DATA2 (IOCFG007) */
+ 0x20 0x0 /* SD_DATA3 (IOCFG008) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>;
+ };
+ sd_cfg_idle: sd_cfg_idle {
+ pinctrl-single,pins = <
+ 0x10 0x0 /* SD_CMD (IOCFG004) */
+ 0x14 0x0 /* SD_DATA0 (IOCFG005) */
+ 0x18 0x0 /* SD_DATA1 (IOCFG006) */
+ 0x1c 0x0 /* SD_DATA2 (IOCFG007) */
+ 0x20 0x0 /* SD_DATA3 (IOCFG008) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ sdio_clk_cfg_func: sdio_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x134 0x0 /* SDIO_CLK (IOCFG077) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>;
+ };
+ sdio_clk_cfg_idle: sdio_clk_cfg_idle {
+ pinctrl-single,pins = <
+ 0x134 0x0 /* SDIO_CLK (IOCFG077) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ sdio_cfg_func: sdio_cfg_func {
+ pinctrl-single,pins = <
+ 0x138 0x0 /* SDIO_CMD (IOCFG078) */
+ 0x13c 0x0 /* SDIO_DATA0 (IOCFG079) */
+ 0x140 0x0 /* SDIO_DATA1 (IOCFG080) */
+ 0x144 0x0 /* SDIO_DATA2 (IOCFG081) */
+ 0x148 0x0 /* SDIO_DATA3 (IOCFG082) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+ sdio_cfg_idle: sdio_cfg_idle {
+ pinctrl-single,pins = <
+ 0x138 0x0 /* SDIO_CMD (IOCFG078) */
+ 0x13c 0x0 /* SDIO_DATA0 (IOCFG079) */
+ 0x140 0x0 /* SDIO_DATA1 (IOCFG080) */
+ 0x144 0x0 /* SDIO_DATA2 (IOCFG081) */
+ 0x148 0x0 /* SDIO_DATA3 (IOCFG082) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ isp_cfg_func1: isp_cfg_func1 {
+ pinctrl-single,pins = <
+ 0x28 0x0 /* ISP_PWDN0 (IOCFG010) */
+ 0x2c 0x0 /* ISP_PWDN1 (IOCFG011) */
+ 0x30 0x0 /* ISP_PWDN2 (IOCFG012) */
+ 0x34 0x0 /* ISP_SHUTTER0 (IOCFG013) */
+ 0x38 0x0 /* ISP_SHUTTER1 (IOCFG014) */
+ 0x3c 0x0 /* ISP_PWM (IOCFG015) */
+ 0x40 0x0 /* ISP_CCLK0 (IOCFG016) */
+ 0x44 0x0 /* ISP_CCLK1 (IOCFG017) */
+ 0x48 0x0 /* ISP_RESETB0 (IOCFG018) */
+ 0x4c 0x0 /* ISP_RESETB1 (IOCFG019) */
+ 0x50 0x0 /* ISP_STROBE0 (IOCFG020) */
+ 0x58 0x0 /* ISP_SDA0 (IOCFG022) */
+ 0x5c 0x0 /* ISP_SCL0 (IOCFG023) */
+ 0x60 0x0 /* ISP_SDA1 (IOCFG024) */
+ 0x64 0x0 /* ISP_SCL1 (IOCFG025) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+ isp_cfg_idle1: isp_cfg_idle1 {
+ pinctrl-single,pins = <
+ 0x34 0x0 /* ISP_SHUTTER0 (IOCFG013) */
+ 0x38 0x0 /* ISP_SHUTTER1 (IOCFG014) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ isp_cfg_func2: isp_cfg_func2 {
+ pinctrl-single,pins = <
+ 0x54 0x0 /* ISP_STROBE1 (IOCFG021) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ codec_clk_cfg_func: codec_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x70 0x0 /* CODEC_CLK (IOCFG028) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+ codec_clk_cfg_idle: codec_clk_cfg_idle {
+ pinctrl-single,pins = <
+ 0x70 0x0 /* CODEC_CLK (IOCFG028) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ codec_cfg_func1: codec_cfg_func1 {
+ pinctrl-single,pins = <
+ 0x74 0x0 /* DMIC_CLK (IOCFG029) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ codec_cfg_func2: codec_cfg_func2 {
+ pinctrl-single,pins = <
+ 0x78 0x0 /* CODEC_SYNC (IOCFG030) */
+ 0x7c 0x0 /* CODEC_DI (IOCFG031) */
+ 0x80 0x0 /* CODEC_DO (IOCFG032) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+ codec_cfg_idle2: codec_cfg_idle2 {
+ pinctrl-single,pins = <
+ 0x78 0x0 /* CODEC_SYNC (IOCFG030) */
+ 0x7c 0x0 /* CODEC_DI (IOCFG031) */
+ 0x80 0x0 /* CODEC_DO (IOCFG032) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ fm_cfg_func: fm_cfg_func {
+ pinctrl-single,pins = <
+ 0x84 0x0 /* FM_XCLK (IOCFG033) */
+ 0x88 0x0 /* FM_XFS (IOCFG034) */
+ 0x8c 0x0 /* FM_DI (IOCFG035) */
+ 0x90 0x0 /* FM_DO (IOCFG036) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ bt_cfg_func: bt_cfg_func {
+ pinctrl-single,pins = <
+ 0x94 0x0 /* BT_XCLK (IOCFG037) */
+ 0x98 0x0 /* BT_XFS (IOCFG038) */
+ 0x9c 0x0 /* BT_DI (IOCFG039) */
+ 0xa0 0x0 /* BT_DO (IOCFG040) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+ bt_cfg_idle: bt_cfg_idle {
+ pinctrl-single,pins = <
+ 0x94 0x0 /* BT_XCLK (IOCFG037) */
+ 0x98 0x0 /* BT_XFS (IOCFG038) */
+ 0x9c 0x0 /* BT_DI (IOCFG039) */
+ 0xa0 0x0 /* BT_DO (IOCFG040) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ pwm_in_cfg_func: pwm_in_cfg_func {
+ pinctrl-single,pins = <
+ 0xbc 0x0 /* PWM_IN (IOCFG047) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ bl_pwm_cfg_func: bl_pwm_cfg_func {
+ pinctrl-single,pins = <
+ 0xc0 0x0 /* BL_PWM (IOCFG048) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart0_cfg_func1: uart0_cfg_func1 {
+ pinctrl-single,pins = <
+ 0xc4 0x0 /* UART0_RXD (IOCFG049) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart0_cfg_func2: uart0_cfg_func2 {
+ pinctrl-single,pins = <
+ 0xc8 0x0 /* UART0_TXD (IOCFG050) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_04MA DRIVE_MASK>;
+ };
+
+ uart1_cfg_func1: uart1_cfg_func1 {
+ pinctrl-single,pins = <
+ 0xcc 0x0 /* UART1_CTS_N (IOCFG051) */
+ 0xd4 0x0 /* UART1_RXD (IOCFG053) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart1_cfg_func2: uart1_cfg_func2 {
+ pinctrl-single,pins = <
+ 0xd0 0x0 /* UART1_RTS_N (IOCFG052) */
+ 0xd8 0x0 /* UART1_TXD (IOCFG054) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart2_cfg_func: uart2_cfg_func {
+ pinctrl-single,pins = <
+ 0xdc 0x0 /* UART2_CTS_N (IOCFG055) */
+ 0xe0 0x0 /* UART2_RTS_N (IOCFG056) */
+ 0xe4 0x0 /* UART2_RXD (IOCFG057) */
+ 0xe8 0x0 /* UART2_TXD (IOCFG058) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart3_cfg_func: uart3_cfg_func {
+ pinctrl-single,pins = <
+ 0x190 0x0 /* UART3_CTS_N (IOCFG100) */
+ 0x194 0x0 /* UART3_RTS_N (IOCFG101) */
+ 0x198 0x0 /* UART3_RXD (IOCFG102) */
+ 0x19c 0x0 /* UART3_TXD (IOCFG103) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart4_cfg_func: uart4_cfg_func {
+ pinctrl-single,pins = <
+ 0x1e0 0x0 /* UART4_CTS_N (IOCFG120) */
+ 0x1e4 0x0 /* UART4_RTS_N (IOCFG121) */
+ 0x1e8 0x0 /* UART4_RXD (IOCFG122) */
+ 0x1ec 0x0 /* UART4_TXD (IOCFG123) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ uart5_cfg_func: uart5_cfg_func {
+ pinctrl-single,pins = <
+ 0x1d8 0x0 /* UART4_RXD (IOCFG118) */
+ 0x1dc 0x0 /* UART4_TXD (IOCFG119) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ i2c0_cfg_func: i2c0_cfg_func {
+ pinctrl-single,pins = <
+ 0xec 0x0 /* I2C0_SCL (IOCFG059) */
+ 0xf0 0x0 /* I2C0_SDA (IOCFG060) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ i2c1_cfg_func: i2c1_cfg_func {
+ pinctrl-single,pins = <
+ 0xf4 0x0 /* I2C1_SCL (IOCFG061) */
+ 0xf8 0x0 /* I2C1_SDA (IOCFG062) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ i2c2_cfg_func: i2c2_cfg_func {
+ pinctrl-single,pins = <
+ 0xfc 0x0 /* I2C2_SCL (IOCFG063) */
+ 0x100 0x0 /* I2C2_SDA (IOCFG064) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+ };
+
+ pmx2: pinmux at f8001800 {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &rstout_n_cfg_func
+ >;
+
+ rstout_n_cfg_func: rstout_n_cfg_func {
+ pinctrl-single,pins = <
+ 0x0 0x0 /* RSTOUT_N (IOCFG000) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ pmu_peri_en_cfg_func: pmu_peri_en_cfg_func {
+ pinctrl-single,pins = <
+ 0x4 0x0 /* PMU_PERI_EN (IOCFG001) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ sysclk0_en_cfg_func: sysclk0_en_cfg_func {
+ pinctrl-single,pins = <
+ 0x8 0x0 /* SYSCLK0_EN (IOCFG002) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+
+ jtag_tdo_cfg_func: jtag_tdo_cfg_func {
+ pinctrl-single,pins = <
+ 0xc 0x0 /* JTAG_TDO (IOCFG003) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_08MA DRIVE_MASK>;
+ };
+
+ rf_reset_cfg_func: rf_reset_cfg_func {
+ pinctrl-single,pins = <
+ 0x70 0x0 /* RF_RESET0 (IOCFG028) */
+ 0x74 0x0 /* RF_RESET1 (IOCFG029) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
+ };
+ };
+};
diff --git a/include/dt-bindings/pinctrl/hisi.h b/include/dt-bindings/pinctrl/hisi.h
new file mode 100644
index 0000000..38f1ea8
--- /dev/null
+++ b/include/dt-bindings/pinctrl/hisi.h
@@ -0,0 +1,59 @@
+/*
+ * This header provides constants for hisilicon pinctrl bindings.
+ *
+ * Copyright (c) 2015 Hisilicon Limited.
+ * Copyright (c) 2015 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_HISI_H
+#define _DT_BINDINGS_PINCTRL_HISI_H
+
+/* iomg bit definition */
+#define MUX_M0 0
+#define MUX_M1 1
+#define MUX_M2 2
+#define MUX_M3 3
+#define MUX_M4 4
+#define MUX_M5 5
+#define MUX_M6 6
+#define MUX_M7 7
+
+/* iocg bit definition */
+#define PULL_MASK (3)
+#define PULL_DIS (0)
+#define PULL_UP (1 << 0)
+#define PULL_DOWN (1 << 1)
+
+/* drive strength definition */
+#define DRIVE_MASK (7 << 4)
+#define DRIVE1_02MA (0 << 4)
+#define DRIVE1_04MA (1 << 4)
+#define DRIVE1_08MA (2 << 4)
+#define DRIVE1_10MA (3 << 4)
+#define DRIVE2_02MA (0 << 4)
+#define DRIVE2_04MA (1 << 4)
+#define DRIVE2_08MA (2 << 4)
+#define DRIVE2_10MA (3 << 4)
+#define DRIVE3_04MA (0 << 4)
+#define DRIVE3_08MA (1 << 4)
+#define DRIVE3_12MA (2 << 4)
+#define DRIVE3_16MA (3 << 4)
+#define DRIVE3_20MA (4 << 4)
+#define DRIVE3_24MA (5 << 4)
+#define DRIVE3_32MA (6 << 4)
+#define DRIVE3_40MA (7 << 4)
+#define DRIVE4_02MA (0 << 4)
+#define DRIVE4_04MA (2 << 4)
+#define DRIVE4_08MA (4 << 4)
+#define DRIVE4_10MA (6 << 4)
+
+#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 06/16] arm64: dts: add Hi6220 spi configuration nodes
2016-04-05 13:27 ` Guodong Xu
(?)
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei,
Zhong Kaihua
From: Zhong Kaihua <zhongkaihua@huawei.com>
Add Hi6220 spi configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 +
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi | 21 +++++++++++++++++++++
3 files changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 985a2ad..5c9ee31 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -20,6 +20,7 @@
serial1 = &uart1; /* BT UART */
serial2 = &uart2; /* LS Expansion UART0 */
serial3 = &uart3; /* LS Expansion UART1 */
+ spi0 = &spi_0;
};
chosen {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index c65d8dc..8b74eeb 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -587,5 +587,20 @@
clock-names = "apb_pclk";
status = "ok";
};
+
+ spi_0: spi@f7106000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x0 0xf7106000 0x0 0x1000>;
+ interrupts = <0 50 4>;
+ bus-id = <0>;
+ enable-dma = <0>;
+ clocks = <&sys_ctrl HI6220_SPI_CLK>;
+ clock-names = "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>;
+ num-cs = <1>;
+ cs-gpios = <&gpio6 2 0>;
+ status = "ok";
+ };
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
index 28806df..0916e84 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
@@ -221,6 +221,15 @@
0xfc MUX_M0 /* I2C2_SDA (IOMG063) */
>;
};
+
+ spi0_pmx_func: spi0_pmx_func {
+ pinctrl-single,pins = <
+ 0x1a0 MUX_M1 /* SPI0_DI (IOMG104) */
+ 0x1a4 MUX_M1 /* SPI0_DO (IOMG105) */
+ 0x1a8 MUX_M1 /* SPI0_CS_N (IOMG106) */
+ 0x1ac MUX_M1 /* SPI0_CLK (IOMG107) */
+ >;
+ };
};
pmx1: pinmux@f7010800 {
@@ -625,6 +634,18 @@
pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
};
+
+ spi0_cfg_func: spi0_cfg_func {
+ pinctrl-single,pins = <
+ 0x1b0 0x0 /* SPI0_DI (IOCFG108) */
+ 0x1b4 0x0 /* SPI0_DO (IOCFG109) */
+ 0x1b8 0x0 /* SPI0_CS_N (IOCFG110) */
+ 0x1bc 0x0 /* SPI0_CLK (IOCFG111) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
};
pmx2: pinmux@f8001800 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 06/16] arm64: dts: add Hi6220 spi configuration nodes
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, kong.kongxinwei, Zhong Kaihua, linux-kernel,
linux-arm-kernel
From: Zhong Kaihua <zhongkaihua@huawei.com>
Add Hi6220 spi configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 +
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi | 21 +++++++++++++++++++++
3 files changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 985a2ad..5c9ee31 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -20,6 +20,7 @@
serial1 = &uart1; /* BT UART */
serial2 = &uart2; /* LS Expansion UART0 */
serial3 = &uart3; /* LS Expansion UART1 */
+ spi0 = &spi_0;
};
chosen {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index c65d8dc..8b74eeb 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -587,5 +587,20 @@
clock-names = "apb_pclk";
status = "ok";
};
+
+ spi_0: spi@f7106000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x0 0xf7106000 0x0 0x1000>;
+ interrupts = <0 50 4>;
+ bus-id = <0>;
+ enable-dma = <0>;
+ clocks = <&sys_ctrl HI6220_SPI_CLK>;
+ clock-names = "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>;
+ num-cs = <1>;
+ cs-gpios = <&gpio6 2 0>;
+ status = "ok";
+ };
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
index 28806df..0916e84 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
@@ -221,6 +221,15 @@
0xfc MUX_M0 /* I2C2_SDA (IOMG063) */
>;
};
+
+ spi0_pmx_func: spi0_pmx_func {
+ pinctrl-single,pins = <
+ 0x1a0 MUX_M1 /* SPI0_DI (IOMG104) */
+ 0x1a4 MUX_M1 /* SPI0_DO (IOMG105) */
+ 0x1a8 MUX_M1 /* SPI0_CS_N (IOMG106) */
+ 0x1ac MUX_M1 /* SPI0_CLK (IOMG107) */
+ >;
+ };
};
pmx1: pinmux@f7010800 {
@@ -625,6 +634,18 @@
pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
};
+
+ spi0_cfg_func: spi0_cfg_func {
+ pinctrl-single,pins = <
+ 0x1b0 0x0 /* SPI0_DI (IOCFG108) */
+ 0x1b4 0x0 /* SPI0_DO (IOCFG109) */
+ 0x1b8 0x0 /* SPI0_CS_N (IOCFG110) */
+ 0x1bc 0x0 /* SPI0_CLK (IOCFG111) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
};
pmx2: pinmux@f8001800 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 06/16] arm64: dts: add Hi6220 spi configuration nodes
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Zhong Kaihua <zhongkaihua@huawei.com>
Add Hi6220 spi configuration nodes
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 +
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi | 21 +++++++++++++++++++++
3 files changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 985a2ad..5c9ee31 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -20,6 +20,7 @@
serial1 = &uart1; /* BT UART */
serial2 = &uart2; /* LS Expansion UART0 */
serial3 = &uart3; /* LS Expansion UART1 */
+ spi0 = &spi_0;
};
chosen {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index c65d8dc..8b74eeb 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -587,5 +587,20 @@
clock-names = "apb_pclk";
status = "ok";
};
+
+ spi_0: spi at f7106000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x0 0xf7106000 0x0 0x1000>;
+ interrupts = <0 50 4>;
+ bus-id = <0>;
+ enable-dma = <0>;
+ clocks = <&sys_ctrl HI6220_SPI_CLK>;
+ clock-names = "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>;
+ num-cs = <1>;
+ cs-gpios = <&gpio6 2 0>;
+ status = "ok";
+ };
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
index 28806df..0916e84 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi
@@ -221,6 +221,15 @@
0xfc MUX_M0 /* I2C2_SDA (IOMG063) */
>;
};
+
+ spi0_pmx_func: spi0_pmx_func {
+ pinctrl-single,pins = <
+ 0x1a0 MUX_M1 /* SPI0_DI (IOMG104) */
+ 0x1a4 MUX_M1 /* SPI0_DO (IOMG105) */
+ 0x1a8 MUX_M1 /* SPI0_CS_N (IOMG106) */
+ 0x1ac MUX_M1 /* SPI0_CLK (IOMG107) */
+ >;
+ };
};
pmx1: pinmux at f7010800 {
@@ -625,6 +634,18 @@
pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
};
+
+ spi0_cfg_func: spi0_cfg_func {
+ pinctrl-single,pins = <
+ 0x1b0 0x0 /* SPI0_DI (IOCFG108) */
+ 0x1b4 0x0 /* SPI0_DO (IOCFG109) */
+ 0x1b8 0x0 /* SPI0_CS_N (IOCFG110) */
+ 0x1bc 0x0 /* SPI0_CLK (IOCFG111) */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
+ };
};
pmx2: pinmux at f8001800 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 07/16] arm64: dts: add all hi6220 i2c nodes
2016-04-05 13:27 ` Guodong Xu
(?)
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Chen Feng
From: Xinwei Kong <kong.kongxinwei@hisilicon.com>
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 33 +++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 8b74eeb..53b5b25 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -602,5 +602,38 @@
cs-gpios = <&gpio6 2 0>;
status = "ok";
};
+
+ i2c0: i2c@f7100000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7100000 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <&sys_ctrl HI6220_I2C0_CLK>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ clocks = <&sys_ctrl HI6220_I2C1_CLK>;
+ interrupts = <0 45 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ clocks = <&sys_ctrl HI6220_I2C2_CLK>;
+ interrupts = <0 46 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;
+ status = "disabled";
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 07/16] arm64: dts: add all hi6220 i2c nodes
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, kong.kongxinwei, linux-kernel, linux-arm-kernel, Chen Feng
From: Xinwei Kong <kong.kongxinwei@hisilicon.com>
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 33 +++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 8b74eeb..53b5b25 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -602,5 +602,38 @@
cs-gpios = <&gpio6 2 0>;
status = "ok";
};
+
+ i2c0: i2c@f7100000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7100000 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <&sys_ctrl HI6220_I2C0_CLK>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ clocks = <&sys_ctrl HI6220_I2C1_CLK>;
+ interrupts = <0 45 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ clocks = <&sys_ctrl HI6220_I2C2_CLK>;
+ interrupts = <0 46 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;
+ status = "disabled";
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 07/16] arm64: dts: add all hi6220 i2c nodes
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Xinwei Kong <kong.kongxinwei@hisilicon.com>
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
use this I2C IP of Synopsys Designware for HiKey board.
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 33 +++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 8b74eeb..53b5b25 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -602,5 +602,38 @@
cs-gpios = <&gpio6 2 0>;
status = "ok";
};
+
+ i2c0: i2c at f7100000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7100000 0x0 0x1000>;
+ interrupts = <0 44 4>;
+ clocks = <&sys_ctrl HI6220_I2C0_CLK>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c1: i2c at f7101000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7101000 0x0 0x1000>;
+ clocks = <&sys_ctrl HI6220_I2C1_CLK>;
+ interrupts = <0 45 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
+ status = "disabled";
+ };
+
+ i2c2: i2c at f7102000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x0 0xf7102000 0x0 0x1000>;
+ clocks = <&sys_ctrl HI6220_I2C2_CLK>;
+ interrupts = <0 46 4>;
+ i2c-sda-hold-time-ns = <300>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;
+ status = "disabled";
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 08/16] arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Guodong Xu
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 5c9ee31..e00e9ec 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -42,6 +42,15 @@
<0x00000000 0x06e00000 0x00000000 0x0060f000>,
<0x00000000 0x07410000 0x00000000 0x36bf0000>;
};
+
+ soc {
+ i2c0: i2c@f7100000 {
+ status = "ok";
+ };
+ i2c1: i2c@f7101000 {
+ status = "ok";
+ };
+ };
};
&uart2 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 08/16] arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 5c9ee31..e00e9ec 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -42,6 +42,15 @@
<0x00000000 0x06e00000 0x00000000 0x0060f000>,
<0x00000000 0x07410000 0x00000000 0x36bf0000>;
};
+
+ soc {
+ i2c0: i2c at f7100000 {
+ status = "ok";
+ };
+ i2c1: i2c at f7101000 {
+ status = "ok";
+ };
+ };
};
&uart2 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 09/16] arm64: dts: add hi6220 usb node
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei,
Zhangfei Gao
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 32 +++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 53b5b25..3faa004 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -635,5 +635,37 @@
pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;
status = "disabled";
};
+
+ fixed_5v_hub: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed_5v_hub";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ gpio = <&gpio0 7 0>;
+ regulator-always-on;
+ };
+
+ usb_phy: usbphy {
+ compatible = "hisilicon,hi6220-usb-phy";
+ #phy-cells = <0>;
+ phy-supply = <&fixed_5v_hub>;
+ hisilicon,peripheral-syscon = <&sys_ctrl>;
+ };
+
+ usb: usb@f72c0000 {
+ compatible = "hisilicon,hi6220-usb";
+ reg = <0x0 0xf72c0000 0x0 0x40000>;
+ phys = <&usb_phy>;
+ phy-names = "usb2-phy";
+ clocks = <&sys_ctrl HI6220_USBOTG_HCLK>;
+ clock-names = "otg";
+ dr_mode = "otg";
+ g-use-dma;
+ g-rx-fifo-size = <512>;
+ g-np-tx-fifo-size = <128>;
+ g-tx-fifo-size = <128 128 128 128 128 128>;
+ interrupts = <0 77 0x4>;
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 09/16] arm64: dts: add hi6220 usb node
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 32 +++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 53b5b25..3faa004 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -635,5 +635,37 @@
pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;
status = "disabled";
};
+
+ fixed_5v_hub: regulator at 0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed_5v_hub";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ gpio = <&gpio0 7 0>;
+ regulator-always-on;
+ };
+
+ usb_phy: usbphy {
+ compatible = "hisilicon,hi6220-usb-phy";
+ #phy-cells = <0>;
+ phy-supply = <&fixed_5v_hub>;
+ hisilicon,peripheral-syscon = <&sys_ctrl>;
+ };
+
+ usb: usb at f72c0000 {
+ compatible = "hisilicon,hi6220-usb";
+ reg = <0x0 0xf72c0000 0x0 0x40000>;
+ phys = <&usb_phy>;
+ phy-names = "usb2-phy";
+ clocks = <&sys_ctrl HI6220_USBOTG_HCLK>;
+ clock-names = "otg";
+ dr_mode = "otg";
+ g-use-dma;
+ g-rx-fifo-size = <512>;
+ g-np-tx-fifo-size = <128>;
+ g-tx-fifo-size = <128 128 128 128 128 128>;
+ interrupts = <0 77 0x4>;
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 10/16] arm64: dts: add mailbox node for Hi6220
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Leo Yan
From: Leo Yan <leo.yan@linaro.org>
This patch add device mailbox node for Hi6220 in DT.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3faa004..6cddd47 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -667,5 +667,13 @@
g-tx-fifo-size = <128 128 128 128 128 128>;
interrupts = <0 77 0x4>;
};
+
+ mailbox: mailbox@f7510000 {
+ compatible = "hisilicon,hi6220-mbox";
+ reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
+ <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <3>;
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 10/16] arm64: dts: add mailbox node for Hi6220
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Leo Yan <leo.yan@linaro.org>
This patch add device mailbox node for Hi6220 in DT.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3faa004..6cddd47 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -667,5 +667,13 @@
g-tx-fifo-size = <128 128 128 128 128 128>;
interrupts = <0 77 0x4>;
};
+
+ mailbox: mailbox at f7510000 {
+ compatible = "hisilicon,hi6220-mbox";
+ reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
+ <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <3>;
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 11/16] arm64: dts: add Hi6220's stub clock node
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Leo Yan
From: Leo Yan <leo.yan@linaro.org>
Enable SRAM node and stub clock node for Hi6220, which uses mailbox
channel 1 for CPU's frequency change.
Furthermore, add the CPU clock phandle in CPU's node and using
operating-points-v2 to register operating points. So can be used by
cpufreq-dt driver.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 56 +++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 6cddd47..2442617 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -82,6 +82,11 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ clocks = <&stub_clock 0>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cooling-min-level = <4>;
+ cooling-max-level = <0>;
+ #cooling-cells = <2>; /* min followed by max */
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -90,6 +95,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -98,6 +104,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -106,6 +113,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -114,6 +122,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -122,6 +131,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -130,6 +140,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -138,10 +149,42 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
};
+ cpu_opp_table: cpu_opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <208000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <500000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <432000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <500000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <729000000>;
+ opp-microvolt = <1090000>;
+ clock-latency-ns = <500000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1180000>;
+ clock-latency-ns = <500000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1330000>;
+ clock-latency-ns = <500000>;
+ };
+ };
+
gic: interrupt-controller@f6801000 {
compatible = "arm,gic-400";
reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
@@ -169,6 +212,11 @@
#size-cells = <2>;
ranges;
+ sram: sram@fff80000 {
+ compatible = "hisilicon,hi6220-sramctrl", "syscon";
+ reg = <0x0 0xfff80000 0x0 0x12000>;
+ };
+
ao_ctrl: ao_ctrl@f7800000 {
compatible = "hisilicon,hi6220-aoctrl", "syscon";
reg = <0x0 0xf7800000 0x0 0x2000>;
@@ -194,6 +242,14 @@
#clock-cells = <1>;
};
+ stub_clock: stub_clock {
+ compatible = "hisilicon,hi6220-stub-clk";
+ hisilicon,hi6220-clk-sram = <&sram>;
+ #clock-cells = <1>;
+ mbox-names = "mbox-tx";
+ mboxes = <&mailbox 1 0 11>;
+ };
+
uart0: uart@f8015000 { /* console */
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf8015000 0x0 0x1000>;
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 11/16] arm64: dts: add Hi6220's stub clock node
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Leo Yan <leo.yan@linaro.org>
Enable SRAM node and stub clock node for Hi6220, which uses mailbox
channel 1 for CPU's frequency change.
Furthermore, add the CPU clock phandle in CPU's node and using
operating-points-v2 to register operating points. So can be used by
cpufreq-dt driver.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 56 +++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 6cddd47..2442617 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -82,6 +82,11 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ clocks = <&stub_clock 0>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cooling-min-level = <4>;
+ cooling-max-level = <0>;
+ #cooling-cells = <2>; /* min followed by max */
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -90,6 +95,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -98,6 +104,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -106,6 +113,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -114,6 +122,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -122,6 +131,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -130,6 +140,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
@@ -138,10 +149,42 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
};
+ cpu_opp_table: cpu_opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <208000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <500000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <432000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <500000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <729000000>;
+ opp-microvolt = <1090000>;
+ clock-latency-ns = <500000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1180000>;
+ clock-latency-ns = <500000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1330000>;
+ clock-latency-ns = <500000>;
+ };
+ };
+
gic: interrupt-controller at f6801000 {
compatible = "arm,gic-400";
reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
@@ -169,6 +212,11 @@
#size-cells = <2>;
ranges;
+ sram: sram at fff80000 {
+ compatible = "hisilicon,hi6220-sramctrl", "syscon";
+ reg = <0x0 0xfff80000 0x0 0x12000>;
+ };
+
ao_ctrl: ao_ctrl at f7800000 {
compatible = "hisilicon,hi6220-aoctrl", "syscon";
reg = <0x0 0xf7800000 0x0 0x2000>;
@@ -194,6 +242,14 @@
#clock-cells = <1>;
};
+ stub_clock: stub_clock {
+ compatible = "hisilicon,hi6220-stub-clk";
+ hisilicon,hi6220-clk-sram = <&sram>;
+ #clock-cells = <1>;
+ mbox-names = "mbox-tx";
+ mboxes = <&mailbox 1 0 11>;
+ };
+
uart0: uart at f8015000 { /* console */
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf8015000 0x0 0x1000>;
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 12/16] arm64: dts: hi6220: add pinctrl for uarts and enable them
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Guodong Xu
Add pinctrl for uart2 uart3 and uart4. Enable uart1 uart2 and uart3.
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 12 ++++++++++++
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 9 +++++++++
2 files changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index e00e9ec..c4f560a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -50,6 +50,18 @@
i2c1: i2c@f7101000 {
status = "ok";
};
+
+ uart1: uart@f7111000 {
+ status = "ok";
+ };
+
+ uart2: uart@f7112000 {
+ status = "ok";
+ };
+
+ uart3: uart@f7113000 {
+ status = "ok";
+ };
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 2442617..994622b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -266,6 +266,8 @@
clocks = <&sys_ctrl HI6220_UART1_PCLK>,
<&sys_ctrl HI6220_UART1_PCLK>;
clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func1 &uart1_cfg_func2>;
status = "disabled";
};
@@ -276,6 +278,8 @@
clocks = <&sys_ctrl HI6220_UART2_PCLK>,
<&sys_ctrl HI6220_UART2_PCLK>;
clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
status = "disabled";
};
@@ -286,6 +290,9 @@
clocks = <&sys_ctrl HI6220_UART3_PCLK>,
<&sys_ctrl HI6220_UART3_PCLK>;
clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
+ status = "disabled";
};
uart4: uart@f7114000 {
@@ -295,6 +302,8 @@
clocks = <&sys_ctrl HI6220_UART4_PCLK>,
<&sys_ctrl HI6220_UART4_PCLK>;
clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
status = "disabled";
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 12/16] arm64: dts: hi6220: add pinctrl for uarts and enable them
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
Add pinctrl for uart2 uart3 and uart4. Enable uart1 uart2 and uart3.
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 12 ++++++++++++
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 9 +++++++++
2 files changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index e00e9ec..c4f560a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -50,6 +50,18 @@
i2c1: i2c at f7101000 {
status = "ok";
};
+
+ uart1: uart at f7111000 {
+ status = "ok";
+ };
+
+ uart2: uart at f7112000 {
+ status = "ok";
+ };
+
+ uart3: uart at f7113000 {
+ status = "ok";
+ };
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 2442617..994622b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -266,6 +266,8 @@
clocks = <&sys_ctrl HI6220_UART1_PCLK>,
<&sys_ctrl HI6220_UART1_PCLK>;
clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func1 &uart1_cfg_func2>;
status = "disabled";
};
@@ -276,6 +278,8 @@
clocks = <&sys_ctrl HI6220_UART2_PCLK>,
<&sys_ctrl HI6220_UART2_PCLK>;
clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
status = "disabled";
};
@@ -286,6 +290,9 @@
clocks = <&sys_ctrl HI6220_UART3_PCLK>,
<&sys_ctrl HI6220_UART3_PCLK>;
clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
+ status = "disabled";
};
uart4: uart at f7114000 {
@@ -295,6 +302,8 @@
clocks = <&sys_ctrl HI6220_UART4_PCLK>,
<&sys_ctrl HI6220_UART4_PCLK>;
clock-names = "uartclk", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
status = "disabled";
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 13/16] arm64: dts: add LED nodes for hi6220-hikey
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Guodong Xu
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 41 ++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index c4f560a..28bc646 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -63,6 +63,47 @@
status = "ok";
};
};
+
+ leds {
+ compatible = "gpio-leds";
+ user_led4 {
+ label = "user_led4";
+ gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
+ linux,default-trigger = "heartbeat";
+ };
+
+ user_led3 {
+ label = "user_led3";
+ gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
+ linux,default-trigger = "mmc0";
+ };
+
+ user_led2 {
+ label = "user_led2";
+ gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
+ linux,default-trigger = "mmc1";
+ };
+
+ user_led1 {
+ label = "user_led1";
+ gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
+ linux,default-trigger = "cpu0";
+ };
+
+ wlan_active_led {
+ label = "wifi_active";
+ gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+
+ bt_active_led {
+ label = "bt_active";
+ gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
+ linux,default-trigger = "hci0rx";
+ default-state = "off";
+ };
+ };
};
&uart2 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 13/16] arm64: dts: add LED nodes for hi6220-hikey
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 41 ++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index c4f560a..28bc646 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -63,6 +63,47 @@
status = "ok";
};
};
+
+ leds {
+ compatible = "gpio-leds";
+ user_led4 {
+ label = "user_led4";
+ gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
+ linux,default-trigger = "heartbeat";
+ };
+
+ user_led3 {
+ label = "user_led3";
+ gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
+ linux,default-trigger = "mmc0";
+ };
+
+ user_led2 {
+ label = "user_led2";
+ gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
+ linux,default-trigger = "mmc1";
+ };
+
+ user_led1 {
+ label = "user_led1";
+ gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
+ linux,default-trigger = "cpu0";
+ };
+
+ wlan_active_led {
+ label = "wifi_active";
+ gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+
+ bt_active_led {
+ label = "bt_active";
+ gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
+ linux,default-trigger = "hci0rx";
+ default-state = "off";
+ };
+ };
};
&uart2 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 14/16] arm64: dts: hikey: Add hi655x pmic dts node
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei,
Chen Feng, Fei Wang
From: Chen Feng <puck.chen@hisilicon.com>
Add the mfd hi655x dts node and regulator support on
hi6220 platform.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Fei Wang <w.f@huawei.com>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Guodong Xu <guodong.xu@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 87 ++++++++++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 28bc646..a6dffa8 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -6,6 +6,7 @@
*/
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
#include "hi6220.dtsi"
#include "hikey-gpio.dtsi"
@@ -104,6 +105,92 @@
default-state = "off";
};
};
+
+ pmic: pmic@f8000000 {
+ compatible = "hisilicon,hi655x-pmic";
+ reg = <0x0 0xf8000000 0x0 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ regulators {
+ ldo2: LDO2@a21 {
+ regulator-name = "LDO2_2V8";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3200000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo7: LDO7@a26 {
+ regulator-name = "LDO7_SDIO";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo10: LDO10@a29 {
+ regulator-name = "LDO10_2V85";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <360>;
+ };
+
+ ldo13: LDO13@a32 {
+ regulator-name = "LDO13_1V8";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo14: LDO14@a33 {
+ regulator-name = "LDO14_2V8";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3200000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo15: LDO15@a34 {
+ regulator-name = "LDO15_1V8";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo17: LDO17@a36 {
+ regulator-name = "LDO17_2V5";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3200000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo19: LDO19@a38 {
+ regulator-name = "LDO19_3V0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <360>;
+ };
+
+ ldo21: LDO21@a40 {
+ regulator-name = "LDO21_1V8";
+ regulator-min-microvolt = <1650000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-always-on;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo22: LDO22@a41 {
+ regulator-name = "LDO22_1V2";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-enable-ramp-delay = <120>;
+ };
+ };
+ };
};
&uart2 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 14/16] arm64: dts: hikey: Add hi655x pmic dts node
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Chen Feng <puck.chen@hisilicon.com>
Add the mfd hi655x dts node and regulator support on
hi6220 platform.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Fei Wang <w.f@huawei.com>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Guodong Xu <guodong.xu@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 87 ++++++++++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 28bc646..a6dffa8 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -6,6 +6,7 @@
*/
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
#include "hi6220.dtsi"
#include "hikey-gpio.dtsi"
@@ -104,6 +105,92 @@
default-state = "off";
};
};
+
+ pmic: pmic at f8000000 {
+ compatible = "hisilicon,hi655x-pmic";
+ reg = <0x0 0xf8000000 0x0 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ regulators {
+ ldo2: LDO2 at a21 {
+ regulator-name = "LDO2_2V8";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3200000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo7: LDO7 at a26 {
+ regulator-name = "LDO7_SDIO";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo10: LDO10 at a29 {
+ regulator-name = "LDO10_2V85";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <360>;
+ };
+
+ ldo13: LDO13 at a32 {
+ regulator-name = "LDO13_1V8";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo14: LDO14 at a33 {
+ regulator-name = "LDO14_2V8";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3200000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo15: LDO15 at a34 {
+ regulator-name = "LDO15_1V8";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo17: LDO17 at a36 {
+ regulator-name = "LDO17_2V5";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3200000>;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo19: LDO19 at a38 {
+ regulator-name = "LDO19_3V0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <360>;
+ };
+
+ ldo21: LDO21 at a40 {
+ regulator-name = "LDO21_1V8";
+ regulator-min-microvolt = <1650000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-always-on;
+ regulator-enable-ramp-delay = <120>;
+ };
+
+ ldo22: LDO22 at a41 {
+ regulator-name = "LDO22_1V2";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-enable-ramp-delay = <120>;
+ };
+ };
+ };
};
&uart2 {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 15/16] arm64: dts: add dwmmc nodes for hi6220
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Guodong Xu
From: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Add all three dwmmc nodes description for hi6220
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 53 +++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 994622b..2e3d02d 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -740,5 +740,58 @@
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <3>;
};
+
+ dwmmc_0: dwmmc0@f723d000 {
+ compatible = "hisilicon,hi6220-dw-mshc";
+ num-slots = <0x1>;
+ cap-mmc-highspeed;
+ non-removable;
+ reg = <0x0 0xf723d000 0x0 0x1000>;
+ interrupts = <0x0 0x48 0x4>;
+ clocks = <&sys_ctrl 2>, <&sys_ctrl 1>;
+ clock-names = "ciu", "biu";
+ bus-width = <0x8>;
+ vmmc-supply = <&ldo19>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pmx_func &emmc_clk_cfg_func
+ &emmc_cfg_func &emmc_rst_cfg_func>;
+ };
+
+ dwmmc_1: dwmmc1@f723e000 {
+ compatible = "hisilicon,hi6220-dw-mshc";
+ num-slots = <0x1>;
+ card-detect-delay = <200>;
+ hisilicon,peripheral-syscon = <&ao_ctrl>;
+ cap-sd-highspeed;
+ reg = <0x0 0xf723e000 0x0 0x1000>;
+ interrupts = <0x0 0x49 0x4>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ clocks = <&sys_ctrl 4>, <&sys_ctrl 3>;
+ clock-names = "ciu", "biu";
+ vqmmc-supply = <&ldo7>;
+ vmmc-supply = <&ldo10>;
+ bus-width = <0x4>;
+ disable-wp;
+ cd-gpios = <&gpio1 0 1>;
+ pinctrl-names = "default", "idle";
+ pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>;
+ pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>;
+ };
+
+ dwmmc_2: dwmmc2@f723f000 {
+ compatible = "hisilicon,hi6220-dw-mshc";
+ status = "okay";
+ num-slots = <0x1>;
+ reg = <0x0 0xf723f000 0x0 0x1000>;
+ interrupts = <0x0 0x4a 0x4>;
+ clocks = <&sys_ctrl HI6220_MMC2_CIUCLK>, <&sys_ctrl HI6220_MMC2_CLK>;
+ clock-names = "ciu", "biu";
+ bus-width = <0x4>;
+ broken-cd;
+ pinctrl-names = "default", "idle";
+ pinctrl-0 = <&sdio_pmx_func &sdio_clk_cfg_func &sdio_cfg_func>;
+ pinctrl-1 = <&sdio_pmx_idle &sdio_clk_cfg_idle &sdio_cfg_idle>;
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 15/16] arm64: dts: add dwmmc nodes for hi6220
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Add all three dwmmc nodes description for hi6220
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 53 +++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 994622b..2e3d02d 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -740,5 +740,58 @@
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <3>;
};
+
+ dwmmc_0: dwmmc0 at f723d000 {
+ compatible = "hisilicon,hi6220-dw-mshc";
+ num-slots = <0x1>;
+ cap-mmc-highspeed;
+ non-removable;
+ reg = <0x0 0xf723d000 0x0 0x1000>;
+ interrupts = <0x0 0x48 0x4>;
+ clocks = <&sys_ctrl 2>, <&sys_ctrl 1>;
+ clock-names = "ciu", "biu";
+ bus-width = <0x8>;
+ vmmc-supply = <&ldo19>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pmx_func &emmc_clk_cfg_func
+ &emmc_cfg_func &emmc_rst_cfg_func>;
+ };
+
+ dwmmc_1: dwmmc1 at f723e000 {
+ compatible = "hisilicon,hi6220-dw-mshc";
+ num-slots = <0x1>;
+ card-detect-delay = <200>;
+ hisilicon,peripheral-syscon = <&ao_ctrl>;
+ cap-sd-highspeed;
+ reg = <0x0 0xf723e000 0x0 0x1000>;
+ interrupts = <0x0 0x49 0x4>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ clocks = <&sys_ctrl 4>, <&sys_ctrl 3>;
+ clock-names = "ciu", "biu";
+ vqmmc-supply = <&ldo7>;
+ vmmc-supply = <&ldo10>;
+ bus-width = <0x4>;
+ disable-wp;
+ cd-gpios = <&gpio1 0 1>;
+ pinctrl-names = "default", "idle";
+ pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>;
+ pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>;
+ };
+
+ dwmmc_2: dwmmc2 at f723f000 {
+ compatible = "hisilicon,hi6220-dw-mshc";
+ status = "okay";
+ num-slots = <0x1>;
+ reg = <0x0 0xf723f000 0x0 0x1000>;
+ interrupts = <0x0 0x4a 0x4>;
+ clocks = <&sys_ctrl HI6220_MMC2_CIUCLK>, <&sys_ctrl HI6220_MMC2_CLK>;
+ clock-names = "ciu", "biu";
+ bus-width = <0x4>;
+ broken-cd;
+ pinctrl-names = "default", "idle";
+ pinctrl-0 = <&sdio_pmx_func &sdio_clk_cfg_func &sdio_cfg_func>;
+ pinctrl-1 = <&sdio_pmx_idle &sdio_clk_cfg_idle &sdio_cfg_idle>;
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 16/16] arm64: dts: add wifi nodes support for hi6220-hikey
2016-04-05 13:27 ` Guodong Xu
@ 2016-04-05 13:27 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: xuwei5, mark.rutland, robh, grant.likely, linus.walleij, arnd.bergmann
Cc: devicetree, linux-kernel, linux-arm-kernel, kong.kongxinwei, Guodong Xu
Add wifi nodes support for hi6220-hikey
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 30 ++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index a6dffa8..78ce994 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -48,6 +48,7 @@
i2c0: i2c@f7100000 {
status = "ok";
};
+
i2c1: i2c@f7101000 {
status = "ok";
};
@@ -63,6 +64,35 @@
uart3: uart@f7113000 {
status = "ok";
};
+
+ dwmmc_2: dwmmc2@f723f000 {
+ ti,non-removable;
+ non-removable;
+ /* WL_EN */
+ vmmc-supply = <&wlan_en_reg>;
+
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ wlcore: wlcore@2 {
+ compatible = "ti,wl1835";
+ reg = <2>; /* sdio func num */
+ /* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
+ interrupt-parent = <&gpio1>;
+ interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
+
+ wlan_en_reg: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ /* WLAN_EN GPIO */
+ gpio = <&gpio0 5 0>;
+ /* WLAN card specific delay */
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
};
leds {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v3 16/16] arm64: dts: add wifi nodes support for hi6220-hikey
@ 2016-04-05 13:27 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-05 13:27 UTC (permalink / raw)
To: linux-arm-kernel
Add wifi nodes support for hi6220-hikey
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 30 ++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index a6dffa8..78ce994 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -48,6 +48,7 @@
i2c0: i2c at f7100000 {
status = "ok";
};
+
i2c1: i2c at f7101000 {
status = "ok";
};
@@ -63,6 +64,35 @@
uart3: uart at f7113000 {
status = "ok";
};
+
+ dwmmc_2: dwmmc2 at f723f000 {
+ ti,non-removable;
+ non-removable;
+ /* WL_EN */
+ vmmc-supply = <&wlan_en_reg>;
+
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ wlcore: wlcore at 2 {
+ compatible = "ti,wl1835";
+ reg = <2>; /* sdio func num */
+ /* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
+ interrupt-parent = <&gpio1>;
+ interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
+
+ wlan_en_reg: fixedregulator at 1 {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ /* WLAN_EN GPIO */
+ gpio = <&gpio0 5 0>;
+ /* WLAN card specific delay */
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
};
leds {
--
1.9.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH v3 02/16] arm64: dts: add sp804 timer node for Hi6220
@ 2016-04-08 12:17 ` Linus Walleij
0 siblings, 0 replies; 45+ messages in thread
From: Linus Walleij @ 2016-04-08 12:17 UTC (permalink / raw)
To: Guodong Xu
Cc: Xu Wei, Mark Rutland, Rob Herring, Grant Likely, Arnd Bergmann,
devicetree, linux-kernel, linux-arm-kernel, XinWei Kong, Leo Yan
On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu@linaro.org> wrote:
> From: Leo Yan <leo.yan@linaro.org>
>
> Add sp804 timer for hi6220, so it can be used as broadcast timer.
>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v3 02/16] arm64: dts: add sp804 timer node for Hi6220
@ 2016-04-08 12:17 ` Linus Walleij
0 siblings, 0 replies; 45+ messages in thread
From: Linus Walleij @ 2016-04-08 12:17 UTC (permalink / raw)
To: Guodong Xu
Cc: Xu Wei, Mark Rutland, Rob Herring, Grant Likely, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, XinWei Kong,
Leo Yan
On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> From: Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>
> Add sp804 timer for hi6220, so it can be used as broadcast timer.
>
> Signed-off-by: Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Reviewed-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 02/16] arm64: dts: add sp804 timer node for Hi6220
@ 2016-04-08 12:17 ` Linus Walleij
0 siblings, 0 replies; 45+ messages in thread
From: Linus Walleij @ 2016-04-08 12:17 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu@linaro.org> wrote:
> From: Leo Yan <leo.yan@linaro.org>
>
> Add sp804 timer for hi6220, so it can be used as broadcast timer.
>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes
@ 2016-04-08 12:19 ` Linus Walleij
0 siblings, 0 replies; 45+ messages in thread
From: Linus Walleij @ 2016-04-08 12:19 UTC (permalink / raw)
To: Guodong Xu
Cc: Xu Wei, Mark Rutland, Rob Herring, Grant Likely, Arnd Bergmann,
devicetree, linux-kernel, linux-arm-kernel, XinWei Kong,
Zhong Kaihua
On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu@linaro.org> wrote:
> From: Zhong Kaihua <zhongkaihua@huawei.com>
>
> Add Hi6220 gpio configuration nodes
>
> Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
> Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com>
>
I asked you to remove this blank line.
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
(...)
> +++ b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
> @@ -0,0 +1,607 @@
> +/ {
> + gpio_rstout_n:gpio_rstout_n {
> + gpios;
> + };
I also asked about either explaining or removing this.
Did my mail arrive?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes
@ 2016-04-08 12:19 ` Linus Walleij
0 siblings, 0 replies; 45+ messages in thread
From: Linus Walleij @ 2016-04-08 12:19 UTC (permalink / raw)
To: Guodong Xu
Cc: Xu Wei, Mark Rutland, Rob Herring, Grant Likely, Arnd Bergmann,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, XinWei Kong,
Zhong Kaihua
On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> From: Zhong Kaihua <zhongkaihua-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>
> Add Hi6220 gpio configuration nodes
>
> Signed-off-by: Zhong Kaihua <zhongkaihua-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
> Signed-off-by: Kong Xinwei <kong.kongxinwei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
>
I asked you to remove this blank line.
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Wei Xu <xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
(...)
> +++ b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
> @@ -0,0 +1,607 @@
> +/ {
> + gpio_rstout_n:gpio_rstout_n {
> + gpios;
> + };
I also asked about either explaining or removing this.
Did my mail arrive?
Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes
@ 2016-04-08 12:19 ` Linus Walleij
0 siblings, 0 replies; 45+ messages in thread
From: Linus Walleij @ 2016-04-08 12:19 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu@linaro.org> wrote:
> From: Zhong Kaihua <zhongkaihua@huawei.com>
>
> Add Hi6220 gpio configuration nodes
>
> Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
> Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com>
>
I asked you to remove this blank line.
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
(...)
> +++ b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
> @@ -0,0 +1,607 @@
> +/ {
> + gpio_rstout_n:gpio_rstout_n {
> + gpios;
> + };
I also asked about either explaining or removing this.
Did my mail arrive?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes
2016-04-08 12:19 ` Linus Walleij
(?)
@ 2016-04-12 9:43 ` Guodong Xu
-1 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-12 9:43 UTC (permalink / raw)
To: Linus Walleij
Cc: Xu Wei, Mark Rutland, Rob Herring, Grant Likely, Arnd Bergmann,
devicetree, linux-kernel, linux-arm-kernel, XinWei Kong,
Zhong Kaihua
On 8 April 2016 at 20:19, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu@linaro.org> wrote:
>
>> From: Zhong Kaihua <zhongkaihua@huawei.com>
>>
>> Add Hi6220 gpio configuration nodes
>>
>> Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
>> Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com>
>>
>
> I asked you to remove this blank line.
will fix.
>
>> Acked-by: Rob Herring <robh@kernel.org>
>> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
>
> (...)
>> +++ b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
>> @@ -0,0 +1,607 @@
>> +/ {
>> + gpio_rstout_n:gpio_rstout_n {
>> + gpios;
>> + };
>
> I also asked about either explaining or removing this.
>
> Did my mail arrive?
It arrived. My mistake, sorry, i missed. I will remove this file. And
send a new version.
-Guodong
>
> Yours,
> Linus Walleij
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes
@ 2016-04-12 9:43 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-12 9:43 UTC (permalink / raw)
To: Linus Walleij
Cc: Xu Wei, Mark Rutland, Rob Herring, Grant Likely, Arnd Bergmann,
devicetree, linux-kernel, linux-arm-kernel, XinWei Kong,
Zhong Kaihua
On 8 April 2016 at 20:19, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu@linaro.org> wrote:
>
>> From: Zhong Kaihua <zhongkaihua@huawei.com>
>>
>> Add Hi6220 gpio configuration nodes
>>
>> Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
>> Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com>
>>
>
> I asked you to remove this blank line.
will fix.
>
>> Acked-by: Rob Herring <robh@kernel.org>
>> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
>
> (...)
>> +++ b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
>> @@ -0,0 +1,607 @@
>> +/ {
>> + gpio_rstout_n:gpio_rstout_n {
>> + gpios;
>> + };
>
> I also asked about either explaining or removing this.
>
> Did my mail arrive?
It arrived. My mistake, sorry, i missed. I will remove this file. And
send a new version.
-Guodong
>
> Yours,
> Linus Walleij
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes
@ 2016-04-12 9:43 ` Guodong Xu
0 siblings, 0 replies; 45+ messages in thread
From: Guodong Xu @ 2016-04-12 9:43 UTC (permalink / raw)
To: linux-arm-kernel
On 8 April 2016 at 20:19, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Tue, Apr 5, 2016 at 3:27 PM, Guodong Xu <guodong.xu@linaro.org> wrote:
>
>> From: Zhong Kaihua <zhongkaihua@huawei.com>
>>
>> Add Hi6220 gpio configuration nodes
>>
>> Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
>> Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com>
>>
>
> I asked you to remove this blank line.
will fix.
>
>> Acked-by: Rob Herring <robh@kernel.org>
>> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
>
> (...)
>> +++ b/arch/arm64/boot/dts/hisilicon/hikey-gpio.dtsi
>> @@ -0,0 +1,607 @@
>> +/ {
>> + gpio_rstout_n:gpio_rstout_n {
>> + gpios;
>> + };
>
> I also asked about either explaining or removing this.
>
> Did my mail arrive?
It arrived. My mistake, sorry, i missed. I will remove this file. And
send a new version.
-Guodong
>
> Yours,
> Linus Walleij
^ permalink raw reply [flat|nested] 45+ messages in thread
end of thread, other threads:[~2016-04-12 9:43 UTC | newest]
Thread overview: 45+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-04-05 13:27 [PATCH v3 00/16] DTS for hi6220 and HiKey Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 01/16] arm64: dts: Reserve memory regions for hi6220 Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 02/16] arm64: dts: add sp804 timer node for Hi6220 Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-08 12:17 ` Linus Walleij
2016-04-08 12:17 ` Linus Walleij
2016-04-08 12:17 ` Linus Walleij
2016-04-05 13:27 ` [PATCH v3 03/16] arm64: dts: enable idle states " Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 04/16] arm64: dts: Add Hi6220 gpio configuration nodes Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-08 12:19 ` Linus Walleij
2016-04-08 12:19 ` Linus Walleij
2016-04-08 12:19 ` Linus Walleij
2016-04-12 9:43 ` Guodong Xu
2016-04-12 9:43 ` Guodong Xu
2016-04-12 9:43 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 05/16] arm64: dts: add Hi6220 pinctrl " Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 06/16] arm64: dts: add Hi6220 spi " Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 07/16] arm64: dts: add all hi6220 i2c nodes Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 08/16] arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 09/16] arm64: dts: add hi6220 usb node Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 10/16] arm64: dts: add mailbox node for Hi6220 Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 11/16] arm64: dts: add Hi6220's stub clock node Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 12/16] arm64: dts: hi6220: add pinctrl for uarts and enable them Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 13/16] arm64: dts: add LED nodes for hi6220-hikey Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 14/16] arm64: dts: hikey: Add hi655x pmic dts node Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 15/16] arm64: dts: add dwmmc nodes for hi6220 Guodong Xu
2016-04-05 13:27 ` Guodong Xu
2016-04-05 13:27 ` [PATCH v3 16/16] arm64: dts: add wifi nodes support for hi6220-hikey Guodong Xu
2016-04-05 13:27 ` Guodong Xu
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.