* [PATCH 0/3] DPCD Backlight Control @ 2016-04-05 14:10 Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 1/3] drm/dp: Add definition for Display Control DPCD Registers capability size Yetunde Adebisi ` (4 more replies) 0 siblings, 5 replies; 9+ messages in thread From: Yetunde Adebisi @ 2016-04-05 14:10 UTC (permalink / raw) To: intel-gfx These patches add support for Backlight Control using DPCD registers on eDP displays. - Patch 1 Adds macro for DPCD registers capability size to drm_dp_helper.h - Patch 2 Reads the eDP DPCD Display Control capability registers. - Patch 2 Implements functionaly for DPCD Backlight Control Yetunde Adebisi (3): drm/dp: Add definition for Display Control DPCD Registers capability size drm/i915: Read eDP Display control capability registers drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_params.c | 4 + drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_dp.c | 15 ++- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 173 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 4 + drivers/gpu/drm/i915/intel_panel.c | 4 + include/drm/drm_dp_helper.h | 1 + 8 files changed, 198 insertions(+), 5 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_dp_aux_backlight.c -- 1.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/3] drm/dp: Add definition for Display Control DPCD Registers capability size 2016-04-05 14:10 [PATCH 0/3] DPCD Backlight Control Yetunde Adebisi @ 2016-04-05 14:10 ` Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 2/3] drm/i915: Read eDP Display control capability registers Yetunde Adebisi ` (3 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Yetunde Adebisi @ 2016-04-05 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: dri-devel This is used when reading Display Control capability Registers on the sink device. cc: dri-devel@lists.freedesktop.org Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> --- include/drm/drm_dp_helper.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 1252108..92d9a52 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -621,6 +621,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI #define DP_BRANCH_OUI_HEADER_SIZE 0xc #define DP_RECEIVER_CAP_SIZE 0xf #define EDP_PSR_RECEIVER_CAP_SIZE 2 +#define EDP_DISPLAY_CTL_CAP_SIZE 3 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]); void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]); -- 1.9.3 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/3] drm/i915: Read eDP Display control capability registers 2016-04-05 14:10 [PATCH 0/3] DPCD Backlight Control Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 1/3] drm/dp: Add definition for Display Control DPCD Registers capability size Yetunde Adebisi @ 2016-04-05 14:10 ` Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) Yetunde Adebisi ` (2 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Yetunde Adebisi @ 2016-04-05 14:10 UTC (permalink / raw) To: intel-gfx Add new edp_dpcd variable to intel_dp. Read and save eDP Display control capability registers to edp_dpcd. Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com> --- drivers/gpu/drm/i915/intel_dp.c | 15 ++++++++++----- drivers/gpu/drm/i915/intel_drv.h | 1 + 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index da0c3d2..ad2c7d6 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3777,7 +3777,6 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); struct drm_device *dev = dig_port->base.base.dev; struct drm_i915_private *dev_priv = dev->dev_private; - uint8_t rev; if (intel_dp_dpcd_read_wake(&intel_dp->aux, 0x000, intel_dp->dpcd, sizeof(intel_dp->dpcd)) < 0) @@ -3834,6 +3833,15 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) DRM_DEBUG_KMS("PSR2 %s on sink", dev_priv->psr.psr2_support ? "supported" : "not supported"); } + + /* Read the eDP Display control capabilities registers */ + memset(intel_dp->edp_dpcd, 0, sizeof(intel_dp->edp_dpcd)); + if ((intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_DPCD_DISPLAY_CONTROL_CAPABLE) && + (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_EDP_DPCD_REV, + intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) == + sizeof(intel_dp->edp_dpcd))) + DRM_DEBUG_KMS("EDP DPCD : %*ph\n", (int) sizeof(intel_dp->edp_dpcd), + intel_dp->edp_dpcd); } DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n", @@ -3841,10 +3849,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) yesno(drm_dp_tps3_supported(intel_dp->dpcd))); /* Intermediate frequency support */ - if (is_edp(intel_dp) && - (intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_DPCD_DISPLAY_CONTROL_CAPABLE) && - (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_EDP_DPCD_REV, &rev, 1) == 1) && - (rev >= 0x03)) { /* eDp v1.4 or higher */ + if (is_edp(intel_dp) && (intel_dp->edp_dpcd[0] >= 0x03)) { /* eDp v1.4 or higher */ __le16 sink_rates[DP_MAX_SUPPORTED_RATES]; int i; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 9255b56..b14e515 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -805,6 +805,7 @@ struct intel_dp { uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; + uint8_t edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]; /* sink rates as reported by DP_SUPPORTED_LINK_RATES */ uint8_t num_sink_rates; int sink_rates[DP_MAX_SUPPORTED_RATES]; -- 1.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) 2016-04-05 14:10 [PATCH 0/3] DPCD Backlight Control Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 1/3] drm/dp: Add definition for Display Control DPCD Registers capability size Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 2/3] drm/i915: Read eDP Display control capability registers Yetunde Adebisi @ 2016-04-05 14:10 ` Yetunde Adebisi 2016-04-06 6:56 ` ✓ Fi.CI.BAT: success for DPCD Backlight Control Patchwork 2016-04-26 12:33 ` [PATCH 0/3] " Jani Nikula 4 siblings, 0 replies; 9+ messages in thread From: Yetunde Adebisi @ 2016-04-05 14:10 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula This patch adds support for eDP backlight control using DPCD registers to backlight hooks in intel_panel. It checks for backlight control over AUX channel capability and sets up function pointers to get and set the backlight brightness level if supported. v2: Moved backlight functions from intel_dp.c into a new file intel_dp_aux_backlight.c. Also moved reading of eDP display control registers to intel_dp_get_dpcd v3: Correct some formatting mistakes v4: Updated to use AUX backlight control if PWM control is not possible (Jani) v5: Moved call to initialize backlight registers to dp_aux_setup_backlight v6: Check DP_EDP_BACKLIGHT_PIN_ENABLE_CAP is disabled before setting up AUX backlight control. To fix BLM_PWM_ENABLE igt test warnings on bdw_ultra v7: Add enable_dpcd_backlight module parameter. v8: Rebase onto latest drm-intel-nightly branch v9: Remove changes to intel_dp_dpcd_read_wake Split addition edp_dpcd variable into a separate patch Cc: Bob Paauwe <bob.j.paauwe@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com> --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_params.c | 4 + drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 173 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 3 + drivers/gpu/drm/i915/intel_panel.c | 4 + 6 files changed, 186 insertions(+) create mode 100644 drivers/gpu/drm/i915/intel_dp_aux_backlight.c diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 7ffb51b..11cc3e6 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -79,6 +79,7 @@ i915-y += dvo_ch7017.o \ dvo_tfp410.o \ intel_crt.o \ intel_ddi.o \ + intel_dp_aux_backlight.o \ intel_dp_link_training.o \ intel_dp_mst.o \ intel_dp.o \ diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 1779f02..383c076 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -58,6 +58,7 @@ struct i915_params i915 __read_mostly = { .guc_log_level = -1, .enable_dp_mst = true, .inject_load_failure = 0, + .enable_dpcd_backlight = false, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -210,3 +211,6 @@ MODULE_PARM_DESC(enable_dp_mst, module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); MODULE_PARM_DESC(inject_load_failure, "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); +module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, bool, 0600); +MODULE_PARM_DESC(enable_dpcd_backlight, + "Enable support for DPCD backlight control (default:false)"); diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 02bc278..65e73dd 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -61,6 +61,7 @@ struct i915_params { bool verbose_state_checks; bool nuclear_pageflip; bool enable_dp_mst; + bool enable_dpcd_backlight; }; extern struct i915_params i915 __read_mostly; diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c new file mode 100644 index 0000000..984fb0d --- /dev/null +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -0,0 +1,173 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include "intel_drv.h" + +static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable) +{ + uint8_t reg_val = 0; + + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, + ®_val) < 0) { + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", + DP_EDP_DISPLAY_CONTROL_REGISTER); + return; + } + if (enable) + reg_val |= DP_EDP_BACKLIGHT_ENABLE; + else + reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE); + + if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, + reg_val) != 1) { + DRM_DEBUG_KMS("Failed to %s aux backlight\n", + enable ? "enable" : "disable"); + } +} + +/* + * Read the current backlight value from DPCD register(s) based + * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported + */ +static uint32_t intel_dp_aux_get_backlight(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t read_val[2] = { 0x0 }; + uint16_t level = 0; + + if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, + &read_val, sizeof(read_val)) < 0) { + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", + DP_EDP_BACKLIGHT_BRIGHTNESS_MSB); + return 0; + } + level = read_val[0]; + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) + level = (read_val[0] << 8 | read_val[1]); + + return level; +} + +/* + * Sends the current backlight level over the aux channel, checking if its using + * 8-bit or 16 bit value (MSB and LSB) + */ +static void +intel_dp_aux_set_backlight(struct intel_connector *connector, u32 level) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t vals[2] = { 0x0 }; + + vals[0] = level; + + /* Write the MSB and/or LSB */ + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) { + vals[0] = (level & 0xFF00) >> 8; + vals[1] = (level & 0xFF); + } + if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, + vals, sizeof(vals)) < 0) { + DRM_DEBUG_KMS("Failed to write aux backlight level\n"); + return; + } +} + +static void intel_dp_aux_enable_backlight(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t dpcd_buf = 0; + + set_aux_backlight_enable(intel_dp, true); + + if ((drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) == 1) && + ((dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) == + DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET)) + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, + (dpcd_buf | DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD)); +} + +static void intel_dp_aux_disable_backlight(struct intel_connector *connector) +{ + set_aux_backlight_enable(enc_to_intel_dp(&connector->encoder->base), false); +} + +static int intel_dp_aux_setup_backlight(struct intel_connector *connector, + enum pipe pipe) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + struct intel_panel *panel = &connector->panel; + + intel_dp_aux_enable_backlight(connector); + + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) + panel->backlight.max = 0xFFFF; + else + panel->backlight.max = 0xFF; + + panel->backlight.min = 0; + panel->backlight.level = intel_dp_aux_get_backlight(connector); + + panel->backlight.enabled = panel->backlight.level != 0; + + return 0; +} + +static bool +intel_dp_aux_display_control_capable(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + + /* Check the eDP Display control capabilities registers to determine if + * the panel can support backlight control over the aux channel + */ + if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP && + (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) && + !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) || + (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) { + + DRM_DEBUG_KMS("AUX Backlight Control Supported!\n"); + return true; + } + return false; +} + +int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) +{ + struct intel_panel *panel = &intel_connector->panel; + + if(!i915.enable_dpcd_backlight) + return -ENODEV; + + if (!intel_dp_aux_display_control_capable(intel_connector)) + return -ENODEV; + + panel->backlight.setup = intel_dp_aux_setup_backlight; + panel->backlight.enable = intel_dp_aux_enable_backlight; + panel->backlight.disable = intel_dp_aux_disable_backlight; + panel->backlight.set = intel_dp_aux_set_backlight; + panel->backlight.get = intel_dp_aux_get_backlight; + + return 0; +} diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b14e515..cefdb6b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1322,6 +1322,9 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); bool intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); +/* intel_dp_aux_backlight.c */ +int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector); + /* intel_dp_mst.c */ int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 8c8996f..aab5153 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel) container_of(panel, struct intel_connector, panel); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && + intel_dp_aux_init_backlight_funcs(connector) == 0) + return; + if (IS_BROXTON(dev_priv)) { panel->backlight.setup = bxt_setup_backlight; panel->backlight.enable = bxt_enable_backlight; -- 1.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for DPCD Backlight Control 2016-04-05 14:10 [PATCH 0/3] DPCD Backlight Control Yetunde Adebisi ` (2 preceding siblings ...) 2016-04-05 14:10 ` [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) Yetunde Adebisi @ 2016-04-06 6:56 ` Patchwork 2016-04-26 12:33 ` [PATCH 0/3] " Jani Nikula 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2016-04-06 6:56 UTC (permalink / raw) To: Yetunde Adebisi; +Cc: intel-gfx == Series Details == Series: DPCD Backlight Control URL : https://patchwork.freedesktop.org/series/5333/ State : success == Summary == Series 5333v1 DPCD Backlight Control http://patchwork.freedesktop.org/api/1.0/series/5333/revisions/1/mbox/ Test gem_sync: Subgroup basic-all: dmesg-fail -> PASS (bsw-nuc-2) Test kms_force_connector_basic: Subgroup force-connector-state: pass -> SKIP (ilk-hp8440p) Subgroup prune-stale-modes: skip -> PASS (ivb-t430s) Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-c: dmesg-warn -> PASS (bsw-nuc-2) bdw-nuci7 total:196 pass:184 dwarn:0 dfail:0 fail:0 skip:12 bdw-ultra total:196 pass:175 dwarn:0 dfail:0 fail:0 skip:21 bsw-nuc-2 total:196 pass:159 dwarn:0 dfail:0 fail:0 skip:37 byt-nuc total:196 pass:161 dwarn:0 dfail:0 fail:0 skip:35 hsw-brixbox total:196 pass:174 dwarn:0 dfail:0 fail:0 skip:22 hsw-gt2 total:196 pass:179 dwarn:0 dfail:0 fail:0 skip:17 ilk-hp8440p total:196 pass:130 dwarn:1 dfail:0 fail:0 skip:65 ivb-t430s total:196 pass:171 dwarn:0 dfail:0 fail:0 skip:25 skl-i7k-2 total:196 pass:173 dwarn:0 dfail:0 fail:0 skip:23 skl-nuci5 total:196 pass:185 dwarn:0 dfail:0 fail:0 skip:11 snb-dellxps total:196 pass:162 dwarn:0 dfail:0 fail:0 skip:34 snb-x220t total:196 pass:162 dwarn:0 dfail:0 fail:1 skip:33 Results at /archive/results/CI_IGT_test/Patchwork_1808/ 12899f13b8ee9a4944f167a08e4db0526a3f3855 drm-intel-nightly: 2016y-04m-05d-19h-09m-25s UTC integration manifest 74e213a89715dd42332ea4e0add08c1f2323adc2 drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) 80bf6984cb710bd893e26f5baba60f2759f3393b drm/i915: Read eDP Display control capability registers 17f5d0aeffb048c446b007a6440828ed9d4e6f10 drm/dp: Add definition for Display Control DPCD Registers capability size _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] DPCD Backlight Control 2016-04-05 14:10 [PATCH 0/3] DPCD Backlight Control Yetunde Adebisi ` (3 preceding siblings ...) 2016-04-06 6:56 ` ✓ Fi.CI.BAT: success for DPCD Backlight Control Patchwork @ 2016-04-26 12:33 ` Jani Nikula 4 siblings, 0 replies; 9+ messages in thread From: Jani Nikula @ 2016-04-26 12:33 UTC (permalink / raw) To: Yetunde Adebisi, intel-gfx On Tue, 05 Apr 2016, Yetunde Adebisi <yetundex.adebisi@intel.com> wrote: > These patches add support for Backlight Control using DPCD registers on eDP > displays. Pushed to drm-intel-next-queued, thanks for the patches, and, again, apologies for the way too long delay with getting these merged. I fixed some whitespace issues while applying. Please learn to use scripts/checkpatch.pl to get the details right next time. BR, Jani. > > - Patch 1 Adds macro for DPCD registers capability size to drm_dp_helper.h > - Patch 2 Reads the eDP DPCD Display Control capability registers. > - Patch 2 Implements functionaly for DPCD Backlight Control > > Yetunde Adebisi (3): > drm/dp: Add definition for Display Control DPCD Registers capability > size > drm/i915: Read eDP Display control capability registers > drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) > > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/i915_params.c | 4 + > drivers/gpu/drm/i915/i915_params.h | 1 + > drivers/gpu/drm/i915/intel_dp.c | 15 ++- > drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 173 ++++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_drv.h | 4 + > drivers/gpu/drm/i915/intel_panel.c | 4 + > include/drm/drm_dp_helper.h | 1 + > 8 files changed, 198 insertions(+), 5 deletions(-) > create mode 100644 drivers/gpu/drm/i915/intel_dp_aux_backlight.c -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 0/3] DPCD Backlight Control @ 2016-04-26 11:25 Yetunde Adebisi 2016-04-26 11:25 ` [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) Yetunde Adebisi 0 siblings, 1 reply; 9+ messages in thread From: Yetunde Adebisi @ 2016-04-26 11:25 UTC (permalink / raw) To: intel-gfx; +Cc: isg-gms These patches add support for Backlight Control using DPCD registers on eDP displays. - Patch 1 Adds macro for DPCD registers capability size to drm_dp_helper.h - Patch 2 Reads the eDP DPCD Display Control capability registers. - Patch 3 Implements functionaly for DPCD Backlight Control Yetunde Adebisi (3): drm/dp: Add definition for Display Control DPCD Registers capability size drm/i915: Read eDP Display control capability registers drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_params.c | 4 + drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_dp.c | 15 ++- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 173 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 4 + drivers/gpu/drm/i915/intel_panel.c | 4 + include/drm/drm_dp_helper.h | 1 + 8 files changed, 198 insertions(+), 5 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_dp_aux_backlight.c -- 1.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) 2016-04-26 11:25 Yetunde Adebisi @ 2016-04-26 11:25 ` Yetunde Adebisi 2016-05-08 16:24 ` Daniel Vetter 0 siblings, 1 reply; 9+ messages in thread From: Yetunde Adebisi @ 2016-04-26 11:25 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula, isg-gms This patch adds support for eDP backlight control using DPCD registers to backlight hooks in intel_panel. It checks for backlight control over AUX channel capability and sets up function pointers to get and set the backlight brightness level if supported. v2: Moved backlight functions from intel_dp.c into a new file intel_dp_aux_backlight.c. Also moved reading of eDP display control registers to intel_dp_get_dpcd v3: Correct some formatting mistakes v4: Updated to use AUX backlight control if PWM control is not possible (Jani) v5: Moved call to initialize backlight registers to dp_aux_setup_backlight v6: Check DP_EDP_BACKLIGHT_PIN_ENABLE_CAP is disabled before setting up AUX backlight control. To fix BLM_PWM_ENABLE igt test warnings on bdw_ultra v7: Add enable_dpcd_backlight module parameter. v8: Rebase onto latest drm-intel-nightly branch v9: Remove references to intel_dp_dpcd_read_wake Split addition edp_dpcd variable into a separate patch Cc: Bob Paauwe <bob.j.paauwe@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com> --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_params.c | 4 + drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 173 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 3 + drivers/gpu/drm/i915/intel_panel.c | 4 + 6 files changed, 186 insertions(+) create mode 100644 drivers/gpu/drm/i915/intel_dp_aux_backlight.c diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 0b88ba0..723c502 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -81,6 +81,7 @@ i915-y += dvo_ch7017.o \ dvo_tfp410.o \ intel_crt.o \ intel_ddi.o \ + intel_dp_aux_backlight.o \ intel_dp_link_training.o \ intel_dp_mst.o \ intel_dp.o \ diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 1779f02..383c076 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -58,6 +58,7 @@ struct i915_params i915 __read_mostly = { .guc_log_level = -1, .enable_dp_mst = true, .inject_load_failure = 0, + .enable_dpcd_backlight = false, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -210,3 +211,6 @@ MODULE_PARM_DESC(enable_dp_mst, module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); MODULE_PARM_DESC(inject_load_failure, "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); +module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, bool, 0600); +MODULE_PARM_DESC(enable_dpcd_backlight, + "Enable support for DPCD backlight control (default:false)"); diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 02bc278..65e73dd 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -61,6 +61,7 @@ struct i915_params { bool verbose_state_checks; bool nuclear_pageflip; bool enable_dp_mst; + bool enable_dpcd_backlight; }; extern struct i915_params i915 __read_mostly; diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c new file mode 100644 index 0000000..984fb0d --- /dev/null +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -0,0 +1,173 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include "intel_drv.h" + +static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable) +{ + uint8_t reg_val = 0; + + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, + ®_val) < 0) { + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", + DP_EDP_DISPLAY_CONTROL_REGISTER); + return; + } + if (enable) + reg_val |= DP_EDP_BACKLIGHT_ENABLE; + else + reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE); + + if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, + reg_val) != 1) { + DRM_DEBUG_KMS("Failed to %s aux backlight\n", + enable ? "enable" : "disable"); + } +} + +/* + * Read the current backlight value from DPCD register(s) based + * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported + */ +static uint32_t intel_dp_aux_get_backlight(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t read_val[2] = { 0x0 }; + uint16_t level = 0; + + if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, + &read_val, sizeof(read_val)) < 0) { + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", + DP_EDP_BACKLIGHT_BRIGHTNESS_MSB); + return 0; + } + level = read_val[0]; + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) + level = (read_val[0] << 8 | read_val[1]); + + return level; +} + +/* + * Sends the current backlight level over the aux channel, checking if its using + * 8-bit or 16 bit value (MSB and LSB) + */ +static void +intel_dp_aux_set_backlight(struct intel_connector *connector, u32 level) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t vals[2] = { 0x0 }; + + vals[0] = level; + + /* Write the MSB and/or LSB */ + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) { + vals[0] = (level & 0xFF00) >> 8; + vals[1] = (level & 0xFF); + } + if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, + vals, sizeof(vals)) < 0) { + DRM_DEBUG_KMS("Failed to write aux backlight level\n"); + return; + } +} + +static void intel_dp_aux_enable_backlight(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t dpcd_buf = 0; + + set_aux_backlight_enable(intel_dp, true); + + if ((drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) == 1) && + ((dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) == + DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET)) + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, + (dpcd_buf | DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD)); +} + +static void intel_dp_aux_disable_backlight(struct intel_connector *connector) +{ + set_aux_backlight_enable(enc_to_intel_dp(&connector->encoder->base), false); +} + +static int intel_dp_aux_setup_backlight(struct intel_connector *connector, + enum pipe pipe) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + struct intel_panel *panel = &connector->panel; + + intel_dp_aux_enable_backlight(connector); + + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) + panel->backlight.max = 0xFFFF; + else + panel->backlight.max = 0xFF; + + panel->backlight.min = 0; + panel->backlight.level = intel_dp_aux_get_backlight(connector); + + panel->backlight.enabled = panel->backlight.level != 0; + + return 0; +} + +static bool +intel_dp_aux_display_control_capable(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + + /* Check the eDP Display control capabilities registers to determine if + * the panel can support backlight control over the aux channel + */ + if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP && + (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) && + !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) || + (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) { + + DRM_DEBUG_KMS("AUX Backlight Control Supported!\n"); + return true; + } + return false; +} + +int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) +{ + struct intel_panel *panel = &intel_connector->panel; + + if(!i915.enable_dpcd_backlight) + return -ENODEV; + + if (!intel_dp_aux_display_control_capable(intel_connector)) + return -ENODEV; + + panel->backlight.setup = intel_dp_aux_setup_backlight; + panel->backlight.enable = intel_dp_aux_enable_backlight; + panel->backlight.disable = intel_dp_aux_disable_backlight; + panel->backlight.set = intel_dp_aux_set_backlight; + panel->backlight.get = intel_dp_aux_get_backlight; + + return 0; +} diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 99db8bb..cb89a35 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1337,6 +1337,9 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); bool intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); +/* intel_dp_aux_backlight.c */ +int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector); + /* intel_dp_mst.c */ int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index a078876..bd31481 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel) container_of(panel, struct intel_connector, panel); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && + intel_dp_aux_init_backlight_funcs(connector) == 0) + return; + if (IS_BROXTON(dev_priv)) { panel->backlight.setup = bxt_setup_backlight; panel->backlight.enable = bxt_enable_backlight; -- 1.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) 2016-04-26 11:25 ` [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) Yetunde Adebisi @ 2016-05-08 16:24 ` Daniel Vetter 0 siblings, 0 replies; 9+ messages in thread From: Daniel Vetter @ 2016-05-08 16:24 UTC (permalink / raw) To: Yetunde Adebisi; +Cc: Jani Nikula, intel-gfx, isg-gms On Tue, Apr 26, 2016 at 12:25:18PM +0100, Yetunde Adebisi wrote: > This patch adds support for eDP backlight control using DPCD registers to > backlight hooks in intel_panel. > > It checks for backlight control over AUX channel capability and sets up > function pointers to get and set the backlight brightness level if > supported. > > v2: Moved backlight functions from intel_dp.c into a new file > intel_dp_aux_backlight.c. Also moved reading of eDP display control > registers to intel_dp_get_dpcd > > v3: Correct some formatting mistakes > > v4: Updated to use AUX backlight control if PWM control is not possible > (Jani) > v5: Moved call to initialize backlight registers to dp_aux_setup_backlight > v6: Check DP_EDP_BACKLIGHT_PIN_ENABLE_CAP is disabled before setting up AUX > backlight control. To fix BLM_PWM_ENABLE igt test warnings on bdw_ultra > v7: Add enable_dpcd_backlight module parameter. > v8: Rebase onto latest drm-intel-nightly branch > v9: Remove references to intel_dp_dpcd_read_wake > Split addition edp_dpcd variable into a separate patch > > Cc: Bob Paauwe <bob.j.paauwe@intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com> Just a quick comment since I'm typing the regular changelog summaries: I think the backlight driver in here would have been real nice as a generic thing on top of the dp aux library. But ok if the next person gets to do that, too ;-) -Daniel > --- > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/i915_params.c | 4 + > drivers/gpu/drm/i915/i915_params.h | 1 + > drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 173 ++++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_drv.h | 3 + > drivers/gpu/drm/i915/intel_panel.c | 4 + > 6 files changed, 186 insertions(+) > create mode 100644 drivers/gpu/drm/i915/intel_dp_aux_backlight.c > > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile > index 0b88ba0..723c502 100644 > --- a/drivers/gpu/drm/i915/Makefile > +++ b/drivers/gpu/drm/i915/Makefile > @@ -81,6 +81,7 @@ i915-y += dvo_ch7017.o \ > dvo_tfp410.o \ > intel_crt.o \ > intel_ddi.o \ > + intel_dp_aux_backlight.o \ > intel_dp_link_training.o \ > intel_dp_mst.o \ > intel_dp.o \ > diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c > index 1779f02..383c076 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -58,6 +58,7 @@ struct i915_params i915 __read_mostly = { > .guc_log_level = -1, > .enable_dp_mst = true, > .inject_load_failure = 0, > + .enable_dpcd_backlight = false, > }; > > module_param_named(modeset, i915.modeset, int, 0400); > @@ -210,3 +211,6 @@ MODULE_PARM_DESC(enable_dp_mst, > module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); > MODULE_PARM_DESC(inject_load_failure, > "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); > +module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, bool, 0600); > +MODULE_PARM_DESC(enable_dpcd_backlight, > + "Enable support for DPCD backlight control (default:false)"); > diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h > index 02bc278..65e73dd 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -61,6 +61,7 @@ struct i915_params { > bool verbose_state_checks; > bool nuclear_pageflip; > bool enable_dp_mst; > + bool enable_dpcd_backlight; > }; > > extern struct i915_params i915 __read_mostly; > diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c > new file mode 100644 > index 0000000..984fb0d > --- /dev/null > +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c > @@ -0,0 +1,173 @@ > +/* > + * Copyright © 2015 Intel Corporation > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice (including the next > + * paragraph) shall be included in all copies or substantial portions of the > + * Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS > + * IN THE SOFTWARE. > + * > + */ > + > +#include "intel_drv.h" > + > +static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable) > +{ > + uint8_t reg_val = 0; > + > + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, > + ®_val) < 0) { > + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", > + DP_EDP_DISPLAY_CONTROL_REGISTER); > + return; > + } > + if (enable) > + reg_val |= DP_EDP_BACKLIGHT_ENABLE; > + else > + reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE); > + > + if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, > + reg_val) != 1) { > + DRM_DEBUG_KMS("Failed to %s aux backlight\n", > + enable ? "enable" : "disable"); > + } > +} > + > +/* > + * Read the current backlight value from DPCD register(s) based > + * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported > + */ > +static uint32_t intel_dp_aux_get_backlight(struct intel_connector *connector) > +{ > + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); > + uint8_t read_val[2] = { 0x0 }; > + uint16_t level = 0; > + > + if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, > + &read_val, sizeof(read_val)) < 0) { > + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", > + DP_EDP_BACKLIGHT_BRIGHTNESS_MSB); > + return 0; > + } > + level = read_val[0]; > + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) > + level = (read_val[0] << 8 | read_val[1]); > + > + return level; > +} > + > +/* > + * Sends the current backlight level over the aux channel, checking if its using > + * 8-bit or 16 bit value (MSB and LSB) > + */ > +static void > +intel_dp_aux_set_backlight(struct intel_connector *connector, u32 level) > +{ > + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); > + uint8_t vals[2] = { 0x0 }; > + > + vals[0] = level; > + > + /* Write the MSB and/or LSB */ > + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) { > + vals[0] = (level & 0xFF00) >> 8; > + vals[1] = (level & 0xFF); > + } > + if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, > + vals, sizeof(vals)) < 0) { > + DRM_DEBUG_KMS("Failed to write aux backlight level\n"); > + return; > + } > +} > + > +static void intel_dp_aux_enable_backlight(struct intel_connector *connector) > +{ > + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); > + uint8_t dpcd_buf = 0; > + > + set_aux_backlight_enable(intel_dp, true); > + > + if ((drm_dp_dpcd_readb(&intel_dp->aux, > + DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) == 1) && > + ((dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) == > + DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET)) > + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, > + (dpcd_buf | DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD)); > +} > + > +static void intel_dp_aux_disable_backlight(struct intel_connector *connector) > +{ > + set_aux_backlight_enable(enc_to_intel_dp(&connector->encoder->base), false); > +} > + > +static int intel_dp_aux_setup_backlight(struct intel_connector *connector, > + enum pipe pipe) > +{ > + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); > + struct intel_panel *panel = &connector->panel; > + > + intel_dp_aux_enable_backlight(connector); > + > + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) > + panel->backlight.max = 0xFFFF; > + else > + panel->backlight.max = 0xFF; > + > + panel->backlight.min = 0; > + panel->backlight.level = intel_dp_aux_get_backlight(connector); > + > + panel->backlight.enabled = panel->backlight.level != 0; > + > + return 0; > +} > + > +static bool > +intel_dp_aux_display_control_capable(struct intel_connector *connector) > +{ > + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); > + > + /* Check the eDP Display control capabilities registers to determine if > + * the panel can support backlight control over the aux channel > + */ > + if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP && > + (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) && > + !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) || > + (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) { > + > + DRM_DEBUG_KMS("AUX Backlight Control Supported!\n"); > + return true; > + } > + return false; > +} > + > +int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) > +{ > + struct intel_panel *panel = &intel_connector->panel; > + > + if(!i915.enable_dpcd_backlight) > + return -ENODEV; > + > + if (!intel_dp_aux_display_control_capable(intel_connector)) > + return -ENODEV; > + > + panel->backlight.setup = intel_dp_aux_setup_backlight; > + panel->backlight.enable = intel_dp_aux_enable_backlight; > + panel->backlight.disable = intel_dp_aux_disable_backlight; > + panel->backlight.set = intel_dp_aux_set_backlight; > + panel->backlight.get = intel_dp_aux_get_backlight; > + > + return 0; > +} > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 99db8bb..cb89a35 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1337,6 +1337,9 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); > bool > intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); > > +/* intel_dp_aux_backlight.c */ > +int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector); > + > /* intel_dp_mst.c */ > int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); > void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c > index a078876..bd31481 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel) > container_of(panel, struct intel_connector, panel); > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > > + if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && > + intel_dp_aux_init_backlight_funcs(connector) == 0) > + return; > + > if (IS_BROXTON(dev_priv)) { > panel->backlight.setup = bxt_setup_backlight; > panel->backlight.enable = bxt_enable_backlight; > -- > 1.9.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 0/3] DPCD Backlight Control @ 2016-04-05 13:50 Yetunde Adebisi 2016-04-05 13:50 ` [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) Yetunde Adebisi 0 siblings, 1 reply; 9+ messages in thread From: Yetunde Adebisi @ 2016-04-05 13:50 UTC (permalink / raw) To: intel-gfx; +Cc: isg-gms These patches add support for Backlight Control using DPCD registers on eDP displays. - Patch 1 Adds macro for DPCD registers capability size to drm_dp_helper.h - Patch 2 Reads the eDP DPCD Display Control capability registers. - Patch 2 Implements functionaly for DPCD Backlight Control Yetunde Adebisi (3): drm/dp: Add definition for Display Control DPCD Registers capability size drm/i915: Read eDP Display control capability registers drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_params.c | 4 + drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_dp.c | 15 ++- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 173 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 4 + drivers/gpu/drm/i915/intel_panel.c | 4 + include/drm/drm_dp_helper.h | 1 + 8 files changed, 198 insertions(+), 5 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_dp_aux_backlight.c -- 1.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) 2016-04-05 13:50 [PATCH 0/3] DPCD Backlight Control Yetunde Adebisi @ 2016-04-05 13:50 ` Yetunde Adebisi 0 siblings, 0 replies; 9+ messages in thread From: Yetunde Adebisi @ 2016-04-05 13:50 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula, isg-gms This patch adds support for eDP backlight control using DPCD registers to backlight hooks in intel_panel. It checks for backlight control over AUX channel capability and sets up function pointers to get and set the backlight brightness level if supported. v2: Moved backlight functions from intel_dp.c into a new file intel_dp_aux_backlight.c. Also moved reading of eDP display control registers to intel_dp_get_dpcd v3: Correct some formatting mistakes v4: Updated to use AUX backlight control if PWM control is not possible (Jani) v5: Moved call to initialize backlight registers to dp_aux_setup_backlight v6: Check DP_EDP_BACKLIGHT_PIN_ENABLE_CAP is disabled before setting up AUX backlight control. To fix BLM_PWM_ENABLE igt test warnings on bdw_ultra v7: Add enable_dpcd_backlight module parameter. v8: Rebase onto latest drm-intel-nightly branch v9: Remove changes to intel_dp_dpcd_read_wake Split addition edp_dpcd variable into a separate patch Cc: Bob Paauwe <bob.j.paauwe@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com> --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_params.c | 4 + drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 173 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 3 + drivers/gpu/drm/i915/intel_panel.c | 4 + 6 files changed, 186 insertions(+) create mode 100644 drivers/gpu/drm/i915/intel_dp_aux_backlight.c diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 7ffb51b..11cc3e6 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -79,6 +79,7 @@ i915-y += dvo_ch7017.o \ dvo_tfp410.o \ intel_crt.o \ intel_ddi.o \ + intel_dp_aux_backlight.o \ intel_dp_link_training.o \ intel_dp_mst.o \ intel_dp.o \ diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 1779f02..383c076 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -58,6 +58,7 @@ struct i915_params i915 __read_mostly = { .guc_log_level = -1, .enable_dp_mst = true, .inject_load_failure = 0, + .enable_dpcd_backlight = false, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -210,3 +211,6 @@ MODULE_PARM_DESC(enable_dp_mst, module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); MODULE_PARM_DESC(inject_load_failure, "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); +module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, bool, 0600); +MODULE_PARM_DESC(enable_dpcd_backlight, + "Enable support for DPCD backlight control (default:false)"); diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 02bc278..65e73dd 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -61,6 +61,7 @@ struct i915_params { bool verbose_state_checks; bool nuclear_pageflip; bool enable_dp_mst; + bool enable_dpcd_backlight; }; extern struct i915_params i915 __read_mostly; diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c new file mode 100644 index 0000000..984fb0d --- /dev/null +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -0,0 +1,173 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include "intel_drv.h" + +static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable) +{ + uint8_t reg_val = 0; + + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, + ®_val) < 0) { + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", + DP_EDP_DISPLAY_CONTROL_REGISTER); + return; + } + if (enable) + reg_val |= DP_EDP_BACKLIGHT_ENABLE; + else + reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE); + + if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, + reg_val) != 1) { + DRM_DEBUG_KMS("Failed to %s aux backlight\n", + enable ? "enable" : "disable"); + } +} + +/* + * Read the current backlight value from DPCD register(s) based + * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported + */ +static uint32_t intel_dp_aux_get_backlight(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t read_val[2] = { 0x0 }; + uint16_t level = 0; + + if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, + &read_val, sizeof(read_val)) < 0) { + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", + DP_EDP_BACKLIGHT_BRIGHTNESS_MSB); + return 0; + } + level = read_val[0]; + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) + level = (read_val[0] << 8 | read_val[1]); + + return level; +} + +/* + * Sends the current backlight level over the aux channel, checking if its using + * 8-bit or 16 bit value (MSB and LSB) + */ +static void +intel_dp_aux_set_backlight(struct intel_connector *connector, u32 level) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t vals[2] = { 0x0 }; + + vals[0] = level; + + /* Write the MSB and/or LSB */ + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) { + vals[0] = (level & 0xFF00) >> 8; + vals[1] = (level & 0xFF); + } + if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, + vals, sizeof(vals)) < 0) { + DRM_DEBUG_KMS("Failed to write aux backlight level\n"); + return; + } +} + +static void intel_dp_aux_enable_backlight(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + uint8_t dpcd_buf = 0; + + set_aux_backlight_enable(intel_dp, true); + + if ((drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) == 1) && + ((dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) == + DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET)) + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, + (dpcd_buf | DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD)); +} + +static void intel_dp_aux_disable_backlight(struct intel_connector *connector) +{ + set_aux_backlight_enable(enc_to_intel_dp(&connector->encoder->base), false); +} + +static int intel_dp_aux_setup_backlight(struct intel_connector *connector, + enum pipe pipe) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + struct intel_panel *panel = &connector->panel; + + intel_dp_aux_enable_backlight(connector); + + if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) + panel->backlight.max = 0xFFFF; + else + panel->backlight.max = 0xFF; + + panel->backlight.min = 0; + panel->backlight.level = intel_dp_aux_get_backlight(connector); + + panel->backlight.enabled = panel->backlight.level != 0; + + return 0; +} + +static bool +intel_dp_aux_display_control_capable(struct intel_connector *connector) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + + /* Check the eDP Display control capabilities registers to determine if + * the panel can support backlight control over the aux channel + */ + if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP && + (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) && + !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) || + (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) { + + DRM_DEBUG_KMS("AUX Backlight Control Supported!\n"); + return true; + } + return false; +} + +int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) +{ + struct intel_panel *panel = &intel_connector->panel; + + if(!i915.enable_dpcd_backlight) + return -ENODEV; + + if (!intel_dp_aux_display_control_capable(intel_connector)) + return -ENODEV; + + panel->backlight.setup = intel_dp_aux_setup_backlight; + panel->backlight.enable = intel_dp_aux_enable_backlight; + panel->backlight.disable = intel_dp_aux_disable_backlight; + panel->backlight.set = intel_dp_aux_set_backlight; + panel->backlight.get = intel_dp_aux_get_backlight; + + return 0; +} diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b14e515..cefdb6b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1322,6 +1322,9 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); bool intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); +/* intel_dp_aux_backlight.c */ +int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector); + /* intel_dp_mst.c */ int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 8c8996f..aab5153 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel) container_of(panel, struct intel_connector, panel); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && + intel_dp_aux_init_backlight_funcs(connector) == 0) + return; + if (IS_BROXTON(dev_priv)) { panel->backlight.setup = bxt_setup_backlight; panel->backlight.enable = bxt_enable_backlight; -- 1.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2016-05-08 16:24 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-04-05 14:10 [PATCH 0/3] DPCD Backlight Control Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 1/3] drm/dp: Add definition for Display Control DPCD Registers capability size Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 2/3] drm/i915: Read eDP Display control capability registers Yetunde Adebisi 2016-04-05 14:10 ` [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) Yetunde Adebisi 2016-04-06 6:56 ` ✓ Fi.CI.BAT: success for DPCD Backlight Control Patchwork 2016-04-26 12:33 ` [PATCH 0/3] " Jani Nikula -- strict thread matches above, loose matches on Subject: below -- 2016-04-26 11:25 Yetunde Adebisi 2016-04-26 11:25 ` [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) Yetunde Adebisi 2016-05-08 16:24 ` Daniel Vetter 2016-04-05 13:50 [PATCH 0/3] DPCD Backlight Control Yetunde Adebisi 2016-04-05 13:50 ` [PATCH 3/3] drm/i915: Add Backlight Control using DPCD for eDP connectors (v9) Yetunde Adebisi
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.