[PATCH v2 0/4] STi DT updates

[PATCH v2 0/4] STi DT updates

[Peter Griffin]

Hi Maxime / Patrice / Srini,

This series adds some more alternate pin configurations which were missing
upstream, the DT config for SSC12, and also a DT node for the at24c256 eeprom
to better describe the hardware on the I2C bus.

As at23c256 can now be accessed via nvmem framework it will allow stmmac driver to
be updated to obtain MAC address directlry from the eeprom.

regards,

Peter.

Changes in v2:
  - Add better patch description for 'STiH407: Add DT node for at24c256 eeprom'
    (Lee)
  - Rebase on v4.6-rc3 (Peter)

Peter Griffin (4):
  ARM: DT: STiH407: Add UART RTS/CTS pin configuration
  ARM: DT: STiH407: Add i2c12 pin definition
  ARM: DT: STiH407: Add node for i2c12 controller
  ARM: STi: DT: STiH407: Add DT node for at24c256 eeprom

 arch/arm/boot/dts/stih407-family.dtsi  | 13 ++++++
 arch/arm/boot/dts/stih407-pinctrl.dtsi | 82 ++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/stihxxx-b2120.dtsi   |  9 ++++
 3 files changed, 104 insertions(+)

-- 
1.9.1

[PATCH v2 0/4] STi DT updates

[Peter Griffin]

Hi Maxime / Patrice / Srini,

This series adds some more alternate pin configurations which were missing
upstream, the DT config for SSC12, and also a DT node for the at24c256 eeprom
to better describe the hardware on the I2C bus.

As at23c256 can now be accessed via nvmem framework it will allow stmmac driver to
be updated to obtain MAC address directlry from the eeprom.

regards,

Peter.

Changes in v2:
  - Add better patch description for 'STiH407: Add DT node for at24c256 eeprom'
    (Lee)
  - Rebase on v4.6-rc3 (Peter)

Peter Griffin (4):
  ARM: DT: STiH407: Add UART RTS/CTS pin configuration
  ARM: DT: STiH407: Add i2c12 pin definition
  ARM: DT: STiH407: Add node for i2c12 controller
  ARM: STi: DT: STiH407: Add DT node for at24c256 eeprom

 arch/arm/boot/dts/stih407-family.dtsi  | 13 ++++++
 arch/arm/boot/dts/stih407-pinctrl.dtsi | 82 ++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/stihxxx-b2120.dtsi   |  9 ++++
 3 files changed, 104 insertions(+)

-- 
1.9.1

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[PATCH v2 0/4] STi DT updates

[Peter Griffin]

Hi Maxime / Patrice / Srini,

This series adds some more alternate pin configurations which were missing
upstream, the DT config for SSC12, and also a DT node for the at24c256 eeprom
to better describe the hardware on the I2C bus.

As at23c256 can now be accessed via nvmem framework it will allow stmmac driver to
be updated to obtain MAC address directlry from the eeprom.

regards,

Peter.

Changes in v2:
  - Add better patch description for 'STiH407: Add DT node for at24c256 eeprom'
    (Lee)
  - Rebase on v4.6-rc3 (Peter)

Peter Griffin (4):
  ARM: DT: STiH407: Add UART RTS/CTS pin configuration
  ARM: DT: STiH407: Add i2c12 pin definition
  ARM: DT: STiH407: Add node for i2c12 controller
  ARM: STi: DT: STiH407: Add DT node for at24c256 eeprom

 arch/arm/boot/dts/stih407-family.dtsi  | 13 ++++++
 arch/arm/boot/dts/stih407-pinctrl.dtsi | 82 ++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/stihxxx-b2120.dtsi   |  9 ++++
 3 files changed, 104 insertions(+)

-- 
1.9.1

[PATCH v2 1/4] ARM: DT: STiH407: Add UART RTS/CTS pin configuration

[Peter Griffin]

Add pinctrl definitions of UART RTS/CTS pins.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 arch/arm/boot/dts/stih407-pinctrl.dtsi | 73 ++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index a538ae5..87e75bf 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -149,7 +149,20 @@
 						rx = <&pio3 5 ALT1 IN>;
 					};
 				};
+
+				pinctrl_sbc_serial0_rts: sbc_serial0_rts {
+					st,pins {
+						rts = <&pio3 7 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_sbc_serial0_cts: sbc_serial0_cts {
+					st,pins {
+						cts = <&pio3 6 ALT1 IN>;
+					};
+				};
 			};
+
 			/* SBC_ASC1 - UART11 */
 			sbc_serial1 {
 				pinctrl_sbc_serial1: sbc_serial1-0 {
@@ -158,6 +171,18 @@
 						rx = <&pio2 7 ALT3 IN>;
 					};
 				};
+
+				pinctrl_sbc_serial1_rts: sbc_serial1_rts {
+					st,pins {
+						rts = <&pio3 1 ALT3 OUT>;
+					};
+				};
+
+				pinctrl_sbc_serial1_cts: sbc_serial1_cts {
+					st,pins {
+						cts = <&pio3 0 ALT3 IN>;
+					};
+				};
 			};
 
 			i2c10 {
@@ -478,6 +503,18 @@
 						rx = <&pio15 1 ALT1 IN>;
 					};
 				};
+
+				pinctrl_serial0_rts: serial0_rts {
+					st,pins {
+						rts = <&pio17 3 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_serial0_cts: serial0_cts {
+					st,pins {
+						cts = <&pio17 2 ALT1 IN>;
+					};
+				};
 			};
 
 			mmc1 {
@@ -495,6 +532,18 @@
 						sd_wp = <&pio19 1 ALT6 IN>;
 					};
 				};
+
+				pinctrl_serial1_rts: serial1_rts {
+					st,pins {
+						rts = <&pio16 3 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_serial1_cts: serial1_cts {
+					st,pins {
+						cts = <&pio16 2 ALT1 IN>;
+					};
+				};
 			};
 
 
@@ -505,6 +554,18 @@
 						scl = <&pio10 5 ALT2 BIDIR>;
 					};
 				};
+
+				pinctrl_serial2_rts: serial2_rts {
+					st,pins {
+						rts = <&pio15 3 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_serial2_cts: serial2_cts {
+					st,pins {
+						cts = <&pio15 2 ALT1 IN>;
+					};
+				};
 			};
 
 			i2c1 {
@@ -1074,6 +1135,18 @@
 						rx = <&pio31 4 ALT1 IN>;
 					};
 				};
+
+				pinctrl_serial3_rts: serial3_rts {
+					st,pins {
+						rts = <&pio31 6 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_serial3_cts: serial3_cts {
+					st,pins {
+						cts = <&pio31 5 ALT1 IN>;
+					};
+				};
 			};
 		};
 
-- 
1.9.1

[PATCH v2 1/4] ARM: DT: STiH407: Add UART RTS/CTS pin configuration

[Peter Griffin]

Add pinctrl definitions of UART RTS/CTS pins.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 arch/arm/boot/dts/stih407-pinctrl.dtsi | 73 ++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index a538ae5..87e75bf 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -149,7 +149,20 @@
 						rx = <&pio3 5 ALT1 IN>;
 					};
 				};
+
+				pinctrl_sbc_serial0_rts: sbc_serial0_rts {
+					st,pins {
+						rts = <&pio3 7 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_sbc_serial0_cts: sbc_serial0_cts {
+					st,pins {
+						cts = <&pio3 6 ALT1 IN>;
+					};
+				};
 			};
+
 			/* SBC_ASC1 - UART11 */
 			sbc_serial1 {
 				pinctrl_sbc_serial1: sbc_serial1-0 {
@@ -158,6 +171,18 @@
 						rx = <&pio2 7 ALT3 IN>;
 					};
 				};
+
+				pinctrl_sbc_serial1_rts: sbc_serial1_rts {
+					st,pins {
+						rts = <&pio3 1 ALT3 OUT>;
+					};
+				};
+
+				pinctrl_sbc_serial1_cts: sbc_serial1_cts {
+					st,pins {
+						cts = <&pio3 0 ALT3 IN>;
+					};
+				};
 			};
 
 			i2c10 {
@@ -478,6 +503,18 @@
 						rx = <&pio15 1 ALT1 IN>;
 					};
 				};
+
+				pinctrl_serial0_rts: serial0_rts {
+					st,pins {
+						rts = <&pio17 3 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_serial0_cts: serial0_cts {
+					st,pins {
+						cts = <&pio17 2 ALT1 IN>;
+					};
+				};
 			};
 
 			mmc1 {
@@ -495,6 +532,18 @@
 						sd_wp = <&pio19 1 ALT6 IN>;
 					};
 				};
+
+				pinctrl_serial1_rts: serial1_rts {
+					st,pins {
+						rts = <&pio16 3 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_serial1_cts: serial1_cts {
+					st,pins {
+						cts = <&pio16 2 ALT1 IN>;
+					};
+				};
 			};
 
 
@@ -505,6 +554,18 @@
 						scl = <&pio10 5 ALT2 BIDIR>;
 					};
 				};
+
+				pinctrl_serial2_rts: serial2_rts {
+					st,pins {
+						rts = <&pio15 3 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_serial2_cts: serial2_cts {
+					st,pins {
+						cts = <&pio15 2 ALT1 IN>;
+					};
+				};
 			};
 
 			i2c1 {
@@ -1074,6 +1135,18 @@
 						rx = <&pio31 4 ALT1 IN>;
 					};
 				};
+
+				pinctrl_serial3_rts: serial3_rts {
+					st,pins {
+						rts = <&pio31 6 ALT1 OUT>;
+					};
+				};
+
+				pinctrl_serial3_cts: serial3_cts {
+					st,pins {
+						cts = <&pio31 5 ALT1 IN>;
+					};
+				};
 			};
 		};
 
-- 
1.9.1

[PATCH v2 2/4] ARM: DT: STiH407: Add i2c12 pin definition

[Peter Griffin]

Add DT pinctrl definitions for SSC12 controller.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 arch/arm/boot/dts/stih407-pinctrl.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index 87e75bf..e647751 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -203,6 +203,15 @@
 				};
 			};
 
+			i2c12 {
+				pinctrl_i2c12_default: i2c12-default {
+					st,pins {
+						sda = <&pio3 6 ALT2 BIDIR>;
+						scl = <&pio3 7 ALT2 BIDIR>;
+					};
+				};
+			};
+
 			keyscan {
 				pinctrl_keyscan: keyscan {
 					st,pins {
-- 
1.9.1

[PATCH v2 2/4] ARM: DT: STiH407: Add i2c12 pin definition

[Peter Griffin]

Add DT pinctrl definitions for SSC12 controller.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 arch/arm/boot/dts/stih407-pinctrl.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index 87e75bf..e647751 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -203,6 +203,15 @@
 				};
 			};
 
+			i2c12 {
+				pinctrl_i2c12_default: i2c12-default {
+					st,pins {
+						sda = <&pio3 6 ALT2 BIDIR>;
+						scl = <&pio3 7 ALT2 BIDIR>;
+					};
+				};
+			};
+
 			keyscan {
 				pinctrl_keyscan: keyscan {
 					st,pins {
-- 
1.9.1

[PATCH v2 3/4] ARM: DT: STiH407: Add node for i2c12 controller

[Peter Griffin]

Add DT support for SSC12.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 arch/arm/boot/dts/stih407-family.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 81f8121..7785f31 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -327,6 +327,19 @@
 			status = "disabled";
 		};
 
+		i2c@9542000 {
+			compatible = "st,comms-ssc4-i2c";
+			reg = <0x9542000 0x110>;
+			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk_sysin>;
+			clock-names = "ssc";
+			clock-frequency = <400000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_i2c12_default>;
+
+			status = "disabled";
+		};
+
 		usb2_picophy0: phy1 {
 			compatible = "st,stih407-usb2-phy";
 			#phy-cells = <0>;
-- 
1.9.1

[PATCH v2 3/4] ARM: DT: STiH407: Add node for i2c12 controller

[Peter Griffin]

Add DT support for SSC12.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 arch/arm/boot/dts/stih407-family.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 81f8121..7785f31 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -327,6 +327,19 @@
 			status = "disabled";
 		};
 
+		i2c at 9542000 {
+			compatible = "st,comms-ssc4-i2c";
+			reg = <0x9542000 0x110>;
+			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk_sysin>;
+			clock-names = "ssc";
+			clock-frequency = <400000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_i2c12_default>;
+
+			status = "disabled";
+		};
+
 		usb2_picophy0: phy1 {
 			compatible = "st,stih407-usb2-phy";
 			#phy-cells = <0>;
-- 
1.9.1

[PATCH v2 4/4] ARM: STi: DT: STiH407: Add DT node for at24c256 eeprom

[Peter Griffin]

More accurately describe the i2c bus hardware by including a dt
node for the eeprom device.

Now that at24c256 can be accessed via the nvmem framework it
allows for example the stmmac driver to be extended to get
the MAC address from the at24c256 eeprom.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
Changes in v2:
 - Add more verbose patch description
---
 arch/arm/boot/dts/stihxxx-b2120.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 133375b..0d7c6dd 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -58,6 +58,15 @@
 
 		i2c@9845000 {
 			status = "okay";
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			eeprom@50 {
+				compatible = "at,24c256";
+				pagesize = <64>;
+				reg = <0x50>;
+			};
 		};
 
 		i2c@9540000 {
-- 
1.9.1

[PATCH v2 4/4] ARM: STi: DT: STiH407: Add DT node for at24c256 eeprom

[Peter Griffin]

More accurately describe the i2c bus hardware by including a dt
node for the eeprom device.

Now that at24c256 can be accessed via the nvmem framework it
allows for example the stmmac driver to be extended to get
the MAC address from the at24c256 eeprom.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
Changes in v2:
 - Add more verbose patch description
---
 arch/arm/boot/dts/stihxxx-b2120.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 133375b..0d7c6dd 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -58,6 +58,15 @@
 
 		i2c at 9845000 {
 			status = "okay";
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			eeprom at 50 {
+				compatible = "at,24c256";
+				pagesize = <64>;
+				reg = <0x50>;
+			};
 		};
 
 		i2c at 9540000 {
-- 
1.9.1