* [PATCH v5 1/8] tpm: Add include guards in tpm.h
[not found] ` <1461276283-2453-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
@ 2016-04-21 22:04 ` Christophe Ricard
2016-04-21 22:04 ` [PATCH v5 2/8] tpm: tpm_tis: Share common data between phys Christophe Ricard
` (6 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Christophe Ricard @ 2016-04-21 22:04 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, Peter Huewe,
benoit.houyere-qxv4g6HH51o
Add missing include guards in tpm.h
Signed-off-by: Peter Huewe <peter.huewe-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
---
drivers/char/tpm/tpm.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index 8bc6fb8..50bf380 100644
--- a/drivers/char/tpm/tpm.h
+++ b/drivers/char/tpm/tpm.h
@@ -19,6 +19,10 @@
* License.
*
*/
+
+#ifndef __TPM_H__
+#define __TPM_H__
+
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/fs.h>
@@ -527,3 +531,4 @@ extern unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *, u32);
extern int tpm2_do_selftest(struct tpm_chip *chip);
extern int tpm2_gen_interrupt(struct tpm_chip *chip);
extern int tpm2_probe(struct tpm_chip *chip);
+#endif
--
2.1.4
------------------------------------------------------------------------------
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^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 2/8] tpm: tpm_tis: Share common data between phys
[not found] ` <1461276283-2453-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-21 22:04 ` [PATCH v5 1/8] tpm: Add include guards in tpm.h Christophe Ricard
@ 2016-04-21 22:04 ` Christophe Ricard
[not found] ` <1461276283-2453-3-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-21 22:04 ` [PATCH v5 3/8] tpm_tis: Introduce intermediate layer for TPM access Christophe Ricard
` (5 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: Christophe Ricard @ 2016-04-21 22:04 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
Split priv_data structure in common and phy specific structures. This will
allow in future patches to reuse the same tis logic on top of new phy such
as spi and i2c. Ultimately, other drivers may reuse this tis logic.
(e.g: st33zp24...)
iobase field is specific to TPM addressed on 0xFED4xxxx on LPC/SPI bus.
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm_tis.c | 169 +++++++++++++++++++++++++--------------------
drivers/char/tpm/tpm_tis.h | 37 ++++++++++
2 files changed, 130 insertions(+), 76 deletions(-)
create mode 100644 drivers/char/tpm/tpm_tis.h
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index a6b2d46..2d8aa2f 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -29,6 +29,7 @@
#include <linux/acpi.h>
#include <linux/freezer.h>
#include "tpm.h"
+#include "tpm_tis.h"
enum tis_access {
TPM_ACCESS_VALID = 0x80,
@@ -93,16 +94,14 @@ struct tpm_info {
#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
#define TPM_RID(l) (0x0F04 | ((l) << 12))
-struct priv_data {
+struct tpm_tis_tcg_phy {
+ struct tpm_tis_data priv;
void __iomem *iobase;
- u16 manufacturer_id;
- int locality;
- int irq;
- bool irq_tested;
- wait_queue_head_t int_queue;
- wait_queue_head_t read_queue;
};
+#define to_tpm_tis_tcg_phy(data) container_of(data, struct tpm_tis_tcg_phy,\
+ priv)
+
#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
static int has_hid(struct acpi_device *dev, const char *hid)
{
@@ -132,10 +131,11 @@ static inline int is_itpm(struct acpi_device *dev)
* correct values in the other bits.' */
static int wait_startup(struct tpm_chip *chip, int l)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
unsigned long stop = jiffies + chip->timeout_a;
do {
- if (ioread8(priv->iobase + TPM_ACCESS(l)) &
+ if (ioread8(phy->iobase + TPM_ACCESS(l)) &
TPM_ACCESS_VALID)
return 0;
msleep(TPM_TIMEOUT);
@@ -145,9 +145,10 @@ static int wait_startup(struct tpm_chip *chip, int l)
static int check_locality(struct tpm_chip *chip, int l)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
- if ((ioread8(priv->iobase + TPM_ACCESS(l)) &
+ if ((ioread8(phy->iobase + TPM_ACCESS(l)) &
(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
return priv->locality = l;
@@ -157,18 +158,20 @@ static int check_locality(struct tpm_chip *chip, int l)
static void release_locality(struct tpm_chip *chip, int l, int force)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
- if (force || (ioread8(priv->iobase + TPM_ACCESS(l)) &
+ if (force || (ioread8(phy->iobase + TPM_ACCESS(l)) &
(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
- priv->iobase + TPM_ACCESS(l));
+ phy->iobase + TPM_ACCESS(l));
}
static int request_locality(struct tpm_chip *chip, int l)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
unsigned long stop, timeout;
long rc;
@@ -176,7 +179,7 @@ static int request_locality(struct tpm_chip *chip, int l)
return l;
iowrite8(TPM_ACCESS_REQUEST_USE,
- priv->iobase + TPM_ACCESS(l));
+ phy->iobase + TPM_ACCESS(l));
stop = jiffies + chip->timeout_a;
@@ -209,24 +212,27 @@ again:
static u8 tpm_tis_status(struct tpm_chip *chip)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
- return ioread8(priv->iobase +
+ return ioread8(phy->iobase +
TPM_STS(priv->locality));
}
static void tpm_tis_ready(struct tpm_chip *chip)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
/* this causes the current command to be aborted */
iowrite8(TPM_STS_COMMAND_READY,
- priv->iobase + TPM_STS(priv->locality));
+ phy->iobase + TPM_STS(priv->locality));
}
static int get_burstcount(struct tpm_chip *chip)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
unsigned long stop;
int burstcnt;
@@ -234,9 +240,9 @@ static int get_burstcount(struct tpm_chip *chip)
/* which timeout value, spec has 2 answers (c & d) */
stop = jiffies + chip->timeout_d;
do {
- burstcnt = ioread8(priv->iobase +
+ burstcnt = ioread8(phy->iobase +
TPM_STS(priv->locality) + 1);
- burstcnt += ioread8(priv->iobase +
+ burstcnt += ioread8(phy->iobase +
TPM_STS(priv->locality) +
2) << 8;
if (burstcnt)
@@ -248,7 +254,8 @@ static int get_burstcount(struct tpm_chip *chip)
static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
int size = 0, burstcnt;
while (size < count &&
wait_for_tpm_stat(chip,
@@ -258,7 +265,7 @@ static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
== 0) {
burstcnt = get_burstcount(chip);
for (; burstcnt > 0 && size < count; burstcnt--)
- buf[size++] = ioread8(priv->iobase +
+ buf[size++] = ioread8(phy->iobase +
TPM_DATA_FIFO(priv->locality));
}
return size;
@@ -266,7 +273,7 @@ static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
int size = 0;
int expected, status;
@@ -322,7 +329,8 @@ MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
*/
static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
int rc, status, burstcnt;
size_t count = 0;
@@ -343,7 +351,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
while (count < len - 1) {
burstcnt = get_burstcount(chip);
for (; burstcnt > 0 && count < len - 1; burstcnt--) {
- iowrite8(buf[count], priv->iobase +
+ iowrite8(buf[count], phy->iobase +
TPM_DATA_FIFO(priv->locality));
count++;
}
@@ -359,7 +367,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
/* write last byte */
iowrite8(buf[count],
- priv->iobase + TPM_DATA_FIFO(priv->locality));
+ phy->iobase + TPM_DATA_FIFO(priv->locality));
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false);
status = tpm_tis_status(chip);
@@ -378,15 +386,16 @@ out_err:
static void disable_interrupts(struct tpm_chip *chip)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u32 intmask;
intmask =
- ioread32(priv->iobase +
+ ioread32(phy->iobase +
TPM_INT_ENABLE(priv->locality));
intmask &= ~TPM_GLOBAL_INT_ENABLE;
iowrite32(intmask,
- priv->iobase + TPM_INT_ENABLE(priv->locality));
+ phy->iobase + TPM_INT_ENABLE(priv->locality));
devm_free_irq(&chip->dev, priv->irq, chip);
priv->irq = 0;
chip->flags &= ~TPM_CHIP_FLAG_IRQ;
@@ -399,7 +408,8 @@ static void disable_interrupts(struct tpm_chip *chip)
*/
static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
int rc;
u32 ordinal;
unsigned long dur;
@@ -410,7 +420,7 @@ static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
/* go and do it */
iowrite8(TPM_STS_GO,
- priv->iobase + TPM_STS(priv->locality));
+ phy->iobase + TPM_STS(priv->locality));
if (chip->flags & TPM_CHIP_FLAG_IRQ) {
ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
@@ -436,8 +446,8 @@ out_err:
static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
int rc, irq;
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
return tpm_tis_send_main(chip, buf, len);
@@ -471,11 +481,12 @@ static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
unsigned long *timeout_cap)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
int i;
u32 did_vid;
- did_vid = ioread32(priv->iobase + TPM_DID_VID(0));
+ did_vid = ioread32(phy->iobase + TPM_DID_VID(0));
for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
if (vendor_timeout_overrides[i].did_vid != did_vid)
@@ -495,7 +506,8 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
*/
static int probe_itpm(struct tpm_chip *chip)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
int rc = 0;
u8 cmd_getticks[] = {
0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
@@ -503,7 +515,7 @@ static int probe_itpm(struct tpm_chip *chip)
};
size_t len = sizeof(cmd_getticks);
bool rem_itpm = itpm;
- u16 vendor = ioread16(priv->iobase + TPM_DID_VID(0));
+ u16 vendor = ioread16(phy->iobase + TPM_DID_VID(0));
/* probe only iTPMS */
if (vendor != TPM_VID_INTEL)
@@ -537,7 +549,7 @@ out:
static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
switch (priv->manufacturer_id) {
case TPM_VID_WINBOND:
@@ -564,11 +576,12 @@ static const struct tpm_class_ops tpm_tis = {
static irqreturn_t tis_int_handler(int dummy, void *dev_id)
{
struct tpm_chip *chip = dev_id;
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u32 interrupt;
int i;
- interrupt = ioread32(priv->iobase +
+ interrupt = ioread32(phy->iobase +
TPM_INT_STATUS(priv->locality));
if (interrupt == 0)
@@ -588,9 +601,9 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
/* Clear interrupts handled with TPM_EOI */
iowrite32(interrupt,
- priv->iobase +
+ phy->iobase +
TPM_INT_STATUS(priv->locality));
- ioread32(priv->iobase + TPM_INT_STATUS(priv->locality));
+ ioread32(phy->iobase + TPM_INT_STATUS(priv->locality));
return IRQ_HANDLED;
}
@@ -601,7 +614,8 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
int flags, int irq)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u8 original_int_vec;
if (devm_request_irq(&chip->dev, irq, tis_int_handler, flags,
@@ -612,19 +626,19 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
}
priv->irq = irq;
- original_int_vec = ioread8(priv->iobase +
+ original_int_vec = ioread8(phy->iobase +
TPM_INT_VECTOR(priv->locality));
iowrite8(irq,
- priv->iobase + TPM_INT_VECTOR(priv->locality));
+ phy->iobase + TPM_INT_VECTOR(priv->locality));
/* Clear all existing */
- iowrite32(ioread32(priv->iobase +
+ iowrite32(ioread32(phy->iobase +
TPM_INT_STATUS(priv->locality)),
- priv->iobase + TPM_INT_STATUS(priv->locality));
+ phy->iobase + TPM_INT_STATUS(priv->locality));
/* Turn on */
iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
- priv->iobase + TPM_INT_ENABLE(priv->locality));
+ phy->iobase + TPM_INT_ENABLE(priv->locality));
priv->irq_tested = false;
@@ -641,7 +655,7 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
*/
if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
iowrite8(original_int_vec,
- priv->iobase + TPM_INT_VECTOR(priv->locality));
+ phy->iobase + TPM_INT_VECTOR(priv->locality));
return 1;
}
@@ -654,11 +668,12 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
*/
static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u8 original_int_vec;
int i;
- original_int_vec = ioread8(priv->iobase +
+ original_int_vec = ioread8(phy->iobase +
TPM_INT_VECTOR(priv->locality));
if (!original_int_vec) {
@@ -678,8 +693,9 @@ MODULE_PARM_DESC(interrupts, "Enable interrupts");
static void tpm_tis_remove(struct tpm_chip *chip)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- void __iomem *reg = priv->iobase + TPM_INT_ENABLE(priv->locality);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
+ void __iomem *reg = phy->iobase + TPM_INT_ENABLE(priv->locality);
iowrite32(~TPM_GLOBAL_INT_ENABLE & ioread32(reg), reg);
release_locality(chip, priv->locality, 1);
@@ -691,10 +707,10 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
u32 vendor, intfcaps, intmask;
int rc, probe;
struct tpm_chip *chip;
- struct priv_data *priv;
+ struct tpm_tis_tcg_phy *phy;
- priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
- if (priv == NULL)
+ phy = devm_kzalloc(dev, sizeof(struct tpm_tis_tcg_phy), GFP_KERNEL);
+ if (phy == NULL)
return -ENOMEM;
chip = tpmm_chip_alloc(dev, &tpm_tis);
@@ -705,9 +721,9 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
chip->acpi_dev_handle = acpi_dev_handle;
#endif
- priv->iobase = devm_ioremap_resource(dev, &tpm_info->res);
- if (IS_ERR(priv->iobase))
- return PTR_ERR(priv->iobase);
+ phy->iobase = devm_ioremap_resource(dev, &tpm_info->res);
+ if (IS_ERR(phy->iobase))
+ return PTR_ERR(phy->iobase);
/* Maximum timeouts */
chip->timeout_a = TIS_TIMEOUT_A_MAX;
@@ -715,7 +731,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
chip->timeout_c = TIS_TIMEOUT_C_MAX;
chip->timeout_d = TIS_TIMEOUT_D_MAX;
- dev_set_drvdata(&chip->dev, priv);
+ dev_set_drvdata(&chip->dev, &phy->priv);
if (wait_startup(chip, 0) != 0) {
rc = -ENODEV;
@@ -723,13 +739,13 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
}
/* Take control of the TPM's interrupt hardware and shut it off */
- intmask = ioread32(priv->iobase +
- TPM_INT_ENABLE(priv->locality));
+ intmask = ioread32(phy->iobase +
+ TPM_INT_ENABLE(phy->priv.locality));
intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
intmask &= ~TPM_GLOBAL_INT_ENABLE;
iowrite32(intmask,
- priv->iobase + TPM_INT_ENABLE(priv->locality));
+ phy->iobase + TPM_INT_ENABLE(phy->priv.locality));
if (request_locality(chip, 0) != 0) {
rc = -ENODEV;
@@ -740,12 +756,12 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
if (rc)
goto out_err;
- vendor = ioread32(priv->iobase + TPM_DID_VID(0));
- priv->manufacturer_id = vendor;
+ vendor = ioread32(phy->iobase + TPM_DID_VID(0));
+ phy->priv.manufacturer_id = vendor;
dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
- vendor >> 16, ioread8(priv->iobase + TPM_RID(0)));
+ vendor >> 16, ioread8(phy->iobase + TPM_RID(0)));
if (!itpm) {
probe = probe_itpm(chip);
@@ -762,8 +778,8 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
/* Figure out the capabilities */
intfcaps =
- ioread32(priv->iobase +
- TPM_INTF_CAPS(priv->locality));
+ ioread32(phy->iobase +
+ TPM_INTF_CAPS(phy->priv.locality));
dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
intfcaps);
if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
@@ -796,8 +812,8 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
}
/* INTERRUPT Setup */
- init_waitqueue_head(&priv->read_queue);
- init_waitqueue_head(&priv->int_queue);
+ init_waitqueue_head(&phy->priv.read_queue);
+ init_waitqueue_head(&phy->priv.int_queue);
if (interrupts && tpm_info->irq != -1) {
if (tpm_info->irq) {
tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
@@ -841,23 +857,24 @@ out_err:
#ifdef CONFIG_PM_SLEEP
static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u32 intmask;
/* reenable interrupts that device may have lost or
BIOS/firmware may have disabled */
- iowrite8(priv->irq, priv->iobase +
+ iowrite8(priv->irq, phy->iobase +
TPM_INT_VECTOR(priv->locality));
intmask =
- ioread32(priv->iobase + TPM_INT_ENABLE(priv->locality));
+ ioread32(phy->iobase + TPM_INT_ENABLE(priv->locality));
intmask |= TPM_INTF_CMD_READY_INT
| TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
| TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
iowrite32(intmask,
- priv->iobase + TPM_INT_ENABLE(priv->locality));
+ phy->iobase + TPM_INT_ENABLE(priv->locality));
}
static int tpm_tis_resume(struct device *dev)
diff --git a/drivers/char/tpm/tpm_tis.h b/drivers/char/tpm/tpm_tis.h
new file mode 100644
index 0000000..2260f89
--- /dev/null
+++ b/drivers/char/tpm/tpm_tis.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2005, 2006 IBM Corporation
+ * Copyright (C) 2014, 2015 Intel Corporation
+ *
+ * Authors:
+ * Leendert van Doorn <leendert-aZOuKsOsJu3MbYB6QlFGEg@public.gmane.org>
+ * Kylene Hall <kjhall-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
+ *
+ * Maintained by: <tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
+ *
+ * Device driver for TCG/TCPA TPM (trusted platform module).
+ * Specifications at www.trustedcomputinggroup.org
+ *
+ * This device driver implements the TPM interface as defined in
+ * the TCG TPM Interface Spec version 1.2, revision 1.0.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __TPM_TIS_CORE_H__
+#define __TPM_TIS_CORE_H__
+
+#include "tpm.h"
+
+struct tpm_tis_data {
+ u16 manufacturer_id;
+ int locality;
+ int irq;
+ bool irq_tested;
+ wait_queue_head_t int_queue;
+ wait_queue_head_t read_queue;
+};
+
+#endif
--
2.1.4
------------------------------------------------------------------------------
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^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 3/8] tpm_tis: Introduce intermediate layer for TPM access
[not found] ` <1461276283-2453-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-21 22:04 ` [PATCH v5 1/8] tpm: Add include guards in tpm.h Christophe Ricard
2016-04-21 22:04 ` [PATCH v5 2/8] tpm: tpm_tis: Share common data between phys Christophe Ricard
@ 2016-04-21 22:04 ` Christophe Ricard
[not found] ` <1461276283-2453-4-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-21 22:04 ` [PATCH v5 4/8] devicetree: Add infineon to vendor-prefix.txt Christophe Ricard
` (4 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: Christophe Ricard @ 2016-04-21 22:04 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
This splits tpm_tis in a high-level protocol part and a low-level interface
for the actual TPM communication. The low-level interface can then be
implemented by additional drivers to provide access to TPMs using other
mechanisms, for example native I2C or SPI transfers, while still reusing
the same TIS protocol implementation.
Though the ioread/iowrite calls cannot fail, other implementations of this
interface might want to return error codes if their communication fails.
This follows the usual pattern of negative values representing errors and
zero representing success. Positive values are not used (yet).
Errors are passed back to the caller if possible. If the interface of a
function does not allow that, it tries to do the most sensible thing it
can, but this might also mean ignoring the error in this instance.
Signed-off-by: Alexander Steffen <Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm_tis.c | 323 ++++++++++++++++++++++++++++++---------------
drivers/char/tpm/tpm_tis.h | 48 +++++++
2 files changed, 268 insertions(+), 103 deletions(-)
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index 2d8aa2f..27a7802 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -99,8 +99,10 @@ struct tpm_tis_tcg_phy {
void __iomem *iobase;
};
-#define to_tpm_tis_tcg_phy(data) container_of(data, struct tpm_tis_tcg_phy,\
- priv)
+static inline struct tpm_tis_tcg_phy *to_tpm_tis_tcg_phy(struct tpm_tis_data *data)
+{
+ return container_of(data, struct tpm_tis_tcg_phy, priv);
+}
#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
static int has_hid(struct acpi_device *dev, const char *hid)
@@ -132,11 +134,16 @@ static inline int is_itpm(struct acpi_device *dev)
static int wait_startup(struct tpm_chip *chip, int l)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
unsigned long stop = jiffies + chip->timeout_a;
+ int rc;
+ u8 access;
+
do {
- if (ioread8(phy->iobase + TPM_ACCESS(l)) &
- TPM_ACCESS_VALID)
+ rc = tpm_read8(priv, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return rc;
+
+ if (access & TPM_ACCESS_VALID)
return 0;
msleep(TPM_TIMEOUT);
} while (time_before(jiffies, stop));
@@ -146,10 +153,14 @@ static int wait_startup(struct tpm_chip *chip, int l)
static int check_locality(struct tpm_chip *chip, int l)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(priv, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return rc;
- if ((ioread8(phy->iobase + TPM_ACCESS(l)) &
- (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
+ if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
return priv->locality = l;
@@ -159,27 +170,32 @@ static int check_locality(struct tpm_chip *chip, int l)
static void release_locality(struct tpm_chip *chip, int l, int force)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
+ int rc;
+ u8 access;
- if (force || (ioread8(phy->iobase + TPM_ACCESS(l)) &
+ rc = tpm_read8(priv, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return;
+
+ if (force || (access &
(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
- iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
- phy->iobase + TPM_ACCESS(l));
+ tpm_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
+
}
static int request_locality(struct tpm_chip *chip, int l)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
unsigned long stop, timeout;
long rc;
if (check_locality(chip, l) >= 0)
return l;
- iowrite8(TPM_ACCESS_REQUEST_USE,
- phy->iobase + TPM_ACCESS(l));
+ rc = tpm_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
+ if (rc < 0)
+ return rc;
stop = jiffies + chip->timeout_a;
@@ -213,38 +229,45 @@ again:
static u8 tpm_tis_status(struct tpm_chip *chip)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
+ int rc;
+ u8 status;
- return ioread8(phy->iobase +
- TPM_STS(priv->locality));
+ rc = tpm_read8(priv, TPM_STS(priv->locality), &status);
+ if (rc < 0)
+ return 0;
+
+ return status;
}
static void tpm_tis_ready(struct tpm_chip *chip)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
/* this causes the current command to be aborted */
- iowrite8(TPM_STS_COMMAND_READY,
- phy->iobase + TPM_STS(priv->locality));
+ tpm_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
}
static int get_burstcount(struct tpm_chip *chip)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
unsigned long stop;
- int burstcnt;
+ int burstcnt, rc;
+ u8 value;
/* wait for burstcount */
/* which timeout value, spec has 2 answers (c & d) */
stop = jiffies + chip->timeout_d;
do {
- burstcnt = ioread8(phy->iobase +
- TPM_STS(priv->locality) + 1);
- burstcnt += ioread8(phy->iobase +
- TPM_STS(priv->locality) +
- 2) << 8;
+ rc = tpm_read8(priv, TPM_STS(priv->locality) + 1, &value);
+ if (rc < 0)
+ return rc;
+
+ burstcnt = value;
+ rc = tpm_read8(priv, TPM_STS(priv->locality) + 2, &value);
+ if (rc < 0)
+ return rc;
+
+ burstcnt += value << 8;
if (burstcnt)
return burstcnt;
msleep(TPM_TIMEOUT);
@@ -255,18 +278,20 @@ static int get_burstcount(struct tpm_chip *chip)
static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
- int size = 0, burstcnt;
+ int size = 0, burstcnt, rc;
+
while (size < count &&
wait_for_tpm_stat(chip,
TPM_STS_DATA_AVAIL | TPM_STS_VALID,
chip->timeout_c,
- &priv->read_queue, true)
- == 0) {
- burstcnt = get_burstcount(chip);
- for (; burstcnt > 0 && size < count; burstcnt--)
- buf[size++] = ioread8(phy->iobase +
- TPM_DATA_FIFO(priv->locality));
+ &priv->read_queue, true) == 0) {
+ burstcnt = min_t(int, get_burstcount(chip), count - size);
+ rc = tpm_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + size);
+ if (rc < 0)
+ return rc;
+
+ size += burstcnt;
}
return size;
}
@@ -330,7 +355,6 @@ MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
int rc, status, burstcnt;
size_t count = 0;
@@ -349,12 +373,13 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
}
while (count < len - 1) {
- burstcnt = get_burstcount(chip);
- for (; burstcnt > 0 && count < len - 1; burstcnt--) {
- iowrite8(buf[count], phy->iobase +
- TPM_DATA_FIFO(priv->locality));
- count++;
- }
+ burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
+ rc = tpm_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + count);
+ if (rc < 0)
+ goto out_err;
+
+ count += burstcnt;
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false);
@@ -366,8 +391,10 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
}
/* write last byte */
- iowrite8(buf[count],
- phy->iobase + TPM_DATA_FIFO(priv->locality));
+ rc = tpm_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
+ if (rc < 0)
+ goto out_err;
+
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false);
status = tpm_tis_status(chip);
@@ -387,15 +414,16 @@ out_err:
static void disable_interrupts(struct tpm_chip *chip)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u32 intmask;
+ int rc;
+
+ rc = tpm_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ intmask = 0;
- intmask =
- ioread32(phy->iobase +
- TPM_INT_ENABLE(priv->locality));
intmask &= ~TPM_GLOBAL_INT_ENABLE;
- iowrite32(intmask,
- phy->iobase + TPM_INT_ENABLE(priv->locality));
+ tpm_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
+
devm_free_irq(&chip->dev, priv->irq, chip);
priv->irq = 0;
chip->flags &= ~TPM_CHIP_FLAG_IRQ;
@@ -409,7 +437,6 @@ static void disable_interrupts(struct tpm_chip *chip)
static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
int rc;
u32 ordinal;
unsigned long dur;
@@ -419,8 +446,9 @@ static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
return rc;
/* go and do it */
- iowrite8(TPM_STS_GO,
- phy->iobase + TPM_STS(priv->locality));
+ rc = tpm_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
+ if (rc < 0)
+ return rc;
if (chip->flags & TPM_CHIP_FLAG_IRQ) {
ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
@@ -482,11 +510,12 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
unsigned long *timeout_cap)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
- int i;
+ int i, rc;
u32 did_vid;
- did_vid = ioread32(phy->iobase + TPM_DID_VID(0));
+ rc = tpm_read32(priv, TPM_DID_VID(0), &did_vid);
+ if (rc < 0)
+ return rc;
for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
if (vendor_timeout_overrides[i].did_vid != did_vid)
@@ -507,7 +536,6 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
static int probe_itpm(struct tpm_chip *chip)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
int rc = 0;
u8 cmd_getticks[] = {
0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
@@ -515,7 +543,11 @@ static int probe_itpm(struct tpm_chip *chip)
};
size_t len = sizeof(cmd_getticks);
bool rem_itpm = itpm;
- u16 vendor = ioread16(phy->iobase + TPM_DID_VID(0));
+ u16 vendor;
+
+ rc = tpm_read16(priv, TPM_DID_VID(0), &vendor);
+ if (rc < 0)
+ return rc;
/* probe only iTPMS */
if (vendor != TPM_VID_INTEL)
@@ -573,16 +605,68 @@ static const struct tpm_class_ops tpm_tis = {
.req_canceled = tpm_tis_req_canceled,
};
+static int tpm_tcg_read_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *result)
+{
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
+
+ while (len--)
+ *result++ = ioread8(phy->iobase + addr);
+ return 0;
+}
+
+static int tpm_tcg_write_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *value)
+{
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
+
+ while (len--)
+ iowrite8(*value++, phy->iobase + addr);
+ return 0;
+}
+
+static int tpm_tcg_read16(struct tpm_tis_data *data, u32 addr, u16 *result)
+{
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
+
+ *result = ioread16(phy->iobase + addr);
+ return 0;
+}
+
+static int tpm_tcg_read32(struct tpm_tis_data *data, u32 addr, u32 *result)
+{
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
+
+ *result = ioread32(phy->iobase + addr);
+ return 0;
+}
+
+static int tpm_tcg_write32(struct tpm_tis_data *data, u32 addr, u32 value)
+{
+ struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
+
+ iowrite32(value, phy->iobase + addr);
+ return 0;
+}
+
+static const struct tpm_tis_phy_ops tpm_tcg = {
+ .read_bytes = tpm_tcg_read_bytes,
+ .write_bytes = tpm_tcg_write_bytes,
+ .read16 = tpm_tcg_read16,
+ .read32 = tpm_tcg_read32,
+ .write32 = tpm_tcg_write32,
+};
+
static irqreturn_t tis_int_handler(int dummy, void *dev_id)
{
struct tpm_chip *chip = dev_id;
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u32 interrupt;
- int i;
+ int i, rc;
- interrupt = ioread32(phy->iobase +
- TPM_INT_STATUS(priv->locality));
+ rc = tpm_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
+ if (rc < 0)
+ return IRQ_NONE;
if (interrupt == 0)
return IRQ_NONE;
@@ -600,10 +684,11 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
wake_up_interruptible(&priv->int_queue);
/* Clear interrupts handled with TPM_EOI */
- iowrite32(interrupt,
- phy->iobase +
- TPM_INT_STATUS(priv->locality));
- ioread32(phy->iobase + TPM_INT_STATUS(priv->locality));
+ rc = tpm_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
+ if (rc < 0)
+ return IRQ_NONE;
+
+ tpm_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
return IRQ_HANDLED;
}
@@ -615,8 +700,9 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
int flags, int irq)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u8 original_int_vec;
+ int rc;
+ u32 int_status;
if (devm_request_irq(&chip->dev, irq, tis_int_handler, flags,
dev_name(&chip->dev), chip) != 0) {
@@ -626,19 +712,28 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
}
priv->irq = irq;
- original_int_vec = ioread8(phy->iobase +
- TPM_INT_VECTOR(priv->locality));
- iowrite8(irq,
- phy->iobase + TPM_INT_VECTOR(priv->locality));
+ rc = tpm_read8(priv, TPM_INT_VECTOR(priv->locality), &original_int_vec);
+ if (rc < 0)
+ return rc;
+
+ rc = tpm_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
+ if (rc < 0)
+ return rc;
+
+ rc = tpm_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
+ if (rc < 0)
+ return rc;
/* Clear all existing */
- iowrite32(ioread32(phy->iobase +
- TPM_INT_STATUS(priv->locality)),
- phy->iobase + TPM_INT_STATUS(priv->locality));
+ rc = tpm_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
+ if (rc < 0)
+ return rc;
/* Turn on */
- iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
- phy->iobase + TPM_INT_ENABLE(priv->locality));
+ rc = tpm_write32(priv, TPM_INT_ENABLE(priv->locality),
+ intmask | TPM_GLOBAL_INT_ENABLE);
+ if (rc < 0)
+ return rc;
priv->irq_tested = false;
@@ -654,8 +749,11 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
* will call disable_irq which undoes all of the above.
*/
if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
- iowrite8(original_int_vec,
- phy->iobase + TPM_INT_VECTOR(priv->locality));
+ rc = tpm_write8(priv, TPM_INT_VECTOR(priv->locality),
+ original_int_vec);
+ if (rc < 0)
+ return rc;
+
return 1;
}
@@ -669,12 +767,12 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u8 original_int_vec;
- int i;
+ int i, rc;
- original_int_vec = ioread8(phy->iobase +
- TPM_INT_VECTOR(priv->locality));
+ rc = tpm_read8(priv, TPM_INT_VECTOR(priv->locality), &original_int_vec);
+ if (rc < 0)
+ return;
if (!original_int_vec) {
if (IS_ENABLED(CONFIG_X86))
@@ -694,10 +792,15 @@ MODULE_PARM_DESC(interrupts, "Enable interrupts");
static void tpm_tis_remove(struct tpm_chip *chip)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
- void __iomem *reg = phy->iobase + TPM_INT_ENABLE(priv->locality);
+ u32 reg = TPM_INT_ENABLE(priv->locality);
+ u32 interrupt;
+ int rc;
+
+ rc = tpm_read32(priv, reg, &interrupt);
+ if (rc < 0)
+ interrupt = 0;
- iowrite32(~TPM_GLOBAL_INT_ENABLE & ioread32(reg), reg);
+ tpm_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
release_locality(chip, priv->locality, 1);
}
@@ -705,6 +808,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
acpi_handle acpi_dev_handle)
{
u32 vendor, intfcaps, intmask;
+ u8 rid;
int rc, probe;
struct tpm_chip *chip;
struct tpm_tis_tcg_phy *phy;
@@ -725,6 +829,8 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
if (IS_ERR(phy->iobase))
return PTR_ERR(phy->iobase);
+ phy->priv.phy_ops = &tpm_tcg;
+
/* Maximum timeouts */
chip->timeout_a = TIS_TIMEOUT_A_MAX;
chip->timeout_b = TIS_TIMEOUT_B_MAX;
@@ -739,13 +845,15 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
}
/* Take control of the TPM's interrupt hardware and shut it off */
- intmask = ioread32(phy->iobase +
- TPM_INT_ENABLE(phy->priv.locality));
+ rc = tpm_read32(&phy->priv, TPM_INT_ENABLE(phy->priv.locality),
+ &intmask);
+ if (rc < 0)
+ goto out_err;
+
intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
intmask &= ~TPM_GLOBAL_INT_ENABLE;
- iowrite32(intmask,
- phy->iobase + TPM_INT_ENABLE(phy->priv.locality));
+ tpm_write32(&phy->priv, TPM_INT_ENABLE(phy->priv.locality), intmask);
if (request_locality(chip, 0) != 0) {
rc = -ENODEV;
@@ -756,12 +864,19 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
if (rc)
goto out_err;
- vendor = ioread32(phy->iobase + TPM_DID_VID(0));
+ rc = tpm_read32(&phy->priv, TPM_DID_VID(0), &vendor);
+ if (rc < 0)
+ goto out_err;
+
phy->priv.manufacturer_id = vendor;
+ rc = tpm_read8(&phy->priv, TPM_RID(0), &rid);
+ if (rc < 0)
+ goto out_err;
+
dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
- vendor >> 16, ioread8(phy->iobase + TPM_RID(0)));
+ vendor >> 16, rid);
if (!itpm) {
probe = probe_itpm(chip);
@@ -775,11 +890,12 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
if (itpm)
dev_info(dev, "Intel iTPM workaround enabled\n");
-
/* Figure out the capabilities */
- intfcaps =
- ioread32(phy->iobase +
- TPM_INTF_CAPS(phy->priv.locality));
+ rc = tpm_read32(&phy->priv, TPM_INTF_CAPS(phy->priv.locality),
+ &intfcaps);
+ if (rc < 0)
+ goto out_err;
+
dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
intfcaps);
if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
@@ -858,23 +974,24 @@ out_err:
static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
{
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
u32 intmask;
+ int rc;
/* reenable interrupts that device may have lost or
BIOS/firmware may have disabled */
- iowrite8(priv->irq, phy->iobase +
- TPM_INT_VECTOR(priv->locality));
+ rc = tpm_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
+ if (rc < 0)
+ return;
- intmask =
- ioread32(phy->iobase + TPM_INT_ENABLE(priv->locality));
+ rc = tpm_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ return;
intmask |= TPM_INTF_CMD_READY_INT
| TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
| TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
- iowrite32(intmask,
- phy->iobase + TPM_INT_ENABLE(priv->locality));
+ tpm_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
}
static int tpm_tis_resume(struct device *dev)
diff --git a/drivers/char/tpm/tpm_tis.h b/drivers/char/tpm/tpm_tis.h
index 2260f89..75e16d0 100644
--- a/drivers/char/tpm/tpm_tis.h
+++ b/drivers/char/tpm/tpm_tis.h
@@ -32,6 +32,54 @@ struct tpm_tis_data {
bool irq_tested;
wait_queue_head_t int_queue;
wait_queue_head_t read_queue;
+ const struct tpm_tis_phy_ops *phy_ops;
};
+struct tpm_tis_phy_ops {
+ int (*read_bytes)(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *result);
+ int (*write_bytes)(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *value);
+ int (*read16)(struct tpm_tis_data *data, u32 addr, u16 *result);
+ int (*read32)(struct tpm_tis_data *data, u32 addr, u32 *result);
+ int (*write32)(struct tpm_tis_data *data, u32 addr, u32 src);
+};
+
+static inline int tpm_read_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *result)
+{
+ return data->phy_ops->read_bytes(data, addr, len, result);
+}
+
+static inline int tpm_read8(struct tpm_tis_data *data, u32 addr, u8 *result)
+{
+ return data->phy_ops->read_bytes(data, addr, 1, result);
+}
+
+static inline int tpm_read16(struct tpm_tis_data *data, u32 addr, u16 *result)
+{
+ return data->phy_ops->read16(data, addr, result);
+}
+
+static inline int tpm_read32(struct tpm_tis_data *data, u32 addr, u32 *result)
+{
+ return data->phy_ops->read32(data, addr, result);
+}
+
+static inline int tpm_write_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *value)
+{
+ return data->phy_ops->write_bytes(data, addr, len, value);
+}
+
+static inline int tpm_write8(struct tpm_tis_data *data, u32 addr, u8 value)
+{
+ return data->phy_ops->write_bytes(data, addr, 1, &value);
+}
+
+static inline int tpm_write32(struct tpm_tis_data *data, u32 addr, u32 value)
+{
+ return data->phy_ops->write32(data, addr, value);
+}
+
#endif
--
2.1.4
------------------------------------------------------------------------------
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^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 4/8] devicetree: Add infineon to vendor-prefix.txt
[not found] ` <1461276283-2453-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (2 preceding siblings ...)
2016-04-21 22:04 ` [PATCH v5 3/8] tpm_tis: Introduce intermediate layer for TPM access Christophe Ricard
@ 2016-04-21 22:04 ` Christophe Ricard
2016-04-21 22:04 ` [PATCH v5 5/8] devicetree: Add Trusted Computing Group " Christophe Ricard
` (3 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Christophe Ricard @ 2016-04-21 22:04 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/,
peterhuewe-Mmb7MZpHnFY, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-yWjUBOtONefk1uMJSBkQmQ,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, jean-luc.blanc-qxv4g6HH51o,
benoit.houyere-qxv4g6HH51o,
Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w,
devicetree-u79uwXL29TY76Z2rM5mHXA
Add missing vendor to vendor-prefix.txt
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 72e2c5a..6c3d970 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -113,6 +113,7 @@ ibm International Business Machines (IBM)
idt Integrated Device Technologies, Inc.
iom Iomega Corporation
img Imagination Technologies Ltd.
+infineon Infineon Technologies
ingenic Ingenic Semiconductor
innolux Innolux Corporation
intel Intel Corporation
--
2.1.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 5/8] devicetree: Add Trusted Computing Group to vendor-prefix.txt
[not found] ` <1461276283-2453-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (3 preceding siblings ...)
2016-04-21 22:04 ` [PATCH v5 4/8] devicetree: Add infineon to vendor-prefix.txt Christophe Ricard
@ 2016-04-21 22:04 ` Christophe Ricard
2016-04-21 22:04 ` [PATCH v5 6/8] tpm/tpm_tis: Split tpm_tis driver into a core and TCG TIS compliant phy Christophe Ricard
` (2 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Christophe Ricard @ 2016-04-21 22:04 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/,
peterhuewe-Mmb7MZpHnFY, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-yWjUBOtONefk1uMJSBkQmQ,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, jean-luc.blanc-qxv4g6HH51o,
benoit.houyere-qxv4g6HH51o,
Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w,
devicetree-u79uwXL29TY76Z2rM5mHXA
Add missing vendor to vendor-prefix.txt.
Trusted Computing Group design common specifications for
TPM (Trusted Platform Module) vendors.
TCG designates a TPM answering to a public specification.
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 6c3d970..717bae9 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -230,6 +230,7 @@ stericsson ST-Ericsson
synology Synology, Inc.
tbs TBS Technologies
tcl Toby Churchill Ltd.
+tcg Trusted Computing Group
technologic Technologic Systems
thine THine Electronics, Inc.
ti Texas Instruments
--
2.1.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 6/8] tpm/tpm_tis: Split tpm_tis driver into a core and TCG TIS compliant phy
[not found] ` <1461276283-2453-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (4 preceding siblings ...)
2016-04-21 22:04 ` [PATCH v5 5/8] devicetree: Add Trusted Computing Group " Christophe Ricard
@ 2016-04-21 22:04 ` Christophe Ricard
2016-04-21 22:04 ` [PATCH v5 7/8] tpm: Use read/write_bytes for drivers without more specialized methods Christophe Ricard
2016-04-21 22:04 ` [PATCH v5 8/8] tpm/tpm_tis_spi: Add support for spi phy Christophe Ricard
7 siblings, 0 replies; 11+ messages in thread
From: Christophe Ricard @ 2016-04-21 22:04 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, Peter Huewe,
benoit.houyere-qxv4g6HH51o
To avoid code duplication between the old tpm_tis and the new and future
native tcg tis driver(ie: spi, i2c...), the tpm_tis driver was reworked,
so that all common logic is extracted and can be reused from all drivers.
The core methods can also be used from other TIS like drivers.
itpm workaround is now managed with a specific tis flag
TPM_TIS_ITPM_POSSIBLE.
Signed-off-by: Peter Huewe <peter.huewe-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/Kconfig | 7 +
drivers/char/tpm/Makefile | 1 +
drivers/char/tpm/tpm_tis.c | 901 +---------------------------------------
drivers/char/tpm/tpm_tis_core.c | 860 ++++++++++++++++++++++++++++++++++++++
drivers/char/tpm/tpm_tis_core.h | 154 +++++++
5 files changed, 1043 insertions(+), 880 deletions(-)
create mode 100644 drivers/char/tpm/tpm_tis_core.c
create mode 100644 drivers/char/tpm/tpm_tis_core.h
diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig
index 3b84a8b..b217308 100644
--- a/drivers/char/tpm/Kconfig
+++ b/drivers/char/tpm/Kconfig
@@ -24,9 +24,16 @@ menuconfig TCG_TPM
if TCG_TPM
+config TCG_TIS_CORE
+ tristate
+ ---help---
+ TCG TIS TPM core driver. It implements the TPM TCG TIS logic and hooks
+ into the TPM kernel APIs. Physical layers will register against it.
+
config TCG_TIS
tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface"
depends on X86
+ select TCG_TIS_CORE
---help---
If you have a TPM security chip that is compliant with the
TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
diff --git a/drivers/char/tpm/Makefile b/drivers/char/tpm/Makefile
index 56e8f1f..80be5b2 100644
--- a/drivers/char/tpm/Makefile
+++ b/drivers/char/tpm/Makefile
@@ -12,6 +12,7 @@ ifdef CONFIG_TCG_IBMVTPM
tpm-y += tpm_eventlog.o tpm_of.o
endif
endif
+obj-$(CONFIG_TCG_TIS_CORE) += tpm_tis_core.o
obj-$(CONFIG_TCG_TIS) += tpm_tis.o
obj-$(CONFIG_TCG_TIS_I2C_ATMEL) += tpm_i2c_atmel.o
obj-$(CONFIG_TCG_TIS_I2C_INFINEON) += tpm_i2c_infineon.o
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index 27a7802..eaf5730 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -29,41 +29,7 @@
#include <linux/acpi.h>
#include <linux/freezer.h>
#include "tpm.h"
-#include "tpm_tis.h"
-
-enum tis_access {
- TPM_ACCESS_VALID = 0x80,
- TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
- TPM_ACCESS_REQUEST_PENDING = 0x04,
- TPM_ACCESS_REQUEST_USE = 0x02,
-};
-
-enum tis_status {
- TPM_STS_VALID = 0x80,
- TPM_STS_COMMAND_READY = 0x40,
- TPM_STS_GO = 0x20,
- TPM_STS_DATA_AVAIL = 0x10,
- TPM_STS_DATA_EXPECT = 0x08,
-};
-
-enum tis_int_flags {
- TPM_GLOBAL_INT_ENABLE = 0x80000000,
- TPM_INTF_BURST_COUNT_STATIC = 0x100,
- TPM_INTF_CMD_READY_INT = 0x080,
- TPM_INTF_INT_EDGE_FALLING = 0x040,
- TPM_INTF_INT_EDGE_RISING = 0x020,
- TPM_INTF_INT_LEVEL_LOW = 0x010,
- TPM_INTF_INT_LEVEL_HIGH = 0x008,
- TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
- TPM_INTF_STS_VALID_INT = 0x002,
- TPM_INTF_DATA_AVAIL_INT = 0x001,
-};
-
-enum tis_defaults {
- TIS_MEM_LEN = 0x5000,
- TIS_SHORT_TIMEOUT = 750, /* ms */
- TIS_LONG_TIMEOUT = 2000, /* 2 sec */
-};
+#include "tpm_tis_core.h"
struct tpm_info {
struct resource res;
@@ -74,26 +40,6 @@ struct tpm_info {
int irq;
};
-/* Some timeout values are needed before it is known whether the chip is
- * TPM 1.0 or TPM 2.0.
- */
-#define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
-#define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
-#define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
-#define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
-
-#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
-#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
-#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
-#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
-#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
-#define TPM_STS(l) (0x0018 | ((l) << 12))
-#define TPM_STS3(l) (0x001b | ((l) << 12))
-#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
-
-#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
-#define TPM_RID(l) (0x0F04 | ((l) << 12))
-
struct tpm_tis_tcg_phy {
struct tpm_tis_data priv;
void __iomem *iobase;
@@ -104,6 +50,20 @@ static inline struct tpm_tis_tcg_phy *to_tpm_tis_tcg_phy(struct tpm_tis_data *da
return container_of(data, struct tpm_tis_tcg_phy, priv);
}
+static bool interrupts = true;
+module_param(interrupts, bool, 0444);
+MODULE_PARM_DESC(interrupts, "Enable interrupts");
+
+static bool itpm;
+module_param(itpm, bool, 0444);
+MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
+
+static bool force;
+#ifdef CONFIG_X86
+module_param(force, bool, 0444);
+MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
+#endif
+
#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
static int has_hid(struct acpi_device *dev, const char *hid)
{
@@ -127,484 +87,6 @@ static inline int is_itpm(struct acpi_device *dev)
}
#endif
-/* Before we attempt to access the TPM we must see that the valid bit is set.
- * The specification says that this bit is 0 at reset and remains 0 until the
- * 'TPM has gone through its self test and initialization and has established
- * correct values in the other bits.' */
-static int wait_startup(struct tpm_chip *chip, int l)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- unsigned long stop = jiffies + chip->timeout_a;
- int rc;
- u8 access;
-
- do {
- rc = tpm_read8(priv, TPM_ACCESS(l), &access);
- if (rc < 0)
- return rc;
-
- if (access & TPM_ACCESS_VALID)
- return 0;
- msleep(TPM_TIMEOUT);
- } while (time_before(jiffies, stop));
- return -1;
-}
-
-static int check_locality(struct tpm_chip *chip, int l)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int rc;
- u8 access;
-
- rc = tpm_read8(priv, TPM_ACCESS(l), &access);
- if (rc < 0)
- return rc;
-
- if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
- (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
- return priv->locality = l;
-
- return -1;
-}
-
-static void release_locality(struct tpm_chip *chip, int l, int force)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int rc;
- u8 access;
-
- rc = tpm_read8(priv, TPM_ACCESS(l), &access);
- if (rc < 0)
- return;
-
- if (force || (access &
- (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
- (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
- tpm_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
-
-}
-
-static int request_locality(struct tpm_chip *chip, int l)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- unsigned long stop, timeout;
- long rc;
-
- if (check_locality(chip, l) >= 0)
- return l;
-
- rc = tpm_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
- if (rc < 0)
- return rc;
-
- stop = jiffies + chip->timeout_a;
-
- if (chip->flags & TPM_CHIP_FLAG_IRQ) {
-again:
- timeout = stop - jiffies;
- if ((long)timeout <= 0)
- return -1;
- rc = wait_event_interruptible_timeout(priv->int_queue,
- (check_locality
- (chip, l) >= 0),
- timeout);
- if (rc > 0)
- return l;
- if (rc == -ERESTARTSYS && freezing(current)) {
- clear_thread_flag(TIF_SIGPENDING);
- goto again;
- }
- } else {
- /* wait for burstcount */
- do {
- if (check_locality(chip, l) >= 0)
- return l;
- msleep(TPM_TIMEOUT);
- }
- while (time_before(jiffies, stop));
- }
- return -1;
-}
-
-static u8 tpm_tis_status(struct tpm_chip *chip)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int rc;
- u8 status;
-
- rc = tpm_read8(priv, TPM_STS(priv->locality), &status);
- if (rc < 0)
- return 0;
-
- return status;
-}
-
-static void tpm_tis_ready(struct tpm_chip *chip)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
-
- /* this causes the current command to be aborted */
- tpm_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
-}
-
-static int get_burstcount(struct tpm_chip *chip)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- unsigned long stop;
- int burstcnt, rc;
- u8 value;
-
- /* wait for burstcount */
- /* which timeout value, spec has 2 answers (c & d) */
- stop = jiffies + chip->timeout_d;
- do {
- rc = tpm_read8(priv, TPM_STS(priv->locality) + 1, &value);
- if (rc < 0)
- return rc;
-
- burstcnt = value;
- rc = tpm_read8(priv, TPM_STS(priv->locality) + 2, &value);
- if (rc < 0)
- return rc;
-
- burstcnt += value << 8;
- if (burstcnt)
- return burstcnt;
- msleep(TPM_TIMEOUT);
- } while (time_before(jiffies, stop));
- return -EBUSY;
-}
-
-static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int size = 0, burstcnt, rc;
-
- while (size < count &&
- wait_for_tpm_stat(chip,
- TPM_STS_DATA_AVAIL | TPM_STS_VALID,
- chip->timeout_c,
- &priv->read_queue, true) == 0) {
- burstcnt = min_t(int, get_burstcount(chip), count - size);
- rc = tpm_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
- burstcnt, buf + size);
- if (rc < 0)
- return rc;
-
- size += burstcnt;
- }
- return size;
-}
-
-static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int size = 0;
- int expected, status;
-
- if (count < TPM_HEADER_SIZE) {
- size = -EIO;
- goto out;
- }
-
- /* read first 10 bytes, including tag, paramsize, and result */
- if ((size =
- recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
- dev_err(&chip->dev, "Unable to read header\n");
- goto out;
- }
-
- expected = be32_to_cpu(*(__be32 *) (buf + 2));
- if (expected > count) {
- size = -EIO;
- goto out;
- }
-
- if ((size +=
- recv_data(chip, &buf[TPM_HEADER_SIZE],
- expected - TPM_HEADER_SIZE)) < expected) {
- dev_err(&chip->dev, "Unable to read remainder of result\n");
- size = -ETIME;
- goto out;
- }
-
- wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
- &priv->int_queue, false);
- status = tpm_tis_status(chip);
- if (status & TPM_STS_DATA_AVAIL) { /* retry? */
- dev_err(&chip->dev, "Error left over data\n");
- size = -EIO;
- goto out;
- }
-
-out:
- tpm_tis_ready(chip);
- release_locality(chip, priv->locality, 0);
- return size;
-}
-
-static bool itpm;
-module_param(itpm, bool, 0444);
-MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
-
-/*
- * If interrupts are used (signaled by an irq set in the vendor structure)
- * tpm.c can skip polling for the data to be available as the interrupt is
- * waited for here
- */
-static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int rc, status, burstcnt;
- size_t count = 0;
-
- if (request_locality(chip, 0) < 0)
- return -EBUSY;
-
- status = tpm_tis_status(chip);
- if ((status & TPM_STS_COMMAND_READY) == 0) {
- tpm_tis_ready(chip);
- if (wait_for_tpm_stat
- (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
- &priv->int_queue, false) < 0) {
- rc = -ETIME;
- goto out_err;
- }
- }
-
- while (count < len - 1) {
- burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
- rc = tpm_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
- burstcnt, buf + count);
- if (rc < 0)
- goto out_err;
-
- count += burstcnt;
-
- wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
- &priv->int_queue, false);
- status = tpm_tis_status(chip);
- if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
- rc = -EIO;
- goto out_err;
- }
- }
-
- /* write last byte */
- rc = tpm_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
- if (rc < 0)
- goto out_err;
-
- wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
- &priv->int_queue, false);
- status = tpm_tis_status(chip);
- if ((status & TPM_STS_DATA_EXPECT) != 0) {
- rc = -EIO;
- goto out_err;
- }
-
- return 0;
-
-out_err:
- tpm_tis_ready(chip);
- release_locality(chip, priv->locality, 0);
- return rc;
-}
-
-static void disable_interrupts(struct tpm_chip *chip)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- u32 intmask;
- int rc;
-
- rc = tpm_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
- if (rc < 0)
- intmask = 0;
-
- intmask &= ~TPM_GLOBAL_INT_ENABLE;
- tpm_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
-
- devm_free_irq(&chip->dev, priv->irq, chip);
- priv->irq = 0;
- chip->flags &= ~TPM_CHIP_FLAG_IRQ;
-}
-
-/*
- * If interrupts are used (signaled by an irq set in the vendor structure)
- * tpm.c can skip polling for the data to be available as the interrupt is
- * waited for here
- */
-static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int rc;
- u32 ordinal;
- unsigned long dur;
-
- rc = tpm_tis_send_data(chip, buf, len);
- if (rc < 0)
- return rc;
-
- /* go and do it */
- rc = tpm_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
- if (rc < 0)
- return rc;
-
- if (chip->flags & TPM_CHIP_FLAG_IRQ) {
- ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
-
- if (chip->flags & TPM_CHIP_FLAG_TPM2)
- dur = tpm2_calc_ordinal_duration(chip, ordinal);
- else
- dur = tpm_calc_ordinal_duration(chip, ordinal);
-
- if (wait_for_tpm_stat
- (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
- &priv->read_queue, false) < 0) {
- rc = -ETIME;
- goto out_err;
- }
- }
- return len;
-out_err:
- tpm_tis_ready(chip);
- release_locality(chip, priv->locality, 0);
- return rc;
-}
-
-static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int rc, irq;
-
- if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
- return tpm_tis_send_main(chip, buf, len);
-
- /* Verify receipt of the expected IRQ */
- irq = priv->irq;
- priv->irq = 0;
- chip->flags &= ~TPM_CHIP_FLAG_IRQ;
- rc = tpm_tis_send_main(chip, buf, len);
- priv->irq = irq;
- chip->flags |= TPM_CHIP_FLAG_IRQ;
- if (!priv->irq_tested)
- msleep(1);
- if (!priv->irq_tested)
- disable_interrupts(chip);
- priv->irq_tested = true;
- return rc;
-}
-
-struct tis_vendor_timeout_override {
- u32 did_vid;
- unsigned long timeout_us[4];
-};
-
-static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
- /* Atmel 3204 */
- { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
- (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
-};
-
-static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
- unsigned long *timeout_cap)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int i, rc;
- u32 did_vid;
-
- rc = tpm_read32(priv, TPM_DID_VID(0), &did_vid);
- if (rc < 0)
- return rc;
-
- for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
- if (vendor_timeout_overrides[i].did_vid != did_vid)
- continue;
- memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
- sizeof(vendor_timeout_overrides[i].timeout_us));
- return true;
- }
-
- return false;
-}
-
-/*
- * Early probing for iTPM with STS_DATA_EXPECT flaw.
- * Try sending command without itpm flag set and if that
- * fails, repeat with itpm flag set.
- */
-static int probe_itpm(struct tpm_chip *chip)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- int rc = 0;
- u8 cmd_getticks[] = {
- 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
- 0x00, 0x00, 0x00, 0xf1
- };
- size_t len = sizeof(cmd_getticks);
- bool rem_itpm = itpm;
- u16 vendor;
-
- rc = tpm_read16(priv, TPM_DID_VID(0), &vendor);
- if (rc < 0)
- return rc;
-
- /* probe only iTPMS */
- if (vendor != TPM_VID_INTEL)
- return 0;
-
- itpm = false;
-
- rc = tpm_tis_send_data(chip, cmd_getticks, len);
- if (rc == 0)
- goto out;
-
- tpm_tis_ready(chip);
- release_locality(chip, priv->locality, 0);
-
- itpm = true;
-
- rc = tpm_tis_send_data(chip, cmd_getticks, len);
- if (rc == 0) {
- dev_info(&chip->dev, "Detected an iTPM.\n");
- rc = 1;
- } else
- rc = -EFAULT;
-
-out:
- itpm = rem_itpm;
- tpm_tis_ready(chip);
- release_locality(chip, priv->locality, 0);
-
- return rc;
-}
-
-static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
-
- switch (priv->manufacturer_id) {
- case TPM_VID_WINBOND:
- return ((status == TPM_STS_VALID) ||
- (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
- case TPM_VID_STM:
- return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
- default:
- return (status == TPM_STS_COMMAND_READY);
- }
-}
-
-static const struct tpm_class_ops tpm_tis = {
- .status = tpm_tis_status,
- .recv = tpm_tis_recv,
- .send = tpm_tis_send,
- .cancel = tpm_tis_ready,
- .update_timeouts = tpm_tis_update_timeouts,
- .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
- .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
- .req_canceled = tpm_tis_req_canceled,
-};
-
static int tpm_tcg_read_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
u8 *result)
{
@@ -657,364 +139,29 @@ static const struct tpm_tis_phy_ops tpm_tcg = {
.write32 = tpm_tcg_write32,
};
-static irqreturn_t tis_int_handler(int dummy, void *dev_id)
-{
- struct tpm_chip *chip = dev_id;
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- u32 interrupt;
- int i, rc;
-
- rc = tpm_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
- if (rc < 0)
- return IRQ_NONE;
-
- if (interrupt == 0)
- return IRQ_NONE;
-
- priv->irq_tested = true;
- if (interrupt & TPM_INTF_DATA_AVAIL_INT)
- wake_up_interruptible(&priv->read_queue);
- if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
- for (i = 0; i < 5; i++)
- if (check_locality(chip, i) >= 0)
- break;
- if (interrupt &
- (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
- TPM_INTF_CMD_READY_INT))
- wake_up_interruptible(&priv->int_queue);
-
- /* Clear interrupts handled with TPM_EOI */
- rc = tpm_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
- if (rc < 0)
- return IRQ_NONE;
-
- tpm_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
- return IRQ_HANDLED;
-}
-
-/* Register the IRQ and issue a command that will cause an interrupt. If an
- * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
- * everything and leave in polling mode. Returns 0 on success.
- */
-static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
- int flags, int irq)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- u8 original_int_vec;
- int rc;
- u32 int_status;
-
- if (devm_request_irq(&chip->dev, irq, tis_int_handler, flags,
- dev_name(&chip->dev), chip) != 0) {
- dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
- irq);
- return -1;
- }
- priv->irq = irq;
-
- rc = tpm_read8(priv, TPM_INT_VECTOR(priv->locality), &original_int_vec);
- if (rc < 0)
- return rc;
-
- rc = tpm_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
- if (rc < 0)
- return rc;
-
- rc = tpm_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
- if (rc < 0)
- return rc;
-
- /* Clear all existing */
- rc = tpm_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
- if (rc < 0)
- return rc;
-
- /* Turn on */
- rc = tpm_write32(priv, TPM_INT_ENABLE(priv->locality),
- intmask | TPM_GLOBAL_INT_ENABLE);
- if (rc < 0)
- return rc;
-
- priv->irq_tested = false;
-
- /* Generate an interrupt by having the core call through to
- * tpm_tis_send
- */
- if (chip->flags & TPM_CHIP_FLAG_TPM2)
- tpm2_gen_interrupt(chip);
- else
- tpm_gen_interrupt(chip);
-
- /* tpm_tis_send will either confirm the interrupt is working or it
- * will call disable_irq which undoes all of the above.
- */
- if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
- rc = tpm_write8(priv, TPM_INT_VECTOR(priv->locality),
- original_int_vec);
- if (rc < 0)
- return rc;
-
- return 1;
- }
-
- return 0;
-}
-
-/* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
- * do not have ACPI/etc. We typically expect the interrupt to be declared if
- * present.
- */
-static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- u8 original_int_vec;
- int i, rc;
-
- rc = tpm_read8(priv, TPM_INT_VECTOR(priv->locality), &original_int_vec);
- if (rc < 0)
- return;
-
- if (!original_int_vec) {
- if (IS_ENABLED(CONFIG_X86))
- for (i = 3; i <= 15; i++)
- if (!tpm_tis_probe_irq_single(chip, intmask, 0,
- i))
- return;
- } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
- original_int_vec))
- return;
-}
-
-static bool interrupts = true;
-module_param(interrupts, bool, 0444);
-MODULE_PARM_DESC(interrupts, "Enable interrupts");
-
-static void tpm_tis_remove(struct tpm_chip *chip)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- u32 reg = TPM_INT_ENABLE(priv->locality);
- u32 interrupt;
- int rc;
-
- rc = tpm_read32(priv, reg, &interrupt);
- if (rc < 0)
- interrupt = 0;
-
- tpm_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
- release_locality(chip, priv->locality, 1);
-}
-
static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
acpi_handle acpi_dev_handle)
{
- u32 vendor, intfcaps, intmask;
- u8 rid;
- int rc, probe;
- struct tpm_chip *chip;
struct tpm_tis_tcg_phy *phy;
+ int irq = -1;
phy = devm_kzalloc(dev, sizeof(struct tpm_tis_tcg_phy), GFP_KERNEL);
if (phy == NULL)
return -ENOMEM;
- chip = tpmm_chip_alloc(dev, &tpm_tis);
- if (IS_ERR(chip))
- return PTR_ERR(chip);
-
-#ifdef CONFIG_ACPI
- chip->acpi_dev_handle = acpi_dev_handle;
-#endif
-
phy->iobase = devm_ioremap_resource(dev, &tpm_info->res);
if (IS_ERR(phy->iobase))
return PTR_ERR(phy->iobase);
- phy->priv.phy_ops = &tpm_tcg;
-
- /* Maximum timeouts */
- chip->timeout_a = TIS_TIMEOUT_A_MAX;
- chip->timeout_b = TIS_TIMEOUT_B_MAX;
- chip->timeout_c = TIS_TIMEOUT_C_MAX;
- chip->timeout_d = TIS_TIMEOUT_D_MAX;
-
- dev_set_drvdata(&chip->dev, &phy->priv);
-
- if (wait_startup(chip, 0) != 0) {
- rc = -ENODEV;
- goto out_err;
- }
-
- /* Take control of the TPM's interrupt hardware and shut it off */
- rc = tpm_read32(&phy->priv, TPM_INT_ENABLE(phy->priv.locality),
- &intmask);
- if (rc < 0)
- goto out_err;
-
- intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
- TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
- intmask &= ~TPM_GLOBAL_INT_ENABLE;
- tpm_write32(&phy->priv, TPM_INT_ENABLE(phy->priv.locality), intmask);
-
- if (request_locality(chip, 0) != 0) {
- rc = -ENODEV;
- goto out_err;
- }
-
- rc = tpm2_probe(chip);
- if (rc)
- goto out_err;
-
- rc = tpm_read32(&phy->priv, TPM_DID_VID(0), &vendor);
- if (rc < 0)
- goto out_err;
-
- phy->priv.manufacturer_id = vendor;
-
- rc = tpm_read8(&phy->priv, TPM_RID(0), &rid);
- if (rc < 0)
- goto out_err;
-
- dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
- (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
- vendor >> 16, rid);
-
- if (!itpm) {
- probe = probe_itpm(chip);
- if (probe < 0) {
- rc = -ENODEV;
- goto out_err;
- }
- itpm = !!probe;
- }
+ if (interrupts)
+ irq = tpm_info->irq;
if (itpm)
- dev_info(dev, "Intel iTPM workaround enabled\n");
-
- /* Figure out the capabilities */
- rc = tpm_read32(&phy->priv, TPM_INTF_CAPS(phy->priv.locality),
- &intfcaps);
- if (rc < 0)
- goto out_err;
-
- dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
- intfcaps);
- if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
- dev_dbg(dev, "\tBurst Count Static\n");
- if (intfcaps & TPM_INTF_CMD_READY_INT)
- dev_dbg(dev, "\tCommand Ready Int Support\n");
- if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
- dev_dbg(dev, "\tInterrupt Edge Falling\n");
- if (intfcaps & TPM_INTF_INT_EDGE_RISING)
- dev_dbg(dev, "\tInterrupt Edge Rising\n");
- if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
- dev_dbg(dev, "\tInterrupt Level Low\n");
- if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
- dev_dbg(dev, "\tInterrupt Level High\n");
- if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
- dev_dbg(dev, "\tLocality Change Int Support\n");
- if (intfcaps & TPM_INTF_STS_VALID_INT)
- dev_dbg(dev, "\tSts Valid Int Support\n");
- if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
- dev_dbg(dev, "\tData Avail Int Support\n");
-
- /* Very early on issue a command to the TPM in polling mode to make
- * sure it works. May as well use that command to set the proper
- * timeouts for the driver.
- */
- if (tpm_get_timeouts(chip)) {
- dev_err(dev, "Could not get TPM timeouts and durations\n");
- rc = -ENODEV;
- goto out_err;
- }
+ phy->priv.flags |= TPM_TIS_ITPM_POSSIBLE;
- /* INTERRUPT Setup */
- init_waitqueue_head(&phy->priv.read_queue);
- init_waitqueue_head(&phy->priv.int_queue);
- if (interrupts && tpm_info->irq != -1) {
- if (tpm_info->irq) {
- tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
- tpm_info->irq);
- if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
- dev_err(&chip->dev, FW_BUG
- "TPM interrupt not working, polling instead\n");
- } else
- tpm_tis_probe_irq(chip, intmask);
- }
-
- if (chip->flags & TPM_CHIP_FLAG_TPM2) {
- rc = tpm2_do_selftest(chip);
- if (rc == TPM2_RC_INITIALIZE) {
- dev_warn(dev, "Firmware has not started TPM\n");
- rc = tpm2_startup(chip, TPM2_SU_CLEAR);
- if (!rc)
- rc = tpm2_do_selftest(chip);
- }
-
- if (rc) {
- dev_err(dev, "TPM self test failed\n");
- if (rc > 0)
- rc = -ENODEV;
- goto out_err;
- }
- } else {
- if (tpm_do_selftest(chip)) {
- dev_err(dev, "TPM self test failed\n");
- rc = -ENODEV;
- goto out_err;
- }
- }
-
- return tpm_chip_register(chip);
-out_err:
- tpm_tis_remove(chip);
- return rc;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
-{
- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
- u32 intmask;
- int rc;
-
- /* reenable interrupts that device may have lost or
- BIOS/firmware may have disabled */
- rc = tpm_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
- if (rc < 0)
- return;
-
- rc = tpm_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
- if (rc < 0)
- return;
-
- intmask |= TPM_INTF_CMD_READY_INT
- | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
- | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
-
- tpm_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
-}
-
-static int tpm_tis_resume(struct device *dev)
-{
- struct tpm_chip *chip = dev_get_drvdata(dev);
- int ret;
-
- if (chip->flags & TPM_CHIP_FLAG_IRQ)
- tpm_tis_reenable_interrupts(chip);
-
- ret = tpm_pm_resume(dev);
- if (ret)
- return ret;
-
- /* TPM 1.2 requires self-test on resume. This function actually returns
- * an error code but for unknown reason it isn't handled.
- */
- if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
- tpm_do_selftest(chip);
-
- return 0;
+ return tpm_tis_core_init(dev, &phy->priv, irq, &tpm_tcg,
+ acpi_dev_handle);
}
-#endif
static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
@@ -1216,12 +363,6 @@ static struct platform_driver tis_drv = {
},
};
-static bool force;
-#ifdef CONFIG_X86
-module_param(force, bool, 0444);
-MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
-#endif
-
static int tpm_tis_force_device(void)
{
struct platform_device *pdev;
diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
new file mode 100644
index 0000000..f4e05ac
--- /dev/null
+++ b/drivers/char/tpm/tpm_tis_core.c
@@ -0,0 +1,860 @@
+/*
+ * Copyright (C) 2005, 2006 IBM Corporation
+ * Copyright (C) 2014, 2015 Intel Corporation
+ *
+ * Authors:
+ * Leendert van Doorn <leendert-aZOuKsOsJu3MbYB6QlFGEg@public.gmane.org>
+ * Kylene Hall <kjhall-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
+ *
+ * Maintained by: <tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
+ *
+ * Device driver for TCG/TCPA TPM (trusted platform module).
+ * Specifications at www.trustedcomputinggroup.org
+ *
+ * This device driver implements the TPM interface as defined in
+ * the TCG TPM Interface Spec version 1.2, revision 1.0.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/pnp.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/acpi.h>
+#include <linux/freezer.h>
+#include "tpm.h"
+#include "tpm_tis_core.h"
+
+/* Before we attempt to access the TPM we must see that the valid bit is set.
+ * The specification says that this bit is 0 at reset and remains 0 until the
+ * 'TPM has gone through its self test and initialization and has established
+ * correct values in the other bits.'
+ */
+static int wait_startup(struct tpm_chip *chip, int l)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ unsigned long stop = jiffies + chip->timeout_a;
+
+ do {
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(priv, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return rc;
+
+ if (access & TPM_ACCESS_VALID)
+ return 0;
+ msleep(TPM_TIMEOUT);
+ } while (time_before(jiffies, stop));
+ return -1;
+}
+
+static int check_locality(struct tpm_chip *chip, int l)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(priv, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return rc;
+
+ if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
+ (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
+ return priv->locality = l;
+
+ return -1;
+}
+
+static void release_locality(struct tpm_chip *chip, int l, int force)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(priv, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return;
+
+ if (force || (access &
+ (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
+ (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
+ tpm_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
+
+}
+
+static int request_locality(struct tpm_chip *chip, int l)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ unsigned long stop, timeout;
+ long rc;
+
+ if (check_locality(chip, l) >= 0)
+ return l;
+
+ rc = tpm_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
+ if (rc < 0)
+ return rc;
+
+ stop = jiffies + chip->timeout_a;
+
+ if (chip->flags & TPM_CHIP_FLAG_IRQ) {
+again:
+ timeout = stop - jiffies;
+ if ((long)timeout <= 0)
+ return -1;
+ rc = wait_event_interruptible_timeout(priv->int_queue,
+ (check_locality
+ (chip, l) >= 0),
+ timeout);
+ if (rc > 0)
+ return l;
+ if (rc == -ERESTARTSYS && freezing(current)) {
+ clear_thread_flag(TIF_SIGPENDING);
+ goto again;
+ }
+ } else {
+ /* wait for burstcount */
+ do {
+ if (check_locality(chip, l) >= 0)
+ return l;
+ msleep(TPM_TIMEOUT);
+ } while (time_before(jiffies, stop));
+ }
+ return -1;
+}
+
+static u8 tpm_tis_status(struct tpm_chip *chip)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u8 status;
+
+ rc = tpm_read8(priv, TPM_STS(priv->locality), &status);
+ if (rc < 0)
+ return 0;
+
+ return status;
+}
+
+static void tpm_tis_ready(struct tpm_chip *chip)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+
+ /* this causes the current command to be aborted */
+ tpm_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
+}
+
+static int get_burstcount(struct tpm_chip *chip)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ unsigned long stop;
+ int burstcnt, rc;
+ u8 value;
+
+ /* wait for burstcount */
+ /* which timeout value, spec has 2 answers (c & d) */
+ stop = jiffies + chip->timeout_d;
+ do {
+ rc = tpm_read8(priv, TPM_STS(priv->locality) + 1, &value);
+ if (rc < 0)
+ return rc;
+
+ burstcnt = value;
+ rc = tpm_read8(priv, TPM_STS(priv->locality) + 2, &value);
+ if (rc < 0)
+ return rc;
+
+ burstcnt += value << 8;
+ if (burstcnt)
+ return burstcnt;
+ msleep(TPM_TIMEOUT);
+ } while (time_before(jiffies, stop));
+ return -EBUSY;
+}
+
+static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int size = 0, burstcnt, rc;
+
+ while (size < count &&
+ wait_for_tpm_stat(chip,
+ TPM_STS_DATA_AVAIL | TPM_STS_VALID,
+ chip->timeout_c,
+ &priv->read_queue, true) == 0) {
+ burstcnt = min_t(int, get_burstcount(chip), count - size);
+
+ rc = tpm_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + size);
+ if (rc < 0)
+ return rc;
+
+ size += burstcnt;
+ }
+ return size;
+}
+
+static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int size = 0;
+ int expected, status;
+
+ if (count < TPM_HEADER_SIZE) {
+ size = -EIO;
+ goto out;
+ }
+
+ size = recv_data(chip, buf, TPM_HEADER_SIZE);
+ /* read first 10 bytes, including tag, paramsize, and result */
+ if (size < TPM_HEADER_SIZE) {
+ dev_err(&chip->dev, "Unable to read header\n");
+ goto out;
+ }
+
+ expected = be32_to_cpu(*(__be32 *) (buf + 2));
+ if (expected > count) {
+ size = -EIO;
+ goto out;
+ }
+
+ size += recv_data(chip, &buf[TPM_HEADER_SIZE],
+ expected - TPM_HEADER_SIZE);
+ if (size < expected) {
+ dev_err(&chip->dev, "Unable to read remainder of result\n");
+ size = -ETIME;
+ goto out;
+ }
+
+ wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
+ &priv->int_queue, false);
+ status = tpm_tis_status(chip);
+ if (status & TPM_STS_DATA_AVAIL) { /* retry? */
+ dev_err(&chip->dev, "Error left over data\n");
+ size = -EIO;
+ goto out;
+ }
+
+out:
+ tpm_tis_ready(chip);
+ release_locality(chip, priv->locality, 0);
+ return size;
+}
+
+/*
+ * If interrupts are used (signaled by an irq set in the vendor structure)
+ * tpm.c can skip polling for the data to be available as the interrupt is
+ * waited for here
+ */
+static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int rc, status, burstcnt;
+ size_t count = 0;
+ bool itpm = priv->flags & TPM_TIS_ITPM_POSSIBLE;
+
+ if (request_locality(chip, 0) < 0)
+ return -EBUSY;
+
+ status = tpm_tis_status(chip);
+ if ((status & TPM_STS_COMMAND_READY) == 0) {
+ tpm_tis_ready(chip);
+ if (wait_for_tpm_stat
+ (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
+ &priv->int_queue, false) < 0) {
+ rc = -ETIME;
+ goto out_err;
+ }
+ }
+
+ while (count < len - 1) {
+ burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
+ rc = tpm_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + count);
+ if (rc < 0)
+ goto out_err;
+
+ count += burstcnt;
+
+ wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
+ &priv->int_queue, false);
+ status = tpm_tis_status(chip);
+ if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
+ rc = -EIO;
+ goto out_err;
+ }
+ }
+
+ /* write last byte */
+ rc = tpm_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
+ if (rc < 0)
+ goto out_err;
+
+ wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
+ &priv->int_queue, false);
+ status = tpm_tis_status(chip);
+ if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
+ rc = -EIO;
+ goto out_err;
+ }
+
+ return 0;
+
+out_err:
+ tpm_tis_ready(chip);
+ release_locality(chip, priv->locality, 0);
+ return rc;
+}
+
+static void disable_interrupts(struct tpm_chip *chip)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ u32 intmask;
+ int rc;
+
+ rc = tpm_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ intmask = 0;
+
+ intmask &= ~TPM_GLOBAL_INT_ENABLE;
+ rc = tpm_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
+
+ devm_free_irq(&chip->dev, priv->irq, chip);
+ priv->irq = 0;
+ chip->flags &= ~TPM_CHIP_FLAG_IRQ;
+}
+
+/*
+ * If interrupts are used (signaled by an irq set in the vendor structure)
+ * tpm.c can skip polling for the data to be available as the interrupt is
+ * waited for here
+ */
+static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u32 ordinal;
+ unsigned long dur;
+
+ rc = tpm_tis_send_data(chip, buf, len);
+ if (rc < 0)
+ return rc;
+
+ /* go and do it */
+ rc = tpm_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
+ if (rc < 0)
+ goto out_err;
+
+ if (chip->flags & TPM_CHIP_FLAG_IRQ) {
+ ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
+
+ if (chip->flags & TPM_CHIP_FLAG_TPM2)
+ dur = tpm2_calc_ordinal_duration(chip, ordinal);
+ else
+ dur = tpm_calc_ordinal_duration(chip, ordinal);
+
+ if (wait_for_tpm_stat
+ (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
+ &priv->read_queue, false) < 0) {
+ rc = -ETIME;
+ goto out_err;
+ }
+ }
+ return len;
+out_err:
+ tpm_tis_ready(chip);
+ release_locality(chip, priv->locality, 0);
+ return rc;
+}
+
+static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
+{
+ int rc, irq;
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+
+ if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
+ return tpm_tis_send_main(chip, buf, len);
+
+ /* Verify receipt of the expected IRQ */
+ irq = priv->irq;
+ priv->irq = 0;
+ chip->flags &= ~TPM_CHIP_FLAG_IRQ;
+ rc = tpm_tis_send_main(chip, buf, len);
+ priv->irq = irq;
+ chip->flags |= TPM_CHIP_FLAG_IRQ;
+ if (!priv->irq_tested)
+ msleep(1);
+ if (!priv->irq_tested)
+ disable_interrupts(chip);
+ priv->irq_tested = true;
+ return rc;
+}
+
+struct tis_vendor_timeout_override {
+ u32 did_vid;
+ unsigned long timeout_us[4];
+};
+
+static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
+ /* Atmel 3204 */
+ { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
+ (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
+};
+
+static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
+ unsigned long *timeout_cap)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int i, rc;
+ u32 did_vid;
+
+ rc = tpm_read32(priv, TPM_DID_VID(0), &did_vid);
+ if (rc < 0)
+ return rc;
+
+ for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
+ if (vendor_timeout_overrides[i].did_vid != did_vid)
+ continue;
+ memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
+ sizeof(vendor_timeout_overrides[i].timeout_us));
+ return true;
+ }
+
+ return false;
+}
+
+/*
+ * Early probing for iTPM with STS_DATA_EXPECT flaw.
+ * Try sending command without itpm flag set and if that
+ * fails, repeat with itpm flag set.
+ */
+static int probe_itpm(struct tpm_chip *chip)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ int rc = 0;
+ u8 cmd_getticks[] = {
+ 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
+ 0x00, 0x00, 0x00, 0xf1
+ };
+ size_t len = sizeof(cmd_getticks);
+ bool itpm;
+ u16 vendor;
+
+ rc = tpm_read16(priv, TPM_DID_VID(0), &vendor);
+ if (rc < 0)
+ return rc;
+
+ /* probe only iTPMS */
+ if (vendor != TPM_VID_INTEL)
+ return 0;
+
+ itpm = false;
+
+ rc = tpm_tis_send_data(chip, cmd_getticks, len);
+ if (rc == 0)
+ goto out;
+
+ tpm_tis_ready(chip);
+ release_locality(chip, priv->locality, 0);
+
+ itpm = true;
+
+ rc = tpm_tis_send_data(chip, cmd_getticks, len);
+ if (rc == 0) {
+ dev_info(&chip->dev, "Detected an iTPM.\n");
+ rc = 1;
+ } else
+ rc = -EFAULT;
+
+out:
+ tpm_tis_ready(chip);
+ release_locality(chip, priv->locality, 0);
+
+ return rc;
+}
+
+static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+
+ switch (priv->manufacturer_id) {
+ case TPM_VID_WINBOND:
+ return ((status == TPM_STS_VALID) ||
+ (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
+ case TPM_VID_STM:
+ return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
+ default:
+ return (status == TPM_STS_COMMAND_READY);
+ }
+}
+
+static irqreturn_t tis_int_handler(int dummy, void *dev_id)
+{
+ struct tpm_chip *chip = dev_id;
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ u32 interrupt;
+ int i, rc;
+
+ rc = tpm_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
+ if (rc < 0)
+ return IRQ_NONE;
+
+ if (interrupt == 0)
+ return IRQ_NONE;
+
+ priv->irq_tested = true;
+ if (interrupt & TPM_INTF_DATA_AVAIL_INT)
+ wake_up_interruptible(&priv->read_queue);
+ if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
+ for (i = 0; i < 5; i++)
+ if (check_locality(chip, i) >= 0)
+ break;
+ if (interrupt &
+ (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
+ TPM_INTF_CMD_READY_INT))
+ wake_up_interruptible(&priv->int_queue);
+
+ /* Clear interrupts handled with TPM_EOI */
+ rc = tpm_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
+ if (rc < 0)
+ return IRQ_NONE;
+
+ tpm_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
+ return IRQ_HANDLED;
+}
+
+/* Register the IRQ and issue a command that will cause an interrupt. If an
+ * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
+ * everything and leave in polling mode. Returns 0 on success.
+ */
+static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
+ int flags, int irq)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ u8 original_int_vec;
+ int rc;
+ u32 int_status;
+
+ if (devm_request_irq(&chip->dev, irq, tis_int_handler, flags,
+ dev_name(&chip->dev), chip) != 0) {
+ dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
+ irq);
+ return -1;
+ }
+ priv->irq = irq;
+
+ rc = tpm_read8(priv, TPM_INT_VECTOR(priv->locality), &original_int_vec);
+ if (rc < 0)
+ return rc;
+
+ rc = tpm_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
+ if (rc < 0)
+ return rc;
+
+ rc = tpm_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
+ if (rc < 0)
+ return rc;
+
+ /* Clear all existing */
+ rc = tpm_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
+ if (rc < 0)
+ return rc;
+
+ /* Turn on */
+ rc = tpm_write32(priv, TPM_INT_ENABLE(priv->locality),
+ intmask | TPM_GLOBAL_INT_ENABLE);
+ if (rc < 0)
+ return rc;
+
+ priv->irq_tested = false;
+
+ /* Generate an interrupt by having the core call through to
+ * tpm_tis_send
+ */
+ if (chip->flags & TPM_CHIP_FLAG_TPM2)
+ tpm2_gen_interrupt(chip);
+ else
+ tpm_gen_interrupt(chip);
+
+ /* tpm_tis_send will either confirm the interrupt is working or it
+ * will call disable_irq which undoes all of the above.
+ */
+ if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
+ rc = tpm_write8(priv, original_int_vec,
+ TPM_INT_VECTOR(priv->locality));
+ if (rc < 0)
+ return rc;
+
+ return 1;
+ }
+
+ return 0;
+}
+
+/* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
+ * do not have ACPI/etc. We typically expect the interrupt to be declared if
+ * present.
+ */
+static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ u8 original_int_vec;
+ int i, rc;
+
+ rc = tpm_read8(priv, TPM_INT_VECTOR(priv->locality), &original_int_vec);
+ if (rc < 0)
+ return;
+
+ if (!original_int_vec) {
+ if (IS_ENABLED(CONFIG_X86))
+ for (i = 3; i <= 15; i++)
+ if (!tpm_tis_probe_irq_single(chip, intmask, 0,
+ i))
+ return;
+ } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
+ original_int_vec))
+ return;
+}
+
+void tpm_tis_remove(struct tpm_chip *chip)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ u32 reg = TPM_INT_ENABLE(priv->locality);
+ u32 interrupt;
+ int rc;
+
+ rc = tpm_read32(priv, reg, &interrupt);
+ if (rc < 0)
+ interrupt = 0;
+
+ tpm_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
+ release_locality(chip, priv->locality, 1);
+}
+EXPORT_SYMBOL_GPL(tpm_tis_remove);
+
+static const struct tpm_class_ops tpm_tis = {
+ .status = tpm_tis_status,
+ .recv = tpm_tis_recv,
+ .send = tpm_tis_send,
+ .cancel = tpm_tis_ready,
+ .update_timeouts = tpm_tis_update_timeouts,
+ .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
+ .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
+ .req_canceled = tpm_tis_req_canceled,
+};
+
+int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
+ const struct tpm_tis_phy_ops *phy_ops,
+ acpi_handle acpi_dev_handle)
+{
+ u32 vendor, intfcaps, intmask;
+ u8 rid;
+ int rc, probe;
+ struct tpm_chip *chip;
+
+ chip = tpmm_chip_alloc(dev, &tpm_tis);
+ if (IS_ERR(chip))
+ return PTR_ERR(chip);
+
+#ifdef CONFIG_ACPI
+ chip->acpi_dev_handle = acpi_dev_handle;
+#endif
+
+ /* Maximum timeouts */
+ chip->timeout_a = TIS_TIMEOUT_A_MAX;
+ chip->timeout_b = TIS_TIMEOUT_B_MAX;
+ chip->timeout_c = TIS_TIMEOUT_C_MAX;
+ chip->timeout_d = TIS_TIMEOUT_D_MAX;
+ priv->phy_ops = phy_ops;
+ dev_set_drvdata(&chip->dev, priv);
+
+ if (wait_startup(chip, 0) != 0) {
+ rc = -ENODEV;
+ goto out_err;
+ }
+
+ /* Take control of the TPM's interrupt hardware and shut it off */
+ rc = tpm_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ goto out_err;
+
+ intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
+ TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
+ intmask &= ~TPM_GLOBAL_INT_ENABLE;
+ tpm_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
+
+ if (request_locality(chip, 0) != 0) {
+ rc = -ENODEV;
+ goto out_err;
+ }
+
+ rc = tpm2_probe(chip);
+ if (rc)
+ goto out_err;
+
+ rc = tpm_read32(priv, TPM_DID_VID(0), &vendor);
+ if (rc < 0)
+ goto out_err;
+
+ priv->manufacturer_id = vendor;
+
+ rc = tpm_read8(priv, TPM_RID(0), &rid);
+ if (rc < 0)
+ goto out_err;
+
+ dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
+ (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
+ vendor >> 16, rid);
+
+ if (!(priv->flags & TPM_TIS_ITPM_POSSIBLE)) {
+ probe = probe_itpm(chip);
+ if (probe < 0) {
+ rc = -ENODEV;
+ goto out_err;
+ }
+
+ if (!!probe)
+ priv->flags |= TPM_TIS_ITPM_POSSIBLE;
+ }
+
+ /* Figure out the capabilities */
+ rc = tpm_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
+ if (rc < 0)
+ goto out_err;
+
+ dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
+ intfcaps);
+ if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
+ dev_dbg(dev, "\tBurst Count Static\n");
+ if (intfcaps & TPM_INTF_CMD_READY_INT)
+ dev_dbg(dev, "\tCommand Ready Int Support\n");
+ if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
+ dev_dbg(dev, "\tInterrupt Edge Falling\n");
+ if (intfcaps & TPM_INTF_INT_EDGE_RISING)
+ dev_dbg(dev, "\tInterrupt Edge Rising\n");
+ if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
+ dev_dbg(dev, "\tInterrupt Level Low\n");
+ if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
+ dev_dbg(dev, "\tInterrupt Level High\n");
+ if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
+ dev_dbg(dev, "\tLocality Change Int Support\n");
+ if (intfcaps & TPM_INTF_STS_VALID_INT)
+ dev_dbg(dev, "\tSts Valid Int Support\n");
+ if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
+ dev_dbg(dev, "\tData Avail Int Support\n");
+
+ /* Very early on issue a command to the TPM in polling mode to make
+ * sure it works. May as well use that command to set the proper
+ * timeouts for the driver.
+ */
+ if (tpm_get_timeouts(chip)) {
+ dev_err(dev, "Could not get TPM timeouts and durations\n");
+ rc = -ENODEV;
+ goto out_err;
+ }
+
+ /* INTERRUPT Setup */
+ init_waitqueue_head(&priv->read_queue);
+ init_waitqueue_head(&priv->int_queue);
+ if (irq != -1) {
+ if (irq) {
+ tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
+ irq);
+ if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
+ dev_err(&chip->dev, FW_BUG
+ "TPM interrupt not working, polling instead\n");
+ } else {
+ tpm_tis_probe_irq(chip, intmask);
+ }
+ }
+
+ if (chip->flags & TPM_CHIP_FLAG_TPM2) {
+ rc = tpm2_do_selftest(chip);
+ if (rc == TPM2_RC_INITIALIZE) {
+ dev_warn(dev, "Firmware has not started TPM\n");
+ rc = tpm2_startup(chip, TPM2_SU_CLEAR);
+ if (!rc)
+ rc = tpm2_do_selftest(chip);
+ }
+
+ if (rc) {
+ dev_err(dev, "TPM self test failed\n");
+ if (rc > 0)
+ rc = -ENODEV;
+ goto out_err;
+ }
+ } else {
+ if (tpm_do_selftest(chip)) {
+ dev_err(dev, "TPM self test failed\n");
+ rc = -ENODEV;
+ goto out_err;
+ }
+ }
+
+ return tpm_chip_register(chip);
+out_err:
+ tpm_tis_remove(chip);
+ return rc;
+}
+EXPORT_SYMBOL_GPL(tpm_tis_core_init);
+
+#ifdef CONFIG_PM_SLEEP
+static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
+{
+ struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
+ u32 intmask;
+ int rc;
+
+ /* reenable interrupts that device may have lost or
+ * BIOS/firmware may have disabled
+ */
+ rc = tpm_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
+ if (rc < 0)
+ return;
+
+ rc = tpm_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ return;
+
+ intmask |= TPM_INTF_CMD_READY_INT
+ | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
+ | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
+
+ tpm_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
+}
+
+int tpm_tis_resume(struct device *dev)
+{
+ struct tpm_chip *chip = dev_get_drvdata(dev);
+ int ret;
+
+ if (chip->flags & TPM_CHIP_FLAG_IRQ)
+ tpm_tis_reenable_interrupts(chip);
+
+ ret = tpm_pm_resume(dev);
+ if (ret)
+ return ret;
+
+ /* TPM 1.2 requires self-test on resume. This function actually returns
+ * an error code but for unknown reason it isn't handled.
+ */
+ if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
+ tpm_do_selftest(chip);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(tpm_tis_resume);
+#endif
+
+MODULE_AUTHOR("Leendert van Doorn (leendert-aZOuKsOsJu3MbYB6QlFGEg@public.gmane.org)");
+MODULE_DESCRIPTION("TPM Driver");
+MODULE_VERSION("2.0");
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_core.h
new file mode 100644
index 0000000..76899d8
--- /dev/null
+++ b/drivers/char/tpm/tpm_tis_core.h
@@ -0,0 +1,154 @@
+/*
+ * Copyright (C) 2005, 2006 IBM Corporation
+ * Copyright (C) 2014, 2015 Intel Corporation
+ *
+ * Authors:
+ * Leendert van Doorn <leendert-aZOuKsOsJu3MbYB6QlFGEg@public.gmane.org>
+ * Kylene Hall <kjhall-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
+ *
+ * Maintained by: <tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
+ *
+ * Device driver for TCG/TCPA TPM (trusted platform module).
+ * Specifications at www.trustedcomputinggroup.org
+ *
+ * This device driver implements the TPM interface as defined in
+ * the TCG TPM Interface Spec version 1.2, revision 1.0.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __TPM_TIS_CORE_H__
+#define __TPM_TIS_CORE_H__
+
+#include "tpm.h"
+
+enum tis_access {
+ TPM_ACCESS_VALID = 0x80,
+ TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
+ TPM_ACCESS_REQUEST_PENDING = 0x04,
+ TPM_ACCESS_REQUEST_USE = 0x02,
+};
+
+enum tis_status {
+ TPM_STS_VALID = 0x80,
+ TPM_STS_COMMAND_READY = 0x40,
+ TPM_STS_GO = 0x20,
+ TPM_STS_DATA_AVAIL = 0x10,
+ TPM_STS_DATA_EXPECT = 0x08,
+};
+
+enum tis_int_flags {
+ TPM_GLOBAL_INT_ENABLE = 0x80000000,
+ TPM_INTF_BURST_COUNT_STATIC = 0x100,
+ TPM_INTF_CMD_READY_INT = 0x080,
+ TPM_INTF_INT_EDGE_FALLING = 0x040,
+ TPM_INTF_INT_EDGE_RISING = 0x020,
+ TPM_INTF_INT_LEVEL_LOW = 0x010,
+ TPM_INTF_INT_LEVEL_HIGH = 0x008,
+ TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
+ TPM_INTF_STS_VALID_INT = 0x002,
+ TPM_INTF_DATA_AVAIL_INT = 0x001,
+};
+
+enum tis_defaults {
+ TIS_MEM_LEN = 0x5000,
+ TIS_SHORT_TIMEOUT = 750, /* ms */
+ TIS_LONG_TIMEOUT = 2000, /* 2 sec */
+};
+
+/* Some timeout values are needed before it is known whether the chip is
+ * TPM 1.0 or TPM 2.0.
+ */
+#define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
+#define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
+#define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
+#define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
+
+#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
+#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
+#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
+#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
+#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
+#define TPM_STS(l) (0x0018 | ((l) << 12))
+#define TPM_STS3(l) (0x001b | ((l) << 12))
+#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
+
+#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
+#define TPM_RID(l) (0x0F04 | ((l) << 12))
+
+enum tpm_tis_flags {
+ TPM_TIS_ITPM_POSSIBLE = BIT(0),
+};
+
+struct tpm_tis_data {
+ u16 manufacturer_id;
+ int locality;
+ int irq;
+ bool irq_tested;
+ unsigned int flags;
+ wait_queue_head_t int_queue;
+ wait_queue_head_t read_queue;
+ const struct tpm_tis_phy_ops *phy_ops;
+};
+
+struct tpm_tis_phy_ops {
+ int (*read_bytes)(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *result);
+ int (*write_bytes)(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *value);
+ int (*read16)(struct tpm_tis_data *data, u32 addr, u16 *result);
+ int (*read32)(struct tpm_tis_data *data, u32 addr, u32 *result);
+ int (*write32)(struct tpm_tis_data *data, u32 addr, u32 src);
+ int (*post_probe)(struct tpm_chip *chip);
+};
+
+static inline int tpm_read_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *result)
+{
+ return data->phy_ops->read_bytes(data, addr, len, result);
+}
+
+static inline int tpm_read8(struct tpm_tis_data *data, u32 addr, u8 *result)
+{
+ return data->phy_ops->read_bytes(data, addr, 1, result);
+}
+
+static inline int tpm_read16(struct tpm_tis_data *data, u32 addr, u16 *result)
+{
+ return data->phy_ops->read16(data, addr, result);
+}
+
+static inline int tpm_read32(struct tpm_tis_data *data, u32 addr, u32 *result)
+{
+ return data->phy_ops->read32(data, addr, result);
+}
+
+static inline int tpm_write_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
+ u8 *value)
+{
+ return data->phy_ops->write_bytes(data, addr, len, value);
+}
+
+static inline int tpm_write8(struct tpm_tis_data *data, u32 addr, u8 value)
+{
+ return data->phy_ops->write_bytes(data, addr, 1, &value);
+}
+
+static inline int tpm_write32(struct tpm_tis_data *data, u32 addr, u32 value)
+{
+ return data->phy_ops->write32(data, addr, value);
+}
+
+void tpm_tis_remove(struct tpm_chip *chip);
+int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
+ const struct tpm_tis_phy_ops *phy_ops,
+ acpi_handle acpi_dev_handle);
+
+#ifdef CONFIG_PM_SLEEP
+int tpm_tis_resume(struct device *dev);
+#endif
+
+#endif
--
2.1.4
------------------------------------------------------------------------------
Find and fix application performance issues faster with Applications Manager
Applications Manager provides deep performance insights into multiple tiers of
your business applications. It resolves application problems quickly and
reduces your MTTR. Get your free trial!
https://ad.doubleclick.net/ddm/clk/302982198;130105516;z
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 7/8] tpm: Use read/write_bytes for drivers without more specialized methods
[not found] ` <1461276283-2453-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (5 preceding siblings ...)
2016-04-21 22:04 ` [PATCH v5 6/8] tpm/tpm_tis: Split tpm_tis driver into a core and TCG TIS compliant phy Christophe Ricard
@ 2016-04-21 22:04 ` Christophe Ricard
2016-04-21 22:04 ` [PATCH v5 8/8] tpm/tpm_tis_spi: Add support for spi phy Christophe Ricard
7 siblings, 0 replies; 11+ messages in thread
From: Christophe Ricard @ 2016-04-21 22:04 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
Some drivers might need to implement only functions for transferring an
arbitrary number of bytes. Provides a generic functions for handling of
word or dword transfers to be dump into driver functions pointers.
Signed-off-by: Alexander Steffen <Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm_tis_core.c | 30 ++++++++++++++++++++++++++++++
drivers/char/tpm/tpm_tis_core.h | 4 ++++
2 files changed, 34 insertions(+)
diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
index f4e05ac..fd9c6a5 100644
--- a/drivers/char/tpm/tpm_tis_core.c
+++ b/drivers/char/tpm/tpm_tis_core.c
@@ -854,6 +854,36 @@ int tpm_tis_resume(struct device *dev)
EXPORT_SYMBOL_GPL(tpm_tis_resume);
#endif
+int tpm_tis_common_read16(struct tpm_tis_data *data, u32 addr, u16 *result)
+{
+ int rc;
+
+ rc = data->phy_ops->read_bytes(data, addr, sizeof(u16), (u8 *)result);
+ if (!rc)
+ *result = le16_to_cpu(*result);
+ return rc;
+}
+EXPORT_SYMBOL_GPL(tpm_tis_common_read16);
+
+int tpm_tis_common_read32(struct tpm_tis_data *data, u32 addr, u32 *result)
+{
+ int rc;
+
+ rc = data->phy_ops->read_bytes(data, addr, sizeof(u32), (u8 *)result);
+ if (!rc)
+ *result = le32_to_cpu(*result);
+ return rc;
+}
+EXPORT_SYMBOL_GPL(tpm_tis_common_read32);
+
+int tpm_tis_common_write32(struct tpm_tis_data *data, u32 addr, u32 value)
+{
+ value = cpu_to_le32(value);
+ return data->phy_ops->write_bytes(data, addr, sizeof(u32),
+ (u8 *)&value);
+}
+EXPORT_SYMBOL_GPL(tpm_tis_common_write32);
+
MODULE_AUTHOR("Leendert van Doorn (leendert-aZOuKsOsJu3MbYB6QlFGEg@public.gmane.org)");
MODULE_DESCRIPTION("TPM Driver");
MODULE_VERSION("2.0");
diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_core.h
index 76899d8..b426934 100644
--- a/drivers/char/tpm/tpm_tis_core.h
+++ b/drivers/char/tpm/tpm_tis_core.h
@@ -142,6 +142,10 @@ static inline int tpm_write32(struct tpm_tis_data *data, u32 addr, u32 value)
return data->phy_ops->write32(data, addr, value);
}
+int tpm_tis_common_read16(struct tpm_tis_data *data, u32 addr, u16 *result);
+int tpm_tis_common_read32(struct tpm_tis_data *data, u32 addr, u32 *result);
+int tpm_tis_common_write32(struct tpm_tis_data *data, u32 addr, u32 value);
+
void tpm_tis_remove(struct tpm_chip *chip);
int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
const struct tpm_tis_phy_ops *phy_ops,
--
2.1.4
------------------------------------------------------------------------------
Find and fix application performance issues faster with Applications Manager
Applications Manager provides deep performance insights into multiple tiers of
your business applications. It resolves application problems quickly and
reduces your MTTR. Get your free trial!
https://ad.doubleclick.net/ddm/clk/302982198;130105516;z
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 8/8] tpm/tpm_tis_spi: Add support for spi phy
[not found] ` <1461276283-2453-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (6 preceding siblings ...)
2016-04-21 22:04 ` [PATCH v5 7/8] tpm: Use read/write_bytes for drivers without more specialized methods Christophe Ricard
@ 2016-04-21 22:04 ` Christophe Ricard
7 siblings, 0 replies; 11+ messages in thread
From: Christophe Ricard @ 2016-04-21 22:04 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, Peter Huewe,
benoit.houyere-qxv4g6HH51o
Spi protocol standardized by the TCG is now supported by most of TPM
vendors.
It supports SPI Bit Protocol as describe in the TCG PTP
specification (chapter 6.4.6 SPI Bit Protocol).
Irq mode is not supported.
Signed-off-by: Peter Huewe <peter.huewe-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Alexander Steffen <Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
.../bindings/security/tpm/tpm_tis_spi.txt | 24 ++
drivers/char/tpm/Kconfig | 12 +
drivers/char/tpm/Makefile | 1 +
drivers/char/tpm/tpm_tis_spi.c | 245 +++++++++++++++++++++
4 files changed, 282 insertions(+)
create mode 100644 Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt
create mode 100644 drivers/char/tpm/tpm_tis_spi.c
diff --git a/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt b/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt
new file mode 100644
index 0000000..85741cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt
@@ -0,0 +1,24 @@
+Required properties:
+- compatible: should be one of the following
+ "st,st33htpm-spi"
+ "infineon,slb9670"
+ "tcg,tpm_tis-spi"
+- spi-max-frequency: Maximum SPI frequency (depends on TPMs).
+
+Optional SoC Specific Properties:
+- pinctrl-names: Contains only one value - "default".
+- pintctrl-0: Specifies the pin control groups used for this controller.
+
+Example (for ARM-based BeagleBoard xM with TPM_TIS on SPI4):
+
+&mcspi4 {
+
+ status = "okay";
+
+ tpm_tis@0 {
+
+ compatible = "tcg,tpm_tis-spi";
+
+ spi-max-frequency = <10000000>;
+ };
+};
diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig
index b217308..a8ab570 100644
--- a/drivers/char/tpm/Kconfig
+++ b/drivers/char/tpm/Kconfig
@@ -41,6 +41,18 @@ config TCG_TIS
within Linux. To compile this driver as a module, choose M here;
the module will be called tpm_tis.
+config TCG_TIS_SPI
+ tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (SPI)"
+ depends on SPI
+ select TCG_TIS_CORE
+ ---help---
+ If you have a TPM security chip which is connected to a regular,
+ non-tcg SPI master (i.e. most embedded platforms) that is compliant with the
+ TCG TIS 1.3 TPM specification (TPM1.2) or the TCG PTP FIFO
+ specification (TPM2.0) say Yes and it will be accessible from
+ within Linux. To compile this driver as a module, choose M here;
+ the module will be called tpm_tis_spi.
+
config TCG_TIS_I2C_ATMEL
tristate "TPM Interface Specification 1.2 Interface (I2C - Atmel)"
depends on I2C
diff --git a/drivers/char/tpm/Makefile b/drivers/char/tpm/Makefile
index 80be5b2..b14a29d 100644
--- a/drivers/char/tpm/Makefile
+++ b/drivers/char/tpm/Makefile
@@ -14,6 +14,7 @@ endif
endif
obj-$(CONFIG_TCG_TIS_CORE) += tpm_tis_core.o
obj-$(CONFIG_TCG_TIS) += tpm_tis.o
+obj-$(CONFIG_TCG_TIS_SPI) += tpm_tis_spi.o
obj-$(CONFIG_TCG_TIS_I2C_ATMEL) += tpm_i2c_atmel.o
obj-$(CONFIG_TCG_TIS_I2C_INFINEON) += tpm_i2c_infineon.o
obj-$(CONFIG_TCG_TIS_I2C_NUVOTON) += tpm_i2c_nuvoton.o
diff --git a/drivers/char/tpm/tpm_tis_spi.c b/drivers/char/tpm/tpm_tis_spi.c
new file mode 100644
index 0000000..2184565
--- /dev/null
+++ b/drivers/char/tpm/tpm_tis_spi.c
@@ -0,0 +1,245 @@
+/*
+ * Copyright (C) 2015 Infineon Technologies AG
+ * Copyright (C) 2016 STMicroelectronics SAS
+ *
+ * Authors:
+ * Peter Huewe <peter.huewe-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
+ * Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
+ *
+ * Maintained by: <tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
+ *
+ * Device driver for TCG/TCPA TPM (trusted platform module).
+ * Specifications at www.trustedcomputinggroup.org
+ *
+ * This device driver implements the TPM interface as defined in
+ * the TCG TPM Interface Spec version 1.3, revision 27 via _raw/native
+ * SPI access_.
+ *
+ * It is based on the original tpm_tis device driver from Leendert van
+ * Dorn and Kyleen Hall and Jarko Sakkinnen.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/acpi.h>
+#include <linux/freezer.h>
+
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <linux/of_irq.h>
+#include <linux/of_gpio.h>
+#include <linux/tpm.h>
+#include "tpm.h"
+#include "tpm_tis_core.h"
+
+#define MAX_SPI_FRAMESIZE 64
+
+struct tpm_tis_spi_phy {
+ struct tpm_tis_data priv;
+ struct spi_device *spi_device;
+
+ u8 tx_buf[MAX_SPI_FRAMESIZE + 4];
+ u8 rx_buf[MAX_SPI_FRAMESIZE + 4];
+};
+
+struct tpm_tis_spi_phy *to_tpm_tis_spi_phy(struct tpm_tis_data *data)
+{
+ return container_of(data, struct tpm_tis_spi_phy, priv);
+}
+
+static int tpm_tis_spi_read_bytes(struct tpm_tis_data *data, u32 addr,
+ u16 len, u8 *result)
+{
+ struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
+ int ret, i;
+ struct spi_message m;
+ struct spi_transfer spi_xfer = {
+ .tx_buf = phy->tx_buf,
+ .rx_buf = phy->rx_buf,
+ .len = 4,
+ };
+
+ if (len > MAX_SPI_FRAMESIZE)
+ return -ENOMEM;
+
+ phy->tx_buf[0] = 0x80 | (len - 1);
+ phy->tx_buf[1] = 0xd4;
+ phy->tx_buf[2] = (addr >> 8) & 0xFF;
+ phy->tx_buf[3] = addr & 0xFF;
+
+ spi_xfer.cs_change = 1;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+
+ spi_bus_lock(phy->spi_device->master);
+ ret = spi_sync_locked(phy->spi_device, &m);
+ if (ret < 0)
+ goto exit;
+
+ memset(phy->tx_buf, 0, len);
+
+ /* According to TCG PTP specification, if there is no TPM present at
+ * all, then the design has a weak pull-up on MISO. If a TPM is not
+ * present, a pull-up on MISO means that the SB controller sees a 1,
+ * and will latch in 0xFF on the read.
+ */
+ for (i = 0; (phy->rx_buf[0] & 0x01) == 0 && i < TPM_RETRY; i++) {
+ spi_xfer.len = 1;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+ ret = spi_sync_locked(phy->spi_device, &m);
+ if (ret < 0)
+ goto exit;
+ }
+
+ spi_xfer.cs_change = 0;
+ spi_xfer.len = len;
+ spi_xfer.rx_buf = result;
+
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+ ret = spi_sync_locked(phy->spi_device, &m);
+
+exit:
+ spi_bus_unlock(phy->spi_device->master);
+ return ret;
+}
+
+static int tpm_tis_spi_write_bytes(struct tpm_tis_data *data, u32 addr,
+ u16 len, u8 *value)
+{
+ struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
+ int ret, i;
+ struct spi_message m;
+ struct spi_transfer spi_xfer = {
+ .tx_buf = phy->tx_buf,
+ .rx_buf = phy->rx_buf,
+ .len = 4,
+ };
+
+ if (len > MAX_SPI_FRAMESIZE)
+ return -ENOMEM;
+
+ phy->tx_buf[0] = len - 1;
+ phy->tx_buf[1] = 0xd4;
+ phy->tx_buf[2] = (addr >> 8) & 0xFF;
+ phy->tx_buf[3] = addr & 0xFF;
+
+ spi_xfer.cs_change = 1;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+
+ spi_bus_lock(phy->spi_device->master);
+ ret = spi_sync_locked(phy->spi_device, &m);
+ if (ret < 0)
+ goto exit;
+
+ memset(phy->tx_buf, 0, len);
+
+ /* According to TCG PTP specification, if there is no TPM present at
+ * all, then the design has a weak pull-up on MISO. If a TPM is not
+ * present, a pull-up on MISO means that the SB controller sees a 1,
+ * and will latch in 0xFF on the read.
+ */
+ for (i = 0; (phy->rx_buf[0] & 0x01) == 0 && i < TPM_RETRY; i++) {
+ spi_xfer.len = 1;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+ ret = spi_sync_locked(phy->spi_device, &m);
+ if (ret < 0)
+ goto exit;
+ }
+
+ spi_xfer.len = len;
+ spi_xfer.tx_buf = value;
+ spi_xfer.cs_change = 0;
+ spi_xfer.tx_buf = value;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+ ret = spi_sync_locked(phy->spi_device, &m);
+
+exit:
+ spi_bus_unlock(phy->spi_device->master);
+ return ret;
+}
+
+static const struct tpm_tis_phy_ops tpm_spi_phy_ops = {
+ .read_bytes = tpm_tis_spi_read_bytes,
+ .write_bytes = tpm_tis_spi_write_bytes,
+ .read16 = tpm_tis_common_read16,
+ .read32 = tpm_tis_common_read32,
+ .write32 = tpm_tis_common_write32,
+};
+
+static int tpm_tis_spi_probe(struct spi_device *dev)
+{
+ struct tpm_tis_spi_phy *phy;
+
+ phy = devm_kzalloc(&dev->dev, sizeof(struct tpm_tis_spi_phy),
+ GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
+
+ phy->spi_device = dev;
+
+ return tpm_tis_core_init(&dev->dev, &phy->priv, -1, &tpm_spi_phy_ops,
+ NULL);
+}
+
+static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
+
+static int tpm_tis_spi_remove(struct spi_device *dev)
+{
+ struct tpm_chip *chip = spi_get_drvdata(dev);
+
+ tpm_chip_unregister(chip);
+ tpm_tis_remove(chip);
+ return 0;
+}
+
+static const struct spi_device_id tpm_tis_spi_id[] = {
+ {"tpm_tis_spi", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(spi, tpm_tis_spi_id);
+
+static const struct of_device_id of_tis_spi_match[] = {
+ { .compatible = "st,st33htpm-spi", },
+ { .compatible = "infineon,slb9670", },
+ { .compatible = "tcg,tpm_tis-spi", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, of_tis_spi_match);
+
+static const struct acpi_device_id acpi_tis_spi_match[] = {
+ {"SMO0768", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, acpi_tis_spi_match);
+
+static struct spi_driver tpm_tis_spi_driver = {
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "tpm_tis_spi",
+ .pm = &tpm_tis_pm,
+ .of_match_table = of_match_ptr(of_tis_spi_match),
+ .acpi_match_table = ACPI_PTR(acpi_tis_spi_match),
+ },
+ .probe = tpm_tis_spi_probe,
+ .remove = tpm_tis_spi_remove,
+ .id_table = tpm_tis_spi_id,
+};
+module_spi_driver(tpm_tis_spi_driver);
+
+MODULE_DESCRIPTION("TPM Driver for native SPI access");
+MODULE_LICENSE("GPL");
--
2.1.4
------------------------------------------------------------------------------
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