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From: Sylvain Lemieux <slemieux.tyco-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Vladimir Zapolskiy <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
	Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
	Roland Stigge <stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v2 3/4] arm: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC
Date: Mon, 25 Apr 2016 12:05:01 -0400	[thread overview]
Message-ID: <1461600301.6934.5.camel@localhost> (raw)
In-Reply-To: <1461546041-25713-1-git-send-email-vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>

Hi Vladimir,

On Mon, 2016-04-25 at 04:00 +0300, Vladimir Zapolskiy wrote:
> The change adds separate device nodes for SIC1 and SIC2 interrupt
> controllers and reparents all defined SIC1 and SIC2 interrupt
> producers to the correspondent interrupt controller, this is needed to
> perform switching to a new LPC32xx MIC/SIC interrupt controller driver.
> 
> Signed-off-by: Vladimir Zapolskiy <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>
> ---
> Changes from v1 to v2:
> * squashed two step change in lpc32xx.dtsi - new irqchip driver can be
>   used (i.e. board boots with access to userspace) with old DTS file,
>   so there is no need to fix DTS firstly and then switch to a new driver,
> * removed "interrupt-controller-name" and "wakeup-sources" properties
>   from all interrupt controllers,
> * removed outdated comment.
> 
>  arch/arm/boot/dts/lpc32xx.dtsi | 58 +++++++++++++++++++++++++++++-------------
>  1 file changed, 41 insertions(+), 17 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
> index 73c4746..4570ddc 100644
> --- a/arch/arm/boot/dts/lpc32xx.dtsi
> +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> @@ -92,7 +92,8 @@

...
>  
> -			/*
> -			 * MIC Interrupt controller includes:
> -			 *   MIC @40008000
> -			 *   SIC1 @4000C000
> -			 *   SIC2 @40010000
> -			 */
>  			mic: interrupt-controller@40008000 {
>  				compatible = "nxp,lpc3220-mic";
>  				interrupt-controller;
> @@ -327,6 +326,28 @@

I think your are missing one change in your patch,
the mic register range should be 0x4000, not 0xC000.

Everything else is OK.

>  				#interrupt-cells = <2>;
>  			};
>  
> +			sic1: interrupt-controller@4000c000 {
> +				compatible = "nxp,lpc3220-sic";
> +				reg = <0x4000c000 0x4000>;
> +				interrupt-controller;
> +				#interrupt-cells = <2>;
> +
> +				interrupt-parent = <&mic>;
> +				interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
> +					     <30 IRQ_TYPE_LEVEL_LOW>;
> +				};
> +
> +			sic2: interrupt-controller@40010000 {
> +				compatible = "nxp,lpc3220-sic";
> +				reg = <0x40010000 0x4000>;
> +				interrupt-controller;
> +				#interrupt-cells = <2>;
> +
> +				interrupt-parent = <&mic>;
> +				interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
> +					     <31 IRQ_TYPE_LEVEL_LOW>;
> +			};
> +
...

Sylvain


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WARNING: multiple messages have this Message-ID (diff)
From: slemieux.tyco@gmail.com (Sylvain Lemieux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/4] arm: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC
Date: Mon, 25 Apr 2016 12:05:01 -0400	[thread overview]
Message-ID: <1461600301.6934.5.camel@localhost> (raw)
In-Reply-To: <1461546041-25713-1-git-send-email-vz@mleia.com>

Hi Vladimir,

On Mon, 2016-04-25 at 04:00 +0300, Vladimir Zapolskiy wrote:
> The change adds separate device nodes for SIC1 and SIC2 interrupt
> controllers and reparents all defined SIC1 and SIC2 interrupt
> producers to the correspondent interrupt controller, this is needed to
> perform switching to a new LPC32xx MIC/SIC interrupt controller driver.
> 
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> ---
> Changes from v1 to v2:
> * squashed two step change in lpc32xx.dtsi - new irqchip driver can be
>   used (i.e. board boots with access to userspace) with old DTS file,
>   so there is no need to fix DTS firstly and then switch to a new driver,
> * removed "interrupt-controller-name" and "wakeup-sources" properties
>   from all interrupt controllers,
> * removed outdated comment.
> 
>  arch/arm/boot/dts/lpc32xx.dtsi | 58 +++++++++++++++++++++++++++++-------------
>  1 file changed, 41 insertions(+), 17 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
> index 73c4746..4570ddc 100644
> --- a/arch/arm/boot/dts/lpc32xx.dtsi
> +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> @@ -92,7 +92,8 @@

...
>  
> -			/*
> -			 * MIC Interrupt controller includes:
> -			 *   MIC @40008000
> -			 *   SIC1 @4000C000
> -			 *   SIC2 @40010000
> -			 */
>  			mic: interrupt-controller at 40008000 {
>  				compatible = "nxp,lpc3220-mic";
>  				interrupt-controller;
> @@ -327,6 +326,28 @@

I think your are missing one change in your patch,
the mic register range should be 0x4000, not 0xC000.

Everything else is OK.

>  				#interrupt-cells = <2>;
>  			};
>  
> +			sic1: interrupt-controller at 4000c000 {
> +				compatible = "nxp,lpc3220-sic";
> +				reg = <0x4000c000 0x4000>;
> +				interrupt-controller;
> +				#interrupt-cells = <2>;
> +
> +				interrupt-parent = <&mic>;
> +				interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
> +					     <30 IRQ_TYPE_LEVEL_LOW>;
> +				};
> +
> +			sic2: interrupt-controller at 40010000 {
> +				compatible = "nxp,lpc3220-sic";
> +				reg = <0x40010000 0x4000>;
> +				interrupt-controller;
> +				#interrupt-cells = <2>;
> +
> +				interrupt-parent = <&mic>;
> +				interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
> +					     <31 IRQ_TYPE_LEVEL_LOW>;
> +			};
> +
...

Sylvain

  parent reply	other threads:[~2016-04-25 16:05 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-25  0:59 [PATCH v2 0/4] irqchip: lpc32xx: add LPC32xx irqchip driver Vladimir Zapolskiy
2016-04-25  0:59 ` Vladimir Zapolskiy
     [not found] ` <1461545990-25560-1-git-send-email-vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>
2016-04-25  1:00   ` [PATCH v2 1/4] dt-bindings: interrupt-controllers: add description of SIC1 and SIC2 Vladimir Zapolskiy
2016-04-25  1:00     ` Vladimir Zapolskiy
     [not found]     ` <1461546023-25614-1-git-send-email-vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>
2016-04-25 14:51       ` Rob Herring
2016-04-25 14:51         ` Rob Herring
2016-04-25 15:56         ` Sylvain Lemieux
2016-04-25 15:56           ` Sylvain Lemieux
2016-04-25  1:00   ` [PATCH v2 3/4] arm: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC Vladimir Zapolskiy
2016-04-25  1:00     ` Vladimir Zapolskiy
     [not found]     ` <1461546041-25713-1-git-send-email-vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>
2016-04-25 16:05       ` Sylvain Lemieux [this message]
2016-04-25 16:05         ` Sylvain Lemieux
2016-04-25 20:55         ` Vladimir Zapolskiy
2016-04-25 20:55           ` Vladimir Zapolskiy
2016-04-25 21:02       ` [PATCH v3 " Vladimir Zapolskiy
2016-04-25 21:02         ` Vladimir Zapolskiy
     [not found]         ` <1461618143-12310-1-git-send-email-vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>
2016-04-26 12:26           ` Sylvain Lemieux
2016-04-26 12:26             ` Sylvain Lemieux
2016-04-26 18:38             ` Vladimir Zapolskiy
2016-04-26 18:38               ` Vladimir Zapolskiy
2016-04-25  1:00 ` [PATCH v2 2/4] irqchip: add LPC32xx interrupt controller driver Vladimir Zapolskiy
2016-04-26 13:41   ` Sylvain Lemieux
2016-04-28 22:15     ` Vladimir Zapolskiy
2016-05-03  8:34       ` Marc Zyngier
2016-05-03  9:38         ` Vladimir Zapolskiy
2016-05-03  9:50           ` Marc Zyngier
2016-04-25  1:00 ` [PATCH v2 4/4] ARM: lpc32xx: remove legacy irq " Vladimir Zapolskiy
2016-04-25 16:08   ` Sylvain Lemieux

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