✗ Fi.CI.BAT: failure for Support blending modes of display planes

✗ Fi.CI.BAT: failure for Support blending modes of display planes

[Patchwork]

== Summary ==

HEAD is now at 9fe57ae drm-intel-nightly: 2016y-01m-18d-06h-56m-50s UTC integration manifest
Applying: drm: Introduce the blend-func property
Applying: drm/i915/skl: Add blend_func to SKL/BXT sprite planes
Applying: drm: Introduce DRM_MODE_COLOR()
Applying: drm: Add an blend_color property
Applying: drm/i915/skl: Add support for blending modes
Applying: drm/i915/skl: Drop alpha in non ARGB formats
Applying: drm/i915: Support blend func on primary
Applying: drm/i915/skl: Support blend color on primary
Repository lacks necessary blobs to fall back on 3-way merge.
Cannot fall back to three-way merge.
Patch failed at 0008 drm/i915/skl: Support blend color on primary

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[PATCH 0/9] Support blending modes of display planes

[Vandita Kulkarni]

From: vandita kulkarni <vandita.kulkarni@intel.com>

The below patches support plane and pixel blending
by adding two properties blend_func and blend_color.
As per Damien's initial patches, this design based on 
OpenGL's blend equations is suggested by Ville.
All the below patches are tested on BXT android platform.

The initial kernel patches from damien can be found at
https://github.com/dlespiau/linux/commits/20150708-alpha-blending
Damien Lespiau (5):
  drm: Introduce the blend-func property
  drm/i915/skl: Add blend_func to SKL/BXT sprite planes
  drm: Introduce DRM_MODE_COLOR()
  drm: Add an blend_color property
  drm/i915/skl: Add support for blending modes

vandita kulkarni (4):
  drm/i915/skl: Drop alpha in non ARGB formats
  drm/i915: Support blend func on primary
  drm/i915/skl: Support blend color on primary
  drm/i915/skl: Separate out disable plane alpha


The initial version of kms_blend, igt by Damien
can be found at
https://github.com/dlespiau/intel-gpu-tools/commits/20150613-blend

 Documentation/DocBook/gpu.tmpl       |  18 +++-
 drivers/gpu/drm/drm_atomic.c         |  18 ++++
 drivers/gpu/drm/drm_crtc.c           |  10 +++
 drivers/gpu/drm/i915/i915_reg.h      |   4 +
 drivers/gpu/drm/i915/intel_display.c | 164 +++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_drv.h     |  12 ++-
 drivers/gpu/drm/i915/intel_sprite.c  |  17 ++--
 include/drm/drm_crtc.h               |  26 ++++++
 include/uapi/drm/drm_mode.h          |  34 ++++++++
 9 files changed, 286 insertions(+), 17 deletions(-)

-- 
1.9.1

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[PATCH 1/9] drm: Introduce the blend-func property

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

We'd like to be able to program the blending modes of display planes.
Ville suggested to use something similar to the GL blend states, which
does seem like a good idea.

For now, we only consider blend factors, but room is left for
extensions: blend equation, separate rgb/alpha blend factors, blend
color.

V2: Added the belnd func property support in get property.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 Documentation/DocBook/gpu.tmpl | 11 +++++++++--
 drivers/gpu/drm/drm_atomic.c   | 14 ++++++++++++++
 drivers/gpu/drm/drm_crtc.c     |  5 +++++
 include/drm/drm_crtc.h         | 20 ++++++++++++++++++++
 4 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
index 351e801..2017162 100644
--- a/Documentation/DocBook/gpu.tmpl
+++ b/Documentation/DocBook/gpu.tmpl
@@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Description/Restrictions</td>
 	</tr>
 	<tr>
-	<td rowspan="37" valign="top" >DRM</td>
+	<td rowspan="38" valign="top" >DRM</td>
 	<td valign="top" >Generic</td>
 	<td valign="top" >“rotation”</td>
 	<td valign="top" >BITMASK</td>
@@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that connector is attached to (atomic)</td>
 	</tr>
 	<tr>
-	<td rowspan="11" valign="top" >Plane</td>
+	<td rowspan="12" valign="top" >Plane</td>
 	<td valign="top" >“type”</td>
 	<td valign="top" >ENUM | IMMUTABLE</td>
 	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
@@ -1946,6 +1946,13 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that plane is attached to (atomic)</td>
 	</tr>
 	<tr>
+	<td valign="top" >“blend_func”</td>
+	<td valign="top" >None</td>
+	<td valign="top" >DRM_BLEND_FUNC()</td>
+	<td valign="top" >Plane</td>
+	<td valign="top" >Source and destination blending factors</td>
+	</tr>
+	<tr>
 	<td rowspan="2" valign="top" >DVI-I</td>
 	<td valign="top" >“subconnector”</td>
 	<td valign="top" >ENUM</td>
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 3f74193..0c165c6 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -630,6 +630,18 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
 		state->src_h = val;
 	} else if (property == config->rotation_property) {
 		state->rotation = val;
+	} else if (property == config->prop_blend_func) {
+		enum drm_blend_factor src_factor, dst_factor;
+
+		src_factor = DRM_BLEND_FUNC_SRC_FACTOR(val);
+		dst_factor = DRM_BLEND_FUNC_DST_FACTOR(val);
+
+		if (src_factor != dst_factor &&
+		    (src_factor == DRM_BLEND_FACTOR_AUTO ||
+		     dst_factor == DRM_BLEND_FACTOR_AUTO))
+			return -EINVAL;
+
+		state->blend_mode.func = val & GENMASK(31, 0);
 	} else if (plane->funcs->atomic_set_property) {
 		return plane->funcs->atomic_set_property(plane, state,
 				property, val);
@@ -686,6 +698,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
 		*val = state->src_h;
 	} else if (property == config->rotation_property) {
 		*val = state->rotation;
+	} else if (property == config->prop_blend_func) {
+		*val = state->blend_mode.func;
 	} else if (plane->funcs->atomic_get_property) {
 		return plane->funcs->atomic_get_property(plane, state, property, val);
 	} else {
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 62fa95f..b8dde06 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1542,6 +1542,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.prop_mode_id = prop;
 
+	prop = drm_property_create_range(dev, 0, "blend_func", 0, U32_MAX);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.prop_blend_func = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index c65a212..9cfe601 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -99,6 +99,23 @@ static inline uint64_t I642U64(int64_t val)
 #define DRM_REFLECT_X	4
 #define DRM_REFLECT_Y	5
 
+enum drm_blend_factor {
+	DRM_BLEND_FACTOR_AUTO,
+	DRM_BLEND_FACTOR_ZERO,
+	DRM_BLEND_FACTOR_ONE,
+	DRM_BLEND_FACTOR_SRC_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
+};
+
+#define DRM_BLEND_FUNC(src_factor, dst_factor)		\
+	(DRM_BLEND_FACTOR_##src_factor << 16 | DRM_BLEND_FACTOR_##dst_factor)
+#define DRM_BLEND_FUNC_SRC_FACTOR(val)	(((val) >> 16) & 0xffff)
+#define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
+
+struct drm_blend_mode {
+	uint64_t func;
+};
+
 enum drm_connector_force {
 	DRM_FORCE_UNSPECIFIED,
 	DRM_FORCE_OFF,
@@ -1267,6 +1284,8 @@ struct drm_plane_state {
 	/* Plane rotation */
 	unsigned int rotation;
 
+	struct drm_blend_mode blend_mode;
+
 	struct drm_atomic_state *state;
 };
 
@@ -2099,6 +2118,7 @@ struct drm_mode_config {
 	struct drm_property *prop_crtc_id;
 	struct drm_property *prop_active;
 	struct drm_property *prop_mode_id;
+	struct drm_property *prop_blend_func;
 
 	/* DVI-I properties */
 	struct drm_property *dvi_i_subconnector_property;
-- 
1.9.1

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[PATCH 2/9] drm/i915/skl: Add blend_func to SKL/BXT sprite planes

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

This patch adds the blend functions, and as per the
blend function, updates the plane control register values

V2: Add blend support for all RGB8888 formats
Fix the reg writes on plane_ctl_alpha bits.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 106 ++++++++++++++++++++++++++++++++---
 drivers/gpu/drm/i915/intel_drv.h     |  11 +++-
 drivers/gpu/drm/i915/intel_sprite.c  |   4 ++
 3 files changed, 112 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 07ca19b..7e59a49 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3003,8 +3003,22 @@ static void skl_detach_scalers(struct intel_crtc *intel_crtc)
 	}
 }
 
-u32 skl_plane_ctl_format(uint32_t pixel_format)
-{
+u32 skl_plane_ctl_format(uint32_t pixel_format,
+			 bool pre_multiplied,
+			 bool drop_alpha)
+{
+	u32 plane_ctl_alpha = 0;
+
+	if (pixel_format == DRM_FORMAT_ABGR8888 ||
+	    pixel_format == DRM_FORMAT_ARGB8888) {
+		if (drop_alpha)
+			plane_ctl_alpha = PLANE_CTL_ALPHA_DISABLE;
+		else if (pre_multiplied)
+			plane_ctl_alpha = PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		else
+			plane_ctl_alpha = PLANE_CTL_ALPHA_HW_PREMULTIPLY;
+	}
+
 	switch (pixel_format) {
 	case DRM_FORMAT_C8:
 		return PLANE_CTL_FORMAT_INDEXED;
@@ -3020,11 +3034,11 @@ u32 skl_plane_ctl_format(uint32_t pixel_format)
 	 * DRM_FORMAT) for user-space to configure that.
 	 */
 	case DRM_FORMAT_ABGR8888:
-		return PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX |
-			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		return ((PLANE_CTL_FORMAT_XRGB_8888 | (PLANE_CTL_ORDER_RGBX
+				& (~PLANE_CTL_ALPHA_MASK))) | plane_ctl_alpha);
 	case DRM_FORMAT_ARGB8888:
-		return PLANE_CTL_FORMAT_XRGB_8888 |
-			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		return ((PLANE_CTL_FORMAT_XRGB_8888 & ~PLANE_CTL_ALPHA_MASK)
+						| plane_ctl_alpha);
 	case DRM_FORMAT_XRGB2101010:
 		return PLANE_CTL_FORMAT_XRGB_2101010;
 	case DRM_FORMAT_XBGR2101010:
@@ -3113,7 +3127,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 		    PLANE_CTL_PIPE_GAMMA_ENABLE |
 		    PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format, false, false);
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 	plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;
 	plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -11862,6 +11876,66 @@ static bool needs_scaling(struct intel_plane_state *state)
 	return (src_w != dst_w || src_h != dst_h);
 }
 
+static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
+{
+	struct drm_device *dev = plane_state->state->dev;
+	struct intel_plane_state *state = to_intel_plane_state(plane_state);
+	const struct drm_framebuffer *fb = plane_state->fb;
+	const struct drm_blend_mode *mode = &state->base.blend_mode;
+	bool has_per_pixel_blending;
+
+	/*
+	 * We don't install the properties pre-SKL, so this is SKL+ specific
+	 * code for now.
+	 */
+	if (INTEL_INFO(dev)->gen < 9)
+		return 0;
+
+	if (!fb)
+		return 0;
+
+	has_per_pixel_blending = fb->pixel_format == DRM_FORMAT_ABGR8888 ||
+				fb->pixel_format == DRM_FORMAT_RGBA8888 ||
+				fb->pixel_format == DRM_FORMAT_ARGB8888 ||
+				fb->pixel_format == DRM_FORMAT_BGRA8888;
+
+	state->premultiplied_alpha = false;
+	state->drop_alpha = false;
+
+	switch (mode->func) {
+	/*
+	 * The 'AUTO' behaviour is the default and keeps compatibility with
+	 * kernels before the introduction of the blend_func property:
+	 *   - pre-multiplied alpha if the fb has an alpha channel
+	 *   - usual DRM_BLEND_FUNC(ONE, ZERO) otherwise
+	 */
+	case DRM_BLEND_FUNC(AUTO, AUTO):
+		if (has_per_pixel_blending)
+			state->premultiplied_alpha = true;
+		break;
+	/* fbs without an alpha channel, or dropping the alpha channel */
+	case DRM_BLEND_FUNC(ONE, ZERO):
+		if (has_per_pixel_blending)
+			state->drop_alpha = true;
+		break;
+	/* pre-multiplied alpha */
+	case DRM_BLEND_FUNC(ONE, ONE_MINUS_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			return -EINVAL;
+		state->premultiplied_alpha = true;
+		break;
+	/* non pre-multiplied alpha */
+	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			return -EINVAL;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 				    struct drm_plane_state *plane_state)
 {
@@ -12003,7 +12077,9 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 			intel_crtc->atomic.update_sprite_watermarks |=
 				1 << i;
 		}
-
+		ret = intel_plane_state_check_blend(plane_state);
+		if (ret)
+			return ret;
 		break;
 	}
 	return 0;
@@ -14184,6 +14260,20 @@ void intel_create_rotation_property(struct drm_device *dev, struct intel_plane *
 				plane->base.state->rotation);
 }
 
+void intel_plane_add_blend_properties(struct intel_plane *plane)
+{
+	struct drm_device *dev = plane->base.dev;
+	struct drm_property *prop;
+
+	if (INTEL_INFO(dev)->gen < 9)
+		return;
+
+	prop = dev->mode_config.prop_blend_func;
+	if (prop)
+		drm_object_attach_property(&plane->base.base, prop,
+					   DRM_BLEND_FUNC(AUTO, AUTO));
+}
+
 static int
 intel_check_cursor_plane(struct drm_plane *plane,
 			 struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e27954d..f99e1d9 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -294,6 +294,11 @@ struct intel_plane_state {
 	 *     update_scaler_plane.
 	 */
 	int scaler_id;
+	/*
+	 * blending related hw states
+	 */
+	bool premultiplied_alpha;	/* is the fb pre-multiplied? */
+	bool drop_alpha;		/* drop the fb alpha channel */
 
 	struct drm_intel_sprite_colorkey ckey;
 
@@ -1167,6 +1172,7 @@ intel_rotation_90_or_270(unsigned int rotation)
 
 void intel_create_rotation_property(struct drm_device *dev,
 					struct intel_plane *plane);
+void intel_plane_add_blend_properties(struct intel_plane *plane);
 
 /* shared dpll functions */
 struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
@@ -1241,11 +1247,14 @@ void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file);
 int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
 int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
 
+u32 skl_plane_ctl_format(uint32_t pixel_format,
+				bool pre_multiplied,
+				bool drop_alpha);
+
 u32 intel_plane_obj_offset(struct intel_plane *intel_plane,
 			   struct drm_i915_gem_object *obj,
 			   unsigned int plane);
 
-u32 skl_plane_ctl_format(uint32_t pixel_format);
 u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
 u32 skl_plane_ctl_rotation(unsigned int rotation);
 
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 4d448b9..b7acfdf 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -211,6 +211,9 @@ skl_update_plane(struct drm_plane *drm_plane,
 		PLANE_CTL_PIPE_CSC_ENABLE;
 
 	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
+					plane_state->premultiplied_alpha,
+					plane_state->drop_alpha);
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 
 	rotation = plane_state->base.rotation;
@@ -1123,6 +1126,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
 	}
 
 	intel_create_rotation_property(dev, intel_plane);
+	intel_plane_add_blend_properties(intel_plane);
 
 	drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
 
-- 
1.9.1

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[PATCH 3/9] drm: Introduce DRM_MODE_COLOR()

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

In the hope of expressing colors in the KMS API in a consitant want,
let's introduce a ARGB 16161616 color and a few convinience macros
around it.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_sprite.c |  1 -
 include/uapi/drm/drm_mode.h         | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index b7acfdf..9538658 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -210,7 +210,6 @@ skl_update_plane(struct drm_plane *drm_plane,
 		PLANE_CTL_PIPE_GAMMA_ENABLE |
 		PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
 	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
 					plane_state->premultiplied_alpha,
 					plane_state->drop_alpha);
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 50adb46..12687bc 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -295,6 +295,40 @@ struct drm_mode_get_connector {
  */
 #define DRM_MODE_PROP_ATOMIC        0x80000000
 
+/* Color for the KMS API, ARGB (msb -> lsb) 16bits per component. */
+#define DRM_MODE_COLOR(a, r, b, g)	\
+	(((__u64)(a) << 48) | ((__u64)(r) << 32) | \
+	 ((__u64)(g) << 16) | (__u64)(b))
+
+/* Extract full precision, 8 bits, 10 bits and 12 bits components. */
+#define DRM_MODE_COLOR_ALPHA(color)	(((color) >> 48) & 0xffff)
+#define DRM_MODE_COLOR_RED(color)	(((color) >> 32) & 0xffff)
+#define DRM_MODE_COLOR_BLUE(color)	(((color) >> 16) & 0xffff)
+#define DRM_MODE_COLOR_GREEN(color)	((color) & 0xffff)
+#define DRM_MODE_COLOR_ALPHA_8(color)	(((color) >> (48 + 8)) & 0xff)
+#define DRM_MODE_COLOR_RED_8(color)	(((color) >> (32 + 8)) & 0xff)
+#define DRM_MODE_COLOR_BLUE_8(color)	(((color) >> (16 + 8)) & 0xff)
+#define DRM_MODE_COLOR_GREEN_8(color)	(((color) >>  8) & 0xff)
+#define DRM_MODE_COLOR_ALPHA_10(color)	(((color) >> (48 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_RED_10(color)	(((color) >> (32 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_BLUE_10(color)	(((color) >> (16 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_GREEN_10(color)	(((color) >>  6) & 0x3ff)
+#define DRM_MODE_COLOR_ALPHA_12(color)	(((color) >> (48 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_RED_12(color)	(((color) >> (32 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_BLUE_12(color)	(((color) >> (16 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_GREEN_12(color)	(((color) >>  4) & 0xfff)
+
+/* Handy macros to convert a DRM_MODE_COLOR() into common precisions */
+#define DRM_MODE_COLOR_TO_ARGB_8888(color)	 \
+	((DRM_MODE_COLOR_ALPHA_8(color) << 24) | \
+	 (DRM_MODE_COLOR_RED_8(color)   << 16) | \
+	 (DRM_MODE_COLOR_GREEN_8(color) << 8)  | \
+	 DRM_MODE_COLOR_BLUE_8(color))
+#define DRM_MODE_COLOR_TO_RGB_101010(color)	  \
+	 ((DRM_MODE_COLOR_RED_10(color)  << 20) | \
+	 (DRM_MODE_COLOR_GREEN_10(color) << 10) | \
+	 DRM_MODE_COLOR_BLUE_10(color))
+
 struct drm_mode_property_enum {
 	__u64 value;
 	char name[DRM_PROP_NAME_LEN];
-- 
1.9.1

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[PATCH 4/9] drm: Add an blend_color property

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

Add blend color property and update the
documentation for the same

V2: Add blend color support in get property.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 Documentation/DocBook/gpu.tmpl | 11 +++++++++--
 drivers/gpu/drm/drm_atomic.c   |  4 ++++
 drivers/gpu/drm/drm_crtc.c     |  5 +++++
 include/drm/drm_crtc.h         |  6 ++++++
 4 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
index 2017162..4ef3d7f 100644
--- a/Documentation/DocBook/gpu.tmpl
+++ b/Documentation/DocBook/gpu.tmpl
@@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Description/Restrictions</td>
 	</tr>
 	<tr>
-	<td rowspan="38" valign="top" >DRM</td>
+	<td rowspan="39" valign="top" >DRM</td>
 	<td valign="top" >Generic</td>
 	<td valign="top" >“rotation”</td>
 	<td valign="top" >BITMASK</td>
@@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that connector is attached to (atomic)</td>
 	</tr>
 	<tr>
-	<td rowspan="12" valign="top" >Plane</td>
+	<td rowspan="13" valign="top" >Plane</td>
 	<td valign="top" >“type”</td>
 	<td valign="top" >ENUM | IMMUTABLE</td>
 	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
@@ -1953,6 +1953,13 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Source and destination blending factors</td>
 	</tr>
 	<tr>
+	<td valign="top" >“blend_color”</td>
+	<td valign="top" >Color</td>
+	<td valign="top" >DRM_MODE_COLOR()</td>
+	<td valign="top" >Plane</td>
+	<td valign="top" >Blend constant color</td>
+	</tr>
+	<tr>
 	<td rowspan="2" valign="top" >DVI-I</td>
 	<td valign="top" >“subconnector”</td>
 	<td valign="top" >ENUM</td>
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 0c165c6..13b237c 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -642,6 +642,8 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
 			return -EINVAL;
 
 		state->blend_mode.func = val & GENMASK(31, 0);
+	} else if (property == config->prop_blend_color) {
+		state->blend_mode.color = val;
 	} else if (plane->funcs->atomic_set_property) {
 		return plane->funcs->atomic_set_property(plane, state,
 				property, val);
@@ -700,6 +702,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
 		*val = state->rotation;
 	} else if (property == config->prop_blend_func) {
 		*val = state->blend_mode.func;
+	} else if (property == config->prop_blend_color) {
+		*val = state->blend_mode.color;
 	} else if (plane->funcs->atomic_get_property) {
 		return plane->funcs->atomic_get_property(plane, state, property, val);
 	} else {
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index b8dde06..eb8dc2b 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1547,6 +1547,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.prop_blend_func = prop;
 
+	prop = drm_property_create_range(dev, 0, "blend_color", 0, U64_MAX);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.prop_blend_color = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 9cfe601..9c3563b 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -105,6 +105,10 @@ enum drm_blend_factor {
 	DRM_BLEND_FACTOR_ONE,
 	DRM_BLEND_FACTOR_SRC_ALPHA,
 	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
+	DRM_BLEND_FACTOR_CONSTANT_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
+	DRM_BLEND_FACTOR_CONSTANT_ALPHA_TIMES_SRC_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA,
 };
 
 #define DRM_BLEND_FUNC(src_factor, dst_factor)		\
@@ -113,6 +117,7 @@ enum drm_blend_factor {
 #define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
 
 struct drm_blend_mode {
+	uint64_t color;
 	uint64_t func;
 };
 
@@ -2119,6 +2124,7 @@ struct drm_mode_config {
 	struct drm_property *prop_active;
 	struct drm_property *prop_mode_id;
 	struct drm_property *prop_blend_func;
+	struct drm_property *prop_blend_color;
 
 	/* DVI-I properties */
 	struct drm_property *dvi_i_subconnector_property;
-- 
1.9.1

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[PATCH 5/9] drm/i915/skl: Add support for blending modes

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

This patch adds support for blending modes involving
color.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 28 ++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h     |  1 +
 drivers/gpu/drm/i915/intel_sprite.c  | 12 +++++++-----
 3 files changed, 36 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7e59a49..39e9db4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11901,6 +11901,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 
 	state->premultiplied_alpha = false;
 	state->drop_alpha = false;
+	state->use_plane_alpha = false;
 
 	switch (mode->func) {
 	/*
@@ -11929,6 +11930,27 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 		if (!has_per_pixel_blending)
 			return -EINVAL;
 		break;
+	/* plane alpha */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA, ONE_MINUS_CONSTANT_ALPHA):
+		if (has_per_pixel_blending)
+			state->drop_alpha = true;
+		state->use_plane_alpha = true;
+		break;
+	/* plane alpha, pre-multiplied fb */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA,
+			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			return -EINVAL;
+		state->premultiplied_alpha = true;
+		state->use_plane_alpha = true;
+		break;
+	/* plane alpha, non pre-multiplied fb */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA_TIMES_SRC_ALPHA,
+			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			return -EINVAL;
+		state->use_plane_alpha = true;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -14272,6 +14294,12 @@ void intel_plane_add_blend_properties(struct intel_plane *plane)
 	if (prop)
 		drm_object_attach_property(&plane->base.base, prop,
 					   DRM_BLEND_FUNC(AUTO, AUTO));
+
+	prop = dev->mode_config.prop_blend_color;
+	if (prop)
+		drm_object_attach_property(&plane->base.base, prop,
+					   DRM_MODE_COLOR(0xffff, 0xffff,
+							  0xffff, 0xffff));
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f99e1d9..8226c8e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -299,6 +299,7 @@ struct intel_plane_state {
 	 */
 	bool premultiplied_alpha;	/* is the fb pre-multiplied? */
 	bool drop_alpha;		/* drop the fb alpha channel */
+	bool use_plane_alpha;		/* use per-plane alpha */
 
 	struct drm_intel_sprite_colorkey ckey;
 
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 9538658..9175152 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -227,12 +227,14 @@ skl_update_plane(struct drm_plane *drm_plane,
 	crtc_w--;
 	crtc_h--;
 
-	if (key->flags) {
+	I915_WRITE(PLANE_KEYMAX(pipe, plane),
+		   (DRM_MODE_COLOR_ALPHA_8(plane_state->base.blend_mode.color)
+			<< 24) | (key->max_value & 0x00ffffff));
+	I915_WRITE(PLANE_KEYMSK(pipe, plane),
+		   (plane_state->use_plane_alpha << 31) |
+		   (key->channel_mask & GENMASK(0, 26)));
+	if (key->flags)
 		I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value);
-		I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value);
-		I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask);
-	}
-
 	if (key->flags & I915_SET_COLORKEY_DESTINATION)
 		plane_ctl |= PLANE_CTL_KEY_ENABLE_DESTINATION;
 	else if (key->flags & I915_SET_COLORKEY_SOURCE)
-- 
1.9.1

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[PATCH 6/9] drm/i915/skl: Drop alpha in non ARGB formats

[Vandita Kulkarni]

From: vandita kulkarni <vandita.kulkarni@intel.com>

This patch drops alpha by default if the selected
format is not ARG. This is to make sure that we drop alpha
on non-ARGB formats and not fail the ATOMIC IOCTL.

Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 39e9db4..5fb281b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11922,13 +11922,13 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 	/* pre-multiplied alpha */
 	case DRM_BLEND_FUNC(ONE, ONE_MINUS_SRC_ALPHA):
 		if (!has_per_pixel_blending)
-			return -EINVAL;
+			state->drop_alpha = true;
 		state->premultiplied_alpha = true;
 		break;
 	/* non pre-multiplied alpha */
 	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
 		if (!has_per_pixel_blending)
-			return -EINVAL;
+			state->drop_alpha = true;
 		break;
 	/* plane alpha */
 	case DRM_BLEND_FUNC(CONSTANT_ALPHA, ONE_MINUS_CONSTANT_ALPHA):
@@ -11940,7 +11940,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 	case DRM_BLEND_FUNC(CONSTANT_ALPHA,
 			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
 		if (!has_per_pixel_blending)
-			return -EINVAL;
+			state->drop_alpha = true;
 		state->premultiplied_alpha = true;
 		state->use_plane_alpha = true;
 		break;
@@ -11948,7 +11948,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 	case DRM_BLEND_FUNC(CONSTANT_ALPHA_TIMES_SRC_ALPHA,
 			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
 		if (!has_per_pixel_blending)
-			return -EINVAL;
+			state->drop_alpha = true;
 		state->use_plane_alpha = true;
 		break;
 	default:
-- 
1.9.1

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[PATCH 7/9] drm/i915: Support blend func on primary

[Vandita Kulkarni]

From: vandita kulkarni <vandita.kulkarni@intel.com>

Check blend state set by blend properties and
set alpha blending accordingly.

Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5fb281b..97b716f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3127,7 +3127,10 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 		    PLANE_CTL_PIPE_GAMMA_ENABLE |
 		    PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format, false, false);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
+					plane_state->premultiplied_alpha,
+					plane_state->drop_alpha);
+
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 	plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;
 	plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -12080,6 +12083,10 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 			intel_crtc->atomic.wait_vblank = true;
 
 		intel_crtc->atomic.update_fbc |= visible || mode_changed;
+
+		ret = intel_plane_state_check_blend(plane_state);
+		if (ret)
+			return ret;
 		break;
 	case DRM_PLANE_TYPE_CURSOR:
 		break;
@@ -14259,6 +14266,9 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
 	if (INTEL_INFO(dev)->gen >= 4)
 		intel_create_rotation_property(dev, primary);
 
+	if (INTEL_INFO(dev)->gen == 9)
+		intel_plane_add_blend_properties(primary);
+
 	drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);
 
 	return &primary->base;
-- 
1.9.1

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[PATCH 8/9] drm/i915/skl: Support blend color on primary

[Vandita Kulkarni]

From: vandita kulkarni <vandita.kulkarni@intel.com>

Set the global alpha value for primary plane in
the PLANE_KEYMAX register, to enable which set
plane alpha enable bit in the PLANE_KEYMSK
register. On bxt only 8 bit alpha will be
considered from the PLANE_KEYMAX register.

Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h      |  4 ++++
 drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0a98889..cc14f75 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5483,6 +5483,10 @@ enum skl_disp_power_wells {
 #define PLANE_KEYMAX(pipe, plane)	\
 	_MMIO_PLANE(plane, _PLANE_KEYMAX_1(pipe), _PLANE_KEYMAX_2(pipe))
 
+#define PLANE_KEYMAX_ALPHA_MASK			0x00ffffff
+#define PLANE_KEY_MASK_ALPHA_EN			31
+#define PLANE_KEY_MAX_ALPHA_SHIFT		24
+
 #define _PLANE_BUF_CFG_1_B			0x7127c
 #define _PLANE_BUF_CFG_2_B			0x7137c
 #define _PLANE_BUF_CFG_1(pipe)	\
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a2cc63e..61d8562 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3107,6 +3107,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
 	struct drm_framebuffer *fb = plane_state->base.fb;
 	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+	const struct drm_intel_sprite_colorkey *key =
+		&to_intel_plane_state(plane->state)->ckey;
 	int pipe = intel_crtc->pipe;
 	u32 plane_ctl, stride_div, stride;
 	u32 tile_height, plane_offset, plane_size;
@@ -3141,6 +3143,15 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 
 	WARN_ON(drm_rect_width(&plane_state->src) == 0);
 
+	I915_WRITE(PLANE_KEYMAX(pipe, 0), (DRM_MODE_COLOR_ALPHA_8
+			(plane_state->base.blend_mode.color)
+				<< PLANE_KEY_MAX_ALPHA_SHIFT) |
+			(key->max_value & PLANE_KEYMAX_ALPHA_MASK));
+	I915_WRITE(PLANE_KEYMSK(pipe, 0),
+			(plane_state->use_plane_alpha
+				<< PLANE_KEY_MASK_ALPHA_EN) |
+			(key->channel_mask & GENMASK(0, 26)));
+
 	if (intel_rotation_90_or_270(rotation)) {
 		/* stride = Surface height in tiles */
 		tile_height = intel_tile_height(dev, fb->pixel_format,
-- 
1.9.1

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[PATCH 9/9] drm/i915/skl: Separate out disable plane alpha

[Vandita Kulkarni]

From: vandita kulkarni <vandita.kulkarni@intel.com>

Separate out plane alpha disable functionality from per pixel
drop_alpha blend function and add another blend function case for
disabling plane alpha. Fix the state info ,so that premultiplied
alpha doesn't always become false when drop plane alpha is set.

Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 61d8562..42d5c6e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11913,9 +11913,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 				fb->pixel_format == DRM_FORMAT_ARGB8888 ||
 				fb->pixel_format == DRM_FORMAT_BGRA8888;
 
-	state->premultiplied_alpha = false;
 	state->drop_alpha = false;
-	state->use_plane_alpha = false;
 
 	switch (mode->func) {
 	/*
@@ -11927,28 +11925,34 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 	case DRM_BLEND_FUNC(AUTO, AUTO):
 		if (has_per_pixel_blending)
 			state->premultiplied_alpha = true;
+		state->use_plane_alpha = false;
 		break;
 	/* fbs without an alpha channel, or dropping the alpha channel */
 	case DRM_BLEND_FUNC(ONE, ZERO):
 		if (has_per_pixel_blending)
 			state->drop_alpha = true;
+		state->premultiplied_alpha = false;
 		break;
 	/* pre-multiplied alpha */
 	case DRM_BLEND_FUNC(ONE, ONE_MINUS_SRC_ALPHA):
 		if (!has_per_pixel_blending)
 			state->drop_alpha = true;
 		state->premultiplied_alpha = true;
+		state->use_plane_alpha = false;
 		break;
 	/* non pre-multiplied alpha */
 	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
 		if (!has_per_pixel_blending)
 			state->drop_alpha = true;
+		state->use_plane_alpha = false;
+		state->premultiplied_alpha = false;
 		break;
 	/* plane alpha */
 	case DRM_BLEND_FUNC(CONSTANT_ALPHA, ONE_MINUS_CONSTANT_ALPHA):
 		if (has_per_pixel_blending)
 			state->drop_alpha = true;
 		state->use_plane_alpha = true;
+		state->premultiplied_alpha = false;
 		break;
 	/* plane alpha, pre-multiplied fb */
 	case DRM_BLEND_FUNC(CONSTANT_ALPHA,
@@ -11964,6 +11968,11 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 		if (!has_per_pixel_blending)
 			state->drop_alpha = true;
 		state->use_plane_alpha = true;
+		state->premultiplied_alpha = false;
+		break;
+	/* drop plane alpha */
+	case DRM_BLEND_FUNC(ZERO, ONE):
+		state->use_plane_alpha = false;
 		break;
 	default:
 		return -EINVAL;
-- 
1.9.1

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Re: [PATCH 1/9] drm: Introduce the blend-func property

[Matt Roper]

On Mon, Jan 18, 2016 at 08:45:35PM +0530, Vandita Kulkarni wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> We'd like to be able to program the blending modes of display planes.
> Ville suggested to use something similar to the GL blend states, which
> does seem like a good idea.
> 
> For now, we only consider blend factors, but room is left for
> extensions: blend equation, separate rgb/alpha blend factors, blend
> color.
> 
> V2: Added the belnd func property support in get property.
> 
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>

You'll want a Cc: dri-devel here as well for stuff like this that
touches the DRM core.

> ---
>  Documentation/DocBook/gpu.tmpl | 11 +++++++++--
>  drivers/gpu/drm/drm_atomic.c   | 14 ++++++++++++++
>  drivers/gpu/drm/drm_crtc.c     |  5 +++++
>  include/drm/drm_crtc.h         | 20 ++++++++++++++++++++
>  4 files changed, 48 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
> index 351e801..2017162 100644
> --- a/Documentation/DocBook/gpu.tmpl
> +++ b/Documentation/DocBook/gpu.tmpl
> @@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >Description/Restrictions</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="37" valign="top" >DRM</td>
> +	<td rowspan="38" valign="top" >DRM</td>
>  	<td valign="top" >Generic</td>
>  	<td valign="top" >“rotation”</td>
>  	<td valign="top" >BITMASK</td>
> @@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that connector is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="11" valign="top" >Plane</td>
> +	<td rowspan="12" valign="top" >Plane</td>
>  	<td valign="top" >“type”</td>
>  	<td valign="top" >ENUM | IMMUTABLE</td>
>  	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
> @@ -1946,6 +1946,13 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that plane is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> +	<td valign="top" >“blend_func”</td>
> +	<td valign="top" >None</td>
> +	<td valign="top" >DRM_BLEND_FUNC()</td>

Shouldn't these two be type 'range' with values 0x0-0xFFFFFFFF?  Your
description field below would then explain the actual meaning of the
high/low 16-bits.

> +	<td valign="top" >Plane</td>
> +	<td valign="top" >Source and destination blending factors</td>

I feel like a bit more detailed description here would be worthwhile.

Actually, given that we're presumably only using this via atomic, it
doesn't seem unreasonable to me to split this into two separate enum
properties.  That would be a little bit more self-explanatory and the
atomic check code could still ensure that we don't wind up with invalid
combinations of src/dest factors.  Plus it will make it a little easier
for us to add additional blending factors in the future.

> +	</tr>
> +	<tr>
>  	<td rowspan="2" valign="top" >DVI-I</td>
>  	<td valign="top" >“subconnector”</td>
>  	<td valign="top" >ENUM</td>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 3f74193..0c165c6 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -630,6 +630,18 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
>  		state->src_h = val;
>  	} else if (property == config->rotation_property) {
>  		state->rotation = val;
> +	} else if (property == config->prop_blend_func) {
> +		enum drm_blend_factor src_factor, dst_factor;
> +
> +		src_factor = DRM_BLEND_FUNC_SRC_FACTOR(val);
> +		dst_factor = DRM_BLEND_FUNC_DST_FACTOR(val);
> +
> +		if (src_factor != dst_factor &&
> +		    (src_factor == DRM_BLEND_FACTOR_AUTO ||
> +		     dst_factor == DRM_BLEND_FACTOR_AUTO))
> +			return -EINVAL;

Might be better to defer this until the atomic check phase since that's
where we do most of our other tests and where we expect to get failures.
This function is more about shoving values into state objects (and other
tasks like refcounting where necessary) without doing anything else.

> +
> +		state->blend_mode.func = val & GENMASK(31, 0);

This check should also move to the atomic check phase, but raise a
failure if we have any unwanted bits.  If we let userspace be sloppy
right now and put garbage there, then we can't really give those bits
new meaning in the future without breaking existing userspace.


>  	} else if (plane->funcs->atomic_set_property) {
>  		return plane->funcs->atomic_set_property(plane, state,
>  				property, val);
> @@ -686,6 +698,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
>  		*val = state->src_h;
>  	} else if (property == config->rotation_property) {
>  		*val = state->rotation;
> +	} else if (property == config->prop_blend_func) {
> +		*val = state->blend_mode.func;
>  	} else if (plane->funcs->atomic_get_property) {
>  		return plane->funcs->atomic_get_property(plane, state, property, val);
>  	} else {
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index 62fa95f..b8dde06 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1542,6 +1542,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
>  		return -ENOMEM;
>  	dev->mode_config.prop_mode_id = prop;
>  
> +	prop = drm_property_create_range(dev, 0, "blend_func", 0, U32_MAX);

I'd add the DRM_MODE_PROP_ATOMIC flag to this.  I think we have a
direction that all new functionality only be exposed via the atomic
interfaces.


Matt

> +	if (!prop)
> +		return -ENOMEM;
> +	dev->mode_config.prop_blend_func = prop;
> +
>  	return 0;
>  }
>  
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index c65a212..9cfe601 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -99,6 +99,23 @@ static inline uint64_t I642U64(int64_t val)
>  #define DRM_REFLECT_X	4
>  #define DRM_REFLECT_Y	5
>  
> +enum drm_blend_factor {
> +	DRM_BLEND_FACTOR_AUTO,
> +	DRM_BLEND_FACTOR_ZERO,
> +	DRM_BLEND_FACTOR_ONE,
> +	DRM_BLEND_FACTOR_SRC_ALPHA,
> +	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
> +};
> +
> +#define DRM_BLEND_FUNC(src_factor, dst_factor)		\
> +	(DRM_BLEND_FACTOR_##src_factor << 16 | DRM_BLEND_FACTOR_##dst_factor)
> +#define DRM_BLEND_FUNC_SRC_FACTOR(val)	(((val) >> 16) & 0xffff)
> +#define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
> +
> +struct drm_blend_mode {
> +	uint64_t func;
> +};
> +
>  enum drm_connector_force {
>  	DRM_FORCE_UNSPECIFIED,
>  	DRM_FORCE_OFF,
> @@ -1267,6 +1284,8 @@ struct drm_plane_state {
>  	/* Plane rotation */
>  	unsigned int rotation;
>  
> +	struct drm_blend_mode blend_mode;
> +
>  	struct drm_atomic_state *state;
>  };
>  
> @@ -2099,6 +2118,7 @@ struct drm_mode_config {
>  	struct drm_property *prop_crtc_id;
>  	struct drm_property *prop_active;
>  	struct drm_property *prop_mode_id;
> +	struct drm_property *prop_blend_func;
>  
>  	/* DVI-I properties */
>  	struct drm_property *dvi_i_subconnector_property;
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 2/9] drm/i915/skl: Add blend_func to SKL/BXT sprite planes

[Matt Roper]

On Mon, Jan 18, 2016 at 08:45:36PM +0530, Vandita Kulkarni wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> This patch adds the blend functions, and as per the
> blend function, updates the plane control register values
> 
> V2: Add blend support for all RGB8888 formats
> Fix the reg writes on plane_ctl_alpha bits.
> 
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 106 ++++++++++++++++++++++++++++++++---
>  drivers/gpu/drm/i915/intel_drv.h     |  11 +++-
>  drivers/gpu/drm/i915/intel_sprite.c  |   4 ++
>  3 files changed, 112 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 07ca19b..7e59a49 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3003,8 +3003,22 @@ static void skl_detach_scalers(struct intel_crtc *intel_crtc)
>  	}
>  }
>  
> -u32 skl_plane_ctl_format(uint32_t pixel_format)
> -{
> +u32 skl_plane_ctl_format(uint32_t pixel_format,
> +			 bool pre_multiplied,
> +			 bool drop_alpha)
> +{
> +	u32 plane_ctl_alpha = 0;
> +
> +	if (pixel_format == DRM_FORMAT_ABGR8888 ||
> +	    pixel_format == DRM_FORMAT_ARGB8888) {

I found this function somewhat non-intuitive since I figured the
combination of pixel format + alpha would already have been analyzed
in intel_plane_state_check_blend().  Maybe it would be simpler to just
have this function take a {disable,sw,hw} enum and have the check
function pick that enum instead of setting two flags that need further
disposition based on pixel format?

Not a huge deal, either way; I just think it's nicer to keep the
low-level bit-setting functions as simple as possible.


> +		if (drop_alpha)
> +			plane_ctl_alpha = PLANE_CTL_ALPHA_DISABLE;
> +		else if (pre_multiplied)
> +			plane_ctl_alpha = PLANE_CTL_ALPHA_SW_PREMULTIPLY;
> +		else
> +			plane_ctl_alpha = PLANE_CTL_ALPHA_HW_PREMULTIPLY;
> +	}
> +
>  	switch (pixel_format) {
>  	case DRM_FORMAT_C8:
>  		return PLANE_CTL_FORMAT_INDEXED;
> @@ -3020,11 +3034,11 @@ u32 skl_plane_ctl_format(uint32_t pixel_format)
>  	 * DRM_FORMAT) for user-space to configure that.
>  	 */
>  	case DRM_FORMAT_ABGR8888:
> -		return PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX |
> -			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
> +		return ((PLANE_CTL_FORMAT_XRGB_8888 | (PLANE_CTL_ORDER_RGBX
> +				& (~PLANE_CTL_ALPHA_MASK))) | plane_ctl_alpha);

Why do you need the "& ~PLANE_CTL_ALPHA_MASK" part here?
plane_ctl_alpha starts as 0 (all bits off) and none of the other things
your OR'ing in here (except plane_ctl_alpha) touch these bits.

Maybe this is a holdover from when our driver did RMW updates of
registers?


>  	case DRM_FORMAT_ARGB8888:
> -		return PLANE_CTL_FORMAT_XRGB_8888 |
> -			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
> +		return ((PLANE_CTL_FORMAT_XRGB_8888 & ~PLANE_CTL_ALPHA_MASK)
> +						| plane_ctl_alpha);

Ditto

>  	case DRM_FORMAT_XRGB2101010:
>  		return PLANE_CTL_FORMAT_XRGB_2101010;
>  	case DRM_FORMAT_XBGR2101010:
> @@ -3113,7 +3127,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
>  		    PLANE_CTL_PIPE_GAMMA_ENABLE |
>  		    PLANE_CTL_PIPE_CSC_ENABLE;
>  
> -	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
> +	plane_ctl |= skl_plane_ctl_format(fb->pixel_format, false, false);

Should these always be false?  We can set a crtc background (canvas)
color that would be visible with blending of the bottom-most plane.  The
canvas color property isn't upstream yet, but I did have some patches on
the mailing list to add it a while back.

>  	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
>  	plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;
>  	plane_ctl |= skl_plane_ctl_rotation(rotation);
> @@ -11862,6 +11876,66 @@ static bool needs_scaling(struct intel_plane_state *state)
>  	return (src_w != dst_w || src_h != dst_h);
>  }
>  
> +static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
> +{
> +	struct drm_device *dev = plane_state->state->dev;
> +	struct intel_plane_state *state = to_intel_plane_state(plane_state);
> +	const struct drm_framebuffer *fb = plane_state->fb;
> +	const struct drm_blend_mode *mode = &state->base.blend_mode;
> +	bool has_per_pixel_blending;
> +
> +	/*
> +	 * We don't install the properties pre-SKL, so this is SKL+ specific
> +	 * code for now.
> +	 */
> +	if (INTEL_INFO(dev)->gen < 9)
> +		return 0;

This should be impossible to hit; maybe change to WARN_ON() to make
that invariant clear?

> +
> +	if (!fb)
> +		return 0;
> +
> +	has_per_pixel_blending = fb->pixel_format == DRM_FORMAT_ABGR8888 ||
> +				fb->pixel_format == DRM_FORMAT_RGBA8888 ||
> +				fb->pixel_format == DRM_FORMAT_ARGB8888 ||
> +				fb->pixel_format == DRM_FORMAT_BGRA8888;
> +
> +	state->premultiplied_alpha = false;
> +	state->drop_alpha = false;
> +
> +	switch (mode->func) {
> +	/*
> +	 * The 'AUTO' behaviour is the default and keeps compatibility with
> +	 * kernels before the introduction of the blend_func property:
> +	 *   - pre-multiplied alpha if the fb has an alpha channel
> +	 *   - usual DRM_BLEND_FUNC(ONE, ZERO) otherwise
> +	 */
> +	case DRM_BLEND_FUNC(AUTO, AUTO):
> +		if (has_per_pixel_blending)
> +			state->premultiplied_alpha = true;
> +		break;
> +	/* fbs without an alpha channel, or dropping the alpha channel */
> +	case DRM_BLEND_FUNC(ONE, ZERO):
> +		if (has_per_pixel_blending)
> +			state->drop_alpha = true;
> +		break;
> +	/* pre-multiplied alpha */
> +	case DRM_BLEND_FUNC(ONE, ONE_MINUS_SRC_ALPHA):
> +		if (!has_per_pixel_blending)
> +			return -EINVAL;
> +		state->premultiplied_alpha = true;
> +		break;
> +	/* non pre-multiplied alpha */
> +	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
> +		if (!has_per_pixel_blending)
> +			return -EINVAL;
> +		break;
> +	default:
> +		return -EINVAL;
> +	}
> +

It would be good to add a DRM_DEBUG_KMS() to each of the error
conditions to help developers understand why they failed.  Just having
an atomic transaction fail with no indication why can be frustrating
(especially when that transaction set lots of different properties).


Matt

> +	return 0;
> +}
> +
>  int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
>  				    struct drm_plane_state *plane_state)
>  {
> @@ -12003,7 +12077,9 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
>  			intel_crtc->atomic.update_sprite_watermarks |=
>  				1 << i;
>  		}
> -
> +		ret = intel_plane_state_check_blend(plane_state);
> +		if (ret)
> +			return ret;
>  		break;
>  	}
>  	return 0;
> @@ -14184,6 +14260,20 @@ void intel_create_rotation_property(struct drm_device *dev, struct intel_plane *
>  				plane->base.state->rotation);
>  }
>  
> +void intel_plane_add_blend_properties(struct intel_plane *plane)
> +{
> +	struct drm_device *dev = plane->base.dev;
> +	struct drm_property *prop;
> +
> +	if (INTEL_INFO(dev)->gen < 9)
> +		return;
> +
> +	prop = dev->mode_config.prop_blend_func;
> +	if (prop)
> +		drm_object_attach_property(&plane->base.base, prop,
> +					   DRM_BLEND_FUNC(AUTO, AUTO));
> +}
> +
>  static int
>  intel_check_cursor_plane(struct drm_plane *plane,
>  			 struct intel_crtc_state *crtc_state,
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index e27954d..f99e1d9 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -294,6 +294,11 @@ struct intel_plane_state {
>  	 *     update_scaler_plane.
>  	 */
>  	int scaler_id;
> +	/*
> +	 * blending related hw states
> +	 */
> +	bool premultiplied_alpha;	/* is the fb pre-multiplied? */
> +	bool drop_alpha;		/* drop the fb alpha channel */
>  
>  	struct drm_intel_sprite_colorkey ckey;
>  
> @@ -1167,6 +1172,7 @@ intel_rotation_90_or_270(unsigned int rotation)
>  
>  void intel_create_rotation_property(struct drm_device *dev,
>  					struct intel_plane *plane);
> +void intel_plane_add_blend_properties(struct intel_plane *plane);
>  
>  /* shared dpll functions */
>  struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
> @@ -1241,11 +1247,14 @@ void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file);
>  int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
>  int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
>  
> +u32 skl_plane_ctl_format(uint32_t pixel_format,
> +				bool pre_multiplied,
> +				bool drop_alpha);
> +
>  u32 intel_plane_obj_offset(struct intel_plane *intel_plane,
>  			   struct drm_i915_gem_object *obj,
>  			   unsigned int plane);
>  
> -u32 skl_plane_ctl_format(uint32_t pixel_format);
>  u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
>  u32 skl_plane_ctl_rotation(unsigned int rotation);
>  
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 4d448b9..b7acfdf 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -211,6 +211,9 @@ skl_update_plane(struct drm_plane *drm_plane,
>  		PLANE_CTL_PIPE_CSC_ENABLE;
>  
>  	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
> +	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
> +					plane_state->premultiplied_alpha,
> +					plane_state->drop_alpha);
>  	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
>  
>  	rotation = plane_state->base.rotation;
> @@ -1123,6 +1126,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
>  	}
>  
>  	intel_create_rotation_property(dev, intel_plane);
> +	intel_plane_add_blend_properties(intel_plane);
>  
>  	drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
>  
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 3/9] drm: Introduce DRM_MODE_COLOR()

[Matt Roper]

On Mon, Jan 18, 2016 at 08:45:37PM +0530, Vandita Kulkarni wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> In the hope of expressing colors in the KMS API in a consitant want,
> let's introduce a ARGB 16161616 color and a few convinience macros
> around it.
> 
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

This is somewhat similar to some of the background color prep work I did
here:

        http://patchwork.freedesktop.org/patch/62679/

I purposely wrapped the value into a struct to prevent drivers from
trying to do their own bitwise operations on color values without using
the provided helpers (which could easily lead to bugs if they mistakenly
forget that the color values aren't in their preferred format already).

Since you're going on to make properties that take values in this
format, the drm_property_create_rgba() and such that I have in that
patch (and the corresponding libdrm helpers that are also on the mailing
list) might be useful here as well.


Matt

> ---
>  drivers/gpu/drm/i915/intel_sprite.c |  1 -
>  include/uapi/drm/drm_mode.h         | 34 ++++++++++++++++++++++++++++++++++
>  2 files changed, 34 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index b7acfdf..9538658 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -210,7 +210,6 @@ skl_update_plane(struct drm_plane *drm_plane,
>  		PLANE_CTL_PIPE_GAMMA_ENABLE |
>  		PLANE_CTL_PIPE_CSC_ENABLE;
>  
> -	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
>  	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
>  					plane_state->premultiplied_alpha,
>  					plane_state->drop_alpha);

This hunk should be squashed into the previous patch.


> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 50adb46..12687bc 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -295,6 +295,40 @@ struct drm_mode_get_connector {
>   */
>  #define DRM_MODE_PROP_ATOMIC        0x80000000
>  
> +/* Color for the KMS API, ARGB (msb -> lsb) 16bits per component. */
> +#define DRM_MODE_COLOR(a, r, b, g)	\
> +	(((__u64)(a) << 48) | ((__u64)(r) << 32) | \
> +	 ((__u64)(g) << 16) | (__u64)(b))
> +
> +/* Extract full precision, 8 bits, 10 bits and 12 bits components. */
> +#define DRM_MODE_COLOR_ALPHA(color)	(((color) >> 48) & 0xffff)
> +#define DRM_MODE_COLOR_RED(color)	(((color) >> 32) & 0xffff)
> +#define DRM_MODE_COLOR_BLUE(color)	(((color) >> 16) & 0xffff)
> +#define DRM_MODE_COLOR_GREEN(color)	((color) & 0xffff)
> +#define DRM_MODE_COLOR_ALPHA_8(color)	(((color) >> (48 + 8)) & 0xff)
> +#define DRM_MODE_COLOR_RED_8(color)	(((color) >> (32 + 8)) & 0xff)
> +#define DRM_MODE_COLOR_BLUE_8(color)	(((color) >> (16 + 8)) & 0xff)
> +#define DRM_MODE_COLOR_GREEN_8(color)	(((color) >>  8) & 0xff)
> +#define DRM_MODE_COLOR_ALPHA_10(color)	(((color) >> (48 + 6)) & 0x3ff)
> +#define DRM_MODE_COLOR_RED_10(color)	(((color) >> (32 + 6)) & 0x3ff)
> +#define DRM_MODE_COLOR_BLUE_10(color)	(((color) >> (16 + 6)) & 0x3ff)
> +#define DRM_MODE_COLOR_GREEN_10(color)	(((color) >>  6) & 0x3ff)
> +#define DRM_MODE_COLOR_ALPHA_12(color)	(((color) >> (48 + 4)) & 0xfff)
> +#define DRM_MODE_COLOR_RED_12(color)	(((color) >> (32 + 4)) & 0xfff)
> +#define DRM_MODE_COLOR_BLUE_12(color)	(((color) >> (16 + 4)) & 0xfff)
> +#define DRM_MODE_COLOR_GREEN_12(color)	(((color) >>  4) & 0xfff)
> +
> +/* Handy macros to convert a DRM_MODE_COLOR() into common precisions */
> +#define DRM_MODE_COLOR_TO_ARGB_8888(color)	 \
> +	((DRM_MODE_COLOR_ALPHA_8(color) << 24) | \
> +	 (DRM_MODE_COLOR_RED_8(color)   << 16) | \
> +	 (DRM_MODE_COLOR_GREEN_8(color) << 8)  | \
> +	 DRM_MODE_COLOR_BLUE_8(color))
> +#define DRM_MODE_COLOR_TO_RGB_101010(color)	  \
> +	 ((DRM_MODE_COLOR_RED_10(color)  << 20) | \
> +	 (DRM_MODE_COLOR_GREEN_10(color) << 10) | \
> +	 DRM_MODE_COLOR_BLUE_10(color))
> +
>  struct drm_mode_property_enum {
>  	__u64 value;
>  	char name[DRM_PROP_NAME_LEN];
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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Re: [PATCH 4/9] drm: Add an blend_color property

[Matt Roper]

On Mon, Jan 18, 2016 at 08:45:38PM +0530, Vandita Kulkarni wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> Add blend color property and update the
> documentation for the same
> 
> V2: Add blend color support in get property.

It would be good to describe in a bit more detail what "blend color"
means.  It's unclear whether you're referring to per-pixel color keying,
global plane alpha, etc.

> 
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
> ---
>  Documentation/DocBook/gpu.tmpl | 11 +++++++++--
>  drivers/gpu/drm/drm_atomic.c   |  4 ++++
>  drivers/gpu/drm/drm_crtc.c     |  5 +++++
>  include/drm/drm_crtc.h         |  6 ++++++
>  4 files changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
> index 2017162..4ef3d7f 100644
> --- a/Documentation/DocBook/gpu.tmpl
> +++ b/Documentation/DocBook/gpu.tmpl
> @@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >Description/Restrictions</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="38" valign="top" >DRM</td>
> +	<td rowspan="39" valign="top" >DRM</td>
>  	<td valign="top" >Generic</td>
>  	<td valign="top" >“rotation”</td>
>  	<td valign="top" >BITMASK</td>
> @@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that connector is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="12" valign="top" >Plane</td>
> +	<td rowspan="13" valign="top" >Plane</td>
>  	<td valign="top" >“type”</td>
>  	<td valign="top" >ENUM | IMMUTABLE</td>
>  	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
> @@ -1953,6 +1953,13 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >Source and destination blending factors</td>
>  	</tr>
>  	<tr>
> +	<td valign="top" >“blend_color”</td>
> +	<td valign="top" >Color</td>
> +	<td valign="top" >DRM_MODE_COLOR()</td>

As noted on an earlier patch, these two fields are supposed to be the
property type (which is a range property in your patch today) and the
possible values (which are 0-U64_MAX).


Matt

> +	<td valign="top" >Plane</td>
> +	<td valign="top" >Blend constant color</td>
> +	</tr>
> +	<tr>
>  	<td rowspan="2" valign="top" >DVI-I</td>
>  	<td valign="top" >“subconnector”</td>
>  	<td valign="top" >ENUM</td>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 0c165c6..13b237c 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -642,6 +642,8 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
>  			return -EINVAL;
>  
>  		state->blend_mode.func = val & GENMASK(31, 0);
> +	} else if (property == config->prop_blend_color) {
> +		state->blend_mode.color = val;
>  	} else if (plane->funcs->atomic_set_property) {
>  		return plane->funcs->atomic_set_property(plane, state,
>  				property, val);
> @@ -700,6 +702,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
>  		*val = state->rotation;
>  	} else if (property == config->prop_blend_func) {
>  		*val = state->blend_mode.func;
> +	} else if (property == config->prop_blend_color) {
> +		*val = state->blend_mode.color;
>  	} else if (plane->funcs->atomic_get_property) {
>  		return plane->funcs->atomic_get_property(plane, state, property, val);
>  	} else {
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index b8dde06..eb8dc2b 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1547,6 +1547,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
>  		return -ENOMEM;
>  	dev->mode_config.prop_blend_func = prop;
>  
> +	prop = drm_property_create_range(dev, 0, "blend_color", 0, U64_MAX);
> +	if (!prop)
> +		return -ENOMEM;
> +	dev->mode_config.prop_blend_color = prop;
> +
>  	return 0;
>  }
>  
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 9cfe601..9c3563b 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -105,6 +105,10 @@ enum drm_blend_factor {
>  	DRM_BLEND_FACTOR_ONE,
>  	DRM_BLEND_FACTOR_SRC_ALPHA,
>  	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
> +	DRM_BLEND_FACTOR_CONSTANT_ALPHA,
> +	DRM_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
> +	DRM_BLEND_FACTOR_CONSTANT_ALPHA_TIMES_SRC_ALPHA,
> +	DRM_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA,
>  };
>  
>  #define DRM_BLEND_FUNC(src_factor, dst_factor)		\
> @@ -113,6 +117,7 @@ enum drm_blend_factor {
>  #define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
>  
>  struct drm_blend_mode {
> +	uint64_t color;
>  	uint64_t func;
>  };
>  
> @@ -2119,6 +2124,7 @@ struct drm_mode_config {
>  	struct drm_property *prop_active;
>  	struct drm_property *prop_mode_id;
>  	struct drm_property *prop_blend_func;
> +	struct drm_property *prop_blend_color;
>  
>  	/* DVI-I properties */
>  	struct drm_property *dvi_i_subconnector_property;
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
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Re: [PATCH 5/9] drm/i915/skl: Add support for blending modes

[Matt Roper]

On Mon, Jan 18, 2016 at 08:45:39PM +0530, Vandita Kulkarni wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> This patch adds support for blending modes involving
> color.
> 
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 28 ++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_drv.h     |  1 +
>  drivers/gpu/drm/i915/intel_sprite.c  | 12 +++++++-----
>  3 files changed, 36 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7e59a49..39e9db4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11901,6 +11901,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
>  
>  	state->premultiplied_alpha = false;
>  	state->drop_alpha = false;
> +	state->use_plane_alpha = false;
>  
>  	switch (mode->func) {
>  	/*
> @@ -11929,6 +11930,27 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
>  		if (!has_per_pixel_blending)
>  			return -EINVAL;
>  		break;
> +	/* plane alpha */
> +	case DRM_BLEND_FUNC(CONSTANT_ALPHA, ONE_MINUS_CONSTANT_ALPHA):
> +		if (has_per_pixel_blending)
> +			state->drop_alpha = true;
> +		state->use_plane_alpha = true;
> +		break;
> +	/* plane alpha, pre-multiplied fb */
> +	case DRM_BLEND_FUNC(CONSTANT_ALPHA,
> +			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
> +		if (!has_per_pixel_blending)
> +			return -EINVAL;
> +		state->premultiplied_alpha = true;
> +		state->use_plane_alpha = true;
> +		break;
> +	/* plane alpha, non pre-multiplied fb */
> +	case DRM_BLEND_FUNC(CONSTANT_ALPHA_TIMES_SRC_ALPHA,
> +			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
> +		if (!has_per_pixel_blending)
> +			return -EINVAL;
> +		state->use_plane_alpha = true;
> +		break;
>  	default:
>  		return -EINVAL;
>  	}
> @@ -14272,6 +14294,12 @@ void intel_plane_add_blend_properties(struct intel_plane *plane)
>  	if (prop)
>  		drm_object_attach_property(&plane->base.base, prop,
>  					   DRM_BLEND_FUNC(AUTO, AUTO));
> +
> +	prop = dev->mode_config.prop_blend_color;
> +	if (prop)
> +		drm_object_attach_property(&plane->base.base, prop,
> +					   DRM_MODE_COLOR(0xffff, 0xffff,
> +							  0xffff, 0xffff));
>  }
>  
>  static int
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index f99e1d9..8226c8e 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -299,6 +299,7 @@ struct intel_plane_state {
>  	 */
>  	bool premultiplied_alpha;	/* is the fb pre-multiplied? */
>  	bool drop_alpha;		/* drop the fb alpha channel */
> +	bool use_plane_alpha;		/* use per-plane alpha */
>  
>  	struct drm_intel_sprite_colorkey ckey;
>  
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 9538658..9175152 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -227,12 +227,14 @@ skl_update_plane(struct drm_plane *drm_plane,
>  	crtc_w--;
>  	crtc_h--;
>  
> -	if (key->flags) {
> +	I915_WRITE(PLANE_KEYMAX(pipe, plane),
> +		   (DRM_MODE_COLOR_ALPHA_8(plane_state->base.blend_mode.color)
> +			<< 24) | (key->max_value & 0x00ffffff));
> +	I915_WRITE(PLANE_KEYMSK(pipe, plane),
> +		   (plane_state->use_plane_alpha << 31) |
> +		   (key->channel_mask & GENMASK(0, 26)));

I'm having trouble reconciling the bspec description of these two
registers.  The bspec says that PLANE_KEYMAX is only used for YUV
framebuffers and that the register is unused with RGB buffers.  However
the description of PLANE_KEYMSK's bit 31 says it uses the top byte of
PLANE_KEYMAX as the constant alpha value (which seems to apply to all
buffer formats).

Is this a bug (or poor wording) in the bspec or am I completely
misinterpreting?  Assuming the hardware works the way your code is
written here, it seems like the bspec description of PLANE_KEYMAX should
actually say that bits 0-23 are exclusive to YUV buffers but that 24-31
are usable on any buffer format?

> +	if (key->flags)
>  		I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value);

Does it matter that we're writing possible garbage bits from
key->max_value and key->channel_mask unconditionally now?  Previously
they were guarded by key->flags.


Matt

> -		I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value);
> -		I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask);
> -	}
> -
>  	if (key->flags & I915_SET_COLORKEY_DESTINATION)
>  		plane_ctl |= PLANE_CTL_KEY_ENABLE_DESTINATION;
>  	else if (key->flags & I915_SET_COLORKEY_SOURCE)
> -- 
> 1.9.1
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
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Re: [PATCH 0/9] Support blending modes of display planes

[Matt Roper]

On Mon, Jan 18, 2016 at 08:45:34PM +0530, Vandita Kulkarni wrote:
> From: vandita kulkarni <vandita.kulkarni@intel.com>
> 
> The below patches support plane and pixel blending
> by adding two properties blend_func and blend_color.
> As per Damien's initial patches, this design based on 
> OpenGL's blend equations is suggested by Ville.
> All the below patches are tested on BXT android platform.
> 
> The initial kernel patches from damien can be found at
> https://github.com/dlespiau/linux/commits/20150708-alpha-blending
> Damien Lespiau (5):
>   drm: Introduce the blend-func property
>   drm/i915/skl: Add blend_func to SKL/BXT sprite planes
>   drm: Introduce DRM_MODE_COLOR()
>   drm: Add an blend_color property
>   drm/i915/skl: Add support for blending modes
> 
> vandita kulkarni (4):
>   drm/i915/skl: Drop alpha in non ARGB formats
>   drm/i915: Support blend func on primary
>   drm/i915/skl: Support blend color on primary
>   drm/i915/skl: Separate out disable plane alpha

This series looks pretty good; I've given some feedback on a few of the
patches, but it's all pretty minor.  And some of the feedback I gave
wound up being addressed in later patches in the series anyway; I think
you can probably squash patches 6-9 into the earlier patches to simplify
a bit.

One of the requirements to merge new features upstream is to have an
opensource userspace that makes use of it.  It sounds like you're doing
this work for Android purposes, so is the plan to add support for these
properties to hwcomposer?


Matt

> 
> 
> The initial version of kms_blend, igt by Damien
> can be found at
> https://github.com/dlespiau/intel-gpu-tools/commits/20150613-blend
> 
>  Documentation/DocBook/gpu.tmpl       |  18 +++-
>  drivers/gpu/drm/drm_atomic.c         |  18 ++++
>  drivers/gpu/drm/drm_crtc.c           |  10 +++
>  drivers/gpu/drm/i915/i915_reg.h      |   4 +
>  drivers/gpu/drm/i915/intel_display.c | 164 +++++++++++++++++++++++++++++++++--
>  drivers/gpu/drm/i915/intel_drv.h     |  12 ++-
>  drivers/gpu/drm/i915/intel_sprite.c  |  17 ++--
>  include/drm/drm_crtc.h               |  26 ++++++
>  include/uapi/drm/drm_mode.h          |  34 ++++++++
>  9 files changed, 286 insertions(+), 17 deletions(-)
> 
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
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Re: [PATCH 0/9] Support blending modes of display planes

[Daniel Vetter]

On Thu, Jan 21, 2016 at 04:31:40PM -0800, Matt Roper wrote:
> On Mon, Jan 18, 2016 at 08:45:34PM +0530, Vandita Kulkarni wrote:
> > From: vandita kulkarni <vandita.kulkarni@intel.com>
> > 
> > The below patches support plane and pixel blending
> > by adding two properties blend_func and blend_color.
> > As per Damien's initial patches, this design based on 
> > OpenGL's blend equations is suggested by Ville.
> > All the below patches are tested on BXT android platform.
> > 
> > The initial kernel patches from damien can be found at
> > https://github.com/dlespiau/linux/commits/20150708-alpha-blending
> > Damien Lespiau (5):
> >   drm: Introduce the blend-func property
> >   drm/i915/skl: Add blend_func to SKL/BXT sprite planes
> >   drm: Introduce DRM_MODE_COLOR()
> >   drm: Add an blend_color property
> >   drm/i915/skl: Add support for blending modes
> > 
> > vandita kulkarni (4):
> >   drm/i915/skl: Drop alpha in non ARGB formats
> >   drm/i915: Support blend func on primary
> >   drm/i915/skl: Support blend color on primary
> >   drm/i915/skl: Separate out disable plane alpha
> 
> This series looks pretty good; I've given some feedback on a few of the
> patches, but it's all pretty minor.  And some of the feedback I gave
> wound up being addressed in later patches in the series anyway; I think
> you can probably squash patches 6-9 into the earlier patches to simplify
> a bit.
> 
> One of the requirements to merge new features upstream is to have an
> opensource userspace that makes use of it.  It sounds like you're doing
> this work for Android purposes, so is the plan to add support for these
> properties to hwcomposer?

Note that I'm still in the process of getting approval for contributing to
the new drm_hwcomposer. It seems this will take a while unfortunately :(
-Daniel
-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[PATCHv2 0/5] Support blending modes of display planes

[Vandita Kulkarni]

From: vandita kulkarni <vandita.kulkarni@intel.com>

The below patches support plane and pixel blending
by adding two properties blend_func and blend_color.
As per Damien's initial patches, this design based on 
OpenGL's blend equations is suggested by Ville.
All the below patches are tested on BXT android platform.

V2: Squashed all the blend color related patches to one
single patch and blend func related pathces into one single
patch.

The initial kernel patches from damien can be found at
https://github.com/dlespiau/linux/commits/20150708-alpha-blending
Damien Lespiau (5):
  drm: Introduce the blend-func property
  drm/i915/skl: Add blend_func to SKL/BXT sprite planes
  drm: Introduce DRM_MODE_COLOR()
  drm: Add an blend_color property
  drm/i915/skl: Add support for blending modes

The initial version of kms_blend, igt by Damien
can be found at
https://github.com/dlespiau/intel-gpu-tools/commits/20150613-blend


Damien Lespiau (5):
  drm: Introduce the blend-func property
  drm/i915/skl: Add blend_func to SKL/BXT sprite planes
  drm: Introduce DRM_MODE_COLOR()
  drm: Add an blend_color property
  drm/i915/skl: Add support for blending modes

 Documentation/DocBook/gpu.tmpl       |  18 +++-
 drivers/gpu/drm/drm_atomic.c         |  18 ++++
 drivers/gpu/drm/drm_crtc.c           |  10 +++
 drivers/gpu/drm/i915/i915_reg.h      |   4 +
 drivers/gpu/drm/i915/intel_display.c | 168 +++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_drv.h     |  17 +++-
 drivers/gpu/drm/i915/intel_sprite.c  |  15 +++-
 include/drm/drm_crtc.h               |  26 ++++++
 include/uapi/drm/drm_mode.h          |  34 +++++++
 9 files changed, 298 insertions(+), 12 deletions(-)

-- 
1.9.1

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[PATCHv2 1/5] drm: Introduce the blend-func property

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

We'd like to be able to program the blending modes of display planes.
Ville suggested to use something similar to the GL blend states, which
does seem like a good idea.

For now, we only consider blend factors, but room is left for
extensions: blend equation, separate rgb/alpha blend factors, blend
color.

V2: Added the belnd func property support in get property.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 Documentation/DocBook/gpu.tmpl | 11 +++++++++--
 drivers/gpu/drm/drm_atomic.c   | 14 ++++++++++++++
 drivers/gpu/drm/drm_crtc.c     |  5 +++++
 include/drm/drm_crtc.h         | 20 ++++++++++++++++++++
 4 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
index 1464fb2..f673989 100644
--- a/Documentation/DocBook/gpu.tmpl
+++ b/Documentation/DocBook/gpu.tmpl
@@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Description/Restrictions</td>
 	</tr>
 	<tr>
-	<td rowspan="42" valign="top" >DRM</td>
+	<td rowspan="43" valign="top" >DRM</td>
 	<td valign="top" >Generic</td>
 	<td valign="top" >“rotation”</td>
 	<td valign="top" >BITMASK</td>
@@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that connector is attached to (atomic)</td>
 	</tr>
 	<tr>
-	<td rowspan="11" valign="top" >Plane</td>
+	<td rowspan="12" valign="top" >Plane</td>
 	<td valign="top" >“type”</td>
 	<td valign="top" >ENUM | IMMUTABLE</td>
 	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
@@ -1946,6 +1946,13 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that plane is attached to (atomic)</td>
 	</tr>
 	<tr>
+	<td valign="top" >“blend_func”</td>
+	<td valign="top" >None</td>
+	<td valign="top" >DRM_BLEND_FUNC()</td>
+	<td valign="top" >Plane</td>
+	<td valign="top" >Source and destination blending factors</td>
+	</tr>
+	<tr>
 	<td rowspan="2" valign="top" >DVI-I</td>
 	<td valign="top" >“subconnector”</td>
 	<td valign="top" >ENUM</td>
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 8ee1db8..c2ead2d 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -701,6 +701,18 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
 		state->src_h = val;
 	} else if (property == config->rotation_property) {
 		state->rotation = val;
+	} else if (property == config->prop_blend_func) {
+		enum drm_blend_factor src_factor, dst_factor;
+
+		src_factor = DRM_BLEND_FUNC_SRC_FACTOR(val);
+		dst_factor = DRM_BLEND_FUNC_DST_FACTOR(val);
+
+		if (src_factor != dst_factor &&
+			(src_factor == DRM_BLEND_FACTOR_AUTO ||
+			dst_factor == DRM_BLEND_FACTOR_AUTO))
+			return -EINVAL;
+
+		state->blend_mode.func = val & GENMASK(31, 0);
 	} else if (plane->funcs->atomic_set_property) {
 		return plane->funcs->atomic_set_property(plane, state,
 				property, val);
@@ -757,6 +769,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
 		*val = state->src_h;
 	} else if (property == config->rotation_property) {
 		*val = state->rotation;
+	} else if (property == config->prop_blend_func) {
+		*val = state->blend_mode.func;
 	} else if (plane->funcs->atomic_get_property) {
 		return plane->funcs->atomic_get_property(plane, state, property, val);
 	} else {
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index f7fe9e1..2cac5e1 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1587,6 +1587,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.gamma_lut_size_property = prop;
 
+	prop = drm_property_create_range(dev, 0, "blend_func", 0, U32_MAX);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.prop_blend_func = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 6d46842..269f660 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -89,6 +89,23 @@ static inline uint64_t I642U64(int64_t val)
 #define DRM_REFLECT_X	4
 #define DRM_REFLECT_Y	5
 
+enum drm_blend_factor {
+	DRM_BLEND_FACTOR_AUTO,
+	DRM_BLEND_FACTOR_ZERO,
+	DRM_BLEND_FACTOR_ONE,
+	DRM_BLEND_FACTOR_SRC_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
+};
+
+#define DRM_BLEND_FUNC(src_factor, dst_factor)		\
+	(DRM_BLEND_FACTOR_##src_factor << 16 | DRM_BLEND_FACTOR_##dst_factor)
+#define DRM_BLEND_FUNC_SRC_FACTOR(val)	(((val) >> 16) & 0xffff)
+#define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
+
+struct drm_blend_mode {
+	uint64_t func;
+};
+
 enum drm_connector_force {
 	DRM_FORCE_UNSPECIFIED,
 	DRM_FORCE_OFF,
@@ -1273,6 +1290,8 @@ struct drm_plane_state {
 	/* Plane rotation */
 	unsigned int rotation;
 
+	struct drm_blend_mode blend_mode;
+
 	struct drm_atomic_state *state;
 };
 
@@ -2125,6 +2144,7 @@ struct drm_mode_config {
 	struct drm_property *prop_crtc_id;
 	struct drm_property *prop_active;
 	struct drm_property *prop_mode_id;
+	struct drm_property *prop_blend_func;
 
 	/* DVI-I properties */
 	struct drm_property *dvi_i_subconnector_property;
-- 
1.9.1

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[PATCHv2 2/5] drm/i915/skl: Add blend_func to SKL/BXT sprite planes

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

This patch adds the blend functions, and as per the
blend function, updates the plane control register values

V2: Add blend support for all RGB8888 formats
Fix the reg writes on plane_ctl_alpha bits.

V3: Add support support for primary and cursor planes.
fix an issue where the previous value was not
retained, change the logic to do so.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 121 +++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_drv.h     |  14 +++-
 drivers/gpu/drm/i915/intel_sprite.c  |   6 +-
 3 files changed, 133 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c5b9687..037407f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2921,8 +2921,29 @@ static void skl_detach_scalers(struct intel_crtc *intel_crtc)
 	}
 }
 
-u32 skl_plane_ctl_format(uint32_t pixel_format)
+u32 skl_plane_ctl_format(uint32_t pixel_format,
+			enum per_pixel_alpha_state alpha)
 {
+	u32 plane_ctl_alpha = 0;
+
+	if (pixel_format == DRM_FORMAT_ABGR8888 ||
+		pixel_format == DRM_FORMAT_ARGB8888) {
+
+		switch (alpha) {
+		case DROP_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_DISABLE;
+			break;
+		case PRE_MULTIPLIED_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+			break;
+		case NON_PRE_MULTIPLIED_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_HW_PREMULTIPLY;
+			break;
+		default:
+			MISSING_CASE(alpha);
+		}
+	}
+
 	switch (pixel_format) {
 	case DRM_FORMAT_C8:
 		return PLANE_CTL_FORMAT_INDEXED;
@@ -2938,11 +2959,11 @@ u32 skl_plane_ctl_format(uint32_t pixel_format)
 	 * DRM_FORMAT) for user-space to configure that.
 	 */
 	case DRM_FORMAT_ABGR8888:
-		return PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX |
-			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		return ((PLANE_CTL_FORMAT_XRGB_8888 | (PLANE_CTL_ORDER_RGBX
+				& (~PLANE_CTL_ALPHA_MASK))) | plane_ctl_alpha);
 	case DRM_FORMAT_ARGB8888:
-		return PLANE_CTL_FORMAT_XRGB_8888 |
-			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		return ((PLANE_CTL_FORMAT_XRGB_8888 & ~PLANE_CTL_ALPHA_MASK)
+						| plane_ctl_alpha);
 	case DRM_FORMAT_XRGB2101010:
 		return PLANE_CTL_FORMAT_XRGB_2101010;
 	case DRM_FORMAT_XBGR2101010:
@@ -3031,7 +3052,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 		    PLANE_CTL_PIPE_GAMMA_ENABLE |
 		    PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
+					plane_state->per_pixel_alpha);
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 	plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;
 	plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -3087,6 +3109,69 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 	POSTING_READ(PLANE_SURF(pipe, 0));
 }
 
+static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
+{
+	struct drm_device *dev = plane_state->state->dev;
+	struct intel_plane_state *state = to_intel_plane_state(plane_state);
+	const struct drm_framebuffer *fb = plane_state->fb;
+	const struct drm_blend_mode *mode = &state->base.blend_mode;
+	bool has_per_pixel_blending;
+
+	/*
+	 * We don't install the properties pre-SKL, so this is SKL+ specific
+	 * code for now.
+	 */
+	if (INTEL_INFO(dev)->gen < 9)
+		return 0;
+
+	if (!fb)
+		return 0;
+
+	has_per_pixel_blending = fb->pixel_format == DRM_FORMAT_ABGR8888 ||
+				fb->pixel_format == DRM_FORMAT_RGBA8888 ||
+				fb->pixel_format == DRM_FORMAT_ARGB8888 ||
+				fb->pixel_format == DRM_FORMAT_BGRA8888;
+
+	/* drop alpha for all fbs without an alpha channel */
+	if (!has_per_pixel_blending)
+		state->per_pixel_alpha = DROP_ALPHA;
+
+	switch (mode->func) {
+	/*
+	 * The 'AUTO' behaviour is the default and keeps compatibility with
+	 * kernels before the introduction of the blend_func property:
+	 *   - pre-multiplied alpha if the fb has an alpha channel
+	 *   - usual DRM_BLEND_FUNC(ONE, ZERO) otherwise
+	 */
+	case DRM_BLEND_FUNC(AUTO, AUTO):
+		if (has_per_pixel_blending)
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		break;
+	/* fbs without an alpha channel, or dropping the alpha channel */
+	case DRM_BLEND_FUNC(ONE, ZERO):
+		if (has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		break;
+	/* pre-multiplied alpha */
+	case DRM_BLEND_FUNC(ONE, ONE_MINUS_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		break;
+	/* non pre-multiplied alpha */
+	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
 static void skylake_disable_primary_plane(struct drm_plane *primary,
 					  struct drm_crtc *crtc)
 {
@@ -11892,6 +11977,10 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 	    !needs_scaling(old_plane_state))
 		pipe_config->disable_lp_wm = true;
 
+	ret = intel_plane_state_check_blend(plane_state);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
@@ -14095,6 +14184,9 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
 	if (INTEL_INFO(dev)->gen >= 4)
 		intel_create_rotation_property(dev, primary);
 
+	if (INTEL_INFO(dev)->gen == 9)
+		intel_plane_add_blend_properties(primary);
+
 	drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);
 
 	return &primary->base;
@@ -14124,6 +14216,20 @@ void intel_create_rotation_property(struct drm_device *dev, struct intel_plane *
 				plane->base.state->rotation);
 }
 
+void intel_plane_add_blend_properties(struct intel_plane *plane)
+{
+	struct drm_device *dev = plane->base.dev;
+	struct drm_property *prop;
+
+	if (INTEL_INFO(dev)->gen < 9)
+		return;
+
+	prop = dev->mode_config.prop_blend_func;
+	if (prop)
+		drm_object_attach_property(&plane->base.base, prop,
+					   DRM_BLEND_FUNC(AUTO, AUTO));
+}
+
 static int
 intel_check_cursor_plane(struct drm_plane *plane,
 			 struct intel_crtc_state *crtc_state,
@@ -14166,6 +14272,9 @@ intel_check_cursor_plane(struct drm_plane *plane,
 		return -EINVAL;
 	}
 
+	if (INTEL_INFO(plane->dev)->gen == 9)
+		intel_plane_add_blend_properties(to_intel_plane(plane));
+
 	/*
 	 * There's something wrong with the cursor on CHV pipe C.
 	 * If it straddles the left edge of the screen then
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e13ce22..1939440 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -303,6 +303,12 @@ struct intel_atomic_state {
 	bool skip_intermediate_wm;
 };
 
+enum per_pixel_alpha_state {
+	DROP_ALPHA = 0,
+	PRE_MULTIPLIED_ALPHA,
+	NON_PRE_MULTIPLIED_ALPHA,
+};
+
 struct intel_plane_state {
 	struct drm_plane_state base;
 	struct drm_rect src;
@@ -332,6 +338,9 @@ struct intel_plane_state {
 
 	struct drm_intel_sprite_colorkey ckey;
 
+	/* per pixel alpha channel state */
+	enum per_pixel_alpha_state per_pixel_alpha;
+
 	/* async flip related structures */
 	struct drm_i915_gem_request *wait_req;
 };
@@ -1195,6 +1204,7 @@ intel_rotation_90_or_270(unsigned int rotation)
 
 void intel_create_rotation_property(struct drm_device *dev,
 					struct intel_plane *plane);
+void intel_plane_add_blend_properties(struct intel_plane *plane);
 
 void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
 				    enum pipe pipe);
@@ -1267,7 +1277,9 @@ u32 intel_plane_obj_offset(struct intel_plane *intel_plane,
 			   struct drm_i915_gem_object *obj,
 			   unsigned int plane);
 
-u32 skl_plane_ctl_format(uint32_t pixel_format);
+u32 skl_plane_ctl_format(uint32_t pixel_format,
+				enum per_pixel_alpha_state alpha);
+
 u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
 u32 skl_plane_ctl_rotation(unsigned int rotation);
 
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 0f3e230..9474b76 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -210,7 +210,9 @@ skl_update_plane(struct drm_plane *drm_plane,
 		PLANE_CTL_PIPE_GAMMA_ENABLE |
 		PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
+					plane_state->per_pixel_alpha);
+
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 
 	plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -1120,6 +1122,8 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
 
 	intel_create_rotation_property(dev, intel_plane);
 
+	intel_plane_add_blend_properties(intel_plane);
+
 	drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
 
 	return 0;
-- 
1.9.1

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[PATCHv2 3/5] drm: Introduce DRM_MODE_COLOR()

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

In the hope of expressing colors in the KMS API in a consitant want,
let's introduce a ARGB 16161616 color and a few convinience macros
around it.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 include/uapi/drm/drm_mode.h | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 7a7856e..203c7ab0 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -295,6 +295,40 @@ struct drm_mode_get_connector {
  */
 #define DRM_MODE_PROP_ATOMIC        0x80000000
 
+/* Color for the KMS API, ARGB (msb -> lsb) 16bits per component. */
+#define DRM_MODE_COLOR(a, r, b, g)	\
+	(((__u64)(a) << 48) | ((__u64)(r) << 32) | \
+	 ((__u64)(g) << 16) | (__u64)(b))
+
+/* Extract full precision, 8 bits, 10 bits and 12 bits components. */
+#define DRM_MODE_COLOR_ALPHA(color)	(((color) >> 48) & 0xffff)
+#define DRM_MODE_COLOR_RED(color)	(((color) >> 32) & 0xffff)
+#define DRM_MODE_COLOR_BLUE(color)	(((color) >> 16) & 0xffff)
+#define DRM_MODE_COLOR_GREEN(color)	((color) & 0xffff)
+#define DRM_MODE_COLOR_ALPHA_8(color)	(((color) >> (48 + 8)) & 0xff)
+#define DRM_MODE_COLOR_RED_8(color)	(((color) >> (32 + 8)) & 0xff)
+#define DRM_MODE_COLOR_BLUE_8(color)	(((color) >> (16 + 8)) & 0xff)
+#define DRM_MODE_COLOR_GREEN_8(color)	(((color) >>  8) & 0xff)
+#define DRM_MODE_COLOR_ALPHA_10(color)	(((color) >> (48 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_RED_10(color)	(((color) >> (32 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_BLUE_10(color)	(((color) >> (16 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_GREEN_10(color)	(((color) >>  6) & 0x3ff)
+#define DRM_MODE_COLOR_ALPHA_12(color)	(((color) >> (48 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_RED_12(color)	(((color) >> (32 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_BLUE_12(color)	(((color) >> (16 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_GREEN_12(color)	(((color) >>  4) & 0xfff)
+
+/* Handy macros to convert a DRM_MODE_COLOR() into common precisions */
+#define DRM_MODE_COLOR_TO_ARGB_8888(color)	 \
+	((DRM_MODE_COLOR_ALPHA_8(color) << 24) | \
+	 (DRM_MODE_COLOR_RED_8(color)   << 16) | \
+	 (DRM_MODE_COLOR_GREEN_8(color) << 8)  | \
+	 DRM_MODE_COLOR_BLUE_8(color))
+#define DRM_MODE_COLOR_TO_RGB_101010(color)	  \
+	 ((DRM_MODE_COLOR_RED_10(color)  << 20) | \
+	 (DRM_MODE_COLOR_GREEN_10(color) << 10) | \
+	 DRM_MODE_COLOR_BLUE_10(color))
+
 struct drm_mode_property_enum {
 	__u64 value;
 	char name[DRM_PROP_NAME_LEN];
-- 
1.9.1

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[PATCHv2 4/5] drm: Add an blend_color property

[Vandita Kulkarni]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=a, Size: 4424 bytes --]

From: Damien Lespiau <damien.lespiau@intel.com>

Add blend color property and update the
documentation for the same

V2: Add blend color support in get property.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 Documentation/DocBook/gpu.tmpl | 11 +++++++++--
 drivers/gpu/drm/drm_atomic.c   |  4 ++++
 drivers/gpu/drm/drm_crtc.c     |  5 +++++
 include/drm/drm_crtc.h         |  6 ++++++
 4 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
index f673989..8572c9a 100644
--- a/Documentation/DocBook/gpu.tmpl
+++ b/Documentation/DocBook/gpu.tmpl
@@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Description/Restrictions</td>
 	</tr>
 	<tr>
-	<td rowspan="43" valign="top" >DRM</td>
+	<td rowspan="44" valign="top" >DRM</td>
 	<td valign="top" >Generic</td>
 	<td valign="top" >“rotation”</td>
 	<td valign="top" >BITMASK</td>
@@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that connector is attached to (atomic)</td>
 	</tr>
 	<tr>
-	<td rowspan="12" valign="top" >Plane</td>
+	<td rowspan="13" valign="top" >Plane</td>
 	<td valign="top" >“type”</td>
 	<td valign="top" >ENUM | IMMUTABLE</td>
 	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
@@ -1953,6 +1953,13 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Source and destination blending factors</td>
 	</tr>
 	<tr>
+	<td valign="top" >“blend_color”</td>
+	<td valign="top" >Color</td>
+	<td valign="top" >DRM_MODE_COLOR()</td>
+	<td valign="top" >Plane</td>
+	<td valign="top" >Blend constant color</td>
+	</tr>
+	<tr>
 	<td rowspan="2" valign="top" >DVI-I</td>
 	<td valign="top" >“subconnector”</td>
 	<td valign="top" >ENUM</td>
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index c2ead2d..20340de 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -713,6 +713,8 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
 			return -EINVAL;
 
 		state->blend_mode.func = val & GENMASK(31, 0);
+	} else if (property == config->prop_blend_color) {
+		state->blend_mode.color = val;
 	} else if (plane->funcs->atomic_set_property) {
 		return plane->funcs->atomic_set_property(plane, state,
 				property, val);
@@ -771,6 +773,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
 		*val = state->rotation;
 	} else if (property == config->prop_blend_func) {
 		*val = state->blend_mode.func;
+	} else if (property == config->prop_blend_color) {
+		*val = state->blend_mode.color;
 	} else if (plane->funcs->atomic_get_property) {
 		return plane->funcs->atomic_get_property(plane, state, property, val);
 	} else {
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 2cac5e1..65cbaea 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1592,6 +1592,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.prop_blend_func = prop;
 
+	prop = drm_property_create_range(dev, 0, "blend_color", 0, U64_MAX);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.prop_blend_color = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 269f660..33d5845 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -95,6 +95,10 @@ enum drm_blend_factor {
 	DRM_BLEND_FACTOR_ONE,
 	DRM_BLEND_FACTOR_SRC_ALPHA,
 	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
+	DRM_BLEND_FACTOR_CONSTANT_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
+	DRM_BLEND_FACTOR_CONSTANT_ALPHA_TIMES_SRC_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA,
 };
 
 #define DRM_BLEND_FUNC(src_factor, dst_factor)		\
@@ -103,6 +107,7 @@ enum drm_blend_factor {
 #define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
 
 struct drm_blend_mode {
+	uint64_t color;
 	uint64_t func;
 };
 
@@ -2145,6 +2150,7 @@ struct drm_mode_config {
 	struct drm_property *prop_active;
 	struct drm_property *prop_mode_id;
 	struct drm_property *prop_blend_func;
+	struct drm_property *prop_blend_color;
 
 	/* DVI-I properties */
 	struct drm_property *dvi_i_subconnector_property;
-- 
1.9.1


[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

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[PATCHv2 5/5] drm/i915/skl: Add support for blending modes

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

This patch adds support for blending modes involving
color.

V2: Add support for primary plane.
Separate out plane alpha disable functionality from per pixel
drop_alpha blend function and add another blend function case for
disabling plane alpha.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h      |  4 +++
 drivers/gpu/drm/i915/intel_display.c | 47 ++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h     |  3 +++
 drivers/gpu/drm/i915/intel_sprite.c  |  9 +++++--
 4 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9464ba3..4d0c39d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5515,6 +5515,10 @@ enum skl_disp_power_wells {
 #define PLANE_KEYMAX(pipe, plane)	\
 	_MMIO_PLANE(plane, _PLANE_KEYMAX_1(pipe), _PLANE_KEYMAX_2(pipe))
 
+#define PLANE_KEYMAX_ALPHA_MASK			0x00ffffff
+#define PLANE_KEY_MASK_ALPHA_EN			31
+#define PLANE_KEY_MAX_ALPHA_SHIFT		24
+
 #define _PLANE_BUF_CFG_1_B			0x7127c
 #define _PLANE_BUF_CFG_2_B			0x7137c
 #define _PLANE_BUF_CFG_1(pipe)	\
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 037407f..31755f2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3032,6 +3032,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
 	struct drm_framebuffer *fb = plane_state->base.fb;
 	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+	const struct drm_intel_sprite_colorkey *key =
+			&to_intel_plane_state(plane->state)->ckey;
 	int pipe = intel_crtc->pipe;
 	u32 plane_ctl, stride_div, stride;
 	u32 tile_height, plane_offset, plane_size;
@@ -3064,6 +3066,15 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 
 	WARN_ON(drm_rect_width(&plane_state->src) == 0);
 
+	I915_WRITE(PLANE_KEYMAX(pipe, 0), (DRM_MODE_COLOR_ALPHA_8
+			(plane_state->base.blend_mode.color)
+				<< PLANE_KEY_MAX_ALPHA_SHIFT) |
+			(key->max_value & PLANE_KEYMAX_ALPHA_MASK));
+	I915_WRITE(PLANE_KEYMSK(pipe, 0),
+			(plane_state->use_plane_alpha
+				<< PLANE_KEY_MASK_ALPHA_EN) |
+			(key->channel_mask & GENMASK(0, 26)));
+
 	if (intel_rotation_90_or_270(rotation)) {
 		int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
 
@@ -3146,6 +3157,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 	case DRM_BLEND_FUNC(AUTO, AUTO):
 		if (has_per_pixel_blending)
 			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
 		break;
 	/* fbs without an alpha channel, or dropping the alpha channel */
 	case DRM_BLEND_FUNC(ONE, ZERO):
@@ -3158,6 +3170,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 			state->per_pixel_alpha = DROP_ALPHA;
 		else
 			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
 		break;
 	/* non pre-multiplied alpha */
 	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
@@ -3165,6 +3178,34 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 			state->per_pixel_alpha = DROP_ALPHA;
 		else
 			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
+		break;
+	/* plane alpha */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA, ONE_MINUS_CONSTANT_ALPHA):
+		state->use_plane_alpha = true;
+		break;
+	/* plane alpha, pre-multiplied fb */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA,
+			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		/*TBD bspec check*/
+		state->use_plane_alpha = true;
+		break;
+	/* plane alpha, non pre-multiplied fb */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA_TIMES_SRC_ALPHA,
+			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = true;
+		break;
+	/* drop plane alpha */
+	case DRM_BLEND_FUNC(ZERO, ONE):
+		state->use_plane_alpha = false;
 		break;
 	default:
 		return -EINVAL;
@@ -14228,6 +14269,12 @@ void intel_plane_add_blend_properties(struct intel_plane *plane)
 	if (prop)
 		drm_object_attach_property(&plane->base.base, prop,
 					   DRM_BLEND_FUNC(AUTO, AUTO));
+
+	prop = dev->mode_config.prop_blend_color;
+	if (prop)
+		drm_object_attach_property(&plane->base.base, prop,
+					   DRM_MODE_COLOR(0xffff, 0xffff,
+							  0xffff, 0xffff));
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1939440..d3cb36f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -341,6 +341,9 @@ struct intel_plane_state {
 	/* per pixel alpha channel state */
 	enum per_pixel_alpha_state per_pixel_alpha;
 
+	/* use per-plane alpha */
+	bool use_plane_alpha;
+
 	/* async flip related structures */
 	struct drm_i915_gem_request *wait_req;
 };
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 9474b76..851c09a 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -226,10 +226,15 @@ skl_update_plane(struct drm_plane *drm_plane,
 	crtc_w--;
 	crtc_h--;
 
+	I915_WRITE(PLANE_KEYMAX(pipe, plane),
+		   (DRM_MODE_COLOR_ALPHA_8(plane_state->base.blend_mode.color)
+			<< 24) | (key->max_value & 0x00ffffff));
+	I915_WRITE(PLANE_KEYMSK(pipe, plane),
+		   (plane_state->use_plane_alpha << 31) |
+		   (key->channel_mask & GENMASK(0, 26)));
+
 	if (key->flags) {
 		I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value);
-		I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value);
-		I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask);
 	}
 
 	if (key->flags & I915_SET_COLORKEY_DESTINATION)
-- 
1.9.1

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Re: [PATCHv2 0/5] Support blending modes of display planes

[Daniel Vetter]

On Tue, Apr 26, 2016 at 03:02:59PM +0530, Vandita Kulkarni wrote:
> From: vandita kulkarni <vandita.kulkarni@intel.com>
> 
> The below patches support plane and pixel blending
> by adding two properties blend_func and blend_color.
> As per Damien's initial patches, this design based on 
> OpenGL's blend equations is suggested by Ville.
> All the below patches are tested on BXT android platform.
> 
> V2: Squashed all the blend color related patches to one
> single patch and blend func related pathces into one single
> patch.
> 
> The initial kernel patches from damien can be found at
> https://github.com/dlespiau/linux/commits/20150708-alpha-blending
> Damien Lespiau (5):
>   drm: Introduce the blend-func property
>   drm/i915/skl: Add blend_func to SKL/BXT sprite planes
>   drm: Introduce DRM_MODE_COLOR()
>   drm: Add an blend_color property
>   drm/i915/skl: Add support for blending modes
> 
> The initial version of kms_blend, igt by Damien
> can be found at
> https://github.com/dlespiau/intel-gpu-tools/commits/20150613-blend
> 
> 
> Damien Lespiau (5):
>   drm: Introduce the blend-func property
>   drm/i915/skl: Add blend_func to SKL/BXT sprite planes
>   drm: Introduce DRM_MODE_COLOR()
>   drm: Add an blend_color property
>   drm/i915/skl: Add support for blending modes

When resubmitting an entire series please start a new thread, otherwise
our CI/patchwork gets confused and your patch won't be tested.

IN-reply-to is just to resend invidual patches of a series, not the entire
thing.
-Daniel

> 
>  Documentation/DocBook/gpu.tmpl       |  18 +++-
>  drivers/gpu/drm/drm_atomic.c         |  18 ++++
>  drivers/gpu/drm/drm_crtc.c           |  10 +++
>  drivers/gpu/drm/i915/i915_reg.h      |   4 +
>  drivers/gpu/drm/i915/intel_display.c | 168 +++++++++++++++++++++++++++++++++--
>  drivers/gpu/drm/i915/intel_drv.h     |  17 +++-
>  drivers/gpu/drm/i915/intel_sprite.c  |  15 +++-
>  include/drm/drm_crtc.h               |  26 ++++++
>  include/uapi/drm/drm_mode.h          |  34 +++++++
>  9 files changed, 298 insertions(+), 12 deletions(-)
> 
> -- 
> 1.9.1
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCHv2 1/5] drm: Introduce the blend-func property

[Daniel Vetter]

On Tue, Apr 26, 2016 at 03:03:00PM +0530, Vandita Kulkarni wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> We'd like to be able to program the blending modes of display planes.
> Ville suggested to use something similar to the GL blend states, which
> does seem like a good idea.
> 
> For now, we only consider blend factors, but room is left for
> extensions: blend equation, separate rgb/alpha blend factors, blend
> color.
> 
> V2: Added the belnd func property support in get property.
> 
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>

New props need to be cc'ed to dri-devel. And we need to coordinate with
other folks doing the same and have one unified set of blending ops.
-Daniel

> ---
>  Documentation/DocBook/gpu.tmpl | 11 +++++++++--
>  drivers/gpu/drm/drm_atomic.c   | 14 ++++++++++++++
>  drivers/gpu/drm/drm_crtc.c     |  5 +++++
>  include/drm/drm_crtc.h         | 20 ++++++++++++++++++++
>  4 files changed, 48 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
> index 1464fb2..f673989 100644
> --- a/Documentation/DocBook/gpu.tmpl
> +++ b/Documentation/DocBook/gpu.tmpl
> @@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >Description/Restrictions</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="42" valign="top" >DRM</td>
> +	<td rowspan="43" valign="top" >DRM</td>
>  	<td valign="top" >Generic</td>
>  	<td valign="top" >“rotation”</td>
>  	<td valign="top" >BITMASK</td>
> @@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that connector is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="11" valign="top" >Plane</td>
> +	<td rowspan="12" valign="top" >Plane</td>
>  	<td valign="top" >“type”</td>
>  	<td valign="top" >ENUM | IMMUTABLE</td>
>  	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
> @@ -1946,6 +1946,13 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that plane is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> +	<td valign="top" >“blend_func”</td>
> +	<td valign="top" >None</td>
> +	<td valign="top" >DRM_BLEND_FUNC()</td>
> +	<td valign="top" >Plane</td>
> +	<td valign="top" >Source and destination blending factors</td>
> +	</tr>
> +	<tr>
>  	<td rowspan="2" valign="top" >DVI-I</td>
>  	<td valign="top" >“subconnector”</td>
>  	<td valign="top" >ENUM</td>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 8ee1db8..c2ead2d 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -701,6 +701,18 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
>  		state->src_h = val;
>  	} else if (property == config->rotation_property) {
>  		state->rotation = val;
> +	} else if (property == config->prop_blend_func) {
> +		enum drm_blend_factor src_factor, dst_factor;
> +
> +		src_factor = DRM_BLEND_FUNC_SRC_FACTOR(val);
> +		dst_factor = DRM_BLEND_FUNC_DST_FACTOR(val);
> +
> +		if (src_factor != dst_factor &&
> +			(src_factor == DRM_BLEND_FACTOR_AUTO ||
> +			dst_factor == DRM_BLEND_FACTOR_AUTO))
> +			return -EINVAL;
> +
> +		state->blend_mode.func = val & GENMASK(31, 0);
>  	} else if (plane->funcs->atomic_set_property) {
>  		return plane->funcs->atomic_set_property(plane, state,
>  				property, val);
> @@ -757,6 +769,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
>  		*val = state->src_h;
>  	} else if (property == config->rotation_property) {
>  		*val = state->rotation;
> +	} else if (property == config->prop_blend_func) {
> +		*val = state->blend_mode.func;
>  	} else if (plane->funcs->atomic_get_property) {
>  		return plane->funcs->atomic_get_property(plane, state, property, val);
>  	} else {
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index f7fe9e1..2cac5e1 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1587,6 +1587,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
>  		return -ENOMEM;
>  	dev->mode_config.gamma_lut_size_property = prop;
>  
> +	prop = drm_property_create_range(dev, 0, "blend_func", 0, U32_MAX);
> +	if (!prop)
> +		return -ENOMEM;
> +	dev->mode_config.prop_blend_func = prop;
> +
>  	return 0;
>  }
>  
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 6d46842..269f660 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -89,6 +89,23 @@ static inline uint64_t I642U64(int64_t val)
>  #define DRM_REFLECT_X	4
>  #define DRM_REFLECT_Y	5
>  
> +enum drm_blend_factor {
> +	DRM_BLEND_FACTOR_AUTO,
> +	DRM_BLEND_FACTOR_ZERO,
> +	DRM_BLEND_FACTOR_ONE,
> +	DRM_BLEND_FACTOR_SRC_ALPHA,
> +	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
> +};
> +
> +#define DRM_BLEND_FUNC(src_factor, dst_factor)		\
> +	(DRM_BLEND_FACTOR_##src_factor << 16 | DRM_BLEND_FACTOR_##dst_factor)
> +#define DRM_BLEND_FUNC_SRC_FACTOR(val)	(((val) >> 16) & 0xffff)
> +#define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
> +
> +struct drm_blend_mode {
> +	uint64_t func;
> +};
> +
>  enum drm_connector_force {
>  	DRM_FORCE_UNSPECIFIED,
>  	DRM_FORCE_OFF,
> @@ -1273,6 +1290,8 @@ struct drm_plane_state {
>  	/* Plane rotation */
>  	unsigned int rotation;
>  
> +	struct drm_blend_mode blend_mode;
> +
>  	struct drm_atomic_state *state;
>  };
>  
> @@ -2125,6 +2144,7 @@ struct drm_mode_config {
>  	struct drm_property *prop_crtc_id;
>  	struct drm_property *prop_active;
>  	struct drm_property *prop_mode_id;
> +	struct drm_property *prop_blend_func;
>  
>  	/* DVI-I properties */
>  	struct drm_property *dvi_i_subconnector_property;
> -- 
> 1.9.1
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCHv2 1/5] drm: Introduce the blend-func property

[Daniel Vetter]

On Tue, Apr 26, 2016 at 03:03:00PM +0530, Vandita Kulkarni wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> We'd like to be able to program the blending modes of display planes.
> Ville suggested to use something similar to the GL blend states, which
> does seem like a good idea.
> 
> For now, we only consider blend factors, but room is left for
> extensions: blend equation, separate rgb/alpha blend factors, blend
> color.
> 
> V2: Added the belnd func property support in get property.
> 
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>

Also, new ABI = where is the open source userspace for this?
-Daniel

> ---
>  Documentation/DocBook/gpu.tmpl | 11 +++++++++--
>  drivers/gpu/drm/drm_atomic.c   | 14 ++++++++++++++
>  drivers/gpu/drm/drm_crtc.c     |  5 +++++
>  include/drm/drm_crtc.h         | 20 ++++++++++++++++++++
>  4 files changed, 48 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
> index 1464fb2..f673989 100644
> --- a/Documentation/DocBook/gpu.tmpl
> +++ b/Documentation/DocBook/gpu.tmpl
> @@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >Description/Restrictions</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="42" valign="top" >DRM</td>
> +	<td rowspan="43" valign="top" >DRM</td>
>  	<td valign="top" >Generic</td>
>  	<td valign="top" >“rotation”</td>
>  	<td valign="top" >BITMASK</td>
> @@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that connector is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="11" valign="top" >Plane</td>
> +	<td rowspan="12" valign="top" >Plane</td>
>  	<td valign="top" >“type”</td>
>  	<td valign="top" >ENUM | IMMUTABLE</td>
>  	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
> @@ -1946,6 +1946,13 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that plane is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> +	<td valign="top" >“blend_func”</td>
> +	<td valign="top" >None</td>
> +	<td valign="top" >DRM_BLEND_FUNC()</td>
> +	<td valign="top" >Plane</td>
> +	<td valign="top" >Source and destination blending factors</td>
> +	</tr>
> +	<tr>
>  	<td rowspan="2" valign="top" >DVI-I</td>
>  	<td valign="top" >“subconnector”</td>
>  	<td valign="top" >ENUM</td>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 8ee1db8..c2ead2d 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -701,6 +701,18 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
>  		state->src_h = val;
>  	} else if (property == config->rotation_property) {
>  		state->rotation = val;
> +	} else if (property == config->prop_blend_func) {
> +		enum drm_blend_factor src_factor, dst_factor;
> +
> +		src_factor = DRM_BLEND_FUNC_SRC_FACTOR(val);
> +		dst_factor = DRM_BLEND_FUNC_DST_FACTOR(val);
> +
> +		if (src_factor != dst_factor &&
> +			(src_factor == DRM_BLEND_FACTOR_AUTO ||
> +			dst_factor == DRM_BLEND_FACTOR_AUTO))
> +			return -EINVAL;
> +
> +		state->blend_mode.func = val & GENMASK(31, 0);
>  	} else if (plane->funcs->atomic_set_property) {
>  		return plane->funcs->atomic_set_property(plane, state,
>  				property, val);
> @@ -757,6 +769,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
>  		*val = state->src_h;
>  	} else if (property == config->rotation_property) {
>  		*val = state->rotation;
> +	} else if (property == config->prop_blend_func) {
> +		*val = state->blend_mode.func;
>  	} else if (plane->funcs->atomic_get_property) {
>  		return plane->funcs->atomic_get_property(plane, state, property, val);
>  	} else {
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index f7fe9e1..2cac5e1 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1587,6 +1587,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
>  		return -ENOMEM;
>  	dev->mode_config.gamma_lut_size_property = prop;
>  
> +	prop = drm_property_create_range(dev, 0, "blend_func", 0, U32_MAX);
> +	if (!prop)
> +		return -ENOMEM;
> +	dev->mode_config.prop_blend_func = prop;
> +
>  	return 0;
>  }
>  
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 6d46842..269f660 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -89,6 +89,23 @@ static inline uint64_t I642U64(int64_t val)
>  #define DRM_REFLECT_X	4
>  #define DRM_REFLECT_Y	5
>  
> +enum drm_blend_factor {
> +	DRM_BLEND_FACTOR_AUTO,
> +	DRM_BLEND_FACTOR_ZERO,
> +	DRM_BLEND_FACTOR_ONE,
> +	DRM_BLEND_FACTOR_SRC_ALPHA,
> +	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
> +};
> +
> +#define DRM_BLEND_FUNC(src_factor, dst_factor)		\
> +	(DRM_BLEND_FACTOR_##src_factor << 16 | DRM_BLEND_FACTOR_##dst_factor)
> +#define DRM_BLEND_FUNC_SRC_FACTOR(val)	(((val) >> 16) & 0xffff)
> +#define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
> +
> +struct drm_blend_mode {
> +	uint64_t func;
> +};
> +
>  enum drm_connector_force {
>  	DRM_FORCE_UNSPECIFIED,
>  	DRM_FORCE_OFF,
> @@ -1273,6 +1290,8 @@ struct drm_plane_state {
>  	/* Plane rotation */
>  	unsigned int rotation;
>  
> +	struct drm_blend_mode blend_mode;
> +
>  	struct drm_atomic_state *state;
>  };
>  
> @@ -2125,6 +2144,7 @@ struct drm_mode_config {
>  	struct drm_property *prop_crtc_id;
>  	struct drm_property *prop_active;
>  	struct drm_property *prop_mode_id;
> +	struct drm_property *prop_blend_func;
>  
>  	/* DVI-I properties */
>  	struct drm_property *dvi_i_subconnector_property;
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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✗ Fi.CI.BAT: warning for series starting with [PATCHv2,1/5] drm: Introduce the blend-func property

[Patchwork]

== Series Details ==

Series: series starting with [PATCHv2,1/5] drm: Introduce the blend-func property
URL   : https://patchwork.freedesktop.org/series/6316/
State : warning

== Summary ==

Series 6316v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/6316/revisions/1/mbox/

Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                pass       -> DMESG-WARN (snb-dellxps)
        Subgroup hang-read-crc-pipe-b:
                incomplete -> PASS       (snb-dellxps)

bdw-ultra        total:200  pass:175  dwarn:0   dfail:0   fail:0   skip:25 
bsw-nuc-2        total:199  pass:158  dwarn:0   dfail:0   fail:0   skip:41 
byt-nuc          total:199  pass:158  dwarn:0   dfail:0   fail:0   skip:41 
hsw-brixbox      total:200  pass:174  dwarn:0   dfail:0   fail:0   skip:26 
hsw-gt2          total:200  pass:178  dwarn:0   dfail:0   fail:1   skip:21 
ilk-hp8440p      total:200  pass:139  dwarn:0   dfail:0   fail:0   skip:61 
ivb-t430s        total:200  pass:169  dwarn:0   dfail:0   fail:0   skip:31 
skl-i7k-2        total:200  pass:173  dwarn:0   dfail:0   fail:0   skip:27 
skl-nuci5        total:200  pass:189  dwarn:0   dfail:0   fail:0   skip:11 
snb-dellxps      total:200  pass:157  dwarn:1   dfail:0   fail:0   skip:42 
snb-x220t        total:200  pass:158  dwarn:0   dfail:0   fail:1   skip:41 
bdw-nuci7 failed to connect after reboot

Results at /archive/results/CI_IGT_test/Patchwork_2071/

e005db1cb2c60d18abe837ac683d8993ea77b239 drm-intel-nightly: 2016y-04m-26d-12h-51m-57s UTC integration manifest
e6cc5fd drm/i915/skl: Add support for blending modes
271d65d drm: Add an blend_color property
c75c8f0 drm: Introduce DRM_MODE_COLOR()
4f19a37 drm/i915/skl: Add blend_func to SKL/BXT sprite planes
2a145b5 drm: Introduce the blend-func property

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Re: [PATCHv2 1/5] drm: Introduce the blend-func property

[Jani Nikula]

On Tue, 26 Apr 2016, Daniel Vetter <daniel@ffwll.ch> wrote:
> New props need to be cc'ed to dri-devel. And we need to coordinate with
> other folks doing the same and have one unified set of blending ops.

The more general answer is, check the maintainers for the files you're
changing, in the MAINTAINERS file. scripts/get_maintainer.pl will help
you with that.

$ scripts/get_maintainer.pl 0001-drm-Introduce-the-blend-func-property.patch
Jonathan Corbet <corbet@lwn.net> (maintainer:DOCUMENTATION)
David Airlie <airlied@linux.ie> (maintainer:DRM DRIVERS)
Daniel Vetter <daniel.vetter@ffwll.ch> (commit_signer:45/42=100%,authored:19/42=45%)
Lukas Wunner <lukas@wunner.de> (commit_signer:8/42=19%,authored:7/42=17%)
Thierry Reding <treding@nvidia.com> (commit_signer:7/42=17%)
Darren Hart <dvhart@linux.intel.com> (commit_signer:3/42=7%)
Jani Nikula <jani.nikula@intel.com> (commit_signer:3/42=7%,authored:3/42=7%)
linux-doc@vger.kernel.org (open list:DOCUMENTATION)
linux-kernel@vger.kernel.org (open list)
dri-devel@lists.freedesktop.org (open list:DRM DRIVERS)

You can often ignore the "commit_signer" stats (and sometimes people get
annyoed for being randomly Cc'd for things they did long ago), and here
you need to take into account the following patches and include the
drm/i915 list and maintainers. get_maintainer.pl is not the silver
bullet, but it will give you an idea, and in this case a clear
indication intel-gfx is not enough.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Technology Center
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[PATCHv2 2/5] drm/i915/skl: Add blend_func to SKL/BXT sprite planes

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

This patch adds the blend functions, and as per the
blend function, updates the plane control register values

V2: Add blend support for all RGB8888 formats
Fix the reg writes on plane_ctl_alpha bits.

V3: Add support support for primary and cursor planes.
fix an issue where the previous value was not
retained, change the logic to do so.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 121 +++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_drv.h     |  14 +++-
 drivers/gpu/drm/i915/intel_sprite.c  |   6 +-
 3 files changed, 133 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c5b9687..037407f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2921,8 +2921,29 @@ static void skl_detach_scalers(struct intel_crtc *intel_crtc)
 	}
 }
 
-u32 skl_plane_ctl_format(uint32_t pixel_format)
+u32 skl_plane_ctl_format(uint32_t pixel_format,
+			enum per_pixel_alpha_state alpha)
 {
+	u32 plane_ctl_alpha = 0;
+
+	if (pixel_format == DRM_FORMAT_ABGR8888 ||
+		pixel_format == DRM_FORMAT_ARGB8888) {
+
+		switch (alpha) {
+		case DROP_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_DISABLE;
+			break;
+		case PRE_MULTIPLIED_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+			break;
+		case NON_PRE_MULTIPLIED_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_HW_PREMULTIPLY;
+			break;
+		default:
+			MISSING_CASE(alpha);
+		}
+	}
+
 	switch (pixel_format) {
 	case DRM_FORMAT_C8:
 		return PLANE_CTL_FORMAT_INDEXED;
@@ -2938,11 +2959,11 @@ u32 skl_plane_ctl_format(uint32_t pixel_format)
 	 * DRM_FORMAT) for user-space to configure that.
 	 */
 	case DRM_FORMAT_ABGR8888:
-		return PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX |
-			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		return ((PLANE_CTL_FORMAT_XRGB_8888 | (PLANE_CTL_ORDER_RGBX
+				& (~PLANE_CTL_ALPHA_MASK))) | plane_ctl_alpha);
 	case DRM_FORMAT_ARGB8888:
-		return PLANE_CTL_FORMAT_XRGB_8888 |
-			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		return ((PLANE_CTL_FORMAT_XRGB_8888 & ~PLANE_CTL_ALPHA_MASK)
+						| plane_ctl_alpha);
 	case DRM_FORMAT_XRGB2101010:
 		return PLANE_CTL_FORMAT_XRGB_2101010;
 	case DRM_FORMAT_XBGR2101010:
@@ -3031,7 +3052,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 		    PLANE_CTL_PIPE_GAMMA_ENABLE |
 		    PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
+					plane_state->per_pixel_alpha);
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 	plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;
 	plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -3087,6 +3109,69 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 	POSTING_READ(PLANE_SURF(pipe, 0));
 }
 
+static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
+{
+	struct drm_device *dev = plane_state->state->dev;
+	struct intel_plane_state *state = to_intel_plane_state(plane_state);
+	const struct drm_framebuffer *fb = plane_state->fb;
+	const struct drm_blend_mode *mode = &state->base.blend_mode;
+	bool has_per_pixel_blending;
+
+	/*
+	 * We don't install the properties pre-SKL, so this is SKL+ specific
+	 * code for now.
+	 */
+	if (INTEL_INFO(dev)->gen < 9)
+		return 0;
+
+	if (!fb)
+		return 0;
+
+	has_per_pixel_blending = fb->pixel_format == DRM_FORMAT_ABGR8888 ||
+				fb->pixel_format == DRM_FORMAT_RGBA8888 ||
+				fb->pixel_format == DRM_FORMAT_ARGB8888 ||
+				fb->pixel_format == DRM_FORMAT_BGRA8888;
+
+	/* drop alpha for all fbs without an alpha channel */
+	if (!has_per_pixel_blending)
+		state->per_pixel_alpha = DROP_ALPHA;
+
+	switch (mode->func) {
+	/*
+	 * The 'AUTO' behaviour is the default and keeps compatibility with
+	 * kernels before the introduction of the blend_func property:
+	 *   - pre-multiplied alpha if the fb has an alpha channel
+	 *   - usual DRM_BLEND_FUNC(ONE, ZERO) otherwise
+	 */
+	case DRM_BLEND_FUNC(AUTO, AUTO):
+		if (has_per_pixel_blending)
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		break;
+	/* fbs without an alpha channel, or dropping the alpha channel */
+	case DRM_BLEND_FUNC(ONE, ZERO):
+		if (has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		break;
+	/* pre-multiplied alpha */
+	case DRM_BLEND_FUNC(ONE, ONE_MINUS_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		break;
+	/* non pre-multiplied alpha */
+	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
 static void skylake_disable_primary_plane(struct drm_plane *primary,
 					  struct drm_crtc *crtc)
 {
@@ -11892,6 +11977,10 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 	    !needs_scaling(old_plane_state))
 		pipe_config->disable_lp_wm = true;
 
+	ret = intel_plane_state_check_blend(plane_state);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
@@ -14095,6 +14184,9 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
 	if (INTEL_INFO(dev)->gen >= 4)
 		intel_create_rotation_property(dev, primary);
 
+	if (INTEL_INFO(dev)->gen == 9)
+		intel_plane_add_blend_properties(primary);
+
 	drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);
 
 	return &primary->base;
@@ -14124,6 +14216,20 @@ void intel_create_rotation_property(struct drm_device *dev, struct intel_plane *
 				plane->base.state->rotation);
 }
 
+void intel_plane_add_blend_properties(struct intel_plane *plane)
+{
+	struct drm_device *dev = plane->base.dev;
+	struct drm_property *prop;
+
+	if (INTEL_INFO(dev)->gen < 9)
+		return;
+
+	prop = dev->mode_config.prop_blend_func;
+	if (prop)
+		drm_object_attach_property(&plane->base.base, prop,
+					   DRM_BLEND_FUNC(AUTO, AUTO));
+}
+
 static int
 intel_check_cursor_plane(struct drm_plane *plane,
 			 struct intel_crtc_state *crtc_state,
@@ -14166,6 +14272,9 @@ intel_check_cursor_plane(struct drm_plane *plane,
 		return -EINVAL;
 	}
 
+	if (INTEL_INFO(plane->dev)->gen == 9)
+		intel_plane_add_blend_properties(to_intel_plane(plane));
+
 	/*
 	 * There's something wrong with the cursor on CHV pipe C.
 	 * If it straddles the left edge of the screen then
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e13ce22..1939440 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -303,6 +303,12 @@ struct intel_atomic_state {
 	bool skip_intermediate_wm;
 };
 
+enum per_pixel_alpha_state {
+	DROP_ALPHA = 0,
+	PRE_MULTIPLIED_ALPHA,
+	NON_PRE_MULTIPLIED_ALPHA,
+};
+
 struct intel_plane_state {
 	struct drm_plane_state base;
 	struct drm_rect src;
@@ -332,6 +338,9 @@ struct intel_plane_state {
 
 	struct drm_intel_sprite_colorkey ckey;
 
+	/* per pixel alpha channel state */
+	enum per_pixel_alpha_state per_pixel_alpha;
+
 	/* async flip related structures */
 	struct drm_i915_gem_request *wait_req;
 };
@@ -1195,6 +1204,7 @@ intel_rotation_90_or_270(unsigned int rotation)
 
 void intel_create_rotation_property(struct drm_device *dev,
 					struct intel_plane *plane);
+void intel_plane_add_blend_properties(struct intel_plane *plane);
 
 void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
 				    enum pipe pipe);
@@ -1267,7 +1277,9 @@ u32 intel_plane_obj_offset(struct intel_plane *intel_plane,
 			   struct drm_i915_gem_object *obj,
 			   unsigned int plane);
 
-u32 skl_plane_ctl_format(uint32_t pixel_format);
+u32 skl_plane_ctl_format(uint32_t pixel_format,
+				enum per_pixel_alpha_state alpha);
+
 u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
 u32 skl_plane_ctl_rotation(unsigned int rotation);
 
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 0f3e230..9474b76 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -210,7 +210,9 @@ skl_update_plane(struct drm_plane *drm_plane,
 		PLANE_CTL_PIPE_GAMMA_ENABLE |
 		PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
+					plane_state->per_pixel_alpha);
+
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 
 	plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -1120,6 +1122,8 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
 
 	intel_create_rotation_property(dev, intel_plane);
 
+	intel_plane_add_blend_properties(intel_plane);
+
 	drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
 
 	return 0;
-- 
1.9.1

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