From: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> To: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>, Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>, Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>, Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>, Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>, Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>, Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>, Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Geert Uytterhoeven <geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org>, Grygorii Strashko <grygorii.strashko-l0cyMroinI0@public.gmane.org>, Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>, Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Subject: [PATCH V3 00/17] Add support for Tegra210 AGIC Date: Wed, 4 May 2016 17:25:13 +0100 [thread overview] Message-ID: <1462379130-11742-1-git-send-email-jonathanh@nvidia.com> (raw) The Tegra210 has a 2nd level interrupt controller located in a separate power domain to the main GIC interrupt controller and hence requires runtime-pm support. Add a platform driver for the GICs that require runtime-pm and make the necessary changes to the genirq and irqdomain core to support IRQ chips that require runtime-pm. Please note that although as the subject states this adds support for the Tegra210 AGIC, in this current version there is really nothing specific in this series for Tegra. However, rather than changing the subject I opted to keep it the same so people recognise this is a continuation of that work. Changes since V2: - Corrected RPM support for irqchips in genirq core as pointed out by Kevin Hilman. - Corrected patch to save the irq type when mapping the interrupt. - Dropped changes to DT binding documentation and added patch to prevent early init of GICs if the 'clocks' and/or 'power-domains' DT properties are present (as we have discussed). - Moved platform driver code into it's own source file. - Separate changes for preparing for the platform driver into 3 patches in an attempt to make it more readable! - Added fix for checking an interrupt descriptor is valid during IRQ setup. Changes since V1: - Updated GIC to only WARN and not return an error if configuring a PPI fails but will still return an error if an SPI fails (per discussion with Marc). - Dropped change to mask sense bits for GIC-v3 (as this is not necessary) - Split patch to avoid setting interrupt type when mapping the IRQ into two patches per TGLX's feedback. - Changed name of irqchip device structure to "parent_device" - Moved call to irq_chip_pm_get() outside of chip_bus_lock(). - Dropped patch to remove clock names from GIC DT documentation and added AGIC clock names. - Update GIC platform driver to look-up clocks names from static list. Jon Hunter (17): irqchip/gic: Don't unnecessarily write the IRQ configuration irqchip/gic: WARN if setting the interrupt type for a PPI fails irqchip: Mask the non-type/sense bits when translating an IRQ irqdomain: Fix handling of type settings for existing mappings genirq: Look-up trigger type if not specified by caller irqdomain: Don't set type when mapping an IRQ genirq: Ensure IRQ descriptor is valid when setting-up the IRQ genirq: Add runtime power management support for IRQ chips irqchip/gic: Don't initialise chip if mapping IO space fails irqchip/gic: Remove static irq_chip definition for eoimode1 irqchip/gic: Return an error if GIC initialisation fails irqchip/gic: Pass GIC pointer to save/restore functions irqchip/gic: Don't allow early initialisation if GIC requires RPM irqchip/gic: Add helper function for configuring a GIC via device-tree irqchip/gic: Split GIC init in preparation for platform driver irqchip/gic: Prepare for adding platform driver irqchip/gic: Add platform driver for non-root GICs that require RPM drivers/irqchip/Kconfig | 6 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-crossbar.c | 2 +- drivers/irqchip/irq-gic-common.c | 19 ++- drivers/irqchip/irq-gic-pm.c | 241 ++++++++++++++++++++++++++++++++++ drivers/irqchip/irq-gic.c | 277 +++++++++++++++++++++++---------------- drivers/irqchip/irq-gic.h | 63 +++++++++ drivers/irqchip/irq-tegra.c | 2 +- include/linux/irq.h | 4 + include/linux/irqdomain.h | 3 + kernel/irq/chip.c | 35 +++++ kernel/irq/internals.h | 1 + kernel/irq/irqdomain.c | 58 ++++++-- kernel/irq/manage.c | 40 +++++- 14 files changed, 617 insertions(+), 135 deletions(-) create mode 100644 drivers/irqchip/irq-gic-pm.c create mode 100644 drivers/irqchip/irq-gic.h -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Jon Hunter <jonathanh@nvidia.com> To: Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Marc Zyngier <marc.zyngier@arm.com>, Rob Herring <robh+dt@kernel.org>, "Pawel Moll" <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, "Stephen Warren" <swarren@wwwdotorg.org>, Thierry Reding <thierry.reding@gmail.com> Cc: Kevin Hilman <khilman@kernel.org>, Geert Uytterhoeven <geert@linux-m68k.org>, Grygorii Strashko <grygorii.strashko@ti.com>, Lars-Peter Clausen <lars@metafoo.de>, Linus Walleij <linus.walleij@linaro.org>, <linux-tegra@vger.kernel.org>, <linux-omap@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Jon Hunter <jonathanh@nvidia.com> Subject: [PATCH V3 00/17] Add support for Tegra210 AGIC Date: Wed, 4 May 2016 17:25:13 +0100 [thread overview] Message-ID: <1462379130-11742-1-git-send-email-jonathanh@nvidia.com> (raw) The Tegra210 has a 2nd level interrupt controller located in a separate power domain to the main GIC interrupt controller and hence requires runtime-pm support. Add a platform driver for the GICs that require runtime-pm and make the necessary changes to the genirq and irqdomain core to support IRQ chips that require runtime-pm. Please note that although as the subject states this adds support for the Tegra210 AGIC, in this current version there is really nothing specific in this series for Tegra. However, rather than changing the subject I opted to keep it the same so people recognise this is a continuation of that work. Changes since V2: - Corrected RPM support for irqchips in genirq core as pointed out by Kevin Hilman. - Corrected patch to save the irq type when mapping the interrupt. - Dropped changes to DT binding documentation and added patch to prevent early init of GICs if the 'clocks' and/or 'power-domains' DT properties are present (as we have discussed). - Moved platform driver code into it's own source file. - Separate changes for preparing for the platform driver into 3 patches in an attempt to make it more readable! - Added fix for checking an interrupt descriptor is valid during IRQ setup. Changes since V1: - Updated GIC to only WARN and not return an error if configuring a PPI fails but will still return an error if an SPI fails (per discussion with Marc). - Dropped change to mask sense bits for GIC-v3 (as this is not necessary) - Split patch to avoid setting interrupt type when mapping the IRQ into two patches per TGLX's feedback. - Changed name of irqchip device structure to "parent_device" - Moved call to irq_chip_pm_get() outside of chip_bus_lock(). - Dropped patch to remove clock names from GIC DT documentation and added AGIC clock names. - Update GIC platform driver to look-up clocks names from static list. Jon Hunter (17): irqchip/gic: Don't unnecessarily write the IRQ configuration irqchip/gic: WARN if setting the interrupt type for a PPI fails irqchip: Mask the non-type/sense bits when translating an IRQ irqdomain: Fix handling of type settings for existing mappings genirq: Look-up trigger type if not specified by caller irqdomain: Don't set type when mapping an IRQ genirq: Ensure IRQ descriptor is valid when setting-up the IRQ genirq: Add runtime power management support for IRQ chips irqchip/gic: Don't initialise chip if mapping IO space fails irqchip/gic: Remove static irq_chip definition for eoimode1 irqchip/gic: Return an error if GIC initialisation fails irqchip/gic: Pass GIC pointer to save/restore functions irqchip/gic: Don't allow early initialisation if GIC requires RPM irqchip/gic: Add helper function for configuring a GIC via device-tree irqchip/gic: Split GIC init in preparation for platform driver irqchip/gic: Prepare for adding platform driver irqchip/gic: Add platform driver for non-root GICs that require RPM drivers/irqchip/Kconfig | 6 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-crossbar.c | 2 +- drivers/irqchip/irq-gic-common.c | 19 ++- drivers/irqchip/irq-gic-pm.c | 241 ++++++++++++++++++++++++++++++++++ drivers/irqchip/irq-gic.c | 277 +++++++++++++++++++++++---------------- drivers/irqchip/irq-gic.h | 63 +++++++++ drivers/irqchip/irq-tegra.c | 2 +- include/linux/irq.h | 4 + include/linux/irqdomain.h | 3 + kernel/irq/chip.c | 35 +++++ kernel/irq/internals.h | 1 + kernel/irq/irqdomain.c | 58 ++++++-- kernel/irq/manage.c | 40 +++++- 14 files changed, 617 insertions(+), 135 deletions(-) create mode 100644 drivers/irqchip/irq-gic-pm.c create mode 100644 drivers/irqchip/irq-gic.h -- 2.1.4
next reply other threads:[~2016-05-04 16:25 UTC|newest] Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-04 16:25 Jon Hunter [this message] 2016-05-04 16:25 ` [PATCH V3 00/17] Add support for Tegra210 AGIC Jon Hunter 2016-05-04 16:25 ` [PATCH V3 01/17] irqchip/gic: Don't unnecessarily write the IRQ configuration Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 02/17] irqchip/gic: WARN if setting the interrupt type for a PPI fails Jon Hunter 2016-05-04 16:25 ` Jon Hunter [not found] ` <1462379130-11742-3-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-05-05 12:06 ` Marc Zyngier 2016-05-05 12:06 ` Marc Zyngier 2016-05-05 13:22 ` Jon Hunter 2016-05-05 13:22 ` Jon Hunter 2016-05-05 13:40 ` Marc Zyngier 2016-05-05 13:40 ` Marc Zyngier 2016-05-05 14:41 ` Jon Hunter 2016-05-05 14:41 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 04/17] irqdomain: Fix handling of type settings for existing mappings Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 05/17] genirq: Look-up trigger type if not specified by caller Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 06/17] irqdomain: Don't set type when mapping an IRQ Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-09 12:23 ` Marc Zyngier [not found] ` <5730813B.7060206-5wv7dgnIgG8@public.gmane.org> 2016-05-09 13:13 ` Jon Hunter 2016-05-09 13:13 ` Jon Hunter [not found] ` <57308D0D.4080800-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-05-09 15:10 ` Marc Zyngier 2016-05-09 15:10 ` Marc Zyngier [not found] ` <5730A867.9070504-5wv7dgnIgG8@public.gmane.org> 2016-05-09 15:44 ` Jon Hunter 2016-05-09 15:44 ` Jon Hunter [not found] ` <5730B078.8090908-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-05-10 12:20 ` Marc Zyngier 2016-05-10 12:20 ` Marc Zyngier 2016-05-04 16:25 ` [PATCH V3 07/17] genirq: Ensure IRQ descriptor is valid when setting-up the IRQ Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 08/17] genirq: Add runtime power management support for IRQ chips Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 09/17] irqchip/gic: Don't initialise chip if mapping IO space fails Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 10/17] irqchip/gic: Remove static irq_chip definition for eoimode1 Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 11/17] irqchip/gic: Return an error if GIC initialisation fails Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 12/17] irqchip/gic: Pass GIC pointer to save/restore functions Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 13/17] irqchip/gic: Don't allow early initialisation if GIC requires RPM Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 14/17] irqchip/gic: Add helper function for configuring a GIC via device-tree Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 15/17] irqchip/gic: Split GIC init in preparation for platform driver Jon Hunter 2016-05-04 16:25 ` Jon Hunter [not found] ` <1462379130-11742-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-05-04 16:25 ` [PATCH V3 03/17] irqchip: Mask the non-type/sense bits when translating an IRQ Jon Hunter 2016-05-04 16:25 ` Jon Hunter 2016-05-04 16:25 ` [PATCH V3 16/17] irqchip/gic: Prepare for adding platform driver Jon Hunter 2016-05-04 16:25 ` Jon Hunter [not found] ` <1462379130-11742-17-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-05-05 14:13 ` Marc Zyngier 2016-05-05 14:13 ` Marc Zyngier [not found] ` <572B54F4.2080103-5wv7dgnIgG8@public.gmane.org> 2016-05-06 14:09 ` Jon Hunter 2016-05-06 14:09 ` Jon Hunter [not found] ` <572CA5AF.7080504-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-05-06 14:27 ` Marc Zyngier 2016-05-06 14:27 ` Marc Zyngier 2016-05-04 16:25 ` [PATCH V3 17/17] irqchip/gic: Add platform driver for non-root GICs that require RPM Jon Hunter 2016-05-04 16:25 ` Jon Hunter
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1462379130-11742-1-git-send-email-jonathanh@nvidia.com \ --to=jonathanh-ddmlm1+adcrqt0dzr+alfa@public.gmane.org \ --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org \ --cc=geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org \ --cc=grygorii.strashko-l0cyMroinI0@public.gmane.org \ --cc=ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org \ --cc=jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org \ --cc=khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \ --cc=lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org \ --cc=linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org \ --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=marc.zyngier-5wv7dgnIgG8@public.gmane.org \ --cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \ --cc=pawel.moll-5wv7dgnIgG8@public.gmane.org \ --cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \ --cc=swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org \ --cc=tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org \ --cc=thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.