[PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[David Lechner]

v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate

David Lechner (5):
  ARM: davinci: da8xx: add usb phy clocks
  ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.
  ARM: davinci: da8xx: Add USB PHY platform declaration
  ARM: DTS: da850: Add cfgchip syscon node
  ARM: DTS: da850: Add usb phy node

 arch/arm/boot/dts/da850.dtsi                |   9 ++
 arch/arm/mach-davinci/board-da830-evm.c     |  52 +++----
 arch/arm/mach-davinci/board-da850-evm.c     |   4 +
 arch/arm/mach-davinci/board-mityomapl138.c  |   4 +
 arch/arm/mach-davinci/board-omapl138-hawk.c |  23 ++-
 arch/arm/mach-davinci/devices-da8xx.c       |  28 ++++
 arch/arm/mach-davinci/include/mach/da8xx.h  |   6 +
 arch/arm/mach-davinci/usb-da8xx.c           | 230 +++++++++++++++++++++++++++-
 8 files changed, 314 insertions(+), 42 deletions(-)

-- 
2.7.4

[PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[David Lechner]

v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate

David Lechner (5):
  ARM: davinci: da8xx: add usb phy clocks
  ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.
  ARM: davinci: da8xx: Add USB PHY platform declaration
  ARM: DTS: da850: Add cfgchip syscon node
  ARM: DTS: da850: Add usb phy node

 arch/arm/boot/dts/da850.dtsi                |   9 ++
 arch/arm/mach-davinci/board-da830-evm.c     |  52 +++----
 arch/arm/mach-davinci/board-da850-evm.c     |   4 +
 arch/arm/mach-davinci/board-mityomapl138.c  |   4 +
 arch/arm/mach-davinci/board-omapl138-hawk.c |  23 ++-
 arch/arm/mach-davinci/devices-da8xx.c       |  28 ++++
 arch/arm/mach-davinci/include/mach/da8xx.h  |   6 +
 arch/arm/mach-davinci/usb-da8xx.c           | 230 +++++++++++++++++++++++++++-
 8 files changed, 314 insertions(+), 42 deletions(-)

-- 
2.7.4

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[PATCH v5 1/5] ARM: davinci: da8xx: add usb phy clocks

[David Lechner]

Up to this point, the USB phy clock configuration was handled manually in
the board files and in the usb drivers. This adds proper clocks so that
the usb drivers can use clk_get and clk_enable and not have to worry about
the details. Also, the related code is removed from the board files and
replaced with the new clock registration functions.

Signed-off-by: David Lechner <david@lechnology.com>
---
 arch/arm/mach-davinci/board-da830-evm.c     |  22 ++-
 arch/arm/mach-davinci/board-omapl138-hawk.c |  16 +-
 arch/arm/mach-davinci/include/mach/da8xx.h  |   3 +
 arch/arm/mach-davinci/usb-da8xx.c           | 219 +++++++++++++++++++++++++++-
 4 files changed, 239 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 3d8cf8c..605d444 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -115,18 +115,6 @@ static __init void da830_evm_usb_init(void)
 	 */
 	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
 
-	/* USB2.0 PHY reference clock is 24 MHz */
-	cfgchip2 &= ~CFGCHIP2_REFFREQ;
-	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;
-
-	/*
-	 * Select internal reference clock for USB 2.0 PHY
-	 * and use it as a clock source for USB 1.1 PHY
-	 * (this is the default setting anyway).
-	 */
-	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
-	cfgchip2 |=  CFGCHIP2_USB2PHYCLKMUX;
-
 	/*
 	 * We have to override VBUS/ID signals when MUSB is configured into the
 	 * host-only mode -- ID pin will float if no cable is connected, so the
@@ -143,6 +131,16 @@ static __init void da830_evm_usb_init(void)
 	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
 
 	/* USB_REFCLKIN is not used. */
+	ret = da8xx_register_usb20_phy_clk(false);
+	if (ret)
+		pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
+			__func__, ret);
+
+	ret = da8xx_register_usb11_phy_clk(false);
+	if (ret)
+		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
+			__func__, ret);
+
 	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
 	if (ret)
 		pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index ee62486..d4930b6 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -243,7 +243,6 @@ static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id)
 static __init void omapl138_hawk_usb_init(void)
 {
 	int ret;
-	u32 cfgchip2;
 
 	ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);
 	if (ret) {
@@ -251,12 +250,15 @@ static __init void omapl138_hawk_usb_init(void)
 		return;
 	}
 
-	/* Setup the Ref. clock frequency for the HAWK at 24 MHz. */
-
-	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-	cfgchip2 &= ~CFGCHIP2_REFFREQ;
-	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;
-	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+	/* USB_REFCLKIN is not used. */
+	ret = da8xx_register_usb20_phy_clk(false);
+	if (ret)
+		pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
+			__func__, ret);
+	ret = da8xx_register_usb11_phy_clk(false);
+	if (ret)
+		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
+			__func__, ret);
 
 	ret = gpio_request_one(DA850_USB1_VBUS_PIN,
 			GPIOF_DIR_OUT, "USB1 VBUS");
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index f9f9713..c367530 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -88,6 +88,9 @@ int da850_register_edma(struct edma_rsv_info *rsv[2]);
 int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
 int da8xx_register_spi_bus(int instance, unsigned num_chipselect);
 int da8xx_register_watchdog(void);
+int da8xx_register_usb_refclkin(int rate);
+int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
+int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_emac(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index f141f51..c524d9e 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -1,20 +1,235 @@
 /*
  * DA8xx USB
  */
-#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/platform_data/usb-davinci.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/da8xx-cfgchip.h>
 #include <linux/usb/musb.h>
 
+#include <mach/clock.h>
 #include <mach/common.h>
 #include <mach/cputype.h>
 #include <mach/da8xx.h>
-#include <mach/irqs.h>
+
+#include "clock.h"
 
 #define DA8XX_USB0_BASE		0x01e00000
 #define DA8XX_USB1_BASE		0x01e25000
 
+static struct clk usb_refclkin = {
+	.name		= "usb_refclkin",
+	.set_rate	= davinci_simple_set_rate,
+};
+
+static struct clk_lookup usb_refclkin_lookup =
+	CLK(NULL, "usb_refclkin", &usb_refclkin);
+
+/**
+ * da8xx_register_usb_refclkin - register USB_REFCLKIN clock
+ *
+ * @rate: The clock rate in Hz
+ *
+ * This clock is only needed if the board provides an external USB_REFCLKIN
+ * signal, in which case it will be used as the parent of usb20_phy_clk and/or
+ * usb11_phy_clk.
+ */
+int __init da8xx_register_usb_refclkin(int rate)
+{
+	int ret;
+
+	usb_refclkin.rate = rate;
+	ret = clk_register(&usb_refclkin);
+	if (ret)
+		return ret;
+
+	clkdev_add(&usb_refclkin_lookup);
+
+	return 0;
+}
+
+static void usb20_phy_clk_enable(struct clk *clk)
+{
+	u32 val;
+	u32 timeout = 500000; /* 500 msec */
+
+	val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	/*
+	 * Turn on the USB 2.0 PHY, but just the PLL, and not OTG. The USB 1.1
+	 * host may use the PLL clock without USB 2.0 OTG being used.
+	 */
+	val &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN);
+	val |= CFGCHIP2_PHY_PLLON;
+
+	writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	while (--timeout) {
+		val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+		if (val & CFGCHIP2_PHYCLKGD)
+			return;
+		udelay(1);
+	}
+
+	pr_err("Timeout waiting for USB 2.0 PHY clock good.\n");
+}
+
+static void usb20_phy_clk_disable(struct clk *clk)
+{
+	u32 val;
+
+	val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+	val |= CFGCHIP2_PHYPWRDN;
+	writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+}
+
+static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	u32 val;
+
+	val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	/* Set the mux depending on the parent clock. */
+	if (parent == &usb_refclkin) {
+		val &= ~CFGCHIP2_USB2PHYCLKMUX;
+	} else if (strcmp(parent->name, "pll0_aux_clk") == 0) {
+		val |= CFGCHIP2_USB2PHYCLKMUX;
+	} else {
+		pr_err("Bad parent on USB 2.0 PHY clock.\n");
+		return -EINVAL;
+	}
+
+	/* reference frequency also comes from parent clock */
+	val &= ~CFGCHIP2_REFFREQ_MASK;
+	switch (clk_get_rate(parent)) {
+	case 12000000:
+		val |= CFGCHIP2_REFFREQ_12MHZ;
+		break;
+	case 13000000:
+		val |= CFGCHIP2_REFFREQ_13MHZ;
+		break;
+	case 19200000:
+		val |= CFGCHIP2_REFFREQ_19_2MHZ;
+		break;
+	case 20000000:
+		val |= CFGCHIP2_REFFREQ_20MHZ;
+		break;
+	case 24000000:
+		val |= CFGCHIP2_REFFREQ_24MHZ;
+		break;
+	case 26000000:
+		val |= CFGCHIP2_REFFREQ_26MHZ;
+		break;
+	case 38400000:
+		val |= CFGCHIP2_REFFREQ_38_4MHZ;
+		break;
+	case 40000000:
+		val |= CFGCHIP2_REFFREQ_40MHZ;
+		break;
+	case 48000000:
+		val |= CFGCHIP2_REFFREQ_48MHZ;
+		break;
+	default:
+		pr_err("Bad parent clock rate on USB 2.0 PHY clock.\n");
+		return -EINVAL;
+	}
+
+	writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	return 0;
+}
+
+static struct clk usb20_phy_clk = {
+	.name		= "usb20_phy",
+	.clk_enable	= usb20_phy_clk_enable,
+	.clk_disable	= usb20_phy_clk_disable,
+	.set_parent	= usb20_phy_clk_set_parent,
+};
+
+static struct clk_lookup usb20_phy_clk_lookup =
+	CLK(NULL, "usb20_phy", &usb20_phy_clk);
+
+/**
+ * da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock
+ *
+ * @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true
+ *	or "pll0_aux" if false.
+ */
+int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
+{
+	struct clk *parent;
+	int ret = 0;
+
+	parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux");
+	if (IS_ERR(parent))
+		return PTR_ERR(parent);
+
+	usb20_phy_clk.parent = parent;
+	ret = clk_register(&usb20_phy_clk);
+	if (!ret)
+		clkdev_add(&usb20_phy_clk_lookup);
+
+	clk_put(parent);
+
+	return ret;
+}
+
+static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	u32 val;
+
+	val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	/* Set the USB 1.1 PHY clock mux based on the parent clock. */
+	if (parent == &usb20_phy_clk) {
+		val &= ~CFGCHIP2_USB1PHYCLKMUX;
+	} else if (parent == &usb_refclkin) {
+		val |= CFGCHIP2_USB1PHYCLKMUX;
+	} else {
+		pr_err("Bad parent on USB 1.1 PHY clock.\n");
+		return -EINVAL;
+	}
+
+	writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	return 0;
+}
+
+static struct clk usb11_phy_clk = {
+	.name		= "usb11_phy",
+	.set_parent	= usb11_phy_clk_set_parent,
+};
+
+static struct clk_lookup usb11_phy_clk_lookup =
+	CLK(NULL, "usb11_phy", &usb11_phy_clk);
+
+/**
+ * da8xx_register_usb11_phy_clk - register USB1PHYCLKMUX clock
+ *
+ * @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true
+ *	or "usb20_phy" if false.
+ */
+int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
+{
+	struct clk *parent;
+	int ret = 0;
+
+	parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "usb20_phy");
+	if (IS_ERR(parent))
+		return PTR_ERR(parent);
+
+	usb11_phy_clk.parent = parent;
+	ret = clk_register(&usb11_phy_clk);
+	if (!ret)
+		clkdev_add(&usb11_phy_clk_lookup);
+
+	clk_put(parent);
+
+	return ret;
+}
+
 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
 
 static struct musb_hdrc_config musb_config = {
-- 
2.7.4

[PATCH v5 1/5] ARM: davinci: da8xx: add usb phy clocks

[David Lechner]

Up to this point, the USB phy clock configuration was handled manually in
the board files and in the usb drivers. This adds proper clocks so that
the usb drivers can use clk_get and clk_enable and not have to worry about
the details. Also, the related code is removed from the board files and
replaced with the new clock registration functions.

Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---
 arch/arm/mach-davinci/board-da830-evm.c     |  22 ++-
 arch/arm/mach-davinci/board-omapl138-hawk.c |  16 +-
 arch/arm/mach-davinci/include/mach/da8xx.h  |   3 +
 arch/arm/mach-davinci/usb-da8xx.c           | 219 +++++++++++++++++++++++++++-
 4 files changed, 239 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 3d8cf8c..605d444 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -115,18 +115,6 @@ static __init void da830_evm_usb_init(void)
 	 */
 	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
 
-	/* USB2.0 PHY reference clock is 24 MHz */
-	cfgchip2 &= ~CFGCHIP2_REFFREQ;
-	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;
-
-	/*
-	 * Select internal reference clock for USB 2.0 PHY
-	 * and use it as a clock source for USB 1.1 PHY
-	 * (this is the default setting anyway).
-	 */
-	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
-	cfgchip2 |=  CFGCHIP2_USB2PHYCLKMUX;
-
 	/*
 	 * We have to override VBUS/ID signals when MUSB is configured into the
 	 * host-only mode -- ID pin will float if no cable is connected, so the
@@ -143,6 +131,16 @@ static __init void da830_evm_usb_init(void)
 	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
 
 	/* USB_REFCLKIN is not used. */
+	ret = da8xx_register_usb20_phy_clk(false);
+	if (ret)
+		pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
+			__func__, ret);
+
+	ret = da8xx_register_usb11_phy_clk(false);
+	if (ret)
+		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
+			__func__, ret);
+
 	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
 	if (ret)
 		pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index ee62486..d4930b6 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -243,7 +243,6 @@ static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id)
 static __init void omapl138_hawk_usb_init(void)
 {
 	int ret;
-	u32 cfgchip2;
 
 	ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);
 	if (ret) {
@@ -251,12 +250,15 @@ static __init void omapl138_hawk_usb_init(void)
 		return;
 	}
 
-	/* Setup the Ref. clock frequency for the HAWK at 24 MHz. */
-
-	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-	cfgchip2 &= ~CFGCHIP2_REFFREQ;
-	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;
-	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+	/* USB_REFCLKIN is not used. */
+	ret = da8xx_register_usb20_phy_clk(false);
+	if (ret)
+		pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
+			__func__, ret);
+	ret = da8xx_register_usb11_phy_clk(false);
+	if (ret)
+		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
+			__func__, ret);
 
 	ret = gpio_request_one(DA850_USB1_VBUS_PIN,
 			GPIOF_DIR_OUT, "USB1 VBUS");
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index f9f9713..c367530 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -88,6 +88,9 @@ int da850_register_edma(struct edma_rsv_info *rsv[2]);
 int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
 int da8xx_register_spi_bus(int instance, unsigned num_chipselect);
 int da8xx_register_watchdog(void);
+int da8xx_register_usb_refclkin(int rate);
+int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
+int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_emac(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index f141f51..c524d9e 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -1,20 +1,235 @@
 /*
  * DA8xx USB
  */
-#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/platform_data/usb-davinci.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/da8xx-cfgchip.h>
 #include <linux/usb/musb.h>
 
+#include <mach/clock.h>
 #include <mach/common.h>
 #include <mach/cputype.h>
 #include <mach/da8xx.h>
-#include <mach/irqs.h>
+
+#include "clock.h"
 
 #define DA8XX_USB0_BASE		0x01e00000
 #define DA8XX_USB1_BASE		0x01e25000
 
+static struct clk usb_refclkin = {
+	.name		= "usb_refclkin",
+	.set_rate	= davinci_simple_set_rate,
+};
+
+static struct clk_lookup usb_refclkin_lookup =
+	CLK(NULL, "usb_refclkin", &usb_refclkin);
+
+/**
+ * da8xx_register_usb_refclkin - register USB_REFCLKIN clock
+ *
+ * @rate: The clock rate in Hz
+ *
+ * This clock is only needed if the board provides an external USB_REFCLKIN
+ * signal, in which case it will be used as the parent of usb20_phy_clk and/or
+ * usb11_phy_clk.
+ */
+int __init da8xx_register_usb_refclkin(int rate)
+{
+	int ret;
+
+	usb_refclkin.rate = rate;
+	ret = clk_register(&usb_refclkin);
+	if (ret)
+		return ret;
+
+	clkdev_add(&usb_refclkin_lookup);
+
+	return 0;
+}
+
+static void usb20_phy_clk_enable(struct clk *clk)
+{
+	u32 val;
+	u32 timeout = 500000; /* 500 msec */
+
+	val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	/*
+	 * Turn on the USB 2.0 PHY, but just the PLL, and not OTG. The USB 1.1
+	 * host may use the PLL clock without USB 2.0 OTG being used.
+	 */
+	val &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN);
+	val |= CFGCHIP2_PHY_PLLON;
+
+	writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	while (--timeout) {
+		val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+		if (val & CFGCHIP2_PHYCLKGD)
+			return;
+		udelay(1);
+	}
+
+	pr_err("Timeout waiting for USB 2.0 PHY clock good.\n");
+}
+
+static void usb20_phy_clk_disable(struct clk *clk)
+{
+	u32 val;
+
+	val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+	val |= CFGCHIP2_PHYPWRDN;
+	writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+}
+
+static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	u32 val;
+
+	val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	/* Set the mux depending on the parent clock. */
+	if (parent == &usb_refclkin) {
+		val &= ~CFGCHIP2_USB2PHYCLKMUX;
+	} else if (strcmp(parent->name, "pll0_aux_clk") == 0) {
+		val |= CFGCHIP2_USB2PHYCLKMUX;
+	} else {
+		pr_err("Bad parent on USB 2.0 PHY clock.\n");
+		return -EINVAL;
+	}
+
+	/* reference frequency also comes from parent clock */
+	val &= ~CFGCHIP2_REFFREQ_MASK;
+	switch (clk_get_rate(parent)) {
+	case 12000000:
+		val |= CFGCHIP2_REFFREQ_12MHZ;
+		break;
+	case 13000000:
+		val |= CFGCHIP2_REFFREQ_13MHZ;
+		break;
+	case 19200000:
+		val |= CFGCHIP2_REFFREQ_19_2MHZ;
+		break;
+	case 20000000:
+		val |= CFGCHIP2_REFFREQ_20MHZ;
+		break;
+	case 24000000:
+		val |= CFGCHIP2_REFFREQ_24MHZ;
+		break;
+	case 26000000:
+		val |= CFGCHIP2_REFFREQ_26MHZ;
+		break;
+	case 38400000:
+		val |= CFGCHIP2_REFFREQ_38_4MHZ;
+		break;
+	case 40000000:
+		val |= CFGCHIP2_REFFREQ_40MHZ;
+		break;
+	case 48000000:
+		val |= CFGCHIP2_REFFREQ_48MHZ;
+		break;
+	default:
+		pr_err("Bad parent clock rate on USB 2.0 PHY clock.\n");
+		return -EINVAL;
+	}
+
+	writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	return 0;
+}
+
+static struct clk usb20_phy_clk = {
+	.name		= "usb20_phy",
+	.clk_enable	= usb20_phy_clk_enable,
+	.clk_disable	= usb20_phy_clk_disable,
+	.set_parent	= usb20_phy_clk_set_parent,
+};
+
+static struct clk_lookup usb20_phy_clk_lookup =
+	CLK(NULL, "usb20_phy", &usb20_phy_clk);
+
+/**
+ * da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock
+ *
+ * @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true
+ *	or "pll0_aux" if false.
+ */
+int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
+{
+	struct clk *parent;
+	int ret = 0;
+
+	parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux");
+	if (IS_ERR(parent))
+		return PTR_ERR(parent);
+
+	usb20_phy_clk.parent = parent;
+	ret = clk_register(&usb20_phy_clk);
+	if (!ret)
+		clkdev_add(&usb20_phy_clk_lookup);
+
+	clk_put(parent);
+
+	return ret;
+}
+
+static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	u32 val;
+
+	val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	/* Set the USB 1.1 PHY clock mux based on the parent clock. */
+	if (parent == &usb20_phy_clk) {
+		val &= ~CFGCHIP2_USB1PHYCLKMUX;
+	} else if (parent == &usb_refclkin) {
+		val |= CFGCHIP2_USB1PHYCLKMUX;
+	} else {
+		pr_err("Bad parent on USB 1.1 PHY clock.\n");
+		return -EINVAL;
+	}
+
+	writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
+
+	return 0;
+}
+
+static struct clk usb11_phy_clk = {
+	.name		= "usb11_phy",
+	.set_parent	= usb11_phy_clk_set_parent,
+};
+
+static struct clk_lookup usb11_phy_clk_lookup =
+	CLK(NULL, "usb11_phy", &usb11_phy_clk);
+
+/**
+ * da8xx_register_usb11_phy_clk - register USB1PHYCLKMUX clock
+ *
+ * @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true
+ *	or "usb20_phy" if false.
+ */
+int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
+{
+	struct clk *parent;
+	int ret = 0;
+
+	parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "usb20_phy");
+	if (IS_ERR(parent))
+		return PTR_ERR(parent);
+
+	usb11_phy_clk.parent = parent;
+	ret = clk_register(&usb11_phy_clk);
+	if (!ret)
+		clkdev_add(&usb11_phy_clk_lookup);
+
+	clk_put(parent);
+
+	return ret;
+}
+
 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
 
 static struct musb_hdrc_config musb_config = {
-- 
2.7.4

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[PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[David Lechner]

The CFGCHIP registers are used by a number of devices, so using a syscon
device to share them. The first consumer of this will by the phy-da8xx-usb
driver.

Signed-off-by: David Lechner <david@lechnology.com>
---
 arch/arm/mach-davinci/board-da830-evm.c     |  4 ++++
 arch/arm/mach-davinci/board-da850-evm.c     |  4 ++++
 arch/arm/mach-davinci/board-mityomapl138.c  |  4 ++++
 arch/arm/mach-davinci/board-omapl138-hawk.c |  4 ++++
 arch/arm/mach-davinci/devices-da8xx.c       | 28 ++++++++++++++++++++++++++++
 arch/arm/mach-davinci/include/mach/da8xx.h  |  2 ++
 6 files changed, 46 insertions(+)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 605d444..3051cb6 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -586,6 +586,10 @@ static __init void da830_evm_init(void)
 	struct davinci_soc_info *soc_info = &davinci_soc_info;
 	int ret;
 
+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
 	ret = da830_register_gpio();
 	if (ret)
 		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 8e4539f..ec5cb10 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1345,6 +1345,10 @@ static __init void da850_evm_init(void)
 {
 	int ret;
 
+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
 	ret = da850_register_gpio();
 	if (ret)
 		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index bc4e63f..1a6d430 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -514,6 +514,10 @@ static void __init mityomapl138_init(void)
 {
 	int ret;
 
+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
 	/* for now, no special EDMA channels are reserved */
 	ret = da850_register_edma(NULL);
 	if (ret)
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index d4930b6..8691a25 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -294,6 +294,10 @@ static __init void omapl138_hawk_init(void)
 {
 	int ret;
 
+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
 	ret = da850_register_gpio();
 	if (ret)
 		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 725e693..69d11a1 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -11,6 +11,7 @@
  * (at your option) any later version.
  */
 #include <linux/init.h>
+#include <linux/platform_data/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/dma-contiguous.h>
 #include <linux/serial_8250.h>
@@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long refclkpn)
 	return platform_device_register(&da850_sata_device);
 }
 #endif
+
+static struct syscon_platform_data da8xx_cfgchip_platform_data = {
+	.label	= "cfgchip",
+};
+
+static struct resource da8xx_cfgchip_resources[] = {
+	{
+		.start	= DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
+		.end	= DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device da8xx_cfgchip_device = {
+	.name	= "syscon",
+	.id	= 0,
+	.dev	= {
+		.platform_data	= &da8xx_cfgchip_platform_data,
+	},
+	.num_resources	= ARRAY_SIZE(da8xx_cfgchip_resources),
+	.resource	= da8xx_cfgchip_resources,
+};
+
+int __init da8xx_register_cfgchip(void)
+{
+	return platform_device_register(&da8xx_cfgchip_device);
+}
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index c367530..c32444b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -61,6 +61,7 @@ extern unsigned int da850_max_speed;
 #define DA8XX_CFGCHIP1_REG	0x180
 #define DA8XX_CFGCHIP2_REG	0x184
 #define DA8XX_CFGCHIP3_REG	0x188
+#define DA8XX_CFGCHIP4_REG	0x18c
 
 #define DA8XX_SYSCFG1_BASE	(IO_PHYS + 0x22C000)
 #define DA8XX_SYSCFG1_VIRT(x)	(da8xx_syscfg1_base + (x))
@@ -116,6 +117,7 @@ void da8xx_rproc_reserve_cma(void);
 int da8xx_register_rproc(void);
 int da850_register_gpio(void);
 int da830_register_gpio(void);
+int da8xx_register_cfgchip(void);
 
 extern struct platform_device da8xx_serial_device[];
 extern struct emac_platform_data da8xx_emac_pdata;
-- 
2.7.4

[PATCH v5 3/5] ARM: davinci: da8xx: Add USB PHY platform declaration

[David Lechner]

There is now a proper phy driver for the DA8xx SoC USB PHY. This adds the
platform device declarations needed to use it.

Signed-off-by: David Lechner <david@lechnology.com>
---
 arch/arm/mach-davinci/board-da830-evm.c     | 28 +++++-----------------------
 arch/arm/mach-davinci/board-omapl138-hawk.c |  5 +++++
 arch/arm/mach-davinci/include/mach/da8xx.h  |  1 +
 arch/arm/mach-davinci/usb-da8xx.c           | 11 +++++++++++
 4 files changed, 22 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 3051cb6..c62766e 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -26,7 +26,6 @@
 #include <linux/platform_data/mtd-davinci.h>
 #include <linux/platform_data/mtd-davinci-aemif.h>
 #include <linux/platform_data/spi-davinci.h>
-#include <linux/platform_data/usb-davinci.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -106,30 +105,8 @@ static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
 
 static __init void da830_evm_usb_init(void)
 {
-	u32 cfgchip2;
 	int ret;
 
-	/*
-	 * Set up USB clock/mode in the CFGCHIP2 register.
-	 * FYI:  CFGCHIP2 is 0x0000ef00 initially.
-	 */
-	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
-	/*
-	 * We have to override VBUS/ID signals when MUSB is configured into the
-	 * host-only mode -- ID pin will float if no cable is connected, so the
-	 * controller won't be able to drive VBUS thinking that it's a B-device.
-	 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
-	 */
-	cfgchip2 &= ~CFGCHIP2_OTGMODE;
-#ifdef	CONFIG_USB_MUSB_HOST
-	cfgchip2 |=  CFGCHIP2_FORCE_HOST;
-#else
-	cfgchip2 |=  CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
-#endif
-
-	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
 	/* USB_REFCLKIN is not used. */
 	ret = da8xx_register_usb20_phy_clk(false);
 	if (ret)
@@ -141,6 +118,11 @@ static __init void da830_evm_usb_init(void)
 		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
 			__func__, ret);
 
+	ret = da8xx_register_usb_phy();
+	if (ret)
+		pr_warn("%s: USB PHY registration failed: %d\n",
+			__func__, ret);
+
 	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
 	if (ret)
 		pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 8691a25..c5cb8d9 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -260,6 +260,11 @@ static __init void omapl138_hawk_usb_init(void)
 		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
 			__func__, ret);
 
+	ret = da8xx_register_usb_phy();
+	if (ret)
+		pr_warn("%s: USB PHY registration failed: %d\n",
+			__func__, ret);
+
 	ret = gpio_request_one(DA850_USB1_VBUS_PIN,
 			GPIOF_DIR_OUT, "USB1 VBUS");
 	if (ret < 0) {
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index c32444b..38d932e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -92,6 +92,7 @@ int da8xx_register_watchdog(void);
 int da8xx_register_usb_refclkin(int rate);
 int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
 int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
+int da8xx_register_usb_phy(void);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_emac(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index c524d9e..9e41a7f 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -7,6 +7,7 @@
 #include <linux/platform_data/usb-davinci.h>
 #include <linux/platform_device.h>
 #include <linux/mfd/da8xx-cfgchip.h>
+#include <linux/phy/phy.h>
 #include <linux/usb/musb.h>
 
 #include <mach/clock.h>
@@ -230,6 +231,16 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
 	return ret;
 }
 
+static struct platform_device da8xx_usb_phy = {
+	.name		= "da8xx-usb-phy",
+	.id		= 0,
+};
+
+int __init da8xx_register_usb_phy(void)
+{
+	return platform_device_register(&da8xx_usb_phy);
+}
+
 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
 
 static struct musb_hdrc_config musb_config = {
-- 
2.7.4

[PATCH v5 3/5] ARM: davinci: da8xx: Add USB PHY platform declaration

[David Lechner]

There is now a proper phy driver for the DA8xx SoC USB PHY. This adds the
platform device declarations needed to use it.

Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---
 arch/arm/mach-davinci/board-da830-evm.c     | 28 +++++-----------------------
 arch/arm/mach-davinci/board-omapl138-hawk.c |  5 +++++
 arch/arm/mach-davinci/include/mach/da8xx.h  |  1 +
 arch/arm/mach-davinci/usb-da8xx.c           | 11 +++++++++++
 4 files changed, 22 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 3051cb6..c62766e 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -26,7 +26,6 @@
 #include <linux/platform_data/mtd-davinci.h>
 #include <linux/platform_data/mtd-davinci-aemif.h>
 #include <linux/platform_data/spi-davinci.h>
-#include <linux/platform_data/usb-davinci.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -106,30 +105,8 @@ static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
 
 static __init void da830_evm_usb_init(void)
 {
-	u32 cfgchip2;
 	int ret;
 
-	/*
-	 * Set up USB clock/mode in the CFGCHIP2 register.
-	 * FYI:  CFGCHIP2 is 0x0000ef00 initially.
-	 */
-	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
-	/*
-	 * We have to override VBUS/ID signals when MUSB is configured into the
-	 * host-only mode -- ID pin will float if no cable is connected, so the
-	 * controller won't be able to drive VBUS thinking that it's a B-device.
-	 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
-	 */
-	cfgchip2 &= ~CFGCHIP2_OTGMODE;
-#ifdef	CONFIG_USB_MUSB_HOST
-	cfgchip2 |=  CFGCHIP2_FORCE_HOST;
-#else
-	cfgchip2 |=  CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
-#endif
-
-	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
 	/* USB_REFCLKIN is not used. */
 	ret = da8xx_register_usb20_phy_clk(false);
 	if (ret)
@@ -141,6 +118,11 @@ static __init void da830_evm_usb_init(void)
 		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
 			__func__, ret);
 
+	ret = da8xx_register_usb_phy();
+	if (ret)
+		pr_warn("%s: USB PHY registration failed: %d\n",
+			__func__, ret);
+
 	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
 	if (ret)
 		pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 8691a25..c5cb8d9 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -260,6 +260,11 @@ static __init void omapl138_hawk_usb_init(void)
 		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
 			__func__, ret);
 
+	ret = da8xx_register_usb_phy();
+	if (ret)
+		pr_warn("%s: USB PHY registration failed: %d\n",
+			__func__, ret);
+
 	ret = gpio_request_one(DA850_USB1_VBUS_PIN,
 			GPIOF_DIR_OUT, "USB1 VBUS");
 	if (ret < 0) {
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index c32444b..38d932e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -92,6 +92,7 @@ int da8xx_register_watchdog(void);
 int da8xx_register_usb_refclkin(int rate);
 int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
 int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
+int da8xx_register_usb_phy(void);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_emac(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index c524d9e..9e41a7f 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -7,6 +7,7 @@
 #include <linux/platform_data/usb-davinci.h>
 #include <linux/platform_device.h>
 #include <linux/mfd/da8xx-cfgchip.h>
+#include <linux/phy/phy.h>
 #include <linux/usb/musb.h>
 
 #include <mach/clock.h>
@@ -230,6 +231,16 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
 	return ret;
 }
 
+static struct platform_device da8xx_usb_phy = {
+	.name		= "da8xx-usb-phy",
+	.id		= 0,
+};
+
+int __init da8xx_register_usb_phy(void)
+{
+	return platform_device_register(&da8xx_usb_phy);
+}
+
 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
 
 static struct musb_hdrc_config musb_config = {
-- 
2.7.4

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[PATCH v5 4/5] ARM: DTS: da850: Add cfgchip syscon node

[David Lechner]

Add a syscon node for the SoC CFGCHIPn registers. This is needed for
the new usb phy driver.

Signed-off-by: David Lechner <david@lechnology.com>
---
 arch/arm/boot/dts/da850.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index cf1aad8..9546ace 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -168,6 +168,10 @@
 			};
 
 		};
+		cfgchip: cfgchip@1417c {
+			compatible = "ti,da830-cfgchip", "syscon";
+			reg = <0x1417c 0x14>;
+		};
 		edma0: edma@0 {
 			compatible = "ti,edma3-tpcc";
 			/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
-- 
2.7.4

[PATCH v5 4/5] ARM: DTS: da850: Add cfgchip syscon node

[David Lechner]

Add a syscon node for the SoC CFGCHIPn registers. This is needed for
the new usb phy driver.

Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---
 arch/arm/boot/dts/da850.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index cf1aad8..9546ace 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -168,6 +168,10 @@
 			};
 
 		};
+		cfgchip: cfgchip@1417c {
+			compatible = "ti,da830-cfgchip", "syscon";
+			reg = <0x1417c 0x14>;
+		};
 		edma0: edma@0 {
 			compatible = "ti,edma3-tpcc";
 			/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
-- 
2.7.4

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[PATCH v5 5/5] ARM: DTS: da850: Add usb phy node

[David Lechner]

Add a node for the new usb phy driver.

Signed-off-by: David Lechner <david@lechnology.com>
---
 arch/arm/boot/dts/da850.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 9546ace..b2ebbe5 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -351,6 +351,11 @@
 					>;
 			status = "disabled";
 		};
+		usb_phy: usb-phy {
+			compatible = "ti,da830-usb-phy";
+			#phy-cells = <1>;
+			status = "disabled";
+		};
 		gpio: gpio@226000 {
 			compatible = "ti,dm6441-gpio";
 			gpio-controller;
-- 
2.7.4

[PATCH v5 5/5] ARM: DTS: da850: Add usb phy node

[David Lechner]

Add a node for the new usb phy driver.

Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---
 arch/arm/boot/dts/da850.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 9546ace..b2ebbe5 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -351,6 +351,11 @@
 					>;
 			status = "disabled";
 		};
+		usb_phy: usb-phy {
+			compatible = "ti,da830-usb-phy";
+			#phy-cells = <1>;
+			status = "disabled";
+		};
 		gpio: gpio@226000 {
 			compatible = "ti,dm6441-gpio";
 			gpio-controller;
-- 
2.7.4

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Re: [PATCH v5 3/5] ARM: davinci: da8xx: Add USB PHY platform declaration

[Sergei Shtylyov]

Hello.

On 5/10/2016 2:46 AM, David Lechner wrote:

> There is now a proper phy driver for the DA8xx SoC USB PHY. This adds the
> platform device declarations needed to use it.
>
> Signed-off-by: David Lechner <david@lechnology.com>

[...]
> diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
> index c32444b..38d932e 100644
> --- a/arch/arm/mach-davinci/include/mach/da8xx.h
> +++ b/arch/arm/mach-davinci/include/mach/da8xx.h
[...]
> @@ -230,6 +231,16 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
>  	return ret;
>  }
>
> +static struct platform_device da8xx_usb_phy = {
> +	.name		= "da8xx-usb-phy",
> +	.id		= 0,

    I'd have used -1 here, as this PHY device is singular.

[...]

MBR, Sergei

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[Sergei Shtylyov]

On 5/10/2016 2:46 AM, David Lechner wrote:

> The CFGCHIP registers are used by a number of devices, so using a syscon
> device to share them. The first consumer of this will by the phy-da8xx-usb
> driver.
>
> Signed-off-by: David Lechner <david@lechnology.com>
[...]
> diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
> index 725e693..69d11a1 100644
> --- a/arch/arm/mach-davinci/devices-da8xx.c
> +++ b/arch/arm/mach-davinci/devices-da8xx.c
> @@ -11,6 +11,7 @@
>   * (at your option) any later version.
>   */
>  #include <linux/init.h>
> +#include <linux/platform_data/syscon.h>
>  #include <linux/platform_device.h>
>  #include <linux/dma-contiguous.h>
>  #include <linux/serial_8250.h>
> @@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long refclkpn)
>  	return platform_device_register(&da850_sata_device);
>  }
>  #endif
> +
> +static struct syscon_platform_data da8xx_cfgchip_platform_data = {
> +	.label	= "cfgchip",
> +};
> +
> +static struct resource da8xx_cfgchip_resources[] = {
> +	{
> +		.start	= DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
> +		.end	= DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
> +		.flags	= IORESOURCE_MEM,
> +	},
> +};
> +
> +static struct platform_device da8xx_cfgchip_device = {
> +	.name	= "syscon",
> +	.id	= 0,

    Again, -1.

[...]

MBR, Sergei

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[David Lechner]

On 05/10/2016 06:26 AM, Sergei Shtylyov wrote:
> On 5/10/2016 2:46 AM, David Lechner wrote:
>
>> The CFGCHIP registers are used by a number of devices, so using a syscon
>> device to share them. The first consumer of this will by the
>> phy-da8xx-usb
>> driver.
>>
>> Signed-off-by: David Lechner <david@lechnology.com>
> [...]
>> diff --git a/arch/arm/mach-davinci/devices-da8xx.c
>> b/arch/arm/mach-davinci/devices-da8xx.c
>> index 725e693..69d11a1 100644
>> --- a/arch/arm/mach-davinci/devices-da8xx.c
>> +++ b/arch/arm/mach-davinci/devices-da8xx.c
>> @@ -11,6 +11,7 @@
>>   * (at your option) any later version.
>>   */
>>  #include <linux/init.h>
>> +#include <linux/platform_data/syscon.h>
>>  #include <linux/platform_device.h>
>>  #include <linux/dma-contiguous.h>
>>  #include <linux/serial_8250.h>
>> @@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long
>> refclkpn)
>>      return platform_device_register(&da850_sata_device);
>>  }
>>  #endif
>> +
>> +static struct syscon_platform_data da8xx_cfgchip_platform_data = {
>> +    .label    = "cfgchip",
>> +};
>> +
>> +static struct resource da8xx_cfgchip_resources[] = {
>> +    {
>> +        .start    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
>> +        .end    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
>> +        .flags    = IORESOURCE_MEM,
>> +    },
>> +};
>> +
>> +static struct platform_device da8xx_cfgchip_device = {
>> +    .name    = "syscon",
>> +    .id    = 0,
>
>     Again, -1.
>
> [...]
>
> MBR, Sergei
>

I wish you would have noticed this when I first submitted it. I remember 
going back and forth about this. But it has been too long and I can't 
remember the reason why I chose to go this way.

It seems like changing it broke something with either this one or the 
phy device and I opted to keep it this way on both to be consistent. For 
example, the USB devices both use id = 0 as well even though there are 
only one of each type.

Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[David Lechner]

On 05/09/2016 06:46 PM, David Lechner wrote:
> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
>
> David Lechner (5):
>    ARM: davinci: da8xx: add usb phy clocks
>    ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.
>    ARM: davinci: da8xx: Add USB PHY platform declaration
>    ARM: DTS: da850: Add cfgchip syscon node
>    ARM: DTS: da850: Add usb phy node
>
>   arch/arm/boot/dts/da850.dtsi                |   9 ++
>   arch/arm/mach-davinci/board-da830-evm.c     |  52 +++----
>   arch/arm/mach-davinci/board-da850-evm.c     |   4 +
>   arch/arm/mach-davinci/board-mityomapl138.c  |   4 +
>   arch/arm/mach-davinci/board-omapl138-hawk.c |  23 ++-
>   arch/arm/mach-davinci/devices-da8xx.c       |  28 ++++
>   arch/arm/mach-davinci/include/mach/da8xx.h  |   6 +
>   arch/arm/mach-davinci/usb-da8xx.c           | 230 +++++++++++++++++++++++++++-
>   8 files changed, 314 insertions(+), 42 deletions(-)
>

What should I be doing to keep this moving along?

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[Sekhar Nori]

On Tuesday 10 May 2016 10:14 PM, David Lechner wrote:
> On 05/10/2016 06:26 AM, Sergei Shtylyov wrote:
>> On 5/10/2016 2:46 AM, David Lechner wrote:
>>
>>> The CFGCHIP registers are used by a number of devices, so using a syscon
>>> device to share them. The first consumer of this will by the
>>> phy-da8xx-usb
>>> driver.
>>>
>>> Signed-off-by: David Lechner <david@lechnology.com>
>> [...]
>>> diff --git a/arch/arm/mach-davinci/devices-da8xx.c
>>> b/arch/arm/mach-davinci/devices-da8xx.c
>>> index 725e693..69d11a1 100644
>>> --- a/arch/arm/mach-davinci/devices-da8xx.c
>>> +++ b/arch/arm/mach-davinci/devices-da8xx.c
>>> @@ -11,6 +11,7 @@
>>>   * (at your option) any later version.
>>>   */
>>>  #include <linux/init.h>
>>> +#include <linux/platform_data/syscon.h>
>>>  #include <linux/platform_device.h>
>>>  #include <linux/dma-contiguous.h>
>>>  #include <linux/serial_8250.h>
>>> @@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long
>>> refclkpn)
>>>      return platform_device_register(&da850_sata_device);
>>>  }
>>>  #endif
>>> +
>>> +static struct syscon_platform_data da8xx_cfgchip_platform_data = {
>>> +    .label    = "cfgchip",
>>> +};
>>> +
>>> +static struct resource da8xx_cfgchip_resources[] = {
>>> +    {
>>> +        .start    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
>>> +        .end    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
>>> +        .flags    = IORESOURCE_MEM,
>>> +    },
>>> +};
>>> +
>>> +static struct platform_device da8xx_cfgchip_device = {
>>> +    .name    = "syscon",
>>> +    .id    = 0,
>>
>>     Again, -1.
>>
>> [...]
>>
>> MBR, Sergei
>>
> 
> I wish you would have noticed this when I first submitted it. I remember
> going back and forth about this. But it has been too long and I can't
> remember the reason why I chose to go this way.
> 
> It seems like changing it broke something with either this one or the
> phy device and I opted to keep it this way on both to be consistent. For
> example, the USB devices both use id = 0 as well even though there are
> only one of each type.

Agree with Sergei here. Can you confirm what broke exactly? I think the
USB needs to be fixed too.

Thanks,
Sekhar

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[Sekhar Nori]

On Tuesday 10 May 2016 10:14 PM, David Lechner wrote:
> On 05/10/2016 06:26 AM, Sergei Shtylyov wrote:
>> On 5/10/2016 2:46 AM, David Lechner wrote:
>>
>>> The CFGCHIP registers are used by a number of devices, so using a syscon
>>> device to share them. The first consumer of this will by the
>>> phy-da8xx-usb
>>> driver.
>>>
>>> Signed-off-by: David Lechner <david@lechnology.com>
>> [...]
>>> diff --git a/arch/arm/mach-davinci/devices-da8xx.c
>>> b/arch/arm/mach-davinci/devices-da8xx.c
>>> index 725e693..69d11a1 100644
>>> --- a/arch/arm/mach-davinci/devices-da8xx.c
>>> +++ b/arch/arm/mach-davinci/devices-da8xx.c
>>> @@ -11,6 +11,7 @@
>>>   * (at your option) any later version.
>>>   */
>>>  #include <linux/init.h>
>>> +#include <linux/platform_data/syscon.h>
>>>  #include <linux/platform_device.h>
>>>  #include <linux/dma-contiguous.h>
>>>  #include <linux/serial_8250.h>
>>> @@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long
>>> refclkpn)
>>>      return platform_device_register(&da850_sata_device);
>>>  }
>>>  #endif
>>> +
>>> +static struct syscon_platform_data da8xx_cfgchip_platform_data = {
>>> +    .label    = "cfgchip",
>>> +};
>>> +
>>> +static struct resource da8xx_cfgchip_resources[] = {
>>> +    {
>>> +        .start    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
>>> +        .end    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
>>> +        .flags    = IORESOURCE_MEM,
>>> +    },
>>> +};
>>> +
>>> +static struct platform_device da8xx_cfgchip_device = {
>>> +    .name    = "syscon",
>>> +    .id    = 0,
>>
>>     Again, -1.
>>
>> [...]
>>
>> MBR, Sergei
>>
> 
> I wish you would have noticed this when I first submitted it. I remember
> going back and forth about this. But it has been too long and I can't
> remember the reason why I chose to go this way.
> 
> It seems like changing it broke something with either this one or the
> phy device and I opted to keep it this way on both to be consistent. For
> example, the USB devices both use id = 0 as well even though there are
> only one of each type.

Agree with Sergei here. Can you confirm what broke exactly? I think the
USB needs to be fixed too.

Thanks,
Sekhar

Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[Sekhar Nori]

On Monday 23 May 2016 08:44 PM, David Lechner wrote:
> On 05/09/2016 06:46 PM, David Lechner wrote:
>> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
>>
>> David Lechner (5):
>>    ARM: davinci: da8xx: add usb phy clocks
>>    ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.
>>    ARM: davinci: da8xx: Add USB PHY platform declaration
>>    ARM: DTS: da850: Add cfgchip syscon node
>>    ARM: DTS: da850: Add usb phy node
>>
>>   arch/arm/boot/dts/da850.dtsi                |   9 ++
>>   arch/arm/mach-davinci/board-da830-evm.c     |  52 +++----
>>   arch/arm/mach-davinci/board-da850-evm.c     |   4 +
>>   arch/arm/mach-davinci/board-mityomapl138.c  |   4 +
>>   arch/arm/mach-davinci/board-omapl138-hawk.c |  23 ++-
>>   arch/arm/mach-davinci/devices-da8xx.c       |  28 ++++
>>   arch/arm/mach-davinci/include/mach/da8xx.h  |   6 +
>>   arch/arm/mach-davinci/usb-da8xx.c           | 230
>> +++++++++++++++++++++++++++-
>>   8 files changed, 314 insertions(+), 42 deletions(-)
>>
> 
> What should I be doing to keep this moving along?

We need the related driver changes to be applied first. I could then use
an immutable branch to push the platform changes against.

I did take a look at the patches and they look good to me. Except the
one comment from Sergei which I just now indicated that I agree with.

Thanks,
Sekhar

Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[Sekhar Nori]

On Monday 23 May 2016 08:44 PM, David Lechner wrote:
> On 05/09/2016 06:46 PM, David Lechner wrote:
>> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
>>
>> David Lechner (5):
>>    ARM: davinci: da8xx: add usb phy clocks
>>    ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.
>>    ARM: davinci: da8xx: Add USB PHY platform declaration
>>    ARM: DTS: da850: Add cfgchip syscon node
>>    ARM: DTS: da850: Add usb phy node
>>
>>   arch/arm/boot/dts/da850.dtsi                |   9 ++
>>   arch/arm/mach-davinci/board-da830-evm.c     |  52 +++----
>>   arch/arm/mach-davinci/board-da850-evm.c     |   4 +
>>   arch/arm/mach-davinci/board-mityomapl138.c  |   4 +
>>   arch/arm/mach-davinci/board-omapl138-hawk.c |  23 ++-
>>   arch/arm/mach-davinci/devices-da8xx.c       |  28 ++++
>>   arch/arm/mach-davinci/include/mach/da8xx.h  |   6 +
>>   arch/arm/mach-davinci/usb-da8xx.c           | 230
>> +++++++++++++++++++++++++++-
>>   8 files changed, 314 insertions(+), 42 deletions(-)
>>
> 
> What should I be doing to keep this moving along?

We need the related driver changes to be applied first. I could then use
an immutable branch to push the platform changes against.

I did take a look at the patches and they look good to me. Except the
one comment from Sergei which I just now indicated that I agree with.

Thanks,
Sekhar

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[David Lechner]

 From b0ae5eeba849b49f82980218a374c6d3f06487b8 Mon Sep 17 00:00:00 2001
From: David Lechner <david@lechnology.com>
Date: Thu, 24 Mar 2016 01:38:54 -0500
Subject: [PATCH] ARM: davinci: da8xx: Add CFGCHIP syscon platform 
declaration.

The CFGCHIP registers are used by a number of devices, so using a syscon
device to share them. The first consumer of this will by the phy-da8xx-usb
driver.

Signed-off-by: David Lechner <david@lechnology.com>
---

the id of syscon is changed from 0 to -1.

  arch/arm/mach-davinci/board-da830-evm.c     |  4 ++++
  arch/arm/mach-davinci/board-da850-evm.c     |  4 ++++
  arch/arm/mach-davinci/board-mityomapl138.c  |  4 ++++
  arch/arm/mach-davinci/board-omapl138-hawk.c |  4 ++++
  arch/arm/mach-davinci/devices-da8xx.c       | 28 
++++++++++++++++++++++++++++
  arch/arm/mach-davinci/include/mach/da8xx.h  |  2 ++
  6 files changed, 46 insertions(+)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 605d444..3051cb6 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -586,6 +586,10 @@ static __init void da830_evm_init(void)
  	struct davinci_soc_info *soc_info = &davinci_soc_info;
  	int ret;

+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
  	ret = da830_register_gpio();
  	if (ret)
  		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index 8e4539f..ec5cb10 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1345,6 +1345,10 @@ static __init void da850_evm_init(void)
  {
  	int ret;

+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
  	ret = da850_register_gpio();
  	if (ret)
  		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c 
b/arch/arm/mach-davinci/board-mityomapl138.c
index bc4e63f..1a6d430 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -514,6 +514,10 @@ static void __init mityomapl138_init(void)
  {
  	int ret;

+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
  	/* for now, no special EDMA channels are reserved */
  	ret = da850_register_edma(NULL);
  	if (ret)
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index d4930b6..8691a25 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -294,6 +294,10 @@ static __init void omapl138_hawk_init(void)
  {
  	int ret;

+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
  	ret = da850_register_gpio();
  	if (ret)
  		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 725e693..bf5f145 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -11,6 +11,7 @@
   * (at your option) any later version.
   */
  #include <linux/init.h>
+#include <linux/platform_data/syscon.h>
  #include <linux/platform_device.h>
  #include <linux/dma-contiguous.h>
  #include <linux/serial_8250.h>
@@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long 
refclkpn)
  	return platform_device_register(&da850_sata_device);
  }
  #endif
+
+static struct syscon_platform_data da8xx_cfgchip_platform_data = {
+	.label	= "cfgchip",
+};
+
+static struct resource da8xx_cfgchip_resources[] = {
+	{
+		.start	= DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
+		.end	= DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device da8xx_cfgchip_device = {
+	.name	= "syscon",
+	.id	= -1,
+	.dev	= {
+		.platform_data	= &da8xx_cfgchip_platform_data,
+	},
+	.num_resources	= ARRAY_SIZE(da8xx_cfgchip_resources),
+	.resource	= da8xx_cfgchip_resources,
+};
+
+int __init da8xx_register_cfgchip(void)
+{
+	return platform_device_register(&da8xx_cfgchip_device);
+}
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index c367530..c32444b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -61,6 +61,7 @@ extern unsigned int da850_max_speed;
  #define DA8XX_CFGCHIP1_REG	0x180
  #define DA8XX_CFGCHIP2_REG	0x184
  #define DA8XX_CFGCHIP3_REG	0x188
+#define DA8XX_CFGCHIP4_REG	0x18c

  #define DA8XX_SYSCFG1_BASE	(IO_PHYS + 0x22C000)
  #define DA8XX_SYSCFG1_VIRT(x)	(da8xx_syscfg1_base + (x))
@@ -116,6 +117,7 @@ void da8xx_rproc_reserve_cma(void);
  int da8xx_register_rproc(void);
  int da850_register_gpio(void);
  int da830_register_gpio(void);
+int da8xx_register_cfgchip(void);

  extern struct platform_device da8xx_serial_device[];
  extern struct emac_platform_data da8xx_emac_pdata;
-- 
2.7.4

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[David Lechner]

 From b0ae5eeba849b49f82980218a374c6d3f06487b8 Mon Sep 17 00:00:00 2001
From: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
Date: Thu, 24 Mar 2016 01:38:54 -0500
Subject: [PATCH] ARM: davinci: da8xx: Add CFGCHIP syscon platform 
declaration.

The CFGCHIP registers are used by a number of devices, so using a syscon
device to share them. The first consumer of this will by the phy-da8xx-usb
driver.

Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---

the id of syscon is changed from 0 to -1.

  arch/arm/mach-davinci/board-da830-evm.c     |  4 ++++
  arch/arm/mach-davinci/board-da850-evm.c     |  4 ++++
  arch/arm/mach-davinci/board-mityomapl138.c  |  4 ++++
  arch/arm/mach-davinci/board-omapl138-hawk.c |  4 ++++
  arch/arm/mach-davinci/devices-da8xx.c       | 28 
++++++++++++++++++++++++++++
  arch/arm/mach-davinci/include/mach/da8xx.h  |  2 ++
  6 files changed, 46 insertions(+)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 605d444..3051cb6 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -586,6 +586,10 @@ static __init void da830_evm_init(void)
  	struct davinci_soc_info *soc_info = &davinci_soc_info;
  	int ret;

+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
  	ret = da830_register_gpio();
  	if (ret)
  		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index 8e4539f..ec5cb10 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1345,6 +1345,10 @@ static __init void da850_evm_init(void)
  {
  	int ret;

+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
  	ret = da850_register_gpio();
  	if (ret)
  		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c 
b/arch/arm/mach-davinci/board-mityomapl138.c
index bc4e63f..1a6d430 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -514,6 +514,10 @@ static void __init mityomapl138_init(void)
  {
  	int ret;

+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
  	/* for now, no special EDMA channels are reserved */
  	ret = da850_register_edma(NULL);
  	if (ret)
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index d4930b6..8691a25 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -294,6 +294,10 @@ static __init void omapl138_hawk_init(void)
  {
  	int ret;

+	ret = da8xx_register_cfgchip();
+	if (ret)
+		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
+
  	ret = da850_register_gpio();
  	if (ret)
  		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 725e693..bf5f145 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -11,6 +11,7 @@
   * (at your option) any later version.
   */
  #include <linux/init.h>
+#include <linux/platform_data/syscon.h>
  #include <linux/platform_device.h>
  #include <linux/dma-contiguous.h>
  #include <linux/serial_8250.h>
@@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long 
refclkpn)
  	return platform_device_register(&da850_sata_device);
  }
  #endif
+
+static struct syscon_platform_data da8xx_cfgchip_platform_data = {
+	.label	= "cfgchip",
+};
+
+static struct resource da8xx_cfgchip_resources[] = {
+	{
+		.start	= DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
+		.end	= DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device da8xx_cfgchip_device = {
+	.name	= "syscon",
+	.id	= -1,
+	.dev	= {
+		.platform_data	= &da8xx_cfgchip_platform_data,
+	},
+	.num_resources	= ARRAY_SIZE(da8xx_cfgchip_resources),
+	.resource	= da8xx_cfgchip_resources,
+};
+
+int __init da8xx_register_cfgchip(void)
+{
+	return platform_device_register(&da8xx_cfgchip_device);
+}
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index c367530..c32444b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -61,6 +61,7 @@ extern unsigned int da850_max_speed;
  #define DA8XX_CFGCHIP1_REG	0x180
  #define DA8XX_CFGCHIP2_REG	0x184
  #define DA8XX_CFGCHIP3_REG	0x188
+#define DA8XX_CFGCHIP4_REG	0x18c

  #define DA8XX_SYSCFG1_BASE	(IO_PHYS + 0x22C000)
  #define DA8XX_SYSCFG1_VIRT(x)	(da8xx_syscfg1_base + (x))
@@ -116,6 +117,7 @@ void da8xx_rproc_reserve_cma(void);
  int da8xx_register_rproc(void);
  int da850_register_gpio(void);
  int da830_register_gpio(void);
+int da8xx_register_cfgchip(void);

  extern struct platform_device da8xx_serial_device[];
  extern struct emac_platform_data da8xx_emac_pdata;
-- 
2.7.4


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Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[David Lechner]

On 05/25/2016 06:15 AM, Sekhar Nori wrote:
> On Tuesday 10 May 2016 10:14 PM, David Lechner wrote:
>> On 05/10/2016 06:26 AM, Sergei Shtylyov wrote:
>>> On 5/10/2016 2:46 AM, David Lechner wrote:
>>>
>>>> The CFGCHIP registers are used by a number of devices, so using a syscon
>>>> device to share them. The first consumer of this will by the
>>>> phy-da8xx-usb
>>>> driver.
>>>>
>>>> Signed-off-by: David Lechner <david@lechnology.com>
>>> [...]
>>>> diff --git a/arch/arm/mach-davinci/devices-da8xx.c
>>>> b/arch/arm/mach-davinci/devices-da8xx.c
>>>> index 725e693..69d11a1 100644
>>>> --- a/arch/arm/mach-davinci/devices-da8xx.c
>>>> +++ b/arch/arm/mach-davinci/devices-da8xx.c
>>>> @@ -11,6 +11,7 @@
>>>>    * (at your option) any later version.
>>>>    */
>>>>   #include <linux/init.h>
>>>> +#include <linux/platform_data/syscon.h>
>>>>   #include <linux/platform_device.h>
>>>>   #include <linux/dma-contiguous.h>
>>>>   #include <linux/serial_8250.h>
>>>> @@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long
>>>> refclkpn)
>>>>       return platform_device_register(&da850_sata_device);
>>>>   }
>>>>   #endif
>>>> +
>>>> +static struct syscon_platform_data da8xx_cfgchip_platform_data = {
>>>> +    .label    = "cfgchip",
>>>> +};
>>>> +
>>>> +static struct resource da8xx_cfgchip_resources[] = {
>>>> +    {
>>>> +        .start    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
>>>> +        .end    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
>>>> +        .flags    = IORESOURCE_MEM,
>>>> +    },
>>>> +};
>>>> +
>>>> +static struct platform_device da8xx_cfgchip_device = {
>>>> +    .name    = "syscon",
>>>> +    .id    = 0,
>>>
>>>      Again, -1.
>>>
>>> [...]
>>>
>>> MBR, Sergei
>>>
>>
>> I wish you would have noticed this when I first submitted it. I remember
>> going back and forth about this. But it has been too long and I can't
>> remember the reason why I chose to go this way.
>>
>> It seems like changing it broke something with either this one or the
>> phy device and I opted to keep it this way on both to be consistent. For
>> example, the USB devices both use id = 0 as well even though there are
>> only one of each type.
>
> Agree with Sergei here. Can you confirm what broke exactly? I think the
> USB needs to be fixed too.
>
> Thanks,
> Sekhar
>

I have made the changes from id = 0 to id = -1. I'm not sure what broke 
before, but it is working now.

Re: USB needing fixed, I'm not sure how to do this and I won't have time 
for at least the next 2 or 3 months to do anything about it. The problem 
is that the MUSB can't detect the ID pin. As a workaround, it is
detecting the VBUS state and using that to determine the ID pin state. 
So, when you attach a self-powered device, it tells the VBUS to turn 
off, which in turn triggers the workaround to say that the ID pin has 
changed state.

If anyone has any ideas on what to do about this, I will be glad to have 
a look at it. It will just have to wait a bit though.

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[David Lechner]

On 05/25/2016 06:15 AM, Sekhar Nori wrote:
> On Tuesday 10 May 2016 10:14 PM, David Lechner wrote:
>> On 05/10/2016 06:26 AM, Sergei Shtylyov wrote:
>>> On 5/10/2016 2:46 AM, David Lechner wrote:
>>>
>>>> The CFGCHIP registers are used by a number of devices, so using a syscon
>>>> device to share them. The first consumer of this will by the
>>>> phy-da8xx-usb
>>>> driver.
>>>>
>>>> Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
>>> [...]
>>>> diff --git a/arch/arm/mach-davinci/devices-da8xx.c
>>>> b/arch/arm/mach-davinci/devices-da8xx.c
>>>> index 725e693..69d11a1 100644
>>>> --- a/arch/arm/mach-davinci/devices-da8xx.c
>>>> +++ b/arch/arm/mach-davinci/devices-da8xx.c
>>>> @@ -11,6 +11,7 @@
>>>>    * (at your option) any later version.
>>>>    */
>>>>   #include <linux/init.h>
>>>> +#include <linux/platform_data/syscon.h>
>>>>   #include <linux/platform_device.h>
>>>>   #include <linux/dma-contiguous.h>
>>>>   #include <linux/serial_8250.h>
>>>> @@ -1109,3 +1110,30 @@ int __init da850_register_sata(unsigned long
>>>> refclkpn)
>>>>       return platform_device_register(&da850_sata_device);
>>>>   }
>>>>   #endif
>>>> +
>>>> +static struct syscon_platform_data da8xx_cfgchip_platform_data = {
>>>> +    .label    = "cfgchip",
>>>> +};
>>>> +
>>>> +static struct resource da8xx_cfgchip_resources[] = {
>>>> +    {
>>>> +        .start    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG,
>>>> +        .end    = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3,
>>>> +        .flags    = IORESOURCE_MEM,
>>>> +    },
>>>> +};
>>>> +
>>>> +static struct platform_device da8xx_cfgchip_device = {
>>>> +    .name    = "syscon",
>>>> +    .id    = 0,
>>>
>>>      Again, -1.
>>>
>>> [...]
>>>
>>> MBR, Sergei
>>>
>>
>> I wish you would have noticed this when I first submitted it. I remember
>> going back and forth about this. But it has been too long and I can't
>> remember the reason why I chose to go this way.
>>
>> It seems like changing it broke something with either this one or the
>> phy device and I opted to keep it this way on both to be consistent. For
>> example, the USB devices both use id = 0 as well even though there are
>> only one of each type.
>
> Agree with Sergei here. Can you confirm what broke exactly? I think the
> USB needs to be fixed too.
>
> Thanks,
> Sekhar
>

I have made the changes from id = 0 to id = -1. I'm not sure what broke 
before, but it is working now.

Re: USB needing fixed, I'm not sure how to do this and I won't have time 
for at least the next 2 or 3 months to do anything about it. The problem 
is that the MUSB can't detect the ID pin. As a workaround, it is
detecting the VBUS state and using that to determine the ID pin state. 
So, when you attach a self-powered device, it tells the VBUS to turn 
off, which in turn triggers the workaround to say that the ID pin has 
changed state.

If anyone has any ideas on what to do about this, I will be glad to have 
a look at it. It will just have to wait a bit though.


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Re: [PATCH v5 3/5] ARM: davinci: da8xx: Add USB PHY platform declaration

[David Lechner]

 From 53c9b38e0a7860e51ce7bdfe6d4f1d83cf2394a5 Mon Sep 17 00:00:00 2001
From: David Lechner <david@lechnology.com>
Date: Wed, 16 Mar 2016 14:25:23 -0500
Subject: [PATCH] ARM: davinci: da8xx: Add USB PHY platform declaration

There is now a proper phy driver for the DA8xx SoC USB PHY. This adds the
platform device declarations needed to use it.

Signed-off-by: David Lechner <david@lechnology.com>
---

id = 0 is changed to id = -1


  arch/arm/mach-davinci/board-da830-evm.c     | 28 
+++++-----------------------
  arch/arm/mach-davinci/board-omapl138-hawk.c |  5 +++++
  arch/arm/mach-davinci/include/mach/da8xx.h  |  1 +
  arch/arm/mach-davinci/usb-da8xx.c           | 11 +++++++++++
  4 files changed, 22 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 3051cb6..c62766e 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -26,7 +26,6 @@
  #include <linux/platform_data/mtd-davinci.h>
  #include <linux/platform_data/mtd-davinci-aemif.h>
  #include <linux/platform_data/spi-davinci.h>
-#include <linux/platform_data/usb-davinci.h>

  #include <asm/mach-types.h>
  #include <asm/mach/arch.h>
@@ -106,30 +105,8 @@ static irqreturn_t da830_evm_usb_ocic_irq(int irq, 
void *dev_id)

  static __init void da830_evm_usb_init(void)
  {
-	u32 cfgchip2;
  	int ret;

-	/*
-	 * Set up USB clock/mode in the CFGCHIP2 register.
-	 * FYI:  CFGCHIP2 is 0x0000ef00 initially.
-	 */
-	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
-	/*
-	 * We have to override VBUS/ID signals when MUSB is configured into the
-	 * host-only mode -- ID pin will float if no cable is connected, so the
-	 * controller won't be able to drive VBUS thinking that it's a B-device.
-	 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
-	 */
-	cfgchip2 &= ~CFGCHIP2_OTGMODE;
-#ifdef	CONFIG_USB_MUSB_HOST
-	cfgchip2 |=  CFGCHIP2_FORCE_HOST;
-#else
-	cfgchip2 |=  CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
-#endif
-
-	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
  	/* USB_REFCLKIN is not used. */
  	ret = da8xx_register_usb20_phy_clk(false);
  	if (ret)
@@ -141,6 +118,11 @@ static __init void da830_evm_usb_init(void)
  		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
  			__func__, ret);

+	ret = da8xx_register_usb_phy();
+	if (ret)
+		pr_warn("%s: USB PHY registration failed: %d\n",
+			__func__, ret);
+
  	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
  	if (ret)
  		pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 8691a25..c5cb8d9 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -260,6 +260,11 @@ static __init void omapl138_hawk_usb_init(void)
  		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
  			__func__, ret);

+	ret = da8xx_register_usb_phy();
+	if (ret)
+		pr_warn("%s: USB PHY registration failed: %d\n",
+			__func__, ret);
+
  	ret = gpio_request_one(DA850_USB1_VBUS_PIN,
  			GPIOF_DIR_OUT, "USB1 VBUS");
  	if (ret < 0) {
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index c32444b..38d932e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -92,6 +92,7 @@ int da8xx_register_watchdog(void);
  int da8xx_register_usb_refclkin(int rate);
  int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
  int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
+int da8xx_register_usb_phy(void);
  int da8xx_register_usb20(unsigned mA, unsigned potpgt);
  int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
  int da8xx_register_emac(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c 
b/arch/arm/mach-davinci/usb-da8xx.c
index c524d9e..7c3175f 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -7,6 +7,7 @@
  #include <linux/platform_data/usb-davinci.h>
  #include <linux/platform_device.h>
  #include <linux/mfd/da8xx-cfgchip.h>
+#include <linux/phy/phy.h>
  #include <linux/usb/musb.h>

  #include <mach/clock.h>
@@ -230,6 +231,16 @@ int __init da8xx_register_usb11_phy_clk(bool 
use_usb_refclkin)
  	return ret;
  }

+static struct platform_device da8xx_usb_phy = {
+	.name		= "da8xx-usb-phy",
+	.id		= -1,
+};
+
+int __init da8xx_register_usb_phy(void)
+{
+	return platform_device_register(&da8xx_usb_phy);
+}
+
  #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)

  static struct musb_hdrc_config musb_config = {
-- 
2.7.4

Re: [PATCH v5 3/5] ARM: davinci: da8xx: Add USB PHY platform declaration

[David Lechner]

 From 53c9b38e0a7860e51ce7bdfe6d4f1d83cf2394a5 Mon Sep 17 00:00:00 2001
From: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
Date: Wed, 16 Mar 2016 14:25:23 -0500
Subject: [PATCH] ARM: davinci: da8xx: Add USB PHY platform declaration

There is now a proper phy driver for the DA8xx SoC USB PHY. This adds the
platform device declarations needed to use it.

Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---

id = 0 is changed to id = -1


  arch/arm/mach-davinci/board-da830-evm.c     | 28 
+++++-----------------------
  arch/arm/mach-davinci/board-omapl138-hawk.c |  5 +++++
  arch/arm/mach-davinci/include/mach/da8xx.h  |  1 +
  arch/arm/mach-davinci/usb-da8xx.c           | 11 +++++++++++
  4 files changed, 22 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 3051cb6..c62766e 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -26,7 +26,6 @@
  #include <linux/platform_data/mtd-davinci.h>
  #include <linux/platform_data/mtd-davinci-aemif.h>
  #include <linux/platform_data/spi-davinci.h>
-#include <linux/platform_data/usb-davinci.h>

  #include <asm/mach-types.h>
  #include <asm/mach/arch.h>
@@ -106,30 +105,8 @@ static irqreturn_t da830_evm_usb_ocic_irq(int irq, 
void *dev_id)

  static __init void da830_evm_usb_init(void)
  {
-	u32 cfgchip2;
  	int ret;

-	/*
-	 * Set up USB clock/mode in the CFGCHIP2 register.
-	 * FYI:  CFGCHIP2 is 0x0000ef00 initially.
-	 */
-	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
-	/*
-	 * We have to override VBUS/ID signals when MUSB is configured into the
-	 * host-only mode -- ID pin will float if no cable is connected, so the
-	 * controller won't be able to drive VBUS thinking that it's a B-device.
-	 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
-	 */
-	cfgchip2 &= ~CFGCHIP2_OTGMODE;
-#ifdef	CONFIG_USB_MUSB_HOST
-	cfgchip2 |=  CFGCHIP2_FORCE_HOST;
-#else
-	cfgchip2 |=  CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
-#endif
-
-	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
-
  	/* USB_REFCLKIN is not used. */
  	ret = da8xx_register_usb20_phy_clk(false);
  	if (ret)
@@ -141,6 +118,11 @@ static __init void da830_evm_usb_init(void)
  		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
  			__func__, ret);

+	ret = da8xx_register_usb_phy();
+	if (ret)
+		pr_warn("%s: USB PHY registration failed: %d\n",
+			__func__, ret);
+
  	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
  	if (ret)
  		pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 8691a25..c5cb8d9 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -260,6 +260,11 @@ static __init void omapl138_hawk_usb_init(void)
  		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
  			__func__, ret);

+	ret = da8xx_register_usb_phy();
+	if (ret)
+		pr_warn("%s: USB PHY registration failed: %d\n",
+			__func__, ret);
+
  	ret = gpio_request_one(DA850_USB1_VBUS_PIN,
  			GPIOF_DIR_OUT, "USB1 VBUS");
  	if (ret < 0) {
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index c32444b..38d932e 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -92,6 +92,7 @@ int da8xx_register_watchdog(void);
  int da8xx_register_usb_refclkin(int rate);
  int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
  int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
+int da8xx_register_usb_phy(void);
  int da8xx_register_usb20(unsigned mA, unsigned potpgt);
  int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
  int da8xx_register_emac(void);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c 
b/arch/arm/mach-davinci/usb-da8xx.c
index c524d9e..7c3175f 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -7,6 +7,7 @@
  #include <linux/platform_data/usb-davinci.h>
  #include <linux/platform_device.h>
  #include <linux/mfd/da8xx-cfgchip.h>
+#include <linux/phy/phy.h>
  #include <linux/usb/musb.h>

  #include <mach/clock.h>
@@ -230,6 +231,16 @@ int __init da8xx_register_usb11_phy_clk(bool 
use_usb_refclkin)
  	return ret;
  }

+static struct platform_device da8xx_usb_phy = {
+	.name		= "da8xx-usb-phy",
+	.id		= -1,
+};
+
+int __init da8xx_register_usb_phy(void)
+{
+	return platform_device_register(&da8xx_usb_phy);
+}
+
  #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)

  static struct musb_hdrc_config musb_config = {
-- 
2.7.4


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Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[Sekhar Nori]

On Wednesday 22 June 2016 10:37 PM, David Lechner wrote:
> On 05/25/2016 06:15 AM, Sekhar Nori wrote:
>> On Tuesday 10 May 2016 10:14 PM, David Lechner wrote:
>>> On 05/10/2016 06:26 AM, Sergei Shtylyov wrote:
>>>> On 5/10/2016 2:46 AM, David Lechner wrote:

[...]

>>>>> +static struct platform_device da8xx_cfgchip_device = {
>>>>> +    .name    = "syscon",
>>>>> +    .id    = 0,
>>>>
>>>>      Again, -1.
>>>>
>>>> [...]
>>>>
>>>> MBR, Sergei
>>>>
>>>
>>> I wish you would have noticed this when I first submitted it. I remember
>>> going back and forth about this. But it has been too long and I can't
>>> remember the reason why I chose to go this way.
>>>
>>> It seems like changing it broke something with either this one or the
>>> phy device and I opted to keep it this way on both to be consistent. For
>>> example, the USB devices both use id = 0 as well even though there are
>>> only one of each type.
>>
>> Agree with Sergei here. Can you confirm what broke exactly? I think the
>> USB needs to be fixed too.
>>
>> Thanks,
>> Sekhar
>>
> 
> I have made the changes from id = 0 to id = -1. I'm not sure what broke
> before, but it is working now.

Thanks!

> 
> Re: USB needing fixed, I'm not sure how to do this and I won't have time
> for at least the next 2 or 3 months to do anything about it. The problem
> is that the MUSB can't detect the ID pin. As a workaround, it is
> detecting the VBUS state and using that to determine the ID pin state.
> So, when you attach a self-powered device, it tells the VBUS to turn
> off, which in turn triggers the workaround to say that the ID pin has
> changed state.

I seem to be missing the original problem report. Can you provide a link
to the discussion?

Thanks,
Sekhar

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[Sekhar Nori]

On Wednesday 22 June 2016 10:37 PM, David Lechner wrote:
> On 05/25/2016 06:15 AM, Sekhar Nori wrote:
>> On Tuesday 10 May 2016 10:14 PM, David Lechner wrote:
>>> On 05/10/2016 06:26 AM, Sergei Shtylyov wrote:
>>>> On 5/10/2016 2:46 AM, David Lechner wrote:

[...]

>>>>> +static struct platform_device da8xx_cfgchip_device = {
>>>>> +    .name    = "syscon",
>>>>> +    .id    = 0,
>>>>
>>>>      Again, -1.
>>>>
>>>> [...]
>>>>
>>>> MBR, Sergei
>>>>
>>>
>>> I wish you would have noticed this when I first submitted it. I remember
>>> going back and forth about this. But it has been too long and I can't
>>> remember the reason why I chose to go this way.
>>>
>>> It seems like changing it broke something with either this one or the
>>> phy device and I opted to keep it this way on both to be consistent. For
>>> example, the USB devices both use id = 0 as well even though there are
>>> only one of each type.
>>
>> Agree with Sergei here. Can you confirm what broke exactly? I think the
>> USB needs to be fixed too.
>>
>> Thanks,
>> Sekhar
>>
> 
> I have made the changes from id = 0 to id = -1. I'm not sure what broke
> before, but it is working now.

Thanks!

> 
> Re: USB needing fixed, I'm not sure how to do this and I won't have time
> for at least the next 2 or 3 months to do anything about it. The problem
> is that the MUSB can't detect the ID pin. As a workaround, it is
> detecting the VBUS state and using that to determine the ID pin state.
> So, when you attach a self-powered device, it tells the VBUS to turn
> off, which in turn triggers the workaround to say that the ID pin has
> changed state.

I seem to be missing the original problem report. Can you provide a link
to the discussion?

Thanks,
Sekhar
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Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[David Lechner]

>>
>> Re: USB needing fixed, I'm not sure how to do this and I won't have time
>> for at least the next 2 or 3 months to do anything about it. The problem
>> is that the MUSB can't detect the ID pin. As a workaround, it is
>> detecting the VBUS state and using that to determine the ID pin state.
>> So, when you attach a self-powered device, it tells the VBUS to turn
>> off, which in turn triggers the workaround to say that the ID pin has
>> changed state.
>
> I seem to be missing the original problem report. Can you provide a link
> to the discussion?
>
> Thanks,
> Sekhar
>

Here is the thread: https://lkml.org/lkml/2016/5/9/942

Re: [PATCH v5 2/5] ARM: davinci: da8xx: Add CFGCHIP syscon platform declaration.

[David Lechner]

>>
>> Re: USB needing fixed, I'm not sure how to do this and I won't have time
>> for at least the next 2 or 3 months to do anything about it. The problem
>> is that the MUSB can't detect the ID pin. As a workaround, it is
>> detecting the VBUS state and using that to determine the ID pin state.
>> So, when you attach a self-powered device, it tells the VBUS to turn
>> off, which in turn triggers the workaround to say that the ID pin has
>> changed state.
>
> I seem to be missing the original problem report. Can you provide a link
> to the discussion?
>
> Thanks,
> Sekhar
>

Here is the thread: https://lkml.org/lkml/2016/5/9/942
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Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[Kevin Hilman]

On Wed, May 25, 2016 at 6:18 AM, Sekhar Nori <nsekhar@ti.com> wrote:
> On Monday 23 May 2016 08:44 PM, David Lechner wrote:
>> On 05/09/2016 06:46 PM, David Lechner wrote:
>>> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
>>>

[...]

>>
>> What should I be doing to keep this moving along?
>
> We need the related driver changes to be applied first. I could then use
> an immutable branch to push the platform changes against.
>
> I did take a look at the patches and they look good to me. Except the
> one comment from Sergei which I just now indicated that I agree with.

Just checking on the status of this.  I'm not seeing the driver
changes in mainline yet.

Any update?

Kevin

Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[Kishon Vijay Abraham I]

Hi Kevin,

On Saturday 13 August 2016 02:54 AM, Kevin Hilman wrote:
> On Wed, May 25, 2016 at 6:18 AM, Sekhar Nori <nsekhar@ti.com> wrote:
>> On Monday 23 May 2016 08:44 PM, David Lechner wrote:
>>> On 05/09/2016 06:46 PM, David Lechner wrote:
>>>> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
>>>>
> 
> [...]
> 
>>>
>>> What should I be doing to keep this moving along?
>>
>> We need the related driver changes to be applied first. I could then use
>> an immutable branch to push the platform changes against.
>>
>> I did take a look at the patches and they look good to me. Except the
>> one comment from Sergei which I just now indicated that I agree with.
> 
> Just checking on the status of this.  I'm not seeing the driver
> changes in mainline yet.
> 
> Any update?

phy driver is already merged which actually introduced a compilation error. The
fix for it is currently queued in linux-phy -fixes and it should be merged in
this -rc cycle.
I think it would be better if David Lechner re-spins the series re-based on top
of latest mainline kernel and then merged by Bin/Alan.

Thanks
Kishon

Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[Kishon Vijay Abraham I]

Hi Kevin,

On Saturday 13 August 2016 02:54 AM, Kevin Hilman wrote:
> On Wed, May 25, 2016 at 6:18 AM, Sekhar Nori <nsekhar@ti.com> wrote:
>> On Monday 23 May 2016 08:44 PM, David Lechner wrote:
>>> On 05/09/2016 06:46 PM, David Lechner wrote:
>>>> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
>>>>
> 
> [...]
> 
>>>
>>> What should I be doing to keep this moving along?
>>
>> We need the related driver changes to be applied first. I could then use
>> an immutable branch to push the platform changes against.
>>
>> I did take a look at the patches and they look good to me. Except the
>> one comment from Sergei which I just now indicated that I agree with.
> 
> Just checking on the status of this.  I'm not seeing the driver
> changes in mainline yet.
> 
> Any update?

phy driver is already merged which actually introduced a compilation error. The
fix for it is currently queued in linux-phy -fixes and it should be merged in
this -rc cycle.
I think it would be better if David Lechner re-spins the series re-based on top
of latest mainline kernel and then merged by Bin/Alan.

Thanks
Kishon

Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[Kevin Hilman]

David,

On Wed, Aug 17, 2016 at 4:35 AM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
>
> Hi Kevin,
>
> On Saturday 13 August 2016 02:54 AM, Kevin Hilman wrote:
> > On Wed, May 25, 2016 at 6:18 AM, Sekhar Nori <nsekhar@ti.com> wrote:
> >> On Monday 23 May 2016 08:44 PM, David Lechner wrote:
> >>> On 05/09/2016 06:46 PM, David Lechner wrote:
> >>>> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
> >>>>
> >
> > [...]
> >
> >>>
> >>> What should I be doing to keep this moving along?
> >>
> >> We need the related driver changes to be applied first. I could then use
> >> an immutable branch to push the platform changes against.
> >>
> >> I did take a look at the patches and they look good to me. Except the
> >> one comment from Sergei which I just now indicated that I agree with.
> >
> > Just checking on the status of this.  I'm not seeing the driver
> > changes in mainline yet.
> >
> > Any update?
>
> phy driver is already merged which actually introduced a compilation error. The
> fix for it is currently queued in linux-phy -fixes and it should be merged in
> this -rc cycle.
> I think it would be better if David Lechner re-spins the series re-based on top
> of latest mainline kernel and then merged by Bin/Alan.

Does this work for you?

Kevin

Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[Kevin Hilman]

David,

On Wed, Aug 17, 2016 at 4:35 AM, Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org> wrote:
>
> Hi Kevin,
>
> On Saturday 13 August 2016 02:54 AM, Kevin Hilman wrote:
> > On Wed, May 25, 2016 at 6:18 AM, Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org> wrote:
> >> On Monday 23 May 2016 08:44 PM, David Lechner wrote:
> >>> On 05/09/2016 06:46 PM, David Lechner wrote:
> >>>> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
> >>>>
> >
> > [...]
> >
> >>>
> >>> What should I be doing to keep this moving along?
> >>
> >> We need the related driver changes to be applied first. I could then use
> >> an immutable branch to push the platform changes against.
> >>
> >> I did take a look at the patches and they look good to me. Except the
> >> one comment from Sergei which I just now indicated that I agree with.
> >
> > Just checking on the status of this.  I'm not seeing the driver
> > changes in mainline yet.
> >
> > Any update?
>
> phy driver is already merged which actually introduced a compilation error. The
> fix for it is currently queued in linux-phy -fixes and it should be merged in
> this -rc cycle.
> I think it would be better if David Lechner re-spins the series re-based on top
> of latest mainline kernel and then merged by Bin/Alan.

Does this work for you?

Kevin
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Re: [PATCH v5 0/5] da8xx USB PHY platform devices and clocks (was "da8xx UBS clocks")

[David Lechner]

On 08/19/2016 11:40 AM, Kevin Hilman wrote:
> David,
>
> On Wed, Aug 17, 2016 at 4:35 AM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
>>
>> Hi Kevin,
>>
>> On Saturday 13 August 2016 02:54 AM, Kevin Hilman wrote:
>>> On Wed, May 25, 2016 at 6:18 AM, Sekhar Nori <nsekhar@ti.com> wrote:
>>>> On Monday 23 May 2016 08:44 PM, David Lechner wrote:
>>>>> On 05/09/2016 06:46 PM, David Lechner wrote:
>>>>>> v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropriate
>>>>>>
>>>
>>> [...]
>>>
>>>>>
>>>>> What should I be doing to keep this moving along?
>>>>
>>>> We need the related driver changes to be applied first. I could then use
>>>> an immutable branch to push the platform changes against.
>>>>
>>>> I did take a look at the patches and they look good to me. Except the
>>>> one comment from Sergei which I just now indicated that I agree with.
>>>
>>> Just checking on the status of this.  I'm not seeing the driver
>>> changes in mainline yet.
>>>
>>> Any update?
>>
>> phy driver is already merged which actually introduced a compilation error. The
>> fix for it is currently queued in linux-phy -fixes and it should be merged in
>> this -rc cycle.
>> I think it would be better if David Lechner re-spins the series re-based on top
>> of latest mainline kernel and then merged by Bin/Alan.
>
> Does this work for you?
>
> Kevin
>


Yes, I try to get this done in the next few days.