* [Qemu-devel] [PATCH] ICH9: fix typo
@ 2016-05-17 1:41 Cao jin
2016-05-29 8:20 ` Michael Tokarev
0 siblings, 1 reply; 5+ messages in thread
From: Cao jin @ 2016-05-17 1:41 UTC (permalink / raw)
To: qemu-devel; +Cc: mst, qemu-trivial, marcel
Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>
---
it is 4th attempt to send this patch...
because of it wasn't delivered correctly by eggs.gnu.org
hw/isa/lpc_ich9.c | 4 ++--
include/hw/i386/ich9.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 99cd3ba..fafe367 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -96,8 +96,8 @@ static void ich9_cc_update(ICH9LPCState *lpc)
/*
* D30: DMI2PCI bridge
- * It is arbitrarily decided how INTx lines of PCI devicesbehind the bridge
- * are connected to pirq lines. Our choice is PIRQ[E-H].
+ * It is arbitrarily decided how INTx lines of PCI devices behind
+ * the bridge are connected to pirq lines. Our choice is PIRQ[E-H].
* INT[A-D] are connected to PIRQ[E-H]
*/
for (pci_intx = 0; pci_intx < PCI_NUM_PINS; pci_intx++) {
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index d04dcdc..88233c3 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -35,7 +35,7 @@ typedef struct ICH9LPCState {
/* (pci device, intx) -> pirq
* In real chipset case, the unused slots are never used
- * as ICH9 supports only D25-D32 irq routing.
+ * as ICH9 supports only D25-D31 irq routing.
* On the other hand in qemu case, any slot/function can be populated
* via command line option.
* So fallback interrupt routing for any devices in any slots is necessary.
@@ -181,7 +181,7 @@ Object *ich9_lpc_find(void);
#define ICH9_SATA1_DEV 31
#define ICH9_SATA1_FUNC 2
-/* D30:F1 power management I/O registers
+/* D31:F0 power management I/O registers
offset from the address ICH9_LPC_PMBASE */
/* ICH9 LPC PM I/O registers are 128 ports and 128-aligned */
--
2.1.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] ICH9: fix typo
2016-05-17 1:41 [Qemu-devel] [PATCH] ICH9: fix typo Cao jin
@ 2016-05-29 8:20 ` Michael Tokarev
0 siblings, 0 replies; 5+ messages in thread
From: Michael Tokarev @ 2016-05-29 8:20 UTC (permalink / raw)
To: Cao jin, qemu-devel; +Cc: qemu-trivial, marcel, mst
Applied to -trivial, thanks!
/mjt
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] ICH9: fix typo
2016-04-18 7:57 ` Cao jin
@ 2016-04-18 8:05 ` Michael S. Tsirkin
0 siblings, 0 replies; 5+ messages in thread
From: Michael S. Tsirkin @ 2016-04-18 8:05 UTC (permalink / raw)
To: Cao jin; +Cc: qemu-devel
Pls repost all this after 2.6 is out.
Thanks!
On Mon, Apr 18, 2016 at 03:57:42PM +0800, Cao jin wrote:
> hi mst,
> please ingore this one, I find more small fix like this, I will pack all
> these into one
>
> On 04/18/2016 03:24 PM, Cao jin wrote:
> >Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>
> >---
> > include/hw/i386/ich9.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
> >index d04dcdc..abf84ed 100644
> >--- a/include/hw/i386/ich9.h
> >+++ b/include/hw/i386/ich9.h
> >@@ -35,7 +35,7 @@ typedef struct ICH9LPCState {
> >
> > /* (pci device, intx) -> pirq
> > * In real chipset case, the unused slots are never used
> >- * as ICH9 supports only D25-D32 irq routing.
> >+ * as ICH9 supports only D25-D31 irq routing.
> > * On the other hand in qemu case, any slot/function can be populated
> > * via command line option.
> > * So fallback interrupt routing for any devices in any slots is necessary.
> >
>
> --
> Yours Sincerely,
>
> Cao jin
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] ICH9: fix typo
2016-04-18 7:24 Cao jin
@ 2016-04-18 7:57 ` Cao jin
2016-04-18 8:05 ` Michael S. Tsirkin
0 siblings, 1 reply; 5+ messages in thread
From: Cao jin @ 2016-04-18 7:57 UTC (permalink / raw)
To: mst; +Cc: qemu-devel
hi mst,
please ingore this one, I find more small fix like this, I will
pack all these into one
On 04/18/2016 03:24 PM, Cao jin wrote:
> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>
> ---
> include/hw/i386/ich9.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
> index d04dcdc..abf84ed 100644
> --- a/include/hw/i386/ich9.h
> +++ b/include/hw/i386/ich9.h
> @@ -35,7 +35,7 @@ typedef struct ICH9LPCState {
>
> /* (pci device, intx) -> pirq
> * In real chipset case, the unused slots are never used
> - * as ICH9 supports only D25-D32 irq routing.
> + * as ICH9 supports only D25-D31 irq routing.
> * On the other hand in qemu case, any slot/function can be populated
> * via command line option.
> * So fallback interrupt routing for any devices in any slots is necessary.
>
--
Yours Sincerely,
Cao jin
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Qemu-devel] [PATCH] ICH9: fix typo
@ 2016-04-18 7:24 Cao jin
2016-04-18 7:57 ` Cao jin
0 siblings, 1 reply; 5+ messages in thread
From: Cao jin @ 2016-04-18 7:24 UTC (permalink / raw)
To: qemu-devel; +Cc: mst
Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>
---
include/hw/i386/ich9.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index d04dcdc..abf84ed 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -35,7 +35,7 @@ typedef struct ICH9LPCState {
/* (pci device, intx) -> pirq
* In real chipset case, the unused slots are never used
- * as ICH9 supports only D25-D32 irq routing.
+ * as ICH9 supports only D25-D31 irq routing.
* On the other hand in qemu case, any slot/function can be populated
* via command line option.
* So fallback interrupt routing for any devices in any slots is necessary.
--
2.1.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
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2016-05-17 1:41 [Qemu-devel] [PATCH] ICH9: fix typo Cao jin
2016-05-29 8:20 ` Michael Tokarev
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2016-04-18 7:24 Cao jin
2016-04-18 7:57 ` Cao jin
2016-04-18 8:05 ` Michael S. Tsirkin
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