From: Marc Zyngier <marc.zyngier@arm.com> To: Christoffer Dall <christoffer.dall@linaro.org> Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Subject: [PATCH v2 6/7] arm64: KVM: vgic-v3: Prevent the guest from messing with ICC_SRE_EL1 Date: Wed, 25 May 2016 15:26:38 +0100 [thread overview] Message-ID: <1464186399-16604-7-git-send-email-marc.zyngier@arm.com> (raw) In-Reply-To: <1464186399-16604-1-git-send-email-marc.zyngier@arm.com> Both our GIC emulations are "strict", in the sense that we either emulate a GICv2 or a GICv3, and not a GICv3 with GICv2 legacy support. But when running on a GICv3 host, we still allow the guest to tinker with the ICC_SRE_EL1 register during its time slice: it can switch SRE off, observe that it is off, and yet on the next world switch, find the SRE bit to be set again. Not very nice. An obvious solution is to always trap accesses to ICC_SRE_EL1 (by clearing ICC_SRE_EL2.Enable), and to let the handler return the programmed value on a read, or ignore the write. That way, the guest can always observe that our GICv3 is SRE==1 only. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- arch/arm64/kvm/hyp/vgic-v3-sr.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c index 3129df9..40c3b4c 100644 --- a/arch/arm64/kvm/hyp/vgic-v3-sr.c +++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c @@ -313,10 +313,8 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu) * Prevent the guest from touching the GIC system registers if * SRE isn't enabled for GICv3 emulation. */ - if (!cpu_if->vgic_sre) { - write_gicreg(read_gicreg(ICC_SRE_EL2) & ~ICC_SRE_EL2_ENABLE, - ICC_SRE_EL2); - } + write_gicreg(read_gicreg(ICC_SRE_EL2) & ~ICC_SRE_EL2_ENABLE, + ICC_SRE_EL2); } void __hyp_text __vgic_v3_init_lrs(void) -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 6/7] arm64: KVM: vgic-v3: Prevent the guest from messing with ICC_SRE_EL1 Date: Wed, 25 May 2016 15:26:38 +0100 [thread overview] Message-ID: <1464186399-16604-7-git-send-email-marc.zyngier@arm.com> (raw) In-Reply-To: <1464186399-16604-1-git-send-email-marc.zyngier@arm.com> Both our GIC emulations are "strict", in the sense that we either emulate a GICv2 or a GICv3, and not a GICv3 with GICv2 legacy support. But when running on a GICv3 host, we still allow the guest to tinker with the ICC_SRE_EL1 register during its time slice: it can switch SRE off, observe that it is off, and yet on the next world switch, find the SRE bit to be set again. Not very nice. An obvious solution is to always trap accesses to ICC_SRE_EL1 (by clearing ICC_SRE_EL2.Enable), and to let the handler return the programmed value on a read, or ignore the write. That way, the guest can always observe that our GICv3 is SRE==1 only. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- arch/arm64/kvm/hyp/vgic-v3-sr.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c index 3129df9..40c3b4c 100644 --- a/arch/arm64/kvm/hyp/vgic-v3-sr.c +++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c @@ -313,10 +313,8 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu) * Prevent the guest from touching the GIC system registers if * SRE isn't enabled for GICv3 emulation. */ - if (!cpu_if->vgic_sre) { - write_gicreg(read_gicreg(ICC_SRE_EL2) & ~ICC_SRE_EL2_ENABLE, - ICC_SRE_EL2); - } + write_gicreg(read_gicreg(ICC_SRE_EL2) & ~ICC_SRE_EL2_ENABLE, + ICC_SRE_EL2); } void __hyp_text __vgic_v3_init_lrs(void) -- 2.1.4
next prev parent reply other threads:[~2016-05-25 14:26 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-25 14:26 [PATCH v2 0/7] vgic fixes for 4.7-rc1 Marc Zyngier 2016-05-25 14:26 ` Marc Zyngier 2016-05-25 14:26 ` [PATCH v2 1/7] KVM: arm/arm64: vgic-v2: Clear all dirty LRs Marc Zyngier 2016-05-25 14:26 ` Marc Zyngier 2016-05-25 14:26 ` [PATCH v2 2/7] KVM: arm/arm64: vgic-v3: " Marc Zyngier 2016-05-25 14:26 ` Marc Zyngier 2016-05-25 14:26 ` [PATCH v2 3/7] KVM: arm/arm64: vgic-v2: Always resample level interrupts Marc Zyngier 2016-05-25 14:26 ` Marc Zyngier 2016-05-25 14:26 ` [PATCH v2 4/7] KVM: arm/arm64: vgic-v3: " Marc Zyngier 2016-05-25 14:26 ` Marc Zyngier 2016-05-25 14:26 ` [PATCH v2 5/7] arm64: KVM: Make ICC_SRE_EL1 access return the configured SRE value Marc Zyngier 2016-05-25 14:26 ` Marc Zyngier 2016-05-25 14:26 ` Marc Zyngier [this message] 2016-05-25 14:26 ` [PATCH v2 6/7] arm64: KVM: vgic-v3: Prevent the guest from messing with ICC_SRE_EL1 Marc Zyngier 2016-05-25 14:26 ` [PATCH v2 7/7] arm64: KVM: vgic-v3: Relax synchronization when SRE==1 Marc Zyngier 2016-05-25 14:26 ` Marc Zyngier 2016-05-31 14:14 ` [PATCH v2 0/7] vgic fixes for 4.7-rc1 Christoffer Dall 2016-05-31 14:14 ` Christoffer Dall
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