[RFC i-g-t 0/7] Remove compile time depencencies on libdrm_intel.

[RFC i-g-t 0/7] Remove compile time depencencies on libdrm_intel.

[robert.foss]

From: Robert Foss <robert.foss@collabora.com>

Changes since v1:
- Replaced the automake flags HAVE_VC4/NOUVEAU/INTEL with HAVE_LIBDRM_XXX.
- Move conditionals from Makefile.sources to Arduino.mk/Makefile.am.
- Removed duplicated i915_drm.h symbols from intel_drm_stubs.h.
- Replaced igt_require with igt_require_f to communicate stubs being the cause
  of failure.
- Rename intel_drm_stubs to intel_bufmgr.
- Moved intel_bufmgr to lib/stubs/drm.
- Remove header inclusion changes in favor for inclusion of stubs in
  lib/stubs/drm using build scripts.
- Rebased on trunk.

Robert Foss (7):
  configure.ac: Test for libdrm_intel and build for it if present.
  configure.ac: Harmonize HAVE_XXX flag for all drm platforms to
    HAVE_LIBDRM_XXX.
  benchmarks/Makefile: Don't build benchmarks that depend on
    libdrm_intel.
  tools/Makefile: Don't build tools that depend on libdrm_intel.
  tools/Makefile: Format whitespace.
  demos/Makefile: Don't build tools that depend on libdrm_intel.
  lib/stubs: Add stubs for intel_bufmgr.

 benchmarks/Android.mk        |   6 +
 benchmarks/Makefile.am       |   5 +-
 benchmarks/Makefile.sources  |  14 +-
 configure.ac                 |  22 ++-
 demos/Android.mk             |   5 +-
 demos/Makefile.am            |   8 +-
 demos/Makefile.sources       |   7 +
 lib/Makefile.am              |   9 +-
 lib/stubs/drm/intel_bufmgr.c | 275 +++++++++++++++++++++++++++
 lib/stubs/drm/intel_bufmgr.h | 430 +++++++++++++++++++++++++++++++++++++++++++
 tests/Makefile.am            |   4 +-
 tools/Android.mk             |   8 +
 tools/Makefile.am            |   8 +
 tools/Makefile.sources       |  73 ++++----
 14 files changed, 818 insertions(+), 56 deletions(-)
 create mode 100644 demos/Makefile.sources
 create mode 100644 lib/stubs/drm/intel_bufmgr.c
 create mode 100644 lib/stubs/drm/intel_bufmgr.h

-- 
2.7.4

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[RFC i-g-t 1/7] configure.ac: Test for libdrm_intel and build for it if present.

[robert.foss]

From: Robert Foss <robert.foss@collabora.com>

Test for libdrm_intel and build for it if present.
Also expose the HAVE_INTEL #define to allow code to be conditionally
compiled.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
---
 configure.ac | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index 11b1d46..48d81c5 100644
--- a/configure.ac
+++ b/configure.ac
@@ -100,7 +100,7 @@ if test "x$GCC" = "xyes"; then
 fi
 AC_SUBST(ASSEMBLER_WARN_CFLAGS)
 
-PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.64 libdrm])
+PKG_CHECK_MODULES(DRM, [libdrm])
 PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
 
 case "$target_cpu" in
@@ -150,6 +150,18 @@ PKG_CHECK_MODULES(GLIB, glib-2.0)
 # -----------------------------------------------------------------------------
 #			Configuration options
 # -----------------------------------------------------------------------------
+AC_ARG_ENABLE(intel, AS_HELP_STRING([--disable-intel],
+	      [Enable building of intel specific parts (default: auto)]),
+	      [INTEL=$enableval], [INTEL=auto])
+if test "x$INTEL" = xauto; then
+	PKG_CHECK_EXISTS([libdrm_intel >= 2.4.64], [INTEL=yes], [INTEL=no])
+fi
+if test "x$INTEL" = xyes; then
+	PKG_CHECK_MODULES(DRM_INTEL, [libdrm_intel >= 2.4.64])
+	AC_DEFINE(HAVE_LIBDRM_INTEL, 1, [Have intel support])
+fi
+AM_CONDITIONAL(HAVE_LIBDRM_INTEL, [test "x$INTEL" = xyes])
+
 # for dma-buf tests
 AC_ARG_ENABLE(nouveau, AS_HELP_STRING([--disable-nouveau],
 	      [Enable use of nouveau API for prime tests (default: auto)]),
-- 
2.7.4

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[RFC i-g-t 2/7] configure.ac: Harmonize HAVE_XXX flag for all drm platforms to HAVE_LIBDRM_XXX.

[robert.foss]

From: Robert Foss <robert.foss@collabora.com>

Replace the automake flag HAVE_XXX for VC4/NOUVEAU with HAVE_LIBDRM_XXX in
order for the flags to be more descriptive and also follow the same convention
as HAVE_LIBDRM_INTEL.
---
 configure.ac      | 8 ++++----
 lib/Makefile.am   | 2 +-
 tests/Makefile.am | 4 ++--
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/configure.ac b/configure.ac
index 48d81c5..e27698b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -171,9 +171,9 @@ if test "x$NOUVEAU" = xauto; then
 fi
 if test "x$NOUVEAU" = xyes; then
 	PKG_CHECK_MODULES(DRM_NOUVEAU, [libdrm_nouveau >= 2.4.33])
-	AC_DEFINE(HAVE_NOUVEAU, 1, [Have nouveau support])
+	AC_DEFINE(HAVE_LIBDRM_NOUVEAU, 1, [Have nouveau support])
 fi
-AM_CONDITIONAL(HAVE_NOUVEAU, [test "x$NOUVEAU" = xyes])
+AM_CONDITIONAL(HAVE_LIBDRM_NOUVEAU, [test "x$NOUVEAU" = xyes])
 
 AC_ARG_ENABLE(vc4, AS_HELP_STRING([--disable-vc4],
 	      [Enable building of vc4 tests (default: auto)]),
@@ -183,9 +183,9 @@ if test "x$VC4" = xauto; then
 fi
 if test "x$VC4" = xyes; then
 	PKG_CHECK_MODULES(DRM_VC4, [libdrm_vc4])
-	AC_DEFINE(HAVE_VC4, 1, [Have vc4 support])
+	AC_DEFINE(HAVE_LIBDRM_VC4, 1, [Have vc4 support])
 fi
-AM_CONDITIONAL(HAVE_VC4, [test "x$VC4" = xyes])
+AM_CONDITIONAL(HAVE_LIBDRM_VC4, [test "x$VC4" = xyes])
 
 # Define a configure option for the shader debugger
 AC_ARG_ENABLE(shader-debugger, AS_HELP_STRING([--enable-shader-debugger],
diff --git a/lib/Makefile.am b/lib/Makefile.am
index d2f2e16..d2ae98d 100644
--- a/lib/Makefile.am
+++ b/lib/Makefile.am
@@ -8,7 +8,7 @@ include Makefile.sources
 noinst_LTLIBRARIES = libintel_tools.la
 noinst_HEADERS = check-ndebug.h
 
-if HAVE_VC4
+if HAVE_LIBDRM_VC4
     libintel_tools_la_SOURCES += 	\
         igt_vc4.c			\
         igt_vc4.h
diff --git a/tests/Makefile.am b/tests/Makefile.am
index c2c2025..737afbe 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -1,10 +1,10 @@
 include Makefile.sources
 
-if HAVE_NOUVEAU
+if HAVE_LIBDRM_NOUVEAU
     TESTS_progs_M += $(NOUVEAU_TESTS_M)
 endif
 
-if HAVE_VC4
+if HAVE_LIBDRM_VC4
     TESTS_progs_M += $(VC4_TESTS_M)
 endif
 
-- 
2.7.4

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[RFC i-g-t 3/7] benchmarks/Makefile: Don't build benchmarks that depend on libdrm_intel.

[robert.foss]

From: Robert Foss <robert.foss@collabora.com>

Use the HAS_INTEL automake flag to avoid building benchmarks that won't
compile unless libdrm_intel is available in the build system.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
---
 benchmarks/Android.mk       |  6 ++++++
 benchmarks/Makefile.am      |  5 ++++-
 benchmarks/Makefile.sources | 14 +++++++++-----
 3 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/benchmarks/Android.mk b/benchmarks/Android.mk
index 207a177..08b6816 100644
--- a/benchmarks/Android.mk
+++ b/benchmarks/Android.mk
@@ -34,4 +34,10 @@ endef
 
 benchmark_list := $(benchmarks_PROGRAMS)
 
+ifeq ($(HAVE_LIBDRM_INTEL),true)
+    benchmark_list += $(LIBDRM_INTEL_BENCHMARKS)
+endif
+
+
+
 $(foreach item,$(benchmark_list),$(eval $(call add_benchmark,$(item))))
diff --git a/benchmarks/Makefile.am b/benchmarks/Makefile.am
index 49d2f64..7400dd0 100644
--- a/benchmarks/Makefile.am
+++ b/benchmarks/Makefile.am
@@ -1,6 +1,9 @@
-
 include Makefile.sources
 
+if HAVE_LIBDRM_INTEL
+	benchmarks_PROGRAMS += $(LIBDRM_INTEL_BENCHMARKS)
+endif
+
 AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib
 AM_CFLAGS = $(DRM_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) $(LIBUNWIND_CFLAGS) \
 	    $(WERROR_CFLAGS)
diff --git a/benchmarks/Makefile.sources b/benchmarks/Makefile.sources
index bc4f2b5..a2742f3 100644
--- a/benchmarks/Makefile.sources
+++ b/benchmarks/Makefile.sources
@@ -1,10 +1,7 @@
 benchmarksdir=$(libexecdir)/intel-gpu-tools/benchmarks
 
+
 benchmarks_PROGRAMS =			\
-	intel_upload_blit_large         \
-	intel_upload_blit_large_gtt     \
-	intel_upload_blit_large_map     \
-	intel_upload_blit_small		\
 	gem_blt				\
 	gem_create			\
 	gem_exec_ctx			\
@@ -17,6 +14,13 @@ benchmarks_PROGRAMS =			\
 	gem_prw				\
 	gem_set_domain			\
 	gem_syslatency			\
-	gem_userptr_benchmark		\
 	kms_vblank			\
 	$(NULL)
+
+LIBDRM_INTEL_BENCHMARKS =		\
+	intel_upload_blit_large		\
+	intel_upload_blit_large_gtt	\
+	intel_upload_blit_large_map	\
+	intel_upload_blit_small		\
+	gem_userptr_benchmark		\
+	$(NULL)
-- 
2.7.4

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[RFC i-g-t 4/7] tools/Makefile: Don't build tools that depend on libdrm_intel.

[robert.foss]

From: Robert Foss <robert.foss@collabora.com>

Use the HAS_INTEL automake flag to avoid building tools that won't
compile unless libdrm_intel is available in the build system.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
---
 tools/Android.mk       |  8 ++++++++
 tools/Makefile.am      |  8 ++++++++
 tools/Makefile.sources | 16 ++++++----------
 3 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/tools/Android.mk b/tools/Android.mk
index 5f64184..7c99432 100644
--- a/tools/Android.mk
+++ b/tools/Android.mk
@@ -67,6 +67,14 @@ ifneq ("${ANDROID_HAS_CAIRO}", "1")
     skip_tools_list += intel_residency
 endif
 
+ifeq ($(HAVE_LIBDRM_INTEL),true)
+    bin_PROGRAMS += $(LIBDRM_INTEL_BIN)
+
+    intel_dump_decode_SOURCES =	intel_dump_decode.c
+    intel_error_decode_SOURCES = intel_error_decode.c
+    intel_error_decode_LDFLAGS = -lz
+endif
+
 tools_list := $(filter-out $(skip_tools_list),$(bin_PROGRAMS))
 
 $(foreach item,$(tools_list),$(eval $(call add_tool,$(item))))
diff --git a/tools/Makefile.am b/tools/Makefile.am
index 5f45144..bf2511d 100644
--- a/tools/Makefile.am
+++ b/tools/Makefile.am
@@ -1,5 +1,13 @@
 include Makefile.sources
 
+if HAVE_LIBDRM_INTEL
+	bin_PROGRAMS += $(LIBDRM_INTEL_BIN)
+
+	intel_dump_decode_SOURCES = intel_dump_decode.c
+	intel_error_decode_SOURCES = intel_error_decode.c
+	intel_error_decode_LDFLAGS = -lz
+endif
+
 SUBDIRS = null_state_gen registers
 
 AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib
diff --git a/tools/Makefile.sources b/tools/Makefile.sources
index 5d5958d..07d8d9b 100644
--- a/tools/Makefile.sources
+++ b/tools/Makefile.sources
@@ -13,11 +13,8 @@ bin_PROGRAMS = 				\
 	intel_bios_reader 		\
 	intel_display_crc		\
 	intel_display_poller		\
-	intel_dump_decode 		\
-	intel_error_decode 		\
 	intel_forcewaked		\
 	intel_gpu_frequency		\
-	intel_framebuffer_dump 		\
 	intel_firmware_decode		\
 	intel_gpu_time 			\
 	intel_gpu_top 			\
@@ -27,7 +24,6 @@ bin_PROGRAMS = 				\
 	intel_lid			\
 	intel_opregion_decode		\
 	intel_panel_fitter		\
-	intel_perf_counters		\
 	intel_reg_checker 		\
 	intel_residency			\
 	intel_stepping 			\
@@ -35,8 +31,12 @@ bin_PROGRAMS = 				\
 
 dist_bin_SCRIPTS = intel_gpu_abrt
 
-intel_dump_decode_SOURCES = 	\
-	intel_dump_decode.c
+LIBDRM_INTEL_BIN =		\
+	intel_dump_decode	\
+	intel_error_decode	\
+	intel_framebuffer_dump	\
+	intel_perf_counters	\
+	$(NULL)
 
 intel_reg_SOURCES =		\
 	intel_reg.c		\
@@ -44,10 +44,6 @@ intel_reg_SOURCES =		\
 	intel_reg_spec.c	\
 	intel_reg_spec.h
 
-intel_error_decode_SOURCES =	\
-	intel_error_decode.c
-intel_error_decode_LDFLAGS = -lz
-
 intel_bios_reader_SOURCES =	\
 	intel_bios_reader.c	\
 	intel_bios.h
-- 
2.7.4

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[RFC i-g-t 5/7] tools/Makefile: Format whitespace.

[robert.foss]

From: Robert Foss <robert.foss@collabora.com>

Harmonize tabs/spaces etc.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
---
 tools/Makefile.sources | 57 +++++++++++++++++++++++++-------------------------
 1 file changed, 29 insertions(+), 28 deletions(-)

diff --git a/tools/Makefile.sources b/tools/Makefile.sources
index 07d8d9b..7ed5fe5 100644
--- a/tools/Makefile.sources
+++ b/tools/Makefile.sources
@@ -1,33 +1,34 @@
-noinst_PROGRAMS = \
-	hsw_compute_wrpll \
-	skl_compute_wrpll \
-	skl_ddb_allocation \
+noinst_PROGRAMS =		\
+	hsw_compute_wrpll	\
+	skl_compute_wrpll	\
+	skl_ddb_allocation	\
 	$(NULL)
 
-bin_PROGRAMS = 				\
-	igt_stats			\
-	intel_audio_dump 		\
-	intel_reg			\
-	intel_backlight 		\
-	intel_bios_dumper 		\
-	intel_bios_reader 		\
-	intel_display_crc		\
-	intel_display_poller		\
-	intel_forcewaked		\
-	intel_gpu_frequency		\
-	intel_firmware_decode		\
-	intel_gpu_time 			\
-	intel_gpu_top 			\
-	intel_gtt 			\
-	intel_infoframes		\
-	intel_l3_parity			\
-	intel_lid			\
-	intel_opregion_decode		\
-	intel_panel_fitter		\
-	intel_reg_checker 		\
-	intel_residency			\
-	intel_stepping 			\
-	intel_watermark
+bin_PROGRAMS =			\
+	igt_stats		\
+	intel_audio_dump	\
+	intel_reg		\
+	intel_backlight		\
+	intel_bios_dumper	\
+	intel_bios_reader	\
+	intel_display_crc	\
+	intel_display_poller	\
+	intel_forcewaked	\
+	intel_gpu_frequency	\
+	intel_firmware_decode	\
+	intel_gpu_time		\
+	intel_gpu_top		\
+	intel_gtt		\
+	intel_infoframes	\
+	intel_l3_parity		\
+	intel_lid		\
+	intel_opregion_decode	\
+	intel_panel_fitter	\
+	intel_reg_checker	\
+	intel_residency		\
+	intel_stepping		\
+	intel_watermark		\
+	$(NULL)
 
 dist_bin_SCRIPTS = intel_gpu_abrt
 
-- 
2.7.4

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[RFC i-g-t 6/7] demos/Makefile: Don't build tools that depend on libdrm_intel.

[robert.foss]

From: Robert Foss <robert.foss@collabora.com>

Use the HAS_INTEL automake flag to avoid building tools that won't
compile unless libdrm_intel is available in the build system.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
---
 demos/Android.mk       | 5 ++++-
 demos/Makefile.am      | 8 +++++---
 demos/Makefile.sources | 7 +++++++
 3 files changed, 16 insertions(+), 4 deletions(-)
 create mode 100644 demos/Makefile.sources

diff --git a/demos/Android.mk b/demos/Android.mk
index 7d06c9a..add2414 100644
--- a/demos/Android.mk
+++ b/demos/Android.mk
@@ -4,8 +4,11 @@ LOCAL_PATH := $(call my-dir)
 
 include $(CLEAR_VARS)
 
-LOCAL_SRC_FILES := intel_sprite_on.c
+LOCAL_SRC_FILES :=
 
+ifeq ($(HAVE_LIBDRM_INTEL),true)
+    LOCAL_SRC_FILES += $(LIBDRM_INTEL_BIN)
+endif
 
 LOCAL_CFLAGS += -DHAVE_TERMIOS_H
 LOCAL_CFLAGS += -DANDROID -UNDEBUG
diff --git a/demos/Makefile.am b/demos/Makefile.am
index f5725f4..48eb6c2 100644
--- a/demos/Makefile.am
+++ b/demos/Makefile.am
@@ -1,6 +1,8 @@
-bin_PROGRAMS = 				\
-	intel_sprite_on			\
-	$(NULL)
+include Makefile.sources
+
+if HAVE_LIBDRM_INTEL
+	bin_PROGRAMS += $(LIBDRM_INTEL_BIN)
+endif
 
 AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib
 AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) \
diff --git a/demos/Makefile.sources b/demos/Makefile.sources
new file mode 100644
index 0000000..302f6d9
--- /dev/null
+++ b/demos/Makefile.sources
@@ -0,0 +1,7 @@
+bin_PROGRAMS =			\
+	$(NULL)
+
+HAVE_LIBDRM_INTEL_BIN =		\
+	intel_sprite_on		\
+	$(NULL)
+
-- 
2.7.4

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[RFC i-g-t 7/7] lib/stubs: Add stubs for intel_bufmgr.

[robert.foss]

From: Robert Foss <robert.foss@collabora.com>

This patch provides stubs for functionality otherwise provided by intel_bufmgr.

The stubbed functions all fail with a call to igt_require_f(false,"").
Defines and enums have been copied from libdrm_intel.

Due to the stubbed tests failing with an igt_require_f() call, these stubs are
not well suited for non-tests, since tools/benchmarks/etc 'skipping'
execution is unhelpful.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
---
 lib/Makefile.am              |   7 +
 lib/stubs/drm/intel_bufmgr.c | 275 +++++++++++++++++++++++++++
 lib/stubs/drm/intel_bufmgr.h | 430 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 712 insertions(+)
 create mode 100644 lib/stubs/drm/intel_bufmgr.c
 create mode 100644 lib/stubs/drm/intel_bufmgr.h

diff --git a/lib/Makefile.am b/lib/Makefile.am
index d2ae98d..3e12f25 100644
--- a/lib/Makefile.am
+++ b/lib/Makefile.am
@@ -14,6 +14,13 @@ if HAVE_LIBDRM_VC4
         igt_vc4.h
 endif
 
+if HAVE_LIBDRM_INTEL
+else
+    libintel_tools_la_SOURCES += 	\
+        stubs/drm/intel_bufmgr.c	\
+        stubs/drm/intel_bufmgr.h
+endif
+
 AM_CPPFLAGS = -I$(top_srcdir)
 AM_CFLAGS = $(CWARNFLAGS) $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(LIBUNWIND_CFLAGS) $(DEBUG_CFLAGS) \
 	    -DIGT_SRCDIR=\""$(abs_top_srcdir)/tests"\" \
diff --git a/lib/stubs/drm/intel_bufmgr.c b/lib/stubs/drm/intel_bufmgr.c
new file mode 100644
index 0000000..eaf1b3e
--- /dev/null
+++ b/lib/stubs/drm/intel_bufmgr.c
@@ -0,0 +1,275 @@
+#ifndef HAVE_LIBDRM_INTEL
+
+#include <drm.h>
+#include <i915_drm.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "igt_core.h"
+#include "intel_bufmgr.h"
+
+
+drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return (drm_intel_bufmgr *) NULL;
+}
+
+void drm_intel_bo_unreference(drm_intel_bo *bo)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
+				 unsigned long size, unsigned int alignment)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return (drm_intel_bo *) NULL;
+}
+
+int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
+			 unsigned long size, const void *data)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx,
+				  int used, unsigned int flags)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
+				drm_intel_bo *target_bo, uint32_t target_offset,
+				uint32_t read_domains, uint32_t write_domain)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
+				  drm_intel_bo *target_bo,
+				  uint32_t target_offset,
+				  uint32_t read_domains, uint32_t write_domain)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
+			    uint32_t * swizzle_mode)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
+			  struct drm_clip_rect *cliprects, int num_cliprects,
+			  int DR4, unsigned int flags)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+void drm_intel_bufmgr_gem_set_aub_annotations(drm_intel_bo *bo,
+					      drm_intel_aub_annotation *annotations,
+					      unsigned count)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+int drm_intel_bo_exec(drm_intel_bo *bo, int used,
+		      struct drm_clip_rect *cliprects, int num_cliprects, int DR4)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+void drm_intel_bo_wait_rendering(drm_intel_bo *bo)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
+			     unsigned long size, void *data)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_bo_map(drm_intel_bo *bo, int write_enable)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+int drm_intel_bo_unmap(drm_intel_bo *bo)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
+						const char *name,
+						unsigned int handle)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return (drm_intel_bo *) NULL;
+}
+
+int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+drm_intel_bo *drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr,
+						 int prime_fd, int size)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return (drm_intel_bo *) NULL;
+}
+
+void drm_intel_bufmgr_gem_set_vma_cache_size(drm_intel_bufmgr *bufmgr,
+					     int limit)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+drm_intel_context *drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return (drm_intel_bo *) NULL;
+}
+
+void drm_intel_gem_context_destroy(drm_intel_context *ctx)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr,
+				       const char *name,
+				       int x, int y, int cpp,
+				       uint32_t *tiling_mode,
+				       unsigned long *pitch,
+				       unsigned long flags)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return (drm_intel_bo *) NULL;
+}
+
+void drm_intel_bufmgr_gem_set_aub_filename(drm_intel_bufmgr *bufmgr,
+					  const char *filename)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+void drm_intel_bufmgr_gem_set_aub_dump(drm_intel_bufmgr *bufmgr, int enable)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+void drm_intel_gem_bo_aub_dump_bmp(drm_intel_bo *bo,
+				   int x1, int y1, int width, int height,
+				   enum aub_dump_bmp_format format,
+				   int pitch, int offset)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
+				uint32_t stride)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_bo_disable_reuse(drm_intel_bo *bo)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+void drm_intel_bo_reference(drm_intel_bo *bo)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+}
+
+int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
+					    const char *name,
+					    unsigned long size,
+					    unsigned int alignment)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return (drm_intel_bo *) NULL;
+}
+
+int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return 0;
+}
+
+drm_intel_bo *drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr,
+					 const char *name,
+					 void *addr, uint32_t tiling_mode,
+					 uint32_t stride, unsigned long size,
+					 unsigned long flags)
+{
+	igt_require_f(false, "Not compiled with libdrm_intel support\n");
+	return NULL;
+}
+
+#endif//HAVE_LIBDRM_INTEL
diff --git a/lib/stubs/drm/intel_bufmgr.h b/lib/stubs/drm/intel_bufmgr.h
new file mode 100644
index 0000000..12bce60
--- /dev/null
+++ b/lib/stubs/drm/intel_bufmgr.h
@@ -0,0 +1,430 @@
+#ifndef INTEL_DRM_STUBS_H
+#define INTEL_DRM_STUBS_H
+
+#include <stdint.h>
+
+#include <drm.h>
+
+
+enum aub_dump_bmp_format {
+	AUB_DUMP_BMP_FORMAT_8BIT = 1,
+	AUB_DUMP_BMP_FORMAT_ARGB_4444 = 4,
+	AUB_DUMP_BMP_FORMAT_ARGB_0888 = 6,
+	AUB_DUMP_BMP_FORMAT_ARGB_8888 = 7,
+};
+
+typedef struct _drm_intel_bo drm_intel_bo;
+typedef struct _drm_intel_bufmgr drm_intel_bufmgr;
+typedef struct _drm_intel_context drm_intel_context;
+
+struct _drm_intel_context {
+	unsigned int ctx_id;
+	struct _drm_intel_bufmgr *bufmgr;
+};
+
+struct _drm_intel_bufmgr {
+	/**
+	 * Allocate a buffer object.
+	 *
+	 * Buffer objects are not necessarily initially mapped into CPU virtual
+	 * address space or graphics device aperture.  They must be mapped
+	 * using bo_map() or drm_intel_gem_bo_map_gtt() to be used by the CPU.
+	 */
+	drm_intel_bo *(*bo_alloc) (drm_intel_bufmgr *bufmgr, const char *name,
+				   unsigned long size, unsigned int alignment);
+
+	/**
+	 * Allocate a buffer object, hinting that it will be used as a
+	 * render target.
+	 *
+	 * This is otherwise the same as bo_alloc.
+	 */
+	drm_intel_bo *(*bo_alloc_for_render) (drm_intel_bufmgr *bufmgr,
+						  const char *name,
+						  unsigned long size,
+						  unsigned int alignment);
+
+	/**
+	 * Allocate a buffer object from an existing user accessible
+	 * address malloc'd with the provided size.
+	 * Alignment is used when mapping to the gtt.
+	 * Flags may be I915_VMAP_READ_ONLY or I915_USERPTR_UNSYNCHRONIZED
+	 */
+	drm_intel_bo *(*bo_alloc_userptr)(drm_intel_bufmgr *bufmgr,
+					  const char *name, void *addr,
+					  uint32_t tiling_mode, uint32_t stride,
+					  unsigned long size,
+					  unsigned long flags);
+
+	/**
+	 * Allocate a tiled buffer object.
+	 *
+	 * Alignment for tiled objects is set automatically; the 'flags'
+	 * argument provides a hint about how the object will be used initially.
+	 *
+	 * Valid tiling formats are:
+	 *  I915_TILING_NONE
+	 *  I915_TILING_X
+	 *  I915_TILING_Y
+	 *
+	 * Note the tiling format may be rejected; callers should check the
+	 * 'tiling_mode' field on return, as well as the pitch value, which
+	 * may have been rounded up to accommodate for tiling restrictions.
+	 */
+	drm_intel_bo *(*bo_alloc_tiled) (drm_intel_bufmgr *bufmgr,
+					 const char *name,
+					 int x, int y, int cpp,
+					 uint32_t *tiling_mode,
+					 unsigned long *pitch,
+					 unsigned long flags);
+
+	/** Takes a reference on a buffer object */
+	void (*bo_reference) (drm_intel_bo *bo);
+
+	/**
+	 * Releases a reference on a buffer object, freeing the data if
+	 * no references remain.
+	 */
+	void (*bo_unreference) (drm_intel_bo *bo);
+
+	/**
+	 * Maps the buffer into userspace.
+	 *
+	 * This function will block waiting for any existing execution on the
+	 * buffer to complete, first.  The resulting mapping is available at
+	 * buf->virtual.
+	 */
+	int (*bo_map) (drm_intel_bo *bo, int write_enable);
+
+	/**
+	 * Reduces the refcount on the userspace mapping of the buffer
+	 * object.
+	 */
+	int (*bo_unmap) (drm_intel_bo *bo);
+
+	/**
+	 * Write data into an object.
+	 *
+	 * This is an optional function, if missing,
+	 * drm_intel_bo will map/memcpy/unmap.
+	 */
+	int (*bo_subdata) (drm_intel_bo *bo, unsigned long offset,
+			   unsigned long size, const void *data);
+
+	/**
+	 * Read data from an object
+	 *
+	 * This is an optional function, if missing,
+	 * drm_intel_bo will map/memcpy/unmap.
+	 */
+	int (*bo_get_subdata) (drm_intel_bo *bo, unsigned long offset,
+				   unsigned long size, void *data);
+
+	/**
+	 * Waits for rendering to an object by the GPU to have completed.
+	 *
+	 * This is not required for any access to the BO by bo_map,
+	 * bo_subdata, etc.  It is merely a way for the driver to implement
+	 * glFinish.
+	 */
+	void (*bo_wait_rendering) (drm_intel_bo *bo);
+
+	/**
+	 * Tears down the buffer manager instance.
+	 */
+	void (*destroy) (drm_intel_bufmgr *bufmgr);
+
+	/**
+	 * Indicate if the buffer can be placed anywhere in the full ppgtt
+	 * address range (2^48).
+	 *
+	 * Any resource used with flat/heapless (0x00000000-0xfffff000)
+	 * General State Heap (GSH) or Intructions State Heap (ISH) must
+	 * be in a 32-bit range. 48-bit range will only be used when explicitly
+	 * requested.
+	 *
+	 * \param bo Buffer to set the use_48b_address_range flag.
+	 * \param enable The flag value.
+	 */
+	void (*bo_use_48b_address_range) (drm_intel_bo *bo, uint32_t enable);
+
+	/**
+	 * Add relocation entry in reloc_buf, which will be updated with the
+	 * target buffer's real offset on on command submission.
+	 *
+	 * Relocations remain in place for the lifetime of the buffer object.
+	 *
+	 * \param bo Buffer to write the relocation into.
+	 * \param offset Byte offset within reloc_bo of the pointer to
+	 *			target_bo.
+	 * \param target_bo Buffer whose offset should be written into the
+	 *                  relocation entry.
+	 * \param target_offset Constant value to be added to target_bo's
+	 *			offset in relocation entry.
+	 * \param read_domains GEM read domains which the buffer will be
+	 *			read into by the command that this relocation
+	 *			is part of.
+	 * \param write_domains GEM read domains which the buffer will be
+	 *			dirtied in by the command that this
+	 *			relocation is part of.
+	 */
+	int (*bo_emit_reloc) (drm_intel_bo *bo, uint32_t offset,
+				  drm_intel_bo *target_bo, uint32_t target_offset,
+				  uint32_t read_domains, uint32_t write_domain);
+	int (*bo_emit_reloc_fence)(drm_intel_bo *bo, uint32_t offset,
+				   drm_intel_bo *target_bo,
+				   uint32_t target_offset,
+				   uint32_t read_domains,
+				   uint32_t write_domain);
+
+	/** Executes the command buffer pointed to by bo. */
+	int (*bo_exec) (drm_intel_bo *bo, int used,
+			drm_clip_rect_t *cliprects, int num_cliprects,
+			int DR4);
+
+	/** Executes the command buffer pointed to by bo on the selected
+	 * ring buffer
+	 */
+	int (*bo_mrb_exec) (drm_intel_bo *bo, int used,
+				drm_clip_rect_t *cliprects, int num_cliprects,
+				int DR4, unsigned flags);
+
+	/**
+	 * Pin a buffer to the aperture and fix the offset until unpinned
+	 *
+	 * \param buf Buffer to pin
+	 * \param alignment Required alignment for aperture, in bytes
+	 */
+	int (*bo_pin) (drm_intel_bo *bo, uint32_t alignment);
+
+	/**
+	 * Unpin a buffer from the aperture, allowing it to be removed
+	 *
+	 * \param buf Buffer to unpin
+	 */
+	int (*bo_unpin) (drm_intel_bo *bo);
+
+	/**
+	 * Ask that the buffer be placed in tiling mode
+	 *
+	 * \param buf Buffer to set tiling mode for
+	 * \param tiling_mode desired, and returned tiling mode
+	 */
+	int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
+				  uint32_t stride);
+
+	/**
+	 * Get the current tiling (and resulting swizzling) mode for the bo.
+	 *
+	 * \param buf Buffer to get tiling mode for
+	 * \param tiling_mode returned tiling mode
+	 * \param swizzle_mode returned swizzling mode
+	 */
+	int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
+				  uint32_t * swizzle_mode);
+
+	/**
+	 * Set the offset at which this buffer will be softpinned
+	 * \param bo Buffer to set the softpin offset for
+	 * \param offset Softpin offset
+	 */
+	int (*bo_set_softpin_offset) (drm_intel_bo *bo, uint64_t offset);
+
+	/**
+	 * Create a visible name for a buffer which can be used by other apps
+	 *
+	 * \param buf Buffer to create a name for
+	 * \param name Returned name
+	 */
+	int (*bo_flink) (drm_intel_bo *bo, uint32_t * name);
+
+	/**
+	 * Returns 1 if mapping the buffer for write could cause the process
+	 * to block, due to the object being active in the GPU.
+	 */
+	int (*bo_busy) (drm_intel_bo *bo);
+
+	/**
+	 * Specify the volatility of the buffer.
+	 * \param bo Buffer to create a name for
+	 * \param madv The purgeable status
+	 *
+	 * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
+	 * reclaimed under memory pressure. If you subsequently require the buffer,
+	 * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
+	 *
+	 * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
+	 * marked as I915_MADV_DONTNEED.
+	 */
+	int (*bo_madvise) (drm_intel_bo *bo, int madv);
+
+	int (*check_aperture_space) (drm_intel_bo ** bo_array, int count);
+
+	/**
+	 * Disable buffer reuse for buffers which will be shared in some way,
+	 * as with scanout buffers. When the buffer reference count goes to
+	 * zero, it will be freed and not placed in the reuse list.
+	 *
+	 * \param bo Buffer to disable reuse for
+	 */
+	int (*bo_disable_reuse) (drm_intel_bo *bo);
+
+	/**
+	 * Query whether a buffer is reusable.
+	 *
+	 * \param bo Buffer to query
+	 */
+	int (*bo_is_reusable) (drm_intel_bo *bo);
+
+	/**
+	 *
+	 * Return the pipe associated with a crtc_id so that vblank
+	 * synchronization can use the correct data in the request.
+	 * This is only supported for KMS and gem at this point, when
+	 * unsupported, this function returns -1 and leaves the decision
+	 * of what to do in that case to the caller
+	 *
+	 * \param bufmgr the associated buffer manager
+	 * \param crtc_id the crtc identifier
+	 */
+	int (*get_pipe_from_crtc_id) (drm_intel_bufmgr *bufmgr, int crtc_id);
+
+	/** Returns true if target_bo is in the relocation tree rooted at bo. */
+	int (*bo_references) (drm_intel_bo *bo, drm_intel_bo *target_bo);
+
+	/**< Enables verbose debugging printouts */
+	int debug;
+};
+
+struct _drm_intel_bo {
+	/**
+	 * Size in bytes of the buffer object.
+	 *
+	 * The size may be larger than the size originally requested for the
+	 * allocation, such as being aligned to page size.
+	 */
+	unsigned long size;
+
+	/**
+	 * Alignment requirement for object
+	 *
+	 * Used for GTT mapping & pinning the object.
+	 */
+	unsigned long align;
+
+	/**
+	 * Deprecated field containing (possibly the low 32-bits of) the last
+	 * seen virtual card address.  Use offset64 instead.
+	 */
+	unsigned long offset;
+
+	/**
+	 * Virtual address for accessing the buffer data.  Only valid while
+	 * mapped.
+	 */
+#ifdef __cplusplus
+	void *virt;
+#else
+	void *virtual;
+#endif
+
+	/** Buffer manager context associated with this buffer object */
+	drm_intel_bufmgr *bufmgr;
+
+	/**
+	 * MM-specific handle for accessing object
+	 */
+	int handle;
+
+	/**
+	 * Last seen card virtual address (offset from the beginning of the
+	 * aperture) for the object.  This should be used to fill relocation
+	 * entries when calling drm_intel_bo_emit_reloc()
+	 */
+	uint64_t offset64;
+};
+
+typedef struct _drm_intel_aub_annotation {
+	uint32_t type;
+	uint32_t subtype;
+	uint32_t ending_offset;
+} drm_intel_aub_annotation;
+
+drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size);
+void drm_intel_bo_unreference(drm_intel_bo *bo);
+drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
+				 unsigned long size, unsigned int alignment);
+int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
+			 unsigned long size, const void *data);
+int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx,
+				  int used, unsigned int flags);
+int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
+				drm_intel_bo *target_bo, uint32_t target_offset,
+				uint32_t read_domains, uint32_t write_domain);
+int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
+				  drm_intel_bo *target_bo,
+				  uint32_t target_offset,
+				  uint32_t read_domains, uint32_t write_domain);
+int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
+				uint32_t * swizzle_mode);
+int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
+			struct drm_clip_rect *cliprects, int num_cliprects, int DR4,
+			unsigned int flags);
+void drm_intel_bufmgr_gem_set_aub_annotations(drm_intel_bo *bo,
+					 drm_intel_aub_annotation *annotations,
+					 unsigned count);
+void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);
+int drm_intel_bo_exec(drm_intel_bo *bo, int used,
+			  struct drm_clip_rect *cliprects, int num_cliprects, int DR4);
+void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr);
+void drm_intel_bo_wait_rendering(drm_intel_bo *bo);
+int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
+				 unsigned long size, void *data);
+int drm_intel_bo_map(drm_intel_bo *bo, int write_enable);
+int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo);
+void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr);
+int drm_intel_bo_unmap(drm_intel_bo *bo);
+int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name);
+drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
+						const char *name,
+						unsigned int handle);
+int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd);
+drm_intel_bo *drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr,
+						int prime_fd, int size);
+void drm_intel_bufmgr_gem_set_vma_cache_size(drm_intel_bufmgr *bufmgr,
+						 int limit);
+int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
+drm_intel_context *drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr);
+void drm_intel_gem_context_destroy(drm_intel_context *ctx);
+drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr,
+					   const char *name,
+					   int x, int y, int cpp,
+					   uint32_t *tiling_mode,
+					   unsigned long *pitch,
+					   unsigned long flags);
+void drm_intel_bufmgr_gem_set_aub_filename(drm_intel_bufmgr *bufmgr,
+					  const char *filename);
+void drm_intel_bufmgr_gem_set_aub_dump(drm_intel_bufmgr *bufmgr, int enable);
+void drm_intel_gem_bo_aub_dump_bmp(drm_intel_bo *bo,
+				   int x1, int y1, int width, int height,
+				   enum aub_dump_bmp_format format,
+				   int pitch, int offset);
+void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable);
+int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
+				uint32_t stride);
+int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
+void drm_intel_bo_reference(drm_intel_bo *bo);
+int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr);
+drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
+						const char *name,
+						unsigned long size,
+						unsigned int alignment);
+int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
+int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns);
+drm_intel_bo *drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr,
+					 const char *name,
+					 void *addr, uint32_t tiling_mode,
+					 uint32_t stride, unsigned long size,
+					 unsigned long flags);
+
+#endif//INTEL_BUFMGR_H
-- 
2.7.4

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Re: [RFC i-g-t 1/7] configure.ac: Test for libdrm_intel and build for it if present.

[Rémi Cardona]

Le 25/05/2016 à 20:18, robert.foss@collabora.com a écrit :
> From: Robert Foss <robert.foss@collabora.com>
> 
> Test for libdrm_intel and build for it if present.
> Also expose the HAVE_INTEL #define to allow code to be conditionally
> compiled.
> 
> Signed-off-by: Robert Foss <robert.foss@collabora.com>
> ---
>  configure.ac | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
> 
> diff --git a/configure.ac b/configure.ac
> index 11b1d46..48d81c5 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -100,7 +100,7 @@ if test "x$GCC" = "xyes"; then
>  fi
>  AC_SUBST(ASSEMBLER_WARN_CFLAGS)
>  
> -PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.64 libdrm])
> +PKG_CHECK_MODULES(DRM, [libdrm])
>  PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
>  
>  case "$target_cpu" in
> @@ -150,6 +150,18 @@ PKG_CHECK_MODULES(GLIB, glib-2.0)
>  # -----------------------------------------------------------------------------
>  #			Configuration options
>  # -----------------------------------------------------------------------------
> +AC_ARG_ENABLE(intel, AS_HELP_STRING([--disable-intel],
> +	      [Enable building of intel specific parts (default: auto)]),
> +	      [INTEL=$enableval], [INTEL=auto])
> +if test "x$INTEL" = xauto; then
> +	PKG_CHECK_EXISTS([libdrm_intel >= 2.4.64], [INTEL=yes], [INTEL=no])
                          ^^^^^^^^^^^^^^^^^^^^^^
> +fi
> +if test "x$INTEL" = xyes; then
> +	PKG_CHECK_MODULES(DRM_INTEL, [libdrm_intel >= 2.4.64])
                                      ^^^^^^^^^^^^^^^^^^^^^^
> +	AC_DEFINE(HAVE_LIBDRM_INTEL, 1, [Have intel support])
> +fi
> +AM_CONDITIONAL(HAVE_LIBDRM_INTEL, [test "x$INTEL" = xyes])
> +

I suggest to factor that out into a variable, much like
https://cgit.freedesktop.org/xorg/xserver/tree/configure.ac#n780

This should also be applied in your libpciaccess patch.

Cheers,

Rémi
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