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From: Tero Kristo <t-kristo@ti.com>
To: <linux-omap@vger.kernel.org>, <linux-crypto@vger.kernel.org>,
	<herbert@gondor.apana.org.au>, <davem@davemloft.net>,
	<tony@atomide.com>
Cc: <linux-arm-kernel@lists.infradead.org>, <lokeshvutla@ti.com>
Subject: [PATCH 18/28] ARM: DRA7: hwmod: Add data for SHA IP
Date: Wed, 1 Jun 2016 12:06:34 +0300	[thread overview]
Message-ID: <1464771994-11178-1-git-send-email-t-kristo@ti.com> (raw)
In-Reply-To: <1464771389-10640-1-git-send-email-t-kristo@ti.com>

From: Lokesh Vutla <lokeshvutla@ti.com>

DRA7 SoC contains SHA crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 37 +++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index ceb1b42..8932619 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -734,6 +734,34 @@ static struct omap_hwmod dra7xx_aes2_hwmod = {
 	},
 };
 
+/* sha0 HIB2 (the 'P' (public) device) */
+static struct omap_hwmod_class_sysconfig dra7xx_sha0_sysc = {
+	.rev_offs	= 0x100,
+	.sysc_offs	= 0x110,
+	.syss_offs	= 0x114,
+	.sysc_flags	= SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class dra7xx_sha0_hwmod_class = {
+	.name		= "sham",
+	.sysc		= &dra7xx_sha0_sysc,
+	.rev		= 2,
+};
+
+struct omap_hwmod dra7xx_sha0_hwmod = {
+	.name		= "sham",
+	.class		= &dra7xx_sha0_hwmod_class,
+	.clkdm_name	= "l4sec_clkdm",
+	.main_clk	= "l3_iclk_div",
+	.prcm		= {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L4SEC_SHA2MD51_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_HWCTRL,
+		},
+	},
+};
+
 /*
  * 'elm' class
  *
@@ -3048,6 +3076,14 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes2 = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l3_main_1 -> sha0 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__sha0 = {
+	.master		= &dra7xx_l3_main_1_hwmod,
+	.slave		= &dra7xx_sha0_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per2 -> mcasp1 */
 static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp1 = {
 	.master		= &dra7xx_l4_per2_hwmod,
@@ -3939,6 +3975,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l3_main_1__hdmi,
 	&dra7xx_l3_main_1__aes1,
 	&dra7xx_l3_main_1__aes2,
+	&dra7xx_l3_main_1__sha0,
 	&dra7xx_l4_per1__elm,
 	&dra7xx_l4_wkup__gpio1,
 	&dra7xx_l4_per1__gpio2,
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: Tero Kristo <t-kristo@ti.com>
To: linux-omap@vger.kernel.org, linux-crypto@vger.kernel.org,
	herbert@gondor.apana.org.au, davem@davemloft.net,
	tony@atomide.com
Cc: linux-arm-kernel@lists.infradead.org, lokeshvutla@ti.com
Subject: [PATCH 18/28] ARM: DRA7: hwmod: Add data for SHA IP
Date: Wed, 1 Jun 2016 12:06:34 +0300	[thread overview]
Message-ID: <1464771994-11178-1-git-send-email-t-kristo@ti.com> (raw)
In-Reply-To: <1464771389-10640-1-git-send-email-t-kristo@ti.com>

From: Lokesh Vutla <lokeshvutla@ti.com>

DRA7 SoC contains SHA crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 37 +++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index ceb1b42..8932619 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -734,6 +734,34 @@ static struct omap_hwmod dra7xx_aes2_hwmod = {
 	},
 };
 
+/* sha0 HIB2 (the 'P' (public) device) */
+static struct omap_hwmod_class_sysconfig dra7xx_sha0_sysc = {
+	.rev_offs	= 0x100,
+	.sysc_offs	= 0x110,
+	.syss_offs	= 0x114,
+	.sysc_flags	= SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class dra7xx_sha0_hwmod_class = {
+	.name		= "sham",
+	.sysc		= &dra7xx_sha0_sysc,
+	.rev		= 2,
+};
+
+struct omap_hwmod dra7xx_sha0_hwmod = {
+	.name		= "sham",
+	.class		= &dra7xx_sha0_hwmod_class,
+	.clkdm_name	= "l4sec_clkdm",
+	.main_clk	= "l3_iclk_div",
+	.prcm		= {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L4SEC_SHA2MD51_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_HWCTRL,
+		},
+	},
+};
+
 /*
  * 'elm' class
  *
@@ -3048,6 +3076,14 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes2 = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l3_main_1 -> sha0 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__sha0 = {
+	.master		= &dra7xx_l3_main_1_hwmod,
+	.slave		= &dra7xx_sha0_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per2 -> mcasp1 */
 static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp1 = {
 	.master		= &dra7xx_l4_per2_hwmod,
@@ -3939,6 +3975,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l3_main_1__hdmi,
 	&dra7xx_l3_main_1__aes1,
 	&dra7xx_l3_main_1__aes2,
+	&dra7xx_l3_main_1__sha0,
 	&dra7xx_l4_per1__elm,
 	&dra7xx_l4_wkup__gpio1,
 	&dra7xx_l4_per1__gpio2,
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: t-kristo@ti.com (Tero Kristo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 18/28] ARM: DRA7: hwmod: Add data for SHA IP
Date: Wed, 1 Jun 2016 12:06:34 +0300	[thread overview]
Message-ID: <1464771994-11178-1-git-send-email-t-kristo@ti.com> (raw)
In-Reply-To: <1464771389-10640-1-git-send-email-t-kristo@ti.com>

From: Lokesh Vutla <lokeshvutla@ti.com>

DRA7 SoC contains SHA crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 37 +++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index ceb1b42..8932619 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -734,6 +734,34 @@ static struct omap_hwmod dra7xx_aes2_hwmod = {
 	},
 };
 
+/* sha0 HIB2 (the 'P' (public) device) */
+static struct omap_hwmod_class_sysconfig dra7xx_sha0_sysc = {
+	.rev_offs	= 0x100,
+	.sysc_offs	= 0x110,
+	.syss_offs	= 0x114,
+	.sysc_flags	= SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class dra7xx_sha0_hwmod_class = {
+	.name		= "sham",
+	.sysc		= &dra7xx_sha0_sysc,
+	.rev		= 2,
+};
+
+struct omap_hwmod dra7xx_sha0_hwmod = {
+	.name		= "sham",
+	.class		= &dra7xx_sha0_hwmod_class,
+	.clkdm_name	= "l4sec_clkdm",
+	.main_clk	= "l3_iclk_div",
+	.prcm		= {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L4SEC_SHA2MD51_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_HWCTRL,
+		},
+	},
+};
+
 /*
  * 'elm' class
  *
@@ -3048,6 +3076,14 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__aes2 = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l3_main_1 -> sha0 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__sha0 = {
+	.master		= &dra7xx_l3_main_1_hwmod,
+	.slave		= &dra7xx_sha0_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per2 -> mcasp1 */
 static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp1 = {
 	.master		= &dra7xx_l4_per2_hwmod,
@@ -3939,6 +3975,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l3_main_1__hdmi,
 	&dra7xx_l3_main_1__aes1,
 	&dra7xx_l3_main_1__aes2,
+	&dra7xx_l3_main_1__sha0,
 	&dra7xx_l4_per1__elm,
 	&dra7xx_l4_wkup__gpio1,
 	&dra7xx_l4_per1__gpio2,
-- 
1.9.1

  parent reply	other threads:[~2016-06-01  9:07 UTC|newest]

Thread overview: 116+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-01  8:56 [PATCH 00/28] crypto: omap fixes / support additions Tero Kristo
2016-06-01  8:56 ` Tero Kristo
2016-06-01  8:56 ` Tero Kristo
2016-06-01  8:56 ` [PATCH 01/28] crypto: omap-aes: Fix registration of algorithms Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-07 10:48   ` Herbert Xu
2016-06-07 10:48     ` Herbert Xu
2016-06-20 12:11     ` Tero Kristo
2016-06-20 12:11       ` Tero Kristo
2016-06-20 23:49       ` Herbert Xu
2016-06-20 23:49         ` Herbert Xu
2016-06-01  8:56 ` [PATCH 02/28] crypto: omap-sham: Don't idle/start SHA device between Encrypt operations Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  9:53   ` Grygorii Strashko
2016-06-01  9:53     ` Grygorii Strashko
2016-06-01  9:53     ` Grygorii Strashko
2016-06-01 23:03     ` Dave Gerlach
2016-06-01 23:03       ` Dave Gerlach
2016-06-01 23:03       ` Dave Gerlach
2016-06-07 10:08       ` Herbert Xu
2016-06-07 10:08         ` Herbert Xu
2016-06-07 11:52         ` Tero Kristo
2016-06-07 11:52           ` Tero Kristo
2016-06-07 11:52           ` Tero Kristo
2016-06-07 12:24           ` Grygorii Strashko
2016-06-07 12:24             ` Grygorii Strashko
2016-06-07 12:24             ` Grygorii Strashko
2016-06-22  9:17             ` Tero Kristo
2016-06-22  9:17               ` Tero Kristo
2016-06-01  8:56 ` [PATCH 03/28] crypto: omap-sham: change queue size from 1 to 10 Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 04/28] crypto: omap: do not call dmaengine_terminate_all Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 05/28] crypto: omap-sham: set sw fallback to 240 bytes Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 06/28] crypto: omap-sham: avoid executing tasklet where not needed Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 07/28] crypto: ahash: increase the maximum allowed statesize Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 08/28] crypto: omap-sham: implement context export/import APIs Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 09/28] crypto: omap-des: Fix support for unequal lengths Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 10/28] crypto: omap-aes - Fix enabling clocks Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 11/28] crypto: omap-aes: Add support for multiple cores Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 12/28] crypto: omap-aes: Add fallback support Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 13/28] crypto: engine: avoid unnecessary context switches Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 14/28] crypto: omap-aes: fix crypto engine initialization order Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56 ` [PATCH 15/28] crypto: omap-des: " Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  8:56   ` Tero Kristo
2016-06-01  9:04 ` [PATCH 16/28] ARM: DRA7: hwmod: Add data for DES IP Tero Kristo
2016-06-01  9:04   ` Tero Kristo
2016-06-01  9:04   ` Tero Kristo
2016-06-01  9:06 ` [PATCH 17/28] ARM: DRA7: hwmod: Add data for AES IP Tero Kristo
2016-06-01  9:06   ` Tero Kristo
2016-06-01  9:06   ` Tero Kristo
2016-06-01  9:06 ` Tero Kristo [this message]
2016-06-01  9:06   ` [PATCH 18/28] ARM: DRA7: hwmod: Add data for SHA IP Tero Kristo
2016-06-01  9:06   ` Tero Kristo
2016-06-01  9:06 ` [PATCH 20/28] ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only Tero Kristo
2016-06-01  9:06   ` Tero Kristo
2016-06-01  9:06   ` Tero Kristo
2016-06-01  9:06   ` [PATCH 21/28] ARM: AM43xx: hwmod: Add data for DES Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06   ` [PATCH 22/28] ARM: AMx3xx: hwmod: Add data for RNG Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06   ` [PATCH 23/28] ARM: dts: DRA7: Add DT node for DES IP Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-10 11:38     ` Tony Lindgren
2016-06-10 11:38       ` Tony Lindgren
2016-06-21 17:56       ` Tero Kristo
2016-06-21 17:56         ` Tero Kristo
2016-06-21 17:56         ` Tero Kristo
2016-06-22  7:58         ` Tony Lindgren
2016-06-22  7:58           ` Tony Lindgren
2016-06-01  9:06   ` [PATCH 24/28] ARM: dts: DRA7: Add DT nodes for AES IP Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06   ` [PATCH 25/28] ARM: dts: DRA7: Add support for SHA IP Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06   ` [PATCH 26/28] ARM: dts: DRA7: Add DT node for RNG IP Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06   ` [PATCH 27/28] ARM: dts: AM43xx: clk: Add RNG clk node Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06   ` [PATCH 28/28] ARM: dts: AM43xx: Add node for RNG Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06     ` Tero Kristo
2016-06-01  9:06 ` [PATCH 19/28] ARM: DRA7: hwmod: Add data for RNG IP Tero Kristo
2016-06-01  9:06   ` Tero Kristo
2016-06-01  9:06   ` Tero Kristo

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