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From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org,
	aurelien@aurel32.net, leon.alrae@imgtec.com,
	petar.jovanovic@imgtec.com, miodrag.dinic@imgtec.com,
	aleksandar.markovic@imgtec.com
Subject: [Qemu-devel] [PATCH v9 02/10] softfloat: Clean code format in fpu/softfloat-specialize.h
Date: Fri, 10 Jun 2016 11:57:29 +0200	[thread overview]
Message-ID: <1465552668-30084-3-git-send-email-aleksandar.markovic@rt-rk.com> (raw)
In-Reply-To: <1465552668-30084-1-git-send-email-aleksandar.markovic@rt-rk.com>

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

fpu/softfloat-specialize.h is the most critical file in SoftFloat
library, since it handles numerous differences between platforms in
relation to floating point arithmetics. This patch makes the code
in this file more consistent format-wise, and hopefully easier to
debug and maintain.

Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
---
 fpu/softfloat-specialize.h | 71 +++++++++++++++++++++++-----------------------
 1 file changed, 36 insertions(+), 35 deletions(-)

diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 8f9e4cc..981d665 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -273,7 +273,7 @@ static commonNaNT float16ToCommonNaN(float16 a, float_status *status)
     }
     z.sign = float16_val(a) >> 15;
     z.low = 0;
-    z.high = ((uint64_t) float16_val(a))<<54;
+    z.high = ((uint64_t) float16_val(a)) << 54;
     return z;
 }
 
@@ -284,7 +284,7 @@ static commonNaNT float16ToCommonNaN(float16 a, float_status *status)
 
 static float16 commonNaNToFloat16(commonNaNT a, float_status *status)
 {
-    uint16_t mantissa = a.high>>54;
+    uint16_t mantissa = a.high >> 54;
 
     if (status->default_nan_mode) {
         return float16_default_nan(status);
@@ -372,9 +372,9 @@ static commonNaNT float32ToCommonNaN(float32 a, float_status *status)
     if (float32_is_signaling_nan(a, status)) {
         float_raise(float_flag_invalid, status);
     }
-    z.sign = float32_val(a)>>31;
+    z.sign = float32_val(a) >> 31;
     z.low = 0;
-    z.high = ( (uint64_t) float32_val(a) )<<41;
+    z.high = ((uint64_t)float32_val(a)) << 41;
     return z;
 }
 
@@ -385,17 +385,18 @@ static commonNaNT float32ToCommonNaN(float32 a, float_status *status)
 
 static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
 {
-    uint32_t mantissa = a.high>>41;
+    uint32_t mantissa = a.high >> 41;
 
     if (status->default_nan_mode) {
         return float32_default_nan(status);
     }
 
-    if ( mantissa )
+    if (mantissa) {
         return make_float32(
-            ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
-    else
-        return float32_default_nan;
+            (((uint32_t)a.sign) << 31) | 0x7F800000 | (a.high >> 41));
+    } else {
+        return float32_default_nan(status);
+    }
 }
 
 /*----------------------------------------------------------------------------
@@ -497,11 +498,10 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
             return aIsLargerSignificand ? 0 : 1;
         }
         return bIsQNaN ? 1 : 0;
-    }
-    else if (aIsQNaN) {
-        if (bIsSNaN || !bIsQNaN)
+    } else if (aIsQNaN) {
+        if (bIsSNaN || !bIsQNaN) {
             return 0;
-        else {
+        } else {
             return aIsLargerSignificand ? 0 : 1;
         }
     } else {
@@ -644,9 +644,9 @@ static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
         return float32_default_nan(status);
     }
 
-    if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
+    if ((uint32_t)(av << 1) < (uint32_t)(bv << 1)) {
         aIsLargerSignificand = 0;
-    } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
+    } else if ((uint32_t)(bv << 1) < (uint32_t)(av << 1)) {
         aIsLargerSignificand = 1;
     } else {
         aIsLargerSignificand = (av < bv) ? 1 : 0;
@@ -788,9 +788,9 @@ static commonNaNT float64ToCommonNaN(float64 a, float_status *status)
     if (float64_is_signaling_nan(a, status)) {
         float_raise(float_flag_invalid, status);
     }
-    z.sign = float64_val(a)>>63;
+    z.sign = float64_val(a) >> 63;
     z.low = 0;
-    z.high = float64_val(a)<<12;
+    z.high = float64_val(a) << 12;
     return z;
 }
 
@@ -801,19 +801,20 @@ static commonNaNT float64ToCommonNaN(float64 a, float_status *status)
 
 static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
 {
-    uint64_t mantissa = a.high>>12;
+    uint64_t mantissa = a.high >> 12;
 
     if (status->default_nan_mode) {
         return float64_default_nan(status);
     }
 
-    if ( mantissa )
+    if (mantissa) {
         return make_float64(
-              ( ( (uint64_t) a.sign )<<63 )
-            | LIT64( 0x7FF0000000000000 )
-            | ( a.high>>12 ));
-    else
-        return float64_default_nan;
+              (((uint64_t) a.sign) << 63)
+            | LIT64(0x7FF0000000000000)
+            | (a.high >> 12));
+    } else {
+        return float64_default_nan(status);
+    }
 }
 
 /*----------------------------------------------------------------------------
@@ -843,9 +844,9 @@ static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
         return float64_default_nan(status);
     }
 
-    if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
+    if ((uint64_t)(av << 1) < (uint64_t)(bv << 1)) {
         aIsLargerSignificand = 0;
-    } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
+    } else if ((uint64_t)(bv << 1) < (uint64_t)(av << 1)) {
         aIsLargerSignificand = 1;
     } else {
         aIsLargerSignificand = (av < bv) ? 1 : 0;
@@ -997,7 +998,7 @@ static commonNaNT floatx80ToCommonNaN(floatx80 a, float_status *status)
     if (floatx80_is_signaling_nan(a, status)) {
         float_raise(float_flag_invalid, status);
     }
-    if ( a.low >> 63 ) {
+    if (a.low >> 63) {
         z.sign = a.high >> 15;
         z.low = 0;
         z.high = a.low << 1;
@@ -1024,8 +1025,8 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
     }
 
     if (a.high >> 1) {
-        z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
-        z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
+        z.low = LIT64(0x8000000000000000) | a.high >> 1;
+        z.high = (((uint16_t)a.sign) << 15) | 0x7FFF;
     } else {
         z = floatx80_default_nan(status);
     }
@@ -1148,8 +1149,8 @@ static commonNaNT float128ToCommonNaN(float128 a, float_status *status)
     if (float128_is_signaling_nan(a, status)) {
         float_raise(float_flag_invalid, status);
     }
-    z.sign = a.high>>63;
-    shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
+    z.sign = a.high >> 63;
+    shortShift128Left(a.high, a.low, 16, &z.high, &z.low);
     return z;
 }
 
@@ -1166,8 +1167,8 @@ static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
         return float128_default_nan(status);
     }
 
-    shift128Right( a.high, a.low, 16, &z.high, &z.low );
-    z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
+    shift128Right(a.high, a.low, 16, &z.high, &z.low);
+    z.high |= (((uint64_t)a.sign) << 63) | LIT64(0x7FFF000000000000);
     return z;
 }
 
@@ -1196,9 +1197,9 @@ static float128 propagateFloat128NaN(float128 a, float128 b,
         return float128_default_nan(status);
     }
 
-    if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
+    if (lt128(a.high << 1, a.low, b.high << 1, b.low)) {
         aIsLargerSignificand = 0;
-    } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
+    } else if (lt128(b.high << 1, b.low, a.high << 1, a.low)) {
         aIsLargerSignificand = 1;
     } else {
         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
-- 
1.9.1

  parent reply	other threads:[~2016-06-10  9:59 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-10  9:57 [Qemu-devel] [PATCH v9 00/10] IEEE 754-2008 support for Mips Aleksandar Markovic
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 01/10] softfloat: Implement run-time-configurable meaning of signaling NaN bit Aleksandar Markovic
2016-06-14 14:07   ` Leon Alrae
2016-06-23 15:30   ` Peter Maydell
2016-06-10  9:57 ` Aleksandar Markovic [this message]
2016-06-23 15:31   ` [Qemu-devel] [PATCH v9 02/10] softfloat: Clean code format in fpu/softfloat-specialize.h Peter Maydell
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 03/10] softfloat: For Mips only, correct default NaN values Aleksandar Markovic
2016-06-23 15:36   ` Peter Maydell
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 04/10] softfloat: For Mips only, correct order in pickNaNMulAdd() Aleksandar Markovic
2016-06-23 15:38   ` Peter Maydell
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 05/10] linux-user: Update preprocessor constants for Mips-specific e_flags bits Aleksandar Markovic
2016-06-23 15:40   ` Peter Maydell
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 06/10] target-mips: Activate IEEE 754-2008 signaling NaN bit meaning for MSA Aleksandar Markovic
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 07/10] target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D> Aleksandar Markovic
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 08/10] target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D> Aleksandar Markovic
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 09/10] target-mips: Implement FCR31's R/W bitmask and related functionalities Aleksandar Markovic
2016-06-14 14:08   ` Leon Alrae
2016-06-10  9:57 ` [Qemu-devel] [PATCH v9 10/10] target-mips: Add FCR31's FS bit definition Aleksandar Markovic
2016-06-14 14:12   ` Leon Alrae
2016-06-21 12:41 ` [Qemu-devel] [PATCH v9 00/10] IEEE 754-2008 support for Mips Aleksandar Markovic
2016-06-23 15:46 ` Peter Maydell
2016-06-23 16:44   ` Leon Alrae

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