* [PATCH 1/3] ARM: dts: add GPIO and MPP to MSM8660 PMIC @ 2016-06-13 0:58 ` Linus Walleij 0 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-13 0:58 UTC (permalink / raw) To: linux-arm-kernel, linux-arm-msm, linux-soc, Andy Gross Cc: Stephen Boyd, Bjorn Andersson, David Brown, Linus Walleij This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660 DTSI. Verified against the vendor tree to be in these locations with these interrupts, tested on the APQ8060 Dragonboard. Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/qcom-msm8660.dtsi | 38 +++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index cd214030b84a..6a62b62ad980 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -143,6 +143,44 @@ #address-cells = <1>; #size-cells = <0>; + pm8058_gpio: gpio@150 { + compatible = "qcom,pm8058-gpio", + "qcom,ssbi-gpio"; + reg = <0x150>; + interrupt-parent = <&pmicintc>; + interrupts = <192 1>, <193 1>, <194 1>, + <195 1>, <196 1>, <197 1>, + <198 1>, <199 1>, <200 1>, + <201 1>, <202 1>, <203 1>, + <204 1>, <205 1>, <206 1>, + <207 1>, <208 1>, <209 1>, + <210 1>, <211 1>, <212 1>, + <213 1>, <214 1>, <215 1>, + <216 1>, <217 1>, <218 1>, + <219 1>, <220 1>, <221 1>, + <222 1>, <223 1>, <224 1>, + <225 1>, <226 1>, <227 1>, + <228 1>, <229 1>, <230 1>, + <231 1>, <232 1>, <233 1>, + <234 1>, <235 1>; + gpio-controller; + #gpio-cells = <2>; + + }; + + pm8058_mpps: mpps@50 { + compatible = "qcom,pm8058-mpp", + "qcom,ssbi-mpp"; + reg = <0x50>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&pmicintc>; + interrupts = + <128 1>, <129 1>, <130 1>, <131 1>, + <132 1>, <133 1>, <134 1>, <135 1>, + <136 1>, <137 1>, <138 1>, <139 1>; + }; + pwrkey@1c { compatible = "qcom,pm8058-pwrkey"; reg = <0x1c>; -- 2.4.11 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 1/3] ARM: dts: add GPIO and MPP to MSM8660 PMIC @ 2016-06-13 0:58 ` Linus Walleij 0 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-13 0:58 UTC (permalink / raw) To: linux-arm-kernel This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660 DTSI. Verified against the vendor tree to be in these locations with these interrupts, tested on the APQ8060 Dragonboard. Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/qcom-msm8660.dtsi | 38 +++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index cd214030b84a..6a62b62ad980 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -143,6 +143,44 @@ #address-cells = <1>; #size-cells = <0>; + pm8058_gpio: gpio at 150 { + compatible = "qcom,pm8058-gpio", + "qcom,ssbi-gpio"; + reg = <0x150>; + interrupt-parent = <&pmicintc>; + interrupts = <192 1>, <193 1>, <194 1>, + <195 1>, <196 1>, <197 1>, + <198 1>, <199 1>, <200 1>, + <201 1>, <202 1>, <203 1>, + <204 1>, <205 1>, <206 1>, + <207 1>, <208 1>, <209 1>, + <210 1>, <211 1>, <212 1>, + <213 1>, <214 1>, <215 1>, + <216 1>, <217 1>, <218 1>, + <219 1>, <220 1>, <221 1>, + <222 1>, <223 1>, <224 1>, + <225 1>, <226 1>, <227 1>, + <228 1>, <229 1>, <230 1>, + <231 1>, <232 1>, <233 1>, + <234 1>, <235 1>; + gpio-controller; + #gpio-cells = <2>; + + }; + + pm8058_mpps: mpps at 50 { + compatible = "qcom,pm8058-mpp", + "qcom,ssbi-mpp"; + reg = <0x50>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&pmicintc>; + interrupts = + <128 1>, <129 1>, <130 1>, <131 1>, + <132 1>, <133 1>, <134 1>, <135 1>, + <136 1>, <137 1>, <138 1>, <139 1>; + }; + pwrkey at 1c { compatible = "qcom,pm8058-pwrkey"; reg = <0x1c>; -- 2.4.11 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] ARM: dts: add SDCC5 to Qualcomm MSM8660 2016-06-13 0:58 ` Linus Walleij @ 2016-06-13 0:58 ` Linus Walleij -1 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-13 0:58 UTC (permalink / raw) To: linux-arm-kernel, linux-arm-msm, linux-soc, Andy Gross Cc: Stephen Boyd, Bjorn Andersson, David Brown, Linus Walleij The SDCC5 SD/MMC controller is used for a second uSD slot on the APQ8060 Dragonboard. On most other systems it is just dark silicon so define it and leave it as "disabled" in the core SoC file. Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/qcom-msm8660.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 6a62b62ad980..a5a38820554a 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -262,6 +262,22 @@ no-1-8-v; vmmc-supply = <&vsdcc_fixed>; }; + + sdcc5: sdcc@12200000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x12200000 0x8000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC5_CLK>, <&gcc SDC5_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + vmmc-supply = <&vsdcc_fixed>; + }; }; tcsr: syscon@1a400000 { -- 2.4.11 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] ARM: dts: add SDCC5 to Qualcomm MSM8660 @ 2016-06-13 0:58 ` Linus Walleij 0 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-13 0:58 UTC (permalink / raw) To: linux-arm-kernel The SDCC5 SD/MMC controller is used for a second uSD slot on the APQ8060 Dragonboard. On most other systems it is just dark silicon so define it and leave it as "disabled" in the core SoC file. Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/qcom-msm8660.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 6a62b62ad980..a5a38820554a 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -262,6 +262,22 @@ no-1-8-v; vmmc-supply = <&vsdcc_fixed>; }; + + sdcc5: sdcc at 12200000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x12200000 0x8000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC5_CLK>, <&gcc SDC5_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + vmmc-supply = <&vsdcc_fixed>; + }; }; tcsr: syscon at 1a400000 { -- 2.4.11 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: dts: add Qualcomm APQ8060-based Dragonboard 2016-06-13 0:58 ` Linus Walleij @ 2016-06-13 0:58 ` Linus Walleij -1 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-13 0:58 UTC (permalink / raw) To: linux-arm-kernel, linux-arm-msm, linux-soc, Andy Gross Cc: Stephen Boyd, Bjorn Andersson, David Brown, Linus Walleij This is the first Dragonboard based on APQ8060 and PM8058. It was produced in 2011 in cooperation between Qualcomm and BSQUARE. Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 252 +++++++++++++++++++++++++ 2 files changed, 253 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8060-dragonboard.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 06b6c2d695bf..793bb14c1329 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -572,6 +572,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \ dtb-$(CONFIG_ARCH_OXNAS) += \ wd-mbwe.dtb dtb-$(CONFIG_ARCH_QCOM) += \ + qcom-apq8060-dragonboard.dtb \ qcom-apq8064-arrow-db600c.dtb \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \ diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts new file mode 100644 index 000000000000..c91af85d9ebe --- /dev/null +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -0,0 +1,252 @@ +/* + * Copyright 2016 Linaro Ltd + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include "qcom-msm8660.dtsi" + +/ { + model = "Qualcomm APQ8060 Dragonboard"; + compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; + + aliases { + serial0 = &gsbi12_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + + /* The Fragonboard has a fixed 2.85V regulator for all SDCCs */ + dragon_vsdcc: vsdcc-regulator { + compatible = "regulator-fixed"; + regulator-name = "Dragon SDCC Power"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + /* This is a levelshifter for SDCC5 */ + dragon_vio_txb: txb0104rgyr { + compatible = "regulator-fixed"; + regulator-name = "Dragon SDCC levelshifter"; + vin-supply = <&dragon_vsdcc>; + regulator-always-on; + }; + + soc { + gsbi@19c00000 { + status = "ok"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_serial0_pins>; + qcom,mode = <GSBI_PROT_I2C_UART>; + serial@19c40000 { + status = "ok"; + }; + }; + }; +}; + +/* Intenal 3.69 GiB eMMC */ +&sdcc1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc1_pins>; + vmmc-supply = <&dragon_vsdcc>; +}; + +/* External micro SD card, directly connected, pulled up to 2.85 V */ +&sdcc3 { + status = "okay"; + /* Enable SSBI GPIO 22 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc3_pins>, <&dragon_sdcc3_gpios>; + cd-gpios = <&pm8058_gpio 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&dragon_vsdcc>; +}; + +/* + * Second external micro SD card, using two TXB104RGYR levelshifters + * to lift from 1.8 V to 2.85 V + */ +&sdcc5 { + status = "okay"; + /* Enable SSBI GPIO 26 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc5_pins>, <&dragon_sdcc5_gpios>; + cd-gpios = <&pm8058_gpio 26 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 106 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&dragon_vsdcc>; + vqmmc-supply = <&dragon_vio_txb>; +}; + +&tlmm { + /* eMMMC pins, all 8 data lines connected */ + dragon_sdcc1_pins: sdcc1 { + mux { + pins = "gpio159", "gpio160", "gpio161", + "gpio162", "gpio163", "gpio164", + "gpio165", "gpio166", "gpio167", + "gpio168"; + function = "sdc1"; + }; + clk { + pins = "gpio167"; /* SDC5 CLK */ + drive-strengh = <16>; + bias-disable; + }; + cmd { + pins = "gpio168"; /* SDC5 CMD */ + drive-strengh = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D7 */ + pins = "gpio159", "gpio160", "gpio161", "gpio162", + "gpio163", "gpio164", "gpio165", "gpio166"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + /* + * The SDCC3 pins are hardcoded (non-muxable) but need some pin + * configuration. + */ + dragon_sdcc3_pins: sdcc3 { + clk { + pins = "sdc3_clk"; + drive-strengh = <8>; + bias-disable; + }; + cmd { + pins = "sdc3_cmd"; + drive-strengh = <8>; + bias-pull-up; + }; + data { + pins = "sdc3_data"; + drive-strengh = <8>; + bias-pull-up; + }; + }; + + /* Second SD card slot pins */ + dragon_sdcc5_pins: sdcc5 { + mux { + pins = "gpio95", "gpio96", "gpio97", + "gpio98", "gpio99", "gpio100"; + function = "sdc5"; + }; + clk { + pins = "gpio97"; /* SDC5 CLK */ + drive-strengh = <16>; + bias-disable; + }; + cmd { + pins = "gpio95"; /* SDC5 CMD */ + drive-strengh = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D3 */ + pins = "gpio96", "gpio98", "gpio99", "gpio100"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + /* Primary serial port uart 0 pins */ + dragon_serial0_pins: gsbi12 { + mux { + pins = "gpio117", "gpio118"; + function = "gsbi12"; + }; + tx { + pins = "gpio117"; + drive-strength = <8>; + bias-disable; + }; + rx { + pins = "gpio118"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&pmicintc { + keypad@148 { + linux,keymap = < + MATRIX_KEY(0, 0, KEY_MENU) + MATRIX_KEY(0, 2, KEY_1) + MATRIX_KEY(0, 3, KEY_4) + MATRIX_KEY(0, 4, KEY_7) + MATRIX_KEY(1, 0, KEY_UP) + MATRIX_KEY(1, 1, KEY_LEFT) + MATRIX_KEY(1, 2, KEY_DOWN) + MATRIX_KEY(1, 3, KEY_5) + MATRIX_KEY(1, 3, KEY_8) + MATRIX_KEY(2, 0, KEY_HOME) + MATRIX_KEY(2, 1, KEY_REPLY) + MATRIX_KEY(2, 2, KEY_2) + MATRIX_KEY(2, 3, KEY_6) + MATRIX_KEY(3, 0, KEY_VOLUMEUP) + MATRIX_KEY(3, 1, KEY_RIGHT) + MATRIX_KEY(3, 2, KEY_3) + MATRIX_KEY(3, 3, KEY_9) + MATRIX_KEY(3, 4, KEY_SWITCHVIDEOMODE) + MATRIX_KEY(4, 0, KEY_VOLUMEDOWN) + MATRIX_KEY(4, 1, KEY_BACK) + MATRIX_KEY(4, 2, KEY_CAMERA) + MATRIX_KEY(4, 3, KEY_KBDILLUMTOGGLE) + >; + keypad,num-rows = <6>; + keypad,num-columns = <5>; + }; +}; + +&pm8058_gpio { + dragon_sdcc3_gpios: sdcc3-gpios { + pinconf { + pins = "gpio22"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <PM8058_GPIO_S3>; + }; + }; + dragon_sdcc5_gpios: sdcc5-gpios { + pinconf { + pins = "gpio26"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <PM8058_GPIO_S3>; + }; + }; +}; -- 2.4.11 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: dts: add Qualcomm APQ8060-based Dragonboard @ 2016-06-13 0:58 ` Linus Walleij 0 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-13 0:58 UTC (permalink / raw) To: linux-arm-kernel This is the first Dragonboard based on APQ8060 and PM8058. It was produced in 2011 in cooperation between Qualcomm and BSQUARE. Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 252 +++++++++++++++++++++++++ 2 files changed, 253 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8060-dragonboard.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 06b6c2d695bf..793bb14c1329 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -572,6 +572,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \ dtb-$(CONFIG_ARCH_OXNAS) += \ wd-mbwe.dtb dtb-$(CONFIG_ARCH_QCOM) += \ + qcom-apq8060-dragonboard.dtb \ qcom-apq8064-arrow-db600c.dtb \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \ diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts new file mode 100644 index 000000000000..c91af85d9ebe --- /dev/null +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -0,0 +1,252 @@ +/* + * Copyright 2016 Linaro Ltd + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include "qcom-msm8660.dtsi" + +/ { + model = "Qualcomm APQ8060 Dragonboard"; + compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; + + aliases { + serial0 = &gsbi12_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + + /* The Fragonboard has a fixed 2.85V regulator for all SDCCs */ + dragon_vsdcc: vsdcc-regulator { + compatible = "regulator-fixed"; + regulator-name = "Dragon SDCC Power"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + /* This is a levelshifter for SDCC5 */ + dragon_vio_txb: txb0104rgyr { + compatible = "regulator-fixed"; + regulator-name = "Dragon SDCC levelshifter"; + vin-supply = <&dragon_vsdcc>; + regulator-always-on; + }; + + soc { + gsbi at 19c00000 { + status = "ok"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_serial0_pins>; + qcom,mode = <GSBI_PROT_I2C_UART>; + serial at 19c40000 { + status = "ok"; + }; + }; + }; +}; + +/* Intenal 3.69 GiB eMMC */ +&sdcc1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc1_pins>; + vmmc-supply = <&dragon_vsdcc>; +}; + +/* External micro SD card, directly connected, pulled up to 2.85 V */ +&sdcc3 { + status = "okay"; + /* Enable SSBI GPIO 22 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc3_pins>, <&dragon_sdcc3_gpios>; + cd-gpios = <&pm8058_gpio 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&dragon_vsdcc>; +}; + +/* + * Second external micro SD card, using two TXB104RGYR levelshifters + * to lift from 1.8 V to 2.85 V + */ +&sdcc5 { + status = "okay"; + /* Enable SSBI GPIO 26 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc5_pins>, <&dragon_sdcc5_gpios>; + cd-gpios = <&pm8058_gpio 26 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 106 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&dragon_vsdcc>; + vqmmc-supply = <&dragon_vio_txb>; +}; + +&tlmm { + /* eMMMC pins, all 8 data lines connected */ + dragon_sdcc1_pins: sdcc1 { + mux { + pins = "gpio159", "gpio160", "gpio161", + "gpio162", "gpio163", "gpio164", + "gpio165", "gpio166", "gpio167", + "gpio168"; + function = "sdc1"; + }; + clk { + pins = "gpio167"; /* SDC5 CLK */ + drive-strengh = <16>; + bias-disable; + }; + cmd { + pins = "gpio168"; /* SDC5 CMD */ + drive-strengh = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D7 */ + pins = "gpio159", "gpio160", "gpio161", "gpio162", + "gpio163", "gpio164", "gpio165", "gpio166"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + /* + * The SDCC3 pins are hardcoded (non-muxable) but need some pin + * configuration. + */ + dragon_sdcc3_pins: sdcc3 { + clk { + pins = "sdc3_clk"; + drive-strengh = <8>; + bias-disable; + }; + cmd { + pins = "sdc3_cmd"; + drive-strengh = <8>; + bias-pull-up; + }; + data { + pins = "sdc3_data"; + drive-strengh = <8>; + bias-pull-up; + }; + }; + + /* Second SD card slot pins */ + dragon_sdcc5_pins: sdcc5 { + mux { + pins = "gpio95", "gpio96", "gpio97", + "gpio98", "gpio99", "gpio100"; + function = "sdc5"; + }; + clk { + pins = "gpio97"; /* SDC5 CLK */ + drive-strengh = <16>; + bias-disable; + }; + cmd { + pins = "gpio95"; /* SDC5 CMD */ + drive-strengh = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D3 */ + pins = "gpio96", "gpio98", "gpio99", "gpio100"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + /* Primary serial port uart 0 pins */ + dragon_serial0_pins: gsbi12 { + mux { + pins = "gpio117", "gpio118"; + function = "gsbi12"; + }; + tx { + pins = "gpio117"; + drive-strength = <8>; + bias-disable; + }; + rx { + pins = "gpio118"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&pmicintc { + keypad at 148 { + linux,keymap = < + MATRIX_KEY(0, 0, KEY_MENU) + MATRIX_KEY(0, 2, KEY_1) + MATRIX_KEY(0, 3, KEY_4) + MATRIX_KEY(0, 4, KEY_7) + MATRIX_KEY(1, 0, KEY_UP) + MATRIX_KEY(1, 1, KEY_LEFT) + MATRIX_KEY(1, 2, KEY_DOWN) + MATRIX_KEY(1, 3, KEY_5) + MATRIX_KEY(1, 3, KEY_8) + MATRIX_KEY(2, 0, KEY_HOME) + MATRIX_KEY(2, 1, KEY_REPLY) + MATRIX_KEY(2, 2, KEY_2) + MATRIX_KEY(2, 3, KEY_6) + MATRIX_KEY(3, 0, KEY_VOLUMEUP) + MATRIX_KEY(3, 1, KEY_RIGHT) + MATRIX_KEY(3, 2, KEY_3) + MATRIX_KEY(3, 3, KEY_9) + MATRIX_KEY(3, 4, KEY_SWITCHVIDEOMODE) + MATRIX_KEY(4, 0, KEY_VOLUMEDOWN) + MATRIX_KEY(4, 1, KEY_BACK) + MATRIX_KEY(4, 2, KEY_CAMERA) + MATRIX_KEY(4, 3, KEY_KBDILLUMTOGGLE) + >; + keypad,num-rows = <6>; + keypad,num-columns = <5>; + }; +}; + +&pm8058_gpio { + dragon_sdcc3_gpios: sdcc3-gpios { + pinconf { + pins = "gpio22"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <PM8058_GPIO_S3>; + }; + }; + dragon_sdcc5_gpios: sdcc5-gpios { + pinconf { + pins = "gpio26"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <PM8058_GPIO_S3>; + }; + }; +}; -- 2.4.11 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] ARM: dts: add Qualcomm APQ8060-based Dragonboard 2016-06-13 0:58 ` Linus Walleij @ 2016-06-14 10:50 ` Linus Walleij -1 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-14 10:50 UTC (permalink / raw) To: linux-arm-kernel, linux-arm-msm, linux-soc, Andy Gross Cc: Stephen Boyd, Bjorn Andersson, David Brown, Linus Walleij On Mon, Jun 13, 2016 at 2:58 AM, Linus Walleij <linus.walleij@linaro.org> wrote: > This is the first Dragonboard based on APQ8060 and PM8058. It > was produced in 2011 in cooperation between Qualcomm and > BSQUARE. > > Cc: Andy Gross <andy.gross@linaro.org> > Cc: David Brown <david.brown@linaro.org> > Cc: Stephen Boyd <sboyd@codeaurora.org> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> I managed to get RPM and regulators working on this board, so I will revise the series. Patch 1 & 2 will probably be the same but this one will use proper regulators. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: dts: add Qualcomm APQ8060-based Dragonboard @ 2016-06-14 10:50 ` Linus Walleij 0 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-14 10:50 UTC (permalink / raw) To: linux-arm-kernel On Mon, Jun 13, 2016 at 2:58 AM, Linus Walleij <linus.walleij@linaro.org> wrote: > This is the first Dragonboard based on APQ8060 and PM8058. It > was produced in 2011 in cooperation between Qualcomm and > BSQUARE. > > Cc: Andy Gross <andy.gross@linaro.org> > Cc: David Brown <david.brown@linaro.org> > Cc: Stephen Boyd <sboyd@codeaurora.org> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> I managed to get RPM and regulators working on this board, so I will revise the series. Patch 1 & 2 will probably be the same but this one will use proper regulators. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 0/7] APQ8060 Dragonboard support v2 @ 2016-06-17 20:28 Linus Walleij 2016-06-17 20:28 ` Linus Walleij 0 siblings, 1 reply; 10+ messages in thread From: Linus Walleij @ 2016-06-17 20:28 UTC (permalink / raw) To: linux-arm-kernel, linux-arm-msm, linux-soc, Andy Gross Cc: Stephen Boyd, Bjorn Andersson, David Brown, Linus Walleij Second attempt at getting a baseline upstream for the APQ8060 Dragonboard, the original. I now also add the first I2C block and two sensors to get some more peripherals running on it. Switched to the hierarchical layout of DTS files. This would be nice to have merged as a working baseline in the qcom tree. Linus Walleij (7): ARM: dts: add GPIO and MPP to MSM8660 PMIC ARM: dts: add SDCC5 to Qualcomm MSM8660 ARM: dts: add L2CC and RPM with regulators for MSM8660 ARM: dts: add I2C block in GSBI12 ARM: dts: fix the MSM8660 RTC base address ARM: dts: move the fixed MMC regulator to SURF board ARM: dts: add Qualcomm APQ8060-based Dragonboard arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 626 +++++++++++++++++++++++++ arch/arm/boot/dts/qcom-msm8660-surf.dts | 11 + arch/arm/boot/dts/qcom-msm8660.dtsi | 166 ++++++- 4 files changed, 792 insertions(+), 12 deletions(-) create mode 100644 arch/arm/boot/dts/qcom-apq8060-dragonboard.dts -- 2.4.11 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: dts: add Qualcomm APQ8060-based Dragonboard 2016-06-17 20:28 [PATCH 0/7] APQ8060 Dragonboard support v2 Linus Walleij @ 2016-06-17 20:28 ` Linus Walleij 0 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-17 20:28 UTC (permalink / raw) To: linux-arm-kernel, linux-arm-msm, linux-soc, Andy Gross Cc: Stephen Boyd, Bjorn Andersson, David Brown, Linus Walleij This is the first Dragonboard based on APQ8060 and PM8058. It was produced in 2011 in cooperation between Qualcomm and BSQUARE. Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 252 +++++++++++++++++++++++++ 2 files changed, 253 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8060-dragonboard.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 06b6c2d695bf..793bb14c1329 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -572,6 +572,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \ dtb-$(CONFIG_ARCH_OXNAS) += \ wd-mbwe.dtb dtb-$(CONFIG_ARCH_QCOM) += \ + qcom-apq8060-dragonboard.dtb \ qcom-apq8064-arrow-db600c.dtb \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \ diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts new file mode 100644 index 000000000000..c91af85d9ebe --- /dev/null +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -0,0 +1,252 @@ +/* + * Copyright 2016 Linaro Ltd + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include "qcom-msm8660.dtsi" + +/ { + model = "Qualcomm APQ8060 Dragonboard"; + compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; + + aliases { + serial0 = &gsbi12_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + + /* The Fragonboard has a fixed 2.85V regulator for all SDCCs */ + dragon_vsdcc: vsdcc-regulator { + compatible = "regulator-fixed"; + regulator-name = "Dragon SDCC Power"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + /* This is a levelshifter for SDCC5 */ + dragon_vio_txb: txb0104rgyr { + compatible = "regulator-fixed"; + regulator-name = "Dragon SDCC levelshifter"; + vin-supply = <&dragon_vsdcc>; + regulator-always-on; + }; + + soc { + gsbi@19c00000 { + status = "ok"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_serial0_pins>; + qcom,mode = <GSBI_PROT_I2C_UART>; + serial@19c40000 { + status = "ok"; + }; + }; + }; +}; + +/* Intenal 3.69 GiB eMMC */ +&sdcc1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc1_pins>; + vmmc-supply = <&dragon_vsdcc>; +}; + +/* External micro SD card, directly connected, pulled up to 2.85 V */ +&sdcc3 { + status = "okay"; + /* Enable SSBI GPIO 22 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc3_pins>, <&dragon_sdcc3_gpios>; + cd-gpios = <&pm8058_gpio 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&dragon_vsdcc>; +}; + +/* + * Second external micro SD card, using two TXB104RGYR levelshifters + * to lift from 1.8 V to 2.85 V + */ +&sdcc5 { + status = "okay"; + /* Enable SSBI GPIO 26 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc5_pins>, <&dragon_sdcc5_gpios>; + cd-gpios = <&pm8058_gpio 26 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 106 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&dragon_vsdcc>; + vqmmc-supply = <&dragon_vio_txb>; +}; + +&tlmm { + /* eMMMC pins, all 8 data lines connected */ + dragon_sdcc1_pins: sdcc1 { + mux { + pins = "gpio159", "gpio160", "gpio161", + "gpio162", "gpio163", "gpio164", + "gpio165", "gpio166", "gpio167", + "gpio168"; + function = "sdc1"; + }; + clk { + pins = "gpio167"; /* SDC5 CLK */ + drive-strengh = <16>; + bias-disable; + }; + cmd { + pins = "gpio168"; /* SDC5 CMD */ + drive-strengh = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D7 */ + pins = "gpio159", "gpio160", "gpio161", "gpio162", + "gpio163", "gpio164", "gpio165", "gpio166"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + /* + * The SDCC3 pins are hardcoded (non-muxable) but need some pin + * configuration. + */ + dragon_sdcc3_pins: sdcc3 { + clk { + pins = "sdc3_clk"; + drive-strengh = <8>; + bias-disable; + }; + cmd { + pins = "sdc3_cmd"; + drive-strengh = <8>; + bias-pull-up; + }; + data { + pins = "sdc3_data"; + drive-strengh = <8>; + bias-pull-up; + }; + }; + + /* Second SD card slot pins */ + dragon_sdcc5_pins: sdcc5 { + mux { + pins = "gpio95", "gpio96", "gpio97", + "gpio98", "gpio99", "gpio100"; + function = "sdc5"; + }; + clk { + pins = "gpio97"; /* SDC5 CLK */ + drive-strengh = <16>; + bias-disable; + }; + cmd { + pins = "gpio95"; /* SDC5 CMD */ + drive-strengh = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D3 */ + pins = "gpio96", "gpio98", "gpio99", "gpio100"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + /* Primary serial port uart 0 pins */ + dragon_serial0_pins: gsbi12 { + mux { + pins = "gpio117", "gpio118"; + function = "gsbi12"; + }; + tx { + pins = "gpio117"; + drive-strength = <8>; + bias-disable; + }; + rx { + pins = "gpio118"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&pmicintc { + keypad@148 { + linux,keymap = < + MATRIX_KEY(0, 0, KEY_MENU) + MATRIX_KEY(0, 2, KEY_1) + MATRIX_KEY(0, 3, KEY_4) + MATRIX_KEY(0, 4, KEY_7) + MATRIX_KEY(1, 0, KEY_UP) + MATRIX_KEY(1, 1, KEY_LEFT) + MATRIX_KEY(1, 2, KEY_DOWN) + MATRIX_KEY(1, 3, KEY_5) + MATRIX_KEY(1, 3, KEY_8) + MATRIX_KEY(2, 0, KEY_HOME) + MATRIX_KEY(2, 1, KEY_REPLY) + MATRIX_KEY(2, 2, KEY_2) + MATRIX_KEY(2, 3, KEY_6) + MATRIX_KEY(3, 0, KEY_VOLUMEUP) + MATRIX_KEY(3, 1, KEY_RIGHT) + MATRIX_KEY(3, 2, KEY_3) + MATRIX_KEY(3, 3, KEY_9) + MATRIX_KEY(3, 4, KEY_SWITCHVIDEOMODE) + MATRIX_KEY(4, 0, KEY_VOLUMEDOWN) + MATRIX_KEY(4, 1, KEY_BACK) + MATRIX_KEY(4, 2, KEY_CAMERA) + MATRIX_KEY(4, 3, KEY_KBDILLUMTOGGLE) + >; + keypad,num-rows = <6>; + keypad,num-columns = <5>; + }; +}; + +&pm8058_gpio { + dragon_sdcc3_gpios: sdcc3-gpios { + pinconf { + pins = "gpio22"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <PM8058_GPIO_S3>; + }; + }; + dragon_sdcc5_gpios: sdcc5-gpios { + pinconf { + pins = "gpio26"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <PM8058_GPIO_S3>; + }; + }; +}; -- 2.4.11 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: dts: add Qualcomm APQ8060-based Dragonboard @ 2016-06-17 20:28 ` Linus Walleij 0 siblings, 0 replies; 10+ messages in thread From: Linus Walleij @ 2016-06-17 20:28 UTC (permalink / raw) To: linux-arm-kernel This is the first Dragonboard based on APQ8060 and PM8058. It was produced in 2011 in cooperation between Qualcomm and BSQUARE. Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 252 +++++++++++++++++++++++++ 2 files changed, 253 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8060-dragonboard.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 06b6c2d695bf..793bb14c1329 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -572,6 +572,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \ dtb-$(CONFIG_ARCH_OXNAS) += \ wd-mbwe.dtb dtb-$(CONFIG_ARCH_QCOM) += \ + qcom-apq8060-dragonboard.dtb \ qcom-apq8064-arrow-db600c.dtb \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \ diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts new file mode 100644 index 000000000000..c91af85d9ebe --- /dev/null +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -0,0 +1,252 @@ +/* + * Copyright 2016 Linaro Ltd + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include "qcom-msm8660.dtsi" + +/ { + model = "Qualcomm APQ8060 Dragonboard"; + compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; + + aliases { + serial0 = &gsbi12_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + + /* The Fragonboard has a fixed 2.85V regulator for all SDCCs */ + dragon_vsdcc: vsdcc-regulator { + compatible = "regulator-fixed"; + regulator-name = "Dragon SDCC Power"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + /* This is a levelshifter for SDCC5 */ + dragon_vio_txb: txb0104rgyr { + compatible = "regulator-fixed"; + regulator-name = "Dragon SDCC levelshifter"; + vin-supply = <&dragon_vsdcc>; + regulator-always-on; + }; + + soc { + gsbi at 19c00000 { + status = "ok"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_serial0_pins>; + qcom,mode = <GSBI_PROT_I2C_UART>; + serial at 19c40000 { + status = "ok"; + }; + }; + }; +}; + +/* Intenal 3.69 GiB eMMC */ +&sdcc1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc1_pins>; + vmmc-supply = <&dragon_vsdcc>; +}; + +/* External micro SD card, directly connected, pulled up to 2.85 V */ +&sdcc3 { + status = "okay"; + /* Enable SSBI GPIO 22 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc3_pins>, <&dragon_sdcc3_gpios>; + cd-gpios = <&pm8058_gpio 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&dragon_vsdcc>; +}; + +/* + * Second external micro SD card, using two TXB104RGYR levelshifters + * to lift from 1.8 V to 2.85 V + */ +&sdcc5 { + status = "okay"; + /* Enable SSBI GPIO 26 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc5_pins>, <&dragon_sdcc5_gpios>; + cd-gpios = <&pm8058_gpio 26 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 106 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&dragon_vsdcc>; + vqmmc-supply = <&dragon_vio_txb>; +}; + +&tlmm { + /* eMMMC pins, all 8 data lines connected */ + dragon_sdcc1_pins: sdcc1 { + mux { + pins = "gpio159", "gpio160", "gpio161", + "gpio162", "gpio163", "gpio164", + "gpio165", "gpio166", "gpio167", + "gpio168"; + function = "sdc1"; + }; + clk { + pins = "gpio167"; /* SDC5 CLK */ + drive-strengh = <16>; + bias-disable; + }; + cmd { + pins = "gpio168"; /* SDC5 CMD */ + drive-strengh = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D7 */ + pins = "gpio159", "gpio160", "gpio161", "gpio162", + "gpio163", "gpio164", "gpio165", "gpio166"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + /* + * The SDCC3 pins are hardcoded (non-muxable) but need some pin + * configuration. + */ + dragon_sdcc3_pins: sdcc3 { + clk { + pins = "sdc3_clk"; + drive-strengh = <8>; + bias-disable; + }; + cmd { + pins = "sdc3_cmd"; + drive-strengh = <8>; + bias-pull-up; + }; + data { + pins = "sdc3_data"; + drive-strengh = <8>; + bias-pull-up; + }; + }; + + /* Second SD card slot pins */ + dragon_sdcc5_pins: sdcc5 { + mux { + pins = "gpio95", "gpio96", "gpio97", + "gpio98", "gpio99", "gpio100"; + function = "sdc5"; + }; + clk { + pins = "gpio97"; /* SDC5 CLK */ + drive-strengh = <16>; + bias-disable; + }; + cmd { + pins = "gpio95"; /* SDC5 CMD */ + drive-strengh = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D3 */ + pins = "gpio96", "gpio98", "gpio99", "gpio100"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + /* Primary serial port uart 0 pins */ + dragon_serial0_pins: gsbi12 { + mux { + pins = "gpio117", "gpio118"; + function = "gsbi12"; + }; + tx { + pins = "gpio117"; + drive-strength = <8>; + bias-disable; + }; + rx { + pins = "gpio118"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&pmicintc { + keypad at 148 { + linux,keymap = < + MATRIX_KEY(0, 0, KEY_MENU) + MATRIX_KEY(0, 2, KEY_1) + MATRIX_KEY(0, 3, KEY_4) + MATRIX_KEY(0, 4, KEY_7) + MATRIX_KEY(1, 0, KEY_UP) + MATRIX_KEY(1, 1, KEY_LEFT) + MATRIX_KEY(1, 2, KEY_DOWN) + MATRIX_KEY(1, 3, KEY_5) + MATRIX_KEY(1, 3, KEY_8) + MATRIX_KEY(2, 0, KEY_HOME) + MATRIX_KEY(2, 1, KEY_REPLY) + MATRIX_KEY(2, 2, KEY_2) + MATRIX_KEY(2, 3, KEY_6) + MATRIX_KEY(3, 0, KEY_VOLUMEUP) + MATRIX_KEY(3, 1, KEY_RIGHT) + MATRIX_KEY(3, 2, KEY_3) + MATRIX_KEY(3, 3, KEY_9) + MATRIX_KEY(3, 4, KEY_SWITCHVIDEOMODE) + MATRIX_KEY(4, 0, KEY_VOLUMEDOWN) + MATRIX_KEY(4, 1, KEY_BACK) + MATRIX_KEY(4, 2, KEY_CAMERA) + MATRIX_KEY(4, 3, KEY_KBDILLUMTOGGLE) + >; + keypad,num-rows = <6>; + keypad,num-columns = <5>; + }; +}; + +&pm8058_gpio { + dragon_sdcc3_gpios: sdcc3-gpios { + pinconf { + pins = "gpio22"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <PM8058_GPIO_S3>; + }; + }; + dragon_sdcc5_gpios: sdcc5-gpios { + pinconf { + pins = "gpio26"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <PM8058_GPIO_S3>; + }; + }; +}; -- 2.4.11 ^ permalink raw reply related [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-06-17 20:28 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-06-13 0:58 [PATCH 1/3] ARM: dts: add GPIO and MPP to MSM8660 PMIC Linus Walleij 2016-06-13 0:58 ` Linus Walleij 2016-06-13 0:58 ` [PATCH 2/3] ARM: dts: add SDCC5 to Qualcomm MSM8660 Linus Walleij 2016-06-13 0:58 ` Linus Walleij 2016-06-13 0:58 ` [PATCH 3/3] ARM: dts: add Qualcomm APQ8060-based Dragonboard Linus Walleij 2016-06-13 0:58 ` Linus Walleij 2016-06-14 10:50 ` Linus Walleij 2016-06-14 10:50 ` Linus Walleij 2016-06-17 20:28 [PATCH 0/7] APQ8060 Dragonboard support v2 Linus Walleij 2016-06-17 20:28 ` [PATCH 3/3] ARM: dts: add Qualcomm APQ8060-based Dragonboard Linus Walleij 2016-06-17 20:28 ` Linus Walleij
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