From: Romain Perier <romain.perier@free-electrons.com> To: Boris Brezillon <boris.brezillon@free-electrons.com>, Arnaud Ebalard <arno@natisbad.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Russell King <linux@arm.linux.org.uk>, linux-crypto@vger.kernel.org, Gregory Clement <gregory.clement@free-electrons.com>, "David S. Miller" <davem@davemloft.net>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 07/10] crypto: marvell: Move SRAM I/O operations to step functions Date: Tue, 21 Jun 2016 10:08:37 +0200 [thread overview] Message-ID: <1466496520-28806-8-git-send-email-romain.perier@free-electrons.com> (raw) In-Reply-To: <1466496520-28806-1-git-send-email-romain.perier@free-electrons.com> Currently the crypto requests were sent to engines sequentially. This commit moves the SRAM I/O operations from the prepare to the step functions. It provides flexibility for future works and allow to prepare a request while the engine is running. Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> --- drivers/crypto/marvell/cipher.c | 6 +++--- drivers/crypto/marvell/hash.c | 18 +++++++++--------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/crypto/marvell/cipher.c b/drivers/crypto/marvell/cipher.c index 175ce76..79d4175 100644 --- a/drivers/crypto/marvell/cipher.c +++ b/drivers/crypto/marvell/cipher.c @@ -89,6 +89,9 @@ static void mv_cesa_ablkcipher_std_step(struct ablkcipher_request *req) size_t len = min_t(size_t, req->nbytes - sreq->offset, CESA_SA_SRAM_PAYLOAD_SIZE); + mv_cesa_adjust_op(engine, &sreq->op); + memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op)); + len = sg_pcopy_to_buffer(req->src, creq->src_nents, engine->sram + CESA_SA_DATA_SRAM_OFFSET, len, sreq->offset); @@ -177,12 +180,9 @@ mv_cesa_ablkcipher_std_prepare(struct ablkcipher_request *req) { struct mv_cesa_ablkcipher_req *creq = ablkcipher_request_ctx(req); struct mv_cesa_ablkcipher_std_req *sreq = &creq->std; - struct mv_cesa_engine *engine = creq->base.engine; sreq->size = 0; sreq->offset = 0; - mv_cesa_adjust_op(engine, &sreq->op); - memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op)); } static inline void mv_cesa_ablkcipher_prepare(struct crypto_async_request *req, diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c index 09665a7..e1f8acd 100644 --- a/drivers/crypto/marvell/hash.c +++ b/drivers/crypto/marvell/hash.c @@ -162,6 +162,15 @@ static void mv_cesa_ahash_std_step(struct ahash_request *req) unsigned int new_cache_ptr = 0; u32 frag_mode; size_t len; + unsigned int digsize; + int i; + + mv_cesa_adjust_op(engine, &creq->op_tmpl); + memcpy_toio(engine->sram, &creq->op_tmpl, sizeof(creq->op_tmpl)); + + digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(req)); + for (i = 0; i < digsize / 4; i++) + writel_relaxed(creq->state[i], engine->regs + CESA_IVDIG(i)); if (creq->cache_ptr) memcpy_toio(engine->sram + CESA_SA_DATA_SRAM_OFFSET, @@ -265,11 +274,8 @@ static void mv_cesa_ahash_std_prepare(struct ahash_request *req) { struct mv_cesa_ahash_req *creq = ahash_request_ctx(req); struct mv_cesa_ahash_std_req *sreq = &creq->req.std; - struct mv_cesa_engine *engine = creq->base.engine; sreq->offset = 0; - mv_cesa_adjust_op(engine, &creq->op_tmpl); - memcpy_toio(engine->sram, &creq->op_tmpl, sizeof(creq->op_tmpl)); } static void mv_cesa_ahash_step(struct crypto_async_request *req) @@ -336,8 +342,6 @@ static void mv_cesa_ahash_prepare(struct crypto_async_request *req, { struct ahash_request *ahashreq = ahash_request_cast(req); struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq); - unsigned int digsize; - int i; creq->base.engine = engine; @@ -345,10 +349,6 @@ static void mv_cesa_ahash_prepare(struct crypto_async_request *req, mv_cesa_ahash_dma_prepare(ahashreq); else mv_cesa_ahash_std_prepare(ahashreq); - - digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(ahashreq)); - for (i = 0; i < digsize / 4; i++) - writel_relaxed(creq->state[i], engine->regs + CESA_IVDIG(i)); } static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req) -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: romain.perier@free-electrons.com (Romain Perier) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 07/10] crypto: marvell: Move SRAM I/O operations to step functions Date: Tue, 21 Jun 2016 10:08:37 +0200 [thread overview] Message-ID: <1466496520-28806-8-git-send-email-romain.perier@free-electrons.com> (raw) In-Reply-To: <1466496520-28806-1-git-send-email-romain.perier@free-electrons.com> Currently the crypto requests were sent to engines sequentially. This commit moves the SRAM I/O operations from the prepare to the step functions. It provides flexibility for future works and allow to prepare a request while the engine is running. Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> --- drivers/crypto/marvell/cipher.c | 6 +++--- drivers/crypto/marvell/hash.c | 18 +++++++++--------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/crypto/marvell/cipher.c b/drivers/crypto/marvell/cipher.c index 175ce76..79d4175 100644 --- a/drivers/crypto/marvell/cipher.c +++ b/drivers/crypto/marvell/cipher.c @@ -89,6 +89,9 @@ static void mv_cesa_ablkcipher_std_step(struct ablkcipher_request *req) size_t len = min_t(size_t, req->nbytes - sreq->offset, CESA_SA_SRAM_PAYLOAD_SIZE); + mv_cesa_adjust_op(engine, &sreq->op); + memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op)); + len = sg_pcopy_to_buffer(req->src, creq->src_nents, engine->sram + CESA_SA_DATA_SRAM_OFFSET, len, sreq->offset); @@ -177,12 +180,9 @@ mv_cesa_ablkcipher_std_prepare(struct ablkcipher_request *req) { struct mv_cesa_ablkcipher_req *creq = ablkcipher_request_ctx(req); struct mv_cesa_ablkcipher_std_req *sreq = &creq->std; - struct mv_cesa_engine *engine = creq->base.engine; sreq->size = 0; sreq->offset = 0; - mv_cesa_adjust_op(engine, &sreq->op); - memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op)); } static inline void mv_cesa_ablkcipher_prepare(struct crypto_async_request *req, diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c index 09665a7..e1f8acd 100644 --- a/drivers/crypto/marvell/hash.c +++ b/drivers/crypto/marvell/hash.c @@ -162,6 +162,15 @@ static void mv_cesa_ahash_std_step(struct ahash_request *req) unsigned int new_cache_ptr = 0; u32 frag_mode; size_t len; + unsigned int digsize; + int i; + + mv_cesa_adjust_op(engine, &creq->op_tmpl); + memcpy_toio(engine->sram, &creq->op_tmpl, sizeof(creq->op_tmpl)); + + digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(req)); + for (i = 0; i < digsize / 4; i++) + writel_relaxed(creq->state[i], engine->regs + CESA_IVDIG(i)); if (creq->cache_ptr) memcpy_toio(engine->sram + CESA_SA_DATA_SRAM_OFFSET, @@ -265,11 +274,8 @@ static void mv_cesa_ahash_std_prepare(struct ahash_request *req) { struct mv_cesa_ahash_req *creq = ahash_request_ctx(req); struct mv_cesa_ahash_std_req *sreq = &creq->req.std; - struct mv_cesa_engine *engine = creq->base.engine; sreq->offset = 0; - mv_cesa_adjust_op(engine, &creq->op_tmpl); - memcpy_toio(engine->sram, &creq->op_tmpl, sizeof(creq->op_tmpl)); } static void mv_cesa_ahash_step(struct crypto_async_request *req) @@ -336,8 +342,6 @@ static void mv_cesa_ahash_prepare(struct crypto_async_request *req, { struct ahash_request *ahashreq = ahash_request_cast(req); struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq); - unsigned int digsize; - int i; creq->base.engine = engine; @@ -345,10 +349,6 @@ static void mv_cesa_ahash_prepare(struct crypto_async_request *req, mv_cesa_ahash_dma_prepare(ahashreq); else mv_cesa_ahash_std_prepare(ahashreq); - - digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(ahashreq)); - for (i = 0; i < digsize / 4; i++) - writel_relaxed(creq->state[i], engine->regs + CESA_IVDIG(i)); } static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req) -- 2.7.4
next prev parent reply other threads:[~2016-06-21 8:08 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-21 8:08 [PATCH v3 00/10] Chain crypto requests together at the DMA level Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-21 8:08 ` [PATCH v3 01/10] crypto: marvell: Add a macro constant for the size of the crypto queue Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-21 8:08 ` [PATCH v3 02/10] crypto: marvell: Check engine is not already running when enabling a req Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-22 10:33 ` Herbert Xu 2016-06-22 10:33 ` Herbert Xu 2016-06-22 11:23 ` Romain Perier 2016-06-22 11:23 ` Romain Perier 2016-06-23 10:44 ` Herbert Xu 2016-06-23 10:44 ` Herbert Xu 2016-06-21 8:08 ` [PATCH v3 03/10] crypto: marvell: Fix wrong type check in dma functions Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-21 8:08 ` [PATCH v3 04/10] crypto: marvell: Copy IV vectors by DMA transfers for acipher requests Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-21 8:08 ` [PATCH v3 05/10] crypto: marvell: Move tdma chain out of mv_cesa_tdma_req and remove it Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-21 8:08 ` [PATCH v3 06/10] crypto: marvell: Add a complete operation for async requests Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-21 8:08 ` Romain Perier [this message] 2016-06-21 8:08 ` [PATCH v3 07/10] crypto: marvell: Move SRAM I/O operations to step functions Romain Perier 2016-06-21 8:08 ` [PATCH v3 08/10] crypto: marvell: Add load balancing between engines Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-21 12:33 ` Boris Brezillon 2016-06-21 12:33 ` Boris Brezillon 2016-06-21 8:08 ` [PATCH v3 09/10] crypto: marvell: Add support for chaining crypto requests in TDMA mode Romain Perier 2016-06-21 8:08 ` Romain Perier 2016-06-21 12:37 ` Boris Brezillon 2016-06-21 12:37 ` Boris Brezillon 2016-06-21 8:08 ` [PATCH v3 10/10] crypto: marvell: Increase the size of the crypto queue Romain Perier 2016-06-21 8:08 ` Romain Perier
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