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* [PATCH 1/2] intel: Add more Kabylake PCI IDs.
@ 2016-06-23 21:50 Rodrigo Vivi
  2016-06-23 21:50 ` [PATCH 2/2] intel: Removing PCI IDs that are no longer listed as Kabylake Rodrigo Vivi
                   ` (2 more replies)
  0 siblings, 3 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2016-06-23 21:50 UTC (permalink / raw)
  To: mesa-dev; +Cc: intel-gfx, Rodrigo Vivi

The spec has been updated adding new PCI IDs.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 intel/intel_chipset.h | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index e2554c3..0c3ca82 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -194,7 +194,9 @@
 #define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
 #define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
 #define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
-#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
+#define PCI_CHIP_KABYLAKE_ULT_GT3_0	0x5923
+#define PCI_CHIP_KABYLAKE_ULT_GT3_1	0x5926
+#define PCI_CHIP_KABYLAKE_ULT_GT3_2	0x5927
 #define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
 #define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
 #define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
@@ -206,7 +208,8 @@
 #define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
 #define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
 #define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
-#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
+#define PCI_CHIP_KABYLAKE_H_GT1_0	0x5908
+#define PCI_CHIP_KABYLAKE_H_GT1_1	0x590B
 #define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
 #define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
 #define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
@@ -414,7 +417,8 @@
 				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_H_GT1_0	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_H_GT1_1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
 
 #define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
@@ -425,7 +429,9 @@
 				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
 
-#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3	|| \
+#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
 
-- 
2.5.5

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 2/2] intel: Removing PCI IDs that are no longer listed as Kabylake.
  2016-06-23 21:50 [PATCH 1/2] intel: Add more Kabylake PCI IDs Rodrigo Vivi
@ 2016-06-23 21:50 ` Rodrigo Vivi
  2016-06-24 10:13 ` ✗ Ro.CI.BAT: failure for series starting with [1/2] intel: Add more Kabylake PCI IDs Patchwork
  2016-06-24 22:42 ` [PATCH 1/2] " Pandiyan, Dhinakaran
  2 siblings, 0 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2016-06-23 21:50 UTC (permalink / raw)
  To: mesa-dev; +Cc: intel-gfx, Rodrigo Vivi

This is unusual. Usually IDs listed on early stages of platform
definition are kept there as reserved for later use.

However these IDs here are not listed anymore in any of steppings
and devices IDs tables for Kabylake on configurations overview
section of BSpec.

So it is better removing them before they become used in any
other future platform.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 intel/intel_chipset.h | 16 +++-------------
 1 file changed, 3 insertions(+), 13 deletions(-)

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 0c3ca82..79c152e 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -204,18 +204,13 @@
 #define PCI_CHIP_KABYLAKE_DT_GT2	0x5912
 #define PCI_CHIP_KABYLAKE_DT_GT1_5	0x5917
 #define PCI_CHIP_KABYLAKE_DT_GT1	0x5902
-#define PCI_CHIP_KABYLAKE_DT_GT4	0x5932
 #define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
 #define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
-#define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
 #define PCI_CHIP_KABYLAKE_H_GT1_0	0x5908
 #define PCI_CHIP_KABYLAKE_H_GT1_1	0x590B
 #define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
-#define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
 #define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
-#define PCI_CHIP_KABYLAKE_SRV_GT4	0x593A
 #define PCI_CHIP_KABYLAKE_WKS_GT2	0x591D
-#define PCI_CHIP_KABYLAKE_WKS_GT4	0x593D
 
 #define PCI_CHIP_BROXTON_0		0x0A84
 #define PCI_CHIP_BROXTON_1		0x1A84
@@ -431,14 +426,9 @@
 
 #define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
-
-#define IS_KBL_GT4(devid)	((devid) == PCI_CHIP_KABYLAKE_DT_GT4	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT4	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT4	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT4)
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2)
+
+#define IS_KBL_GT4(devid)	((devid) == PCI_CHIP_KABYLAKE_HALO_GT4)
 
 #define IS_KABYLAKE(devid)	(IS_KBL_GT1(devid) || \
 				 IS_KBL_GT2(devid) || \
-- 
2.5.5

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* ✗ Ro.CI.BAT: failure for series starting with [1/2] intel: Add more Kabylake PCI IDs.
  2016-06-23 21:50 [PATCH 1/2] intel: Add more Kabylake PCI IDs Rodrigo Vivi
  2016-06-23 21:50 ` [PATCH 2/2] intel: Removing PCI IDs that are no longer listed as Kabylake Rodrigo Vivi
@ 2016-06-24 10:13 ` Patchwork
  2016-06-24 22:42 ` [PATCH 1/2] " Pandiyan, Dhinakaran
  2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2016-06-24 10:13 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] intel: Add more Kabylake PCI IDs.
URL   : https://patchwork.freedesktop.org/series/9102/
State : failure

== Summary ==

Applying: intel: Add more Kabylake PCI IDs.
fatal: sha1 information is lacking or useless (intel/intel_chipset.h).
error: could not build fake ancestor
Patch failed at 0001 intel: Add more Kabylake PCI IDs.
The copy of the patch that failed is found in: .git/rebase-apply/patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 1/2] intel: Add more Kabylake PCI IDs.
  2016-06-23 21:50 [PATCH 1/2] intel: Add more Kabylake PCI IDs Rodrigo Vivi
  2016-06-23 21:50 ` [PATCH 2/2] intel: Removing PCI IDs that are no longer listed as Kabylake Rodrigo Vivi
  2016-06-24 10:13 ` ✗ Ro.CI.BAT: failure for series starting with [1/2] intel: Add more Kabylake PCI IDs Patchwork
@ 2016-06-24 22:42 ` Pandiyan, Dhinakaran
  2016-06-24 22:57   ` Vivi, Rodrigo
  2 siblings, 1 reply; 7+ messages in thread
From: Pandiyan, Dhinakaran @ 2016-06-24 22:42 UTC (permalink / raw)
  To: Vivi, Rodrigo; +Cc: mesa-dev, intel-gfx

On Thu, 2016-06-23 at 14:50 -0700, Rodrigo Vivi wrote:
> The spec has been updated adding new PCI IDs.
> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  intel/intel_chipset.h | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index e2554c3..0c3ca82 100644
> --- a/intel/intel_chipset.h
> +++ b/intel/intel_chipset.h
> @@ -194,7 +194,9 @@
>  #define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
>  #define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
>  #define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
> -#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_0	0x5923
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_1	0x5926
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_2	0x5927
>  #define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
>  #define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
>  #define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
> @@ -206,7 +208,8 @@
>  #define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
>  #define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
>  #define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
> -#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
> +#define PCI_CHIP_KABYLAKE_H_GT1_0	0x5908
> +#define PCI_CHIP_KABYLAKE_H_GT1_1	0x590B

Does H here mean Halo? Some of defines have the whole word "HALO" and
some "H". Shouldn't we keep that uniform? 

>  #define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
>  #define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
>  #define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
> @@ -414,7 +417,8 @@
>  				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
> -				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_H_GT1_0	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_H_GT1_1	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
>  
>  #define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
> @@ -425,7 +429,9 @@
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
>  
> -#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3	|| \
> +#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
>  

I verified the PCI IDs against the Spec, looks good to me.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 1/2] intel: Add more Kabylake PCI IDs.
  2016-06-24 22:42 ` [PATCH 1/2] " Pandiyan, Dhinakaran
@ 2016-06-24 22:57   ` Vivi, Rodrigo
  0 siblings, 0 replies; 7+ messages in thread
From: Vivi, Rodrigo @ 2016-06-24 22:57 UTC (permalink / raw)
  To: Pandiyan, Dhinakaran; +Cc: mesa-dev, intel-gfx

On Fri, 2016-06-24 at 22:42 +0000, Pandiyan, Dhinakaran wrote:
> On Thu, 2016-06-23 at 14:50 -0700, Rodrigo Vivi wrote:
> > 
> > The spec has been updated adding new PCI IDs.
> > 
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  intel/intel_chipset.h | 14 ++++++++++----
> >  1 file changed, 10 insertions(+), 4 deletions(-)
> > 
> > diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> > index e2554c3..0c3ca82 100644
> > --- a/intel/intel_chipset.h
> > +++ b/intel/intel_chipset.h
> > @@ -194,7 +194,9 @@
> >  #define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
> >  #define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
> >  #define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
> > -#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
> > +#define PCI_CHIP_KABYLAKE_ULT_GT3_0	0x5923
> > +#define PCI_CHIP_KABYLAKE_ULT_GT3_1	0x5926
> > +#define PCI_CHIP_KABYLAKE_ULT_GT3_2	0x5927
> >  #define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
> >  #define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
> >  #define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
> > @@ -206,7 +208,8 @@
> >  #define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
> >  #define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
> >  #define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
> > -#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
> > +#define PCI_CHIP_KABYLAKE_H_GT1_0	0x5908
> > +#define PCI_CHIP_KABYLAKE_H_GT1_1	0x590B
> Does H here mean Halo? Some of defines have the whole word "HALO" and
> some "H". Shouldn't we keep that uniform? 

I also like keeping it uniform, but was trying to keep the alignment...
otherwise I'd have to touch all lines and didn't want change all lines
that are not directly being affected....

Yeap H for Halo, like U for ULT and like Y for ULX :/
(KBL ULX are actually more known as KBL-Y. Nobody uses the terms ULT
and ULX after BDW...)

But you point is definitely good. I just don't know if I send one patch
to just fix the name convention and one to fix the ids or let HALO and
mess with alignments... suggestions?


> 
> > 
> >  #define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
> >  #define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
> >  #define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
> > @@ -414,7 +417,8 @@
> >  				 (devid) ==
> > PCI_CHIP_KABYLAKE_ULT_GT1	|| \
> >  				 (devid) ==
> > PCI_CHIP_KABYLAKE_ULX_GT1	|| \
> >  				 (devid) ==
> > PCI_CHIP_KABYLAKE_DT_GT1	|| \
> > -				 (devid) ==
> > PCI_CHIP_KABYLAKE_HALO_GT1	|| \
> > +				 (devid) ==
> > PCI_CHIP_KABYLAKE_H_GT1_0	|| \
> > +				 (devid) ==
> > PCI_CHIP_KABYLAKE_H_GT1_1	|| \
> >  				 (devid) ==
> > PCI_CHIP_KABYLAKE_SRV_GT1)
> >  
> >  #define IS_KBL_GT2(devid)	((devid) ==
> > PCI_CHIP_KABYLAKE_ULT_GT2	|| \
> > @@ -425,7 +429,9 @@
> >  				 (devid) ==
> > PCI_CHIP_KABYLAKE_SRV_GT2	|| \
> >  				 (devid) ==
> > PCI_CHIP_KABYLAKE_WKS_GT2)
> >  
> > -#define IS_KBL_GT3(devid)	((devid) ==
> > PCI_CHIP_KABYLAKE_ULT_GT3	|| \
> > +#define IS_KBL_GT3(devid)	((devid) ==
> > PCI_CHIP_KABYLAKE_ULT_GT3_0	|| \
> > +				 (devid) ==
> > PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
> > +				 (devid) ==
> > PCI_CHIP_KABYLAKE_ULT_GT3_2	|| \
> >  				 (devid) ==
> > PCI_CHIP_KABYLAKE_HALO_GT3	|| \
> >  				 (devid) ==
> > PCI_CHIP_KABYLAKE_SRV_GT3)
> >  
> I verified the PCI IDs against the Spec, looks good to me.
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 1/2] intel: Add more Kabylake PCI IDs.
  2016-06-28  0:10 Rodrigo Vivi
@ 2016-06-28 19:38 ` Pandiyan, Dhinakaran
  0 siblings, 0 replies; 7+ messages in thread
From: Pandiyan, Dhinakaran @ 2016-06-28 19:38 UTC (permalink / raw)
  To: Vivi, Rodrigo; +Cc: mesa-dev, intel-gfx

On Mon, 2016-06-27 at 17:10 -0700, Rodrigo Vivi wrote:
> The spec has been updated adding new PCI IDs.
> 
> v2: Avoid using "H" instead of HALO to keep names uniform - DK.
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  intel/intel_chipset.h | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index e2554c3..6b8d4e9 100644
> --- a/intel/intel_chipset.h
> +++ b/intel/intel_chipset.h
> @@ -194,7 +194,9 @@
>  #define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
>  #define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
>  #define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
> -#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_0	0x5923
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_1	0x5926
> +#define PCI_CHIP_KABYLAKE_ULT_GT3_2	0x5927
>  #define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
>  #define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
>  #define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
> @@ -206,7 +208,8 @@
>  #define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
>  #define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
>  #define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
> -#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
> +#define PCI_CHIP_KABYLAKE_HALO_GT1_0	0x5908
> +#define PCI_CHIP_KABYLAKE_HALO_GT1_1	0x590B
>  #define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
>  #define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
>  #define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
> @@ -414,7 +417,8 @@
>  				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
> -				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \
> +				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
>  
>  #define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
> @@ -425,7 +429,9 @@
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
>  
> -#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3	|| \
> +#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
>  				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
>  
Checked against the spec, lgtm.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
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^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 1/2] intel: Add more Kabylake PCI IDs.
@ 2016-06-28  0:10 Rodrigo Vivi
  2016-06-28 19:38 ` Pandiyan, Dhinakaran
  0 siblings, 1 reply; 7+ messages in thread
From: Rodrigo Vivi @ 2016-06-28  0:10 UTC (permalink / raw)
  To: mesa-dev; +Cc: intel-gfx, Dhinakaran Pandiyan, Rodrigo Vivi

The spec has been updated adding new PCI IDs.

v2: Avoid using "H" instead of HALO to keep names uniform - DK.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 intel/intel_chipset.h | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index e2554c3..6b8d4e9 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -194,7 +194,9 @@
 #define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
 #define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
 #define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
-#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
+#define PCI_CHIP_KABYLAKE_ULT_GT3_0	0x5923
+#define PCI_CHIP_KABYLAKE_ULT_GT3_1	0x5926
+#define PCI_CHIP_KABYLAKE_ULT_GT3_2	0x5927
 #define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
 #define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
 #define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
@@ -206,7 +208,8 @@
 #define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
 #define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
 #define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
-#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
+#define PCI_CHIP_KABYLAKE_HALO_GT1_0	0x5908
+#define PCI_CHIP_KABYLAKE_HALO_GT1_1	0x590B
 #define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
 #define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
 #define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
@@ -414,7 +417,8 @@
 				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \
 				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
 
 #define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
@@ -425,7 +429,9 @@
 				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
 
-#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3	|| \
+#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
 
-- 
2.5.5

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^ permalink raw reply related	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2016-06-28 19:38 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-06-23 21:50 [PATCH 1/2] intel: Add more Kabylake PCI IDs Rodrigo Vivi
2016-06-23 21:50 ` [PATCH 2/2] intel: Removing PCI IDs that are no longer listed as Kabylake Rodrigo Vivi
2016-06-24 10:13 ` ✗ Ro.CI.BAT: failure for series starting with [1/2] intel: Add more Kabylake PCI IDs Patchwork
2016-06-24 22:42 ` [PATCH 1/2] " Pandiyan, Dhinakaran
2016-06-24 22:57   ` Vivi, Rodrigo
2016-06-28  0:10 Rodrigo Vivi
2016-06-28 19:38 ` Pandiyan, Dhinakaran

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