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* [PATCH] drm/i915/guc: symbolic names for user load/submission preferences
@ 2016-07-11 17:12 Dave Gordon
  2016-07-11 19:58 ` Chris Wilson
  2016-07-12  5:28 ` ✗ Ro.CI.BAT: failure for " Patchwork
  0 siblings, 2 replies; 5+ messages in thread
From: Dave Gordon @ 2016-07-11 17:12 UTC (permalink / raw)
  To: intel-gfx

The existing code that accesses the "enable_guc_loading" and
"enable_guc_submission" parameters uses explicit numerical
values for the various possibilities, including in some cases
relying on boolean 0/1 mapping to specific values (which could
be confusing for maintainers).

So this patch just provides and uses names for the values
representing the DEFAULT, DISABLED, PREFERRED, and MANDATORY
options that the user can select (-1, 0, 1, 2 respectively).

This should produce identical code to the previous version!

Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_guc_submission.c |  2 +-
 drivers/gpu/drm/i915/intel_guc.h           | 15 +++++++++++++++
 drivers/gpu/drm/i915/intel_guc_loader.c    | 26 ++++++++++++++------------
 drivers/gpu/drm/i915/intel_lrc.c           |  6 +++---
 4 files changed, 33 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 2112e02..33c0e0ab 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -971,7 +971,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
 	bitmap_clear(guc->doorbell_bitmap, 0, GUC_MAX_DOORBELLS);
 	i915_guc_submission_disable(dev_priv);
 
-	if (!i915.enable_guc_submission)
+	if (i915.enable_guc_submission == GUC_SUBMISSION_DISABLED)
 		return 0; /* not enabled  */
 
 	if (guc->ctx_pool_obj)
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 3e3e743..7ac835c 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -90,6 +90,21 @@ struct i915_guc_client {
 	uint64_t submissions[I915_NUM_ENGINES];
 };
 
+/* These represent user-requested preferences */
+enum {
+	GUC_SUBMISSION_DEFAULT = -1,
+	GUC_SUBMISSION_DISABLED = 0,
+	GUC_SUBMISSION_PREFERRED,
+	GUC_SUBMISSION_MANDATORY
+};
+enum {
+	FIRMWARE_LOAD_DEFAULT = -1,
+	FIRMWARE_LOAD_DISABLED = 0,
+	FIRMWARE_LOAD_PREFERRED,
+	FIRMWARE_LOAD_MANDATORY
+};
+
+/* These represent the actual firmware status  */
 enum intel_guc_fw_status {
 	GUC_FIRMWARE_FAIL = -1,
 	GUC_FIRMWARE_NONE = 0,
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 605c696..2cd37db 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -189,7 +189,7 @@ static void set_guc_init_params(struct drm_i915_private *dev_priv)
 	}
 
 	/* If GuC submission is enabled, set up additional parameters here */
-	if (i915.enable_guc_submission) {
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) {
 		u32 pgs = i915_gem_obj_ggtt_offset(dev_priv->guc.ctx_pool_obj);
 		u32 ctx_in_16 = GUC_MAX_GPU_CONTEXTS / 16;
 
@@ -424,7 +424,7 @@ int intel_guc_setup(struct drm_device *dev)
 		intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
 
 	/* Loading forbidden, or no firmware to load? */
-	if (!i915.enable_guc_loading) {
+	if (i915.enable_guc_loading == FIRMWARE_LOAD_DISABLED) {
 		err = 0;
 		goto fail;
 	} else if (fw_path == NULL) {
@@ -493,7 +493,7 @@ int intel_guc_setup(struct drm_device *dev)
 		intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
 		intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
 
-	if (i915.enable_guc_submission) {
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) {
 		err = i915_guc_submission_enable(dev_priv);
 		if (err)
 			goto fail;
@@ -519,9 +519,9 @@ int intel_guc_setup(struct drm_device *dev)
 	 * nonfatal error (i.e. it doesn't prevent driver load, but
 	 * marks the GPU as wedged until reset).
 	 */
-	if (i915.enable_guc_loading > 1) {
+	if (i915.enable_guc_loading >= FIRMWARE_LOAD_MANDATORY) {
 		ret = -EIO;
-	} else if (i915.enable_guc_submission > 1) {
+	} else if (i915.enable_guc_submission >= GUC_SUBMISSION_MANDATORY) {
 		ret = -EIO;
 	} else {
 		ret = 0;
@@ -536,7 +536,7 @@ int intel_guc_setup(struct drm_device *dev)
 	else
 		DRM_ERROR("GuC firmware load failed: %d\n", err);
 
-	if (i915.enable_guc_submission) {
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) {
 		if (fw_path == NULL)
 			DRM_INFO("GuC submission without firmware not supported\n");
 		if (ret == 0)
@@ -544,7 +544,7 @@ int intel_guc_setup(struct drm_device *dev)
 		else
 			DRM_ERROR("GuC init failed: %d\n", ret);
 	}
-	i915.enable_guc_submission = 0;
+	i915.enable_guc_submission = GUC_SUBMISSION_DISABLED;
 
 	return ret;
 }
@@ -686,10 +686,12 @@ void intel_guc_init(struct drm_device *dev)
 	const char *fw_path;
 
 	/* A negative value means "use platform default" */
-	if (i915.enable_guc_loading < 0)
-		i915.enable_guc_loading = HAS_GUC_UCODE(dev);
-	if (i915.enable_guc_submission < 0)
-		i915.enable_guc_submission = HAS_GUC_SCHED(dev);
+	if (i915.enable_guc_loading <= FIRMWARE_LOAD_DEFAULT)
+		i915.enable_guc_loading = HAS_GUC_UCODE(dev) ?
+			FIRMWARE_LOAD_PREFERRED : FIRMWARE_LOAD_DISABLED;
+	if (i915.enable_guc_submission <= GUC_SUBMISSION_DEFAULT)
+		i915.enable_guc_submission = HAS_GUC_SCHED(dev) ?
+			GUC_SUBMISSION_PREFERRED : GUC_SUBMISSION_DISABLED;
 
 	if (!HAS_GUC_UCODE(dev)) {
 		fw_path = NULL;
@@ -715,7 +717,7 @@ void intel_guc_init(struct drm_device *dev)
 	guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE;
 
 	/* Early (and silent) return if GuC loading is disabled */
-	if (!i915.enable_guc_loading)
+	if (i915.enable_guc_loading == FIRMWARE_LOAD_DISABLED)
 		return;
 	if (fw_path == NULL)
 		return;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 70c6990..2c530dc 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -719,7 +719,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
 
 	request->ringbuf = ce->ringbuf;
 
-	if (i915.enable_guc_submission) {
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) {
 		/*
 		 * Check that the GuC has space for the request before
 		 * going any further, as the i915_add_request() call
@@ -798,7 +798,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
 	request->previous_context = engine->last_context;
 	engine->last_context = request->ctx;
 
-	if (i915.enable_guc_submission)
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED)
 		i915_guc_submit(request);
 	else
 		execlists_context_queue(request);
@@ -992,7 +992,7 @@ static int intel_lr_context_pin(struct i915_gem_context *ctx,
 	ce->state->dirty = true;
 
 	/* Invalidate GuC TLB. */
-	if (i915.enable_guc_submission)
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED)
 		I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE);
 
 	return 0;
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915/guc: symbolic names for user load/submission preferences
  2016-07-11 17:12 [PATCH] drm/i915/guc: symbolic names for user load/submission preferences Dave Gordon
@ 2016-07-11 19:58 ` Chris Wilson
  2016-07-12 11:49   ` Dave Gordon
  2016-07-12  5:28 ` ✗ Ro.CI.BAT: failure for " Patchwork
  1 sibling, 1 reply; 5+ messages in thread
From: Chris Wilson @ 2016-07-11 19:58 UTC (permalink / raw)
  To: Dave Gordon; +Cc: intel-gfx

On Mon, Jul 11, 2016 at 06:12:40PM +0100, Dave Gordon wrote:
> The existing code that accesses the "enable_guc_loading" and
> "enable_guc_submission" parameters uses explicit numerical
> values for the various possibilities, including in some cases
> relying on boolean 0/1 mapping to specific values (which could
> be confusing for maintainers).
> 
> So this patch just provides and uses names for the values
> representing the DEFAULT, DISABLED, PREFERRED, and MANDATORY
> options that the user can select (-1, 0, 1, 2 respectively).

When is MANDATORY a good idea? If the hw doesn't support any other
mechanism, then it will shut itself down gracefully if setup fails. If
the user wants to force guc for testing, they only need to set the
module parameter then check the guc is enabled afterwards and fail the
test. At what point do we need such a warty user interface to the kernel?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* ✗ Ro.CI.BAT: failure for drm/i915/guc: symbolic names for user load/submission preferences
  2016-07-11 17:12 [PATCH] drm/i915/guc: symbolic names for user load/submission preferences Dave Gordon
  2016-07-11 19:58 ` Chris Wilson
@ 2016-07-12  5:28 ` Patchwork
  1 sibling, 0 replies; 5+ messages in thread
From: Patchwork @ 2016-07-12  5:28 UTC (permalink / raw)
  To: Dave Gordon; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/guc: symbolic names for user load/submission preferences
URL   : https://patchwork.freedesktop.org/series/9724/
State : failure

== Summary ==

Series 9724v1 drm/i915/guc: symbolic names for user load/submission preferences
http://patchwork.freedesktop.org/api/1.0/series/9724/revisions/1/mbox

Test drv_module_reload_basic:
                pass       -> DMESG-WARN (ro-bdw-i7-5600u)
Test gem_sync:
        Subgroup basic-store-each:
                pass       -> DMESG-FAIL (ro-bdw-i7-5600u)

fi-kbl-qkkr      total:237  pass:168  dwarn:27  dfail:2   fail:4   skip:36 
fi-skl-i5-6260u  total:237  pass:212  dwarn:0   dfail:1   fail:4   skip:20 
fi-skl-i7-6700k  total:237  pass:198  dwarn:0   dfail:1   fail:4   skip:34 
fi-snb-i7-2600   total:237  pass:184  dwarn:0   dfail:1   fail:4   skip:48 
ro-bdw-i5-5250u  total:237  pass:207  dwarn:1   dfail:1   fail:4   skip:24 
ro-bdw-i7-5557U  total:237  pass:207  dwarn:1   dfail:1   fail:4   skip:24 
ro-bdw-i7-5600u  total:237  pass:191  dwarn:1   dfail:2   fail:4   skip:39 
ro-bsw-n3050     total:217  pass:170  dwarn:0   dfail:0   fail:4   skip:42 
ro-byt-n2820     total:237  pass:183  dwarn:0   dfail:1   fail:7   skip:46 
ro-hsw-i3-4010u  total:237  pass:200  dwarn:0   dfail:1   fail:4   skip:32 
ro-hsw-i7-4770r  total:237  pass:200  dwarn:0   dfail:1   fail:4   skip:32 
ro-ilk-i7-620lm  total:237  pass:160  dwarn:0   dfail:1   fail:5   skip:71 
ro-ilk1-i5-650   total:232  pass:160  dwarn:0   dfail:1   fail:5   skip:66 
ro-ivb-i7-3770   total:237  pass:191  dwarn:0   dfail:1   fail:4   skip:41 
ro-skl3-i5-6260u total:237  pass:211  dwarn:1   dfail:1   fail:4   skip:20 
ro-snb-i7-2620M  total:237  pass:182  dwarn:0   dfail:1   fail:5   skip:49 

Results at /archive/results/CI_IGT_test/RO_Patchwork_1467/

e549c0b drm-intel-nightly: 2016y-07m-11d-12h-49m-29s UTC integration manifest
99c8b84 drm/i915/guc: symbolic names for user load/submission preferences

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915/guc: symbolic names for user load/submission preferences
  2016-07-11 19:58 ` Chris Wilson
@ 2016-07-12 11:49   ` Dave Gordon
  0 siblings, 0 replies; 5+ messages in thread
From: Dave Gordon @ 2016-07-12 11:49 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx

On 11/07/16 20:58, Chris Wilson wrote:
> On Mon, Jul 11, 2016 at 06:12:40PM +0100, Dave Gordon wrote:
>> The existing code that accesses the "enable_guc_loading" and
>> "enable_guc_submission" parameters uses explicit numerical
>> values for the various possibilities, including in some cases
>> relying on boolean 0/1 mapping to specific values (which could
>> be confusing for maintainers).
>>
>> So this patch just provides and uses names for the values
>> representing the DEFAULT, DISABLED, PREFERRED, and MANDATORY
>> options that the user can select (-1, 0, 1, 2 respectively).
>
> When is MANDATORY a good idea? If the hw doesn't support any other
> mechanism, then it will shut itself down gracefully if setup fails. If
> the user wants to force guc for testing, they only need to set the
> module parameter then check the guc is enabled afterwards and fail the
> test. At what point do we need such a warty user interface to the kernel?
> -Chris

Validation like it, so it's REALLY REALLY OBVIOUS if the system is 
misconfigured (e.g. wrong firmware version) as driver initialisation 
will fail rather than quietly continue by falling back to execlists.

Remember Daniel originally insisted on NO FALLBACK -- again, so that 
developers and testers didn't get confused by the system continuing to 
work despite the presence of a (hardware,firmware,driver) bug  -- so 
that's the option that provides it.

Of course it's not what end-users want, and so it's not what end-users 
get. You only get NO-FALLBACK mode if you specifically ask for it.

Note also, all this is already implemented, this patch just provides 
symbolic names for the code to use instead of literal numbers.

.Dave.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH] drm/i915/guc: symbolic names for user load/submission preferences
  2016-07-05 12:32 [PATCH] drm/i915/guc: Protect against HAS_GUC_* returning true values other than one Dave Gordon
@ 2016-07-13 13:01 ` Dave Gordon
  0 siblings, 0 replies; 5+ messages in thread
From: Dave Gordon @ 2016-07-13 13:01 UTC (permalink / raw)
  To: intel-gfx

The existing code that accesses the "enable_guc_loading" and
"enable_guc_submission" parameters uses explicit numerical
values for the various possibilities, including in some cases
relying on boolean 0/1 mapping to specific values (which could
be confusing for maintainers).

So this patch just provides and uses names for the values
representing the DEFAULT, DISABLED, PREFERRED, and MANDATORY
options that the user can select (-1, 0, 1, 2 respectively).

This should produce identical code to the previous version!

Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_guc_submission.c |  2 +-
 drivers/gpu/drm/i915/intel_guc.h           | 15 +++++++++++++++
 drivers/gpu/drm/i915/intel_guc_loader.c    | 26 ++++++++++++++------------
 drivers/gpu/drm/i915/intel_lrc.c           |  6 +++---
 4 files changed, 33 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 2112e02..33c0e0ab 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -971,7 +971,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
 	bitmap_clear(guc->doorbell_bitmap, 0, GUC_MAX_DOORBELLS);
 	i915_guc_submission_disable(dev_priv);
 
-	if (!i915.enable_guc_submission)
+	if (i915.enable_guc_submission == GUC_SUBMISSION_DISABLED)
 		return 0; /* not enabled  */
 
 	if (guc->ctx_pool_obj)
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 3e3e743..7ac835c 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -90,6 +90,21 @@ struct i915_guc_client {
 	uint64_t submissions[I915_NUM_ENGINES];
 };
 
+/* These represent user-requested preferences */
+enum {
+	GUC_SUBMISSION_DEFAULT = -1,
+	GUC_SUBMISSION_DISABLED = 0,
+	GUC_SUBMISSION_PREFERRED,
+	GUC_SUBMISSION_MANDATORY
+};
+enum {
+	FIRMWARE_LOAD_DEFAULT = -1,
+	FIRMWARE_LOAD_DISABLED = 0,
+	FIRMWARE_LOAD_PREFERRED,
+	FIRMWARE_LOAD_MANDATORY
+};
+
+/* These represent the actual firmware status  */
 enum intel_guc_fw_status {
 	GUC_FIRMWARE_FAIL = -1,
 	GUC_FIRMWARE_NONE = 0,
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 605c696..2cd37db 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -189,7 +189,7 @@ static void set_guc_init_params(struct drm_i915_private *dev_priv)
 	}
 
 	/* If GuC submission is enabled, set up additional parameters here */
-	if (i915.enable_guc_submission) {
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) {
 		u32 pgs = i915_gem_obj_ggtt_offset(dev_priv->guc.ctx_pool_obj);
 		u32 ctx_in_16 = GUC_MAX_GPU_CONTEXTS / 16;
 
@@ -424,7 +424,7 @@ int intel_guc_setup(struct drm_device *dev)
 		intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
 
 	/* Loading forbidden, or no firmware to load? */
-	if (!i915.enable_guc_loading) {
+	if (i915.enable_guc_loading == FIRMWARE_LOAD_DISABLED) {
 		err = 0;
 		goto fail;
 	} else if (fw_path == NULL) {
@@ -493,7 +493,7 @@ int intel_guc_setup(struct drm_device *dev)
 		intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
 		intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
 
-	if (i915.enable_guc_submission) {
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) {
 		err = i915_guc_submission_enable(dev_priv);
 		if (err)
 			goto fail;
@@ -519,9 +519,9 @@ int intel_guc_setup(struct drm_device *dev)
 	 * nonfatal error (i.e. it doesn't prevent driver load, but
 	 * marks the GPU as wedged until reset).
 	 */
-	if (i915.enable_guc_loading > 1) {
+	if (i915.enable_guc_loading >= FIRMWARE_LOAD_MANDATORY) {
 		ret = -EIO;
-	} else if (i915.enable_guc_submission > 1) {
+	} else if (i915.enable_guc_submission >= GUC_SUBMISSION_MANDATORY) {
 		ret = -EIO;
 	} else {
 		ret = 0;
@@ -536,7 +536,7 @@ int intel_guc_setup(struct drm_device *dev)
 	else
 		DRM_ERROR("GuC firmware load failed: %d\n", err);
 
-	if (i915.enable_guc_submission) {
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) {
 		if (fw_path == NULL)
 			DRM_INFO("GuC submission without firmware not supported\n");
 		if (ret == 0)
@@ -544,7 +544,7 @@ int intel_guc_setup(struct drm_device *dev)
 		else
 			DRM_ERROR("GuC init failed: %d\n", ret);
 	}
-	i915.enable_guc_submission = 0;
+	i915.enable_guc_submission = GUC_SUBMISSION_DISABLED;
 
 	return ret;
 }
@@ -686,10 +686,12 @@ void intel_guc_init(struct drm_device *dev)
 	const char *fw_path;
 
 	/* A negative value means "use platform default" */
-	if (i915.enable_guc_loading < 0)
-		i915.enable_guc_loading = HAS_GUC_UCODE(dev);
-	if (i915.enable_guc_submission < 0)
-		i915.enable_guc_submission = HAS_GUC_SCHED(dev);
+	if (i915.enable_guc_loading <= FIRMWARE_LOAD_DEFAULT)
+		i915.enable_guc_loading = HAS_GUC_UCODE(dev) ?
+			FIRMWARE_LOAD_PREFERRED : FIRMWARE_LOAD_DISABLED;
+	if (i915.enable_guc_submission <= GUC_SUBMISSION_DEFAULT)
+		i915.enable_guc_submission = HAS_GUC_SCHED(dev) ?
+			GUC_SUBMISSION_PREFERRED : GUC_SUBMISSION_DISABLED;
 
 	if (!HAS_GUC_UCODE(dev)) {
 		fw_path = NULL;
@@ -715,7 +717,7 @@ void intel_guc_init(struct drm_device *dev)
 	guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE;
 
 	/* Early (and silent) return if GuC loading is disabled */
-	if (!i915.enable_guc_loading)
+	if (i915.enable_guc_loading == FIRMWARE_LOAD_DISABLED)
 		return;
 	if (fw_path == NULL)
 		return;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 70c6990..2c530dc 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -719,7 +719,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
 
 	request->ringbuf = ce->ringbuf;
 
-	if (i915.enable_guc_submission) {
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED) {
 		/*
 		 * Check that the GuC has space for the request before
 		 * going any further, as the i915_add_request() call
@@ -798,7 +798,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
 	request->previous_context = engine->last_context;
 	engine->last_context = request->ctx;
 
-	if (i915.enable_guc_submission)
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED)
 		i915_guc_submit(request);
 	else
 		execlists_context_queue(request);
@@ -992,7 +992,7 @@ static int intel_lr_context_pin(struct i915_gem_context *ctx,
 	ce->state->dirty = true;
 
 	/* Invalidate GuC TLB. */
-	if (i915.enable_guc_submission)
+	if (i915.enable_guc_submission != GUC_SUBMISSION_DISABLED)
 		I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE);
 
 	return 0;
-- 
1.9.1

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^ permalink raw reply related	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-07-13 13:01 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-07-11 17:12 [PATCH] drm/i915/guc: symbolic names for user load/submission preferences Dave Gordon
2016-07-11 19:58 ` Chris Wilson
2016-07-12 11:49   ` Dave Gordon
2016-07-12  5:28 ` ✗ Ro.CI.BAT: failure for " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2016-07-05 12:32 [PATCH] drm/i915/guc: Protect against HAS_GUC_* returning true values other than one Dave Gordon
2016-07-13 13:01 ` [PATCH] drm/i915/guc: symbolic names for user load/submission preferences Dave Gordon

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