From: Chris Zhong <zyw@rock-chips.com> To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, groeck@chromium.org, myungjoo.ham@samsung.com, cw00.choi@samsung.com, wulf@rock-chips.com, marcheu@chromium.org Cc: linux-rockchip@lists.infradead.org, Chris Zhong <zyw@rock-chips.com>, Mark Yao <mark.yao@rock-chips.com>, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Kumar Gala <galak@codeaurora.org>, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [v6 PATCH 5/6] Documentation: bindings: add dt documentation for cdn DP controller Date: Thu, 21 Jul 2016 21:13:27 +0800 [thread overview] Message-ID: <1469106808-28297-6-git-send-email-zyw@rock-chips.com> (raw) In-Reply-To: <1469106808-28297-1-git-send-email-zyw@rock-chips.com> This patch adds a binding that describes the cdn DP controller for rk3399. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> --- Changes in v6: - add assigned-clocks and assigned-clock-rates - add power-domains Changes in v5: None Changes in v4: - add a reset node - support 2 phys Changes in v3: - add SoC specific compatible string - remove reg = <1>; Changes in v2: None Changes in v1: - add extcon node description - add #sound-dai-cells description .../bindings/display/rockchip/cdn-dp-rockchip.txt | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt new file mode 100644 index 0000000..af87dcc --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt @@ -0,0 +1,74 @@ +Rockchip RK3399 specific extensions to the cdn Display Port +================================ + +Required properties: +- compatible: must be "rockchip,rk3399-cdn-dp" + +- reg: physical base address of the controller and length + +- clocks: from common clock binding: handle to dp clock. + +- clock-names: from common clock binding: + Required elements: "core-clk" "pclk" "spdif" + +- resets : a list of phandle + reset specifier pairs +- reset-names : string reset name, must be: + "spdif" +- power-domains : power-domain property defined with a phandle + to respective power domain. +- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE> +- assigned-clock-rates : the DP core clk frequency, shall be: 100000000 + +- rockchip,grf: this soc should set GRF regs, so need get grf here. + +- ports: contain a port nodes with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + contained 2 endpoints, connecting to the output of vop. + +- phys: from general PHY binding: the phandle for the PHY device. + +- extcon: extcon specifier for the Power Delivery + +- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF + +------------------------------------------------------------------------------- + +Example: + cdn_dp: dp@fec00000 { + compatible = "rockchip,rk3399-cdn-dp"; + reg = <0x0 0xfec00000 0x0 0x100000>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, + <&cru SCLK_SPDIF_REC_DPTX>; + clock-names = "core-clk", "pclk", "spdif"; + assigned-clocks = <&cru SCLK_DP_CORE>; + assigned-clock-rates = <100000000>; + power-domains = <&power RK3399_PD_HDCP>; + phys = <&tcphy0>, <&tcphy1>; + resets = <&cru SRST_DPTX_SPDIF_REC>; + reset-names = "spdif"; + extcon = <&fusb0>, <&fusb1>; + rockchip,grf = <&grf>; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + dp_in: port { + #address-cells = <1>; + #size-cells = <0>; + dp_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_dp>; + }; + + dp_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_dp>; + }; + }; + }; + }; -- 2.6.3
WARNING: multiple messages have this Message-ID (diff)
From: zyw@rock-chips.com (Chris Zhong) To: linux-arm-kernel@lists.infradead.org Subject: [v6 PATCH 5/6] Documentation: bindings: add dt documentation for cdn DP controller Date: Thu, 21 Jul 2016 21:13:27 +0800 [thread overview] Message-ID: <1469106808-28297-6-git-send-email-zyw@rock-chips.com> (raw) In-Reply-To: <1469106808-28297-1-git-send-email-zyw@rock-chips.com> This patch adds a binding that describes the cdn DP controller for rk3399. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> --- Changes in v6: - add assigned-clocks and assigned-clock-rates - add power-domains Changes in v5: None Changes in v4: - add a reset node - support 2 phys Changes in v3: - add SoC specific compatible string - remove reg = <1>; Changes in v2: None Changes in v1: - add extcon node description - add #sound-dai-cells description .../bindings/display/rockchip/cdn-dp-rockchip.txt | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt new file mode 100644 index 0000000..af87dcc --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt @@ -0,0 +1,74 @@ +Rockchip RK3399 specific extensions to the cdn Display Port +================================ + +Required properties: +- compatible: must be "rockchip,rk3399-cdn-dp" + +- reg: physical base address of the controller and length + +- clocks: from common clock binding: handle to dp clock. + +- clock-names: from common clock binding: + Required elements: "core-clk" "pclk" "spdif" + +- resets : a list of phandle + reset specifier pairs +- reset-names : string reset name, must be: + "spdif" +- power-domains : power-domain property defined with a phandle + to respective power domain. +- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE> +- assigned-clock-rates : the DP core clk frequency, shall be: 100000000 + +- rockchip,grf: this soc should set GRF regs, so need get grf here. + +- ports: contain a port nodes with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + contained 2 endpoints, connecting to the output of vop. + +- phys: from general PHY binding: the phandle for the PHY device. + +- extcon: extcon specifier for the Power Delivery + +- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF + +------------------------------------------------------------------------------- + +Example: + cdn_dp: dp at fec00000 { + compatible = "rockchip,rk3399-cdn-dp"; + reg = <0x0 0xfec00000 0x0 0x100000>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, + <&cru SCLK_SPDIF_REC_DPTX>; + clock-names = "core-clk", "pclk", "spdif"; + assigned-clocks = <&cru SCLK_DP_CORE>; + assigned-clock-rates = <100000000>; + power-domains = <&power RK3399_PD_HDCP>; + phys = <&tcphy0>, <&tcphy1>; + resets = <&cru SRST_DPTX_SPDIF_REC>; + reset-names = "spdif"; + extcon = <&fusb0>, <&fusb1>; + rockchip,grf = <&grf>; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + dp_in: port { + #address-cells = <1>; + #size-cells = <0>; + dp_in_vopb: endpoint at 0 { + reg = <0>; + remote-endpoint = <&vopb_out_dp>; + }; + + dp_in_vopl: endpoint at 1 { + reg = <1>; + remote-endpoint = <&vopl_out_dp>; + }; + }; + }; + }; -- 2.6.3
next prev parent reply other threads:[~2016-07-21 13:15 UTC|newest] Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-07-21 13:13 [v6 PATCH 0/6] Rockchip Type-C and DisplayPort driver Chris Zhong 2016-07-21 13:13 ` Chris Zhong 2016-07-21 13:13 ` [v6 PATCH 1/6] extcon: Add Type-C and DP support Chris Zhong 2016-07-22 9:29 ` Chanwoo Choi 2016-07-22 9:40 ` Chris Zhong 2016-07-22 17:23 ` Guenter Roeck 2016-07-22 18:21 ` Guenter Roeck 2016-07-23 2:19 ` Chanwoo Choi 2016-07-22 21:40 ` Guenter Roeck 2016-07-23 2:20 ` Chanwoo Choi 2016-07-21 13:13 ` [v6 PATCH 2/6] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY Chris Zhong 2016-07-21 13:13 ` Chris Zhong 2016-07-21 13:13 ` [v6 PATCH 3/6] phy: Add USB Type-C PHY driver for rk3399 Chris Zhong 2016-07-21 13:13 ` Chris Zhong 2016-07-21 13:13 ` Chris Zhong 2016-07-21 13:13 ` [v6 PATCH 4/6] arm64: dts: rockchip: add Type-C phy for RK3399 Chris Zhong 2016-07-21 13:13 ` Chris Zhong 2016-07-21 13:13 ` Chris Zhong [this message] 2016-07-21 13:13 ` [v6 PATCH 5/6] Documentation: bindings: add dt documentation for cdn DP controller Chris Zhong 2016-07-21 13:13 ` [v6 PATCH 6/6] drm/rockchip: cdn-dp: add cdn DP support for rk3399 Chris Zhong 2016-07-21 13:13 ` Chris Zhong 2016-07-21 13:13 ` Chris Zhong 2016-07-22 0:41 ` Mark yao 2016-07-22 0:41 ` Mark yao 2016-07-22 0:41 ` Mark yao 2016-07-22 1:40 ` Guenter Roeck 2016-07-22 1:40 ` Guenter Roeck 2016-07-22 2:14 ` [v6.1 " Chris Zhong 2016-07-22 2:14 ` Chris Zhong
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