[PATCH 0/3] net/thunderx: add 81xx SoC support

[PATCH 0/3] net/thunderx: add 81xx SoC support

[Jerin Jacob]

CN81xx is four core version of ThunderX SoC.

Added the support by adding new HW capability flag to select
the difference in runtime.

Jerin Jacob (3):
  net/thunderx: remove generic passx references from the driver
  net/thunderx: introduce cqe_rx2 HW capability flag
  net/thunderx: add 81xx SoC support

 doc/guides/nics/thunderx.rst         |  1 +
 drivers/net/thunderx/base/nicvf_hw.c |  5 ++++-
 drivers/net/thunderx/base/nicvf_hw.h | 18 ++++++++---------
 drivers/net/thunderx/nicvf_ethdev.c  | 38 ++++++++++++++++++++++++------------
 4 files changed, 39 insertions(+), 23 deletions(-)

-- 
2.5.5

[PATCH 1/3] net/thunderx: remove generic passx references from the driver

[Jerin Jacob]

thunderx pmd driver needs to support multiple SoC
variants in ThunderX family.
Remove generic pass references from driver as each SoC
can have same pass number.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 drivers/net/thunderx/base/nicvf_hw.c |  2 +-
 drivers/net/thunderx/base/nicvf_hw.h | 12 +++++-------
 drivers/net/thunderx/nicvf_ethdev.c  | 24 ++++++++++++------------
 3 files changed, 18 insertions(+), 20 deletions(-)

diff --git a/drivers/net/thunderx/base/nicvf_hw.c b/drivers/net/thunderx/base/nicvf_hw.c
index 001b0ed..2b12d9c 100644
--- a/drivers/net/thunderx/base/nicvf_hw.c
+++ b/drivers/net/thunderx/base/nicvf_hw.c
@@ -140,7 +140,7 @@ nicvf_base_init(struct nicvf *nic)
 	if (nic->subsystem_device_id == 0)
 		return NICVF_ERR_BASE_INIT;
 
-	if (nicvf_hw_version(nic) == NICVF_PASS2)
+	if (nicvf_hw_version(nic) == PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF)
 		nic->hwcap |= NICVF_CAP_TUNNEL_PARSING;
 
 	return NICVF_OK;
diff --git a/drivers/net/thunderx/base/nicvf_hw.h b/drivers/net/thunderx/base/nicvf_hw.h
index 9db1d30..602a6ff 100644
--- a/drivers/net/thunderx/base/nicvf_hw.h
+++ b/drivers/net/thunderx/base/nicvf_hw.h
@@ -37,11 +37,11 @@
 
 #include "nicvf_hw_defs.h"
 
-#define	PCI_VENDOR_ID_CAVIUM			0x177D
-#define	PCI_DEVICE_ID_THUNDERX_PASS1_NICVF	0x0011
-#define	PCI_DEVICE_ID_THUNDERX_PASS2_NICVF	0xA034
-#define	PCI_SUB_DEVICE_ID_THUNDERX_PASS1_NICVF	0xA11E
-#define	PCI_SUB_DEVICE_ID_THUNDERX_PASS2_NICVF	0xA134
+#define	PCI_VENDOR_ID_CAVIUM				0x177D
+#define	PCI_DEVICE_ID_THUNDERX_CN88XX_PASS1_NICVF	0x0011
+#define	PCI_DEVICE_ID_THUNDERX_NICVF			0xA034
+#define	PCI_SUB_DEVICE_ID_CN88XX_PASS1_NICVF		0xA11E
+#define	PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF		0xA134
 
 #define NICVF_ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
 
@@ -50,8 +50,6 @@
 #define NICVF_GET_TX_STATS(reg) \
 	nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
 
-#define NICVF_PASS1	(PCI_SUB_DEVICE_ID_THUNDERX_PASS1_NICVF)
-#define NICVF_PASS2	(PCI_SUB_DEVICE_ID_THUNDERX_PASS2_NICVF)
 
 #define NICVF_CAP_TUNNEL_PARSING          (1ULL << 0)
 
diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c
index 4f875c0..3802d49 100644
--- a/drivers/net/thunderx/nicvf_ethdev.c
+++ b/drivers/net/thunderx/nicvf_ethdev.c
@@ -265,7 +265,7 @@ nicvf_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 	size_t copied;
 	static uint32_t ptypes[32];
 	struct nicvf *nic = nicvf_pmd_priv(dev);
-	static const uint32_t ptypes_pass1[] = {
+	static const uint32_t ptypes_common[] = {
 		RTE_PTYPE_L3_IPV4,
 		RTE_PTYPE_L3_IPV4_EXT,
 		RTE_PTYPE_L3_IPV6,
@@ -274,7 +274,7 @@ nicvf_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 		RTE_PTYPE_L4_UDP,
 		RTE_PTYPE_L4_FRAG,
 	};
-	static const uint32_t ptypes_pass2[] = {
+	static const uint32_t ptypes_tunnel[] = {
 		RTE_PTYPE_TUNNEL_GRE,
 		RTE_PTYPE_TUNNEL_GENEVE,
 		RTE_PTYPE_TUNNEL_VXLAN,
@@ -282,12 +282,12 @@ nicvf_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 	};
 	static const uint32_t ptypes_end = RTE_PTYPE_UNKNOWN;
 
-	copied = sizeof(ptypes_pass1);
-	memcpy(ptypes, ptypes_pass1, copied);
-	if (nicvf_hw_version(nic) == NICVF_PASS2) {
-		memcpy((char *)ptypes + copied, ptypes_pass2,
-			sizeof(ptypes_pass2));
-		copied += sizeof(ptypes_pass2);
+	copied = sizeof(ptypes_common);
+	memcpy(ptypes, ptypes_common, copied);
+	if (nicvf_hw_cap(nic) & NICVF_CAP_TUNNEL_PARSING) {
+		memcpy((char *)ptypes + copied, ptypes_tunnel,
+			sizeof(ptypes_tunnel));
+		copied += sizeof(ptypes_tunnel);
 	}
 
 	memcpy((char *)ptypes + copied, &ptypes_end, sizeof(ptypes_end));
@@ -1741,16 +1741,16 @@ static const struct rte_pci_id pci_id_nicvf_map[] = {
 	{
 		.class_id = RTE_CLASS_ANY_ID,
 		.vendor_id = PCI_VENDOR_ID_CAVIUM,
-		.device_id = PCI_DEVICE_ID_THUNDERX_PASS1_NICVF,
+		.device_id = PCI_DEVICE_ID_THUNDERX_CN88XX_PASS1_NICVF,
 		.subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
-		.subsystem_device_id = PCI_SUB_DEVICE_ID_THUNDERX_PASS1_NICVF,
+		.subsystem_device_id = PCI_SUB_DEVICE_ID_CN88XX_PASS1_NICVF,
 	},
 	{
 		.class_id = RTE_CLASS_ANY_ID,
 		.vendor_id = PCI_VENDOR_ID_CAVIUM,
-		.device_id = PCI_DEVICE_ID_THUNDERX_PASS2_NICVF,
+		.device_id = PCI_DEVICE_ID_THUNDERX_NICVF,
 		.subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
-		.subsystem_device_id = PCI_SUB_DEVICE_ID_THUNDERX_PASS2_NICVF,
+		.subsystem_device_id = PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF,
 	},
 	{
 		.vendor_id = 0,
-- 
2.5.5

[PATCH 2/3] net/thunderx: introduce cqe_rx2 HW capability flag

[Jerin Jacob]

Certain thunderx SoC pass has additional optional word
in Rx descriptor to hold tunneling extension info.
Based on this capability, the location where packet pointer
address stored in Rx descriptor will vary.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 drivers/net/thunderx/base/nicvf_hw.h | 5 +++--
 drivers/net/thunderx/nicvf_ethdev.c  | 7 ++++++-
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/net/thunderx/base/nicvf_hw.h b/drivers/net/thunderx/base/nicvf_hw.h
index 602a6ff..5629d9c 100644
--- a/drivers/net/thunderx/base/nicvf_hw.h
+++ b/drivers/net/thunderx/base/nicvf_hw.h
@@ -50,8 +50,9 @@
 #define NICVF_GET_TX_STATS(reg) \
 	nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
 
-
-#define NICVF_CAP_TUNNEL_PARSING          (1ULL << 0)
+#define NICVF_CAP_TUNNEL_PARSING	(1ULL << 0)
+/* Additional word in Rx descriptor to hold optional tunneling extension info */
+#define NICVF_CAP_CQE_RX2		(1ULL << 1)
 
 enum nicvf_tns_mode {
 	NIC_TNS_BYPASS_MODE,
diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c
index 3802d49..f6faddf 100644
--- a/drivers/net/thunderx/nicvf_ethdev.c
+++ b/drivers/net/thunderx/nicvf_ethdev.c
@@ -1142,7 +1142,12 @@ nicvf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
 	rxq->cq_status = nicvf_qset_base(nic, qidx) + NIC_QSET_CQ_0_7_STATUS;
 	rxq->cq_door = nicvf_qset_base(nic, qidx) + NIC_QSET_CQ_0_7_DOOR;
 	rxq->precharge_cnt = 0;
-	rxq->rbptr_offset = NICVF_CQE_RBPTR_WORD;
+
+	if (nicvf_hw_cap(nic) & NICVF_CAP_CQE_RX2)
+		rxq->rbptr_offset = NICVF_CQE_RX2_RBPTR_WORD;
+	else
+		rxq->rbptr_offset = NICVF_CQE_RBPTR_WORD;
+
 
 	/* Alloc completion queue */
 	if (nicvf_qset_cq_alloc(nic, rxq, rxq->queue_id, nb_desc)) {
-- 
2.5.5

[PATCH 3/3] net/thunderx: add 81xx SoC support

[Jerin Jacob]

81xx NIC subsystem differs in new PCI subsystem_device_id and
NICVF_CAP_CQE_RX2 capability.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 doc/guides/nics/thunderx.rst         | 1 +
 drivers/net/thunderx/base/nicvf_hw.c | 3 +++
 drivers/net/thunderx/base/nicvf_hw.h | 1 +
 drivers/net/thunderx/nicvf_ethdev.c  | 7 +++++++
 4 files changed, 12 insertions(+)

diff --git a/doc/guides/nics/thunderx.rst b/doc/guides/nics/thunderx.rst
index e38f260..0604d25 100644
--- a/doc/guides/nics/thunderx.rst
+++ b/doc/guides/nics/thunderx.rst
@@ -60,6 +60,7 @@ Features of the ThunderX PMD are:
 Supported ThunderX SoCs
 -----------------------
 - CN88xx
+- CN81xx
 
 Prerequisites
 -------------
diff --git a/drivers/net/thunderx/base/nicvf_hw.c b/drivers/net/thunderx/base/nicvf_hw.c
index 2b12d9c..4bdd183 100644
--- a/drivers/net/thunderx/base/nicvf_hw.c
+++ b/drivers/net/thunderx/base/nicvf_hw.c
@@ -143,6 +143,9 @@ nicvf_base_init(struct nicvf *nic)
 	if (nicvf_hw_version(nic) == PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF)
 		nic->hwcap |= NICVF_CAP_TUNNEL_PARSING;
 
+	if (nicvf_hw_version(nic) == PCI_SUB_DEVICE_ID_CN81XX_NICVF)
+		nic->hwcap |= NICVF_CAP_TUNNEL_PARSING | NICVF_CAP_CQE_RX2;
+
 	return NICVF_OK;
 }
 
diff --git a/drivers/net/thunderx/base/nicvf_hw.h b/drivers/net/thunderx/base/nicvf_hw.h
index 5629d9c..a6cda82 100644
--- a/drivers/net/thunderx/base/nicvf_hw.h
+++ b/drivers/net/thunderx/base/nicvf_hw.h
@@ -42,6 +42,7 @@
 #define	PCI_DEVICE_ID_THUNDERX_NICVF			0xA034
 #define	PCI_SUB_DEVICE_ID_CN88XX_PASS1_NICVF		0xA11E
 #define	PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF		0xA134
+#define	PCI_SUB_DEVICE_ID_CN81XX_NICVF			0xA234
 
 #define NICVF_ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
 
diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c
index f6faddf..4402f6a 100644
--- a/drivers/net/thunderx/nicvf_ethdev.c
+++ b/drivers/net/thunderx/nicvf_ethdev.c
@@ -1758,6 +1758,13 @@ static const struct rte_pci_id pci_id_nicvf_map[] = {
 		.subsystem_device_id = PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF,
 	},
 	{
+		.class_id = RTE_CLASS_ANY_ID,
+		.vendor_id = PCI_VENDOR_ID_CAVIUM,
+		.device_id = PCI_DEVICE_ID_THUNDERX_NICVF,
+		.subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
+		.subsystem_device_id = PCI_SUB_DEVICE_ID_CN81XX_NICVF,
+	},
+	{
 		.vendor_id = 0,
 	},
 };
-- 
2.5.5

Re: [PATCH 0/3] net/thunderx: add 81xx SoC support

[Bruce Richardson]

On Thu, Jul 21, 2016 at 07:31:44PM +0530, Jerin Jacob wrote:
> CN81xx is four core version of ThunderX SoC.
> 
> Added the support by adding new HW capability flag to select
> the difference in runtime.
> 
> Jerin Jacob (3):
>   net/thunderx: remove generic passx references from the driver
>   net/thunderx: introduce cqe_rx2 HW capability flag
>   net/thunderx: add 81xx SoC support
> 
Applied to dpdk-next-net/rel_16_11

/Bruce