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From: Lin Huang <hl@rock-chips.com>
To: heiko@sntech.de
Cc: mark.yao@rock-chips.com, myungjoo.ham@samsung.com,
	cw00.choi@samsung.com, airlied@linux.ie, mturquette@baylibre.com,
	dbasehore@chromium.org, sboyd@codeaurora.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	dianders@chromium.org, linux-rockchip@lists.infradead.org,
	kyungmin.park@samsung.com, linux-arm-kernel@lists.infradead.org,
	tixy@linaro.org, xsf@rock-chips.com, typ@rock-chips.com,
	Lin Huang <hl@rock-chips.com>
Subject: [PATCH v3 7/7] drm/rockchip: Add dmc notifier in vop driver
Date: Fri, 22 Jul 2016 17:07:20 +0800	[thread overview]
Message-ID: <1469178440-4668-8-git-send-email-hl@rock-chips.com> (raw)
In-Reply-To: <1469178440-4668-1-git-send-email-hl@rock-chips.com>

when in ddr frequency scaling process, vop can not do
enable or disable operate, since dcf will base on vop vblank
time to do frequency scaling and need to get vop irq if there
have vop enabled. So need register to dmc notifier, and we can
get the dmc status.

Signed-off-by: Lin Huang <hl@rock-chips.com>
---
Changes in v3:
- when do vop eanble/disable, dmc will wait until it finish

Changes in v2:
- None

Changes in v1:
- use wait_event instead usleep

 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 75 ++++++++++++++++++++++++++---
 1 file changed, 69 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 6255e5b..4220629 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -31,6 +31,8 @@
 #include <linux/reset.h>
 #include <linux/delay.h>
 
+#include <soc/rockchip/rockchip_dmc.h>
+
 #include "rockchip_drm_drv.h"
 #include "rockchip_drm_gem.h"
 #include "rockchip_drm_fb.h"
@@ -120,6 +122,11 @@ struct vop {
 
 	const struct vop_data *data;
 
+	struct notifier_block dmc_nb;
+	int dmc_in_process;
+	int vop_switch_status;
+	wait_queue_head_t	wait_dmc_queue;
+	wait_queue_head_t	wait_vop_switch_queue;
 	uint32_t *regsbak;
 	void __iomem *regs;
 
@@ -430,21 +437,56 @@ static void vop_dsp_hold_valid_irq_disable(struct vop *vop)
 	spin_unlock_irqrestore(&vop->irq_lock, flags);
 }
 
+static int dmc_notify(struct notifier_block *nb, unsigned long event,
+		      void *data)
+{
+	struct vop *vop = container_of(nb, struct vop, dmc_nb);
+
+	if (event == DMCFREQ_ADJUST) {
+
+		/*
+		 * check if vop in enable or disable process,
+		 * if yes, wait until it finish, use 200ms as
+		 * timeout.
+		 */
+		wait_event_timeout(vop->wait_vop_switch_queue,
+			   !vop->vop_switch_status, HZ / 5);
+		vop->dmc_in_process = 1;
+	} else if (event == DMCFREQ_FINISH) {
+		vop->dmc_in_process = 0;
+		wake_up(&vop->wait_dmc_queue);
+	}
+
+	return NOTIFY_OK;
+}
+
 static void vop_enable(struct drm_crtc *crtc)
 {
 	struct vop *vop = to_vop(crtc);
 	int ret;
 
+	if (vop->is_enabled)
+		return;
+
+	/*
+	 * if in dmc scaling frequency process, wait until it finish
+	 * use 100ms as timeout time.
+	 */
+	wait_event_timeout(vop->wait_dmc_queue,
+			   !vop->dmc_in_process, HZ / 5);
+
+	vop->vop_switch_status = 1;
+
 	ret = pm_runtime_get_sync(vop->dev);
 	if (ret < 0) {
 		dev_err(vop->dev, "failed to get pm runtime: %d\n", ret);
-		return;
+		goto err;
 	}
 
 	ret = clk_enable(vop->hclk);
 	if (ret < 0) {
 		dev_err(vop->dev, "failed to enable hclk - %d\n", ret);
-		return;
+		goto err;
 	}
 
 	ret = clk_enable(vop->dclk);
@@ -458,7 +500,6 @@ static void vop_enable(struct drm_crtc *crtc)
 		dev_err(vop->dev, "failed to enable aclk - %d\n", ret);
 		goto err_disable_dclk;
 	}
-
 	/*
 	 * Slave iommu shares power, irq and clock with vop.  It was associated
 	 * automatically with this master device via common driver code.
@@ -486,7 +527,9 @@ static void vop_enable(struct drm_crtc *crtc)
 	enable_irq(vop->irq);
 
 	drm_crtc_vblank_on(crtc);
-
+	vop->vop_switch_status = 0;
+	wake_up(&vop->wait_vop_switch_queue);
+	rockchip_dmc_get(&vop->dmc_nb);
 	return;
 
 err_disable_aclk:
@@ -495,6 +538,10 @@ err_disable_dclk:
 	clk_disable(vop->dclk);
 err_disable_hclk:
 	clk_disable(vop->hclk);
+err:
+	vop->vop_switch_status = 0;
+	wake_up(&vop->wait_vop_switch_queue);
+	return;
 }
 
 static void vop_crtc_disable(struct drm_crtc *crtc)
@@ -505,6 +552,15 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 	WARN_ON(vop->event);
 
 	/*
+	 * if in dmc scaling frequency process, wait until it finish
+	 * use 100ms as timeout time.
+	 */
+	wait_event_timeout(vop->wait_dmc_queue,
+			   !vop->dmc_in_process, HZ / 5);
+
+	vop->vop_switch_status = 1;
+
+	/*
 	 * We need to make sure that all windows are disabled before we
 	 * disable that crtc. Otherwise we might try to scan from a destroyed
 	 * buffer later.
@@ -517,7 +573,6 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 		VOP_WIN_SET(vop, win, enable, 0);
 		spin_unlock(&vop->reg_lock);
 	}
-
 	drm_crtc_vblank_off(crtc);
 
 	/*
@@ -548,7 +603,6 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 	 * vop standby complete, so iommu detach is safe.
 	 */
 	rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev);
-
 	clk_disable(vop->dclk);
 	clk_disable(vop->aclk);
 	clk_disable(vop->hclk);
@@ -561,6 +615,9 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 
 		crtc->state->event = NULL;
 	}
+	vop->vop_switch_status = 0;
+	wake_up(&vop->wait_vop_switch_queue);
+	rockchip_dmc_put(&vop->dmc_nb);
 }
 
 static void vop_plane_destroy(struct drm_plane *plane)
@@ -1247,6 +1304,7 @@ static int vop_create_crtc(struct vop *vop)
 		goto err_cleanup_crtc;
 	}
 
+	vop->dmc_nb.notifier_call = dmc_notify;
 	init_completion(&vop->dsp_hold_completion);
 	init_completion(&vop->wait_update_complete);
 	crtc->port = port;
@@ -1468,6 +1526,11 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 	/* IRQ is initially disabled; it gets enabled in power_on */
 	disable_irq(vop->irq);
 
+	init_waitqueue_head(&vop->wait_vop_switch_queue);
+	vop->vop_switch_status = 0;
+	init_waitqueue_head(&vop->wait_dmc_queue);
+	vop->dmc_in_process = 0;
+
 	ret = vop_create_crtc(vop);
 	if (ret)
 		return ret;
-- 
2.6.6

WARNING: multiple messages have this Message-ID (diff)
From: hl@rock-chips.com (Lin Huang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 7/7] drm/rockchip: Add dmc notifier in vop driver
Date: Fri, 22 Jul 2016 17:07:20 +0800	[thread overview]
Message-ID: <1469178440-4668-8-git-send-email-hl@rock-chips.com> (raw)
In-Reply-To: <1469178440-4668-1-git-send-email-hl@rock-chips.com>

when in ddr frequency scaling process, vop can not do
enable or disable operate, since dcf will base on vop vblank
time to do frequency scaling and need to get vop irq if there
have vop enabled. So need register to dmc notifier, and we can
get the dmc status.

Signed-off-by: Lin Huang <hl@rock-chips.com>
---
Changes in v3:
- when do vop eanble/disable, dmc will wait until it finish

Changes in v2:
- None

Changes in v1:
- use wait_event instead usleep

 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 75 ++++++++++++++++++++++++++---
 1 file changed, 69 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 6255e5b..4220629 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -31,6 +31,8 @@
 #include <linux/reset.h>
 #include <linux/delay.h>
 
+#include <soc/rockchip/rockchip_dmc.h>
+
 #include "rockchip_drm_drv.h"
 #include "rockchip_drm_gem.h"
 #include "rockchip_drm_fb.h"
@@ -120,6 +122,11 @@ struct vop {
 
 	const struct vop_data *data;
 
+	struct notifier_block dmc_nb;
+	int dmc_in_process;
+	int vop_switch_status;
+	wait_queue_head_t	wait_dmc_queue;
+	wait_queue_head_t	wait_vop_switch_queue;
 	uint32_t *regsbak;
 	void __iomem *regs;
 
@@ -430,21 +437,56 @@ static void vop_dsp_hold_valid_irq_disable(struct vop *vop)
 	spin_unlock_irqrestore(&vop->irq_lock, flags);
 }
 
+static int dmc_notify(struct notifier_block *nb, unsigned long event,
+		      void *data)
+{
+	struct vop *vop = container_of(nb, struct vop, dmc_nb);
+
+	if (event == DMCFREQ_ADJUST) {
+
+		/*
+		 * check if vop in enable or disable process,
+		 * if yes, wait until it finish, use 200ms as
+		 * timeout.
+		 */
+		wait_event_timeout(vop->wait_vop_switch_queue,
+			   !vop->vop_switch_status, HZ / 5);
+		vop->dmc_in_process = 1;
+	} else if (event == DMCFREQ_FINISH) {
+		vop->dmc_in_process = 0;
+		wake_up(&vop->wait_dmc_queue);
+	}
+
+	return NOTIFY_OK;
+}
+
 static void vop_enable(struct drm_crtc *crtc)
 {
 	struct vop *vop = to_vop(crtc);
 	int ret;
 
+	if (vop->is_enabled)
+		return;
+
+	/*
+	 * if in dmc scaling frequency process, wait until it finish
+	 * use 100ms as timeout time.
+	 */
+	wait_event_timeout(vop->wait_dmc_queue,
+			   !vop->dmc_in_process, HZ / 5);
+
+	vop->vop_switch_status = 1;
+
 	ret = pm_runtime_get_sync(vop->dev);
 	if (ret < 0) {
 		dev_err(vop->dev, "failed to get pm runtime: %d\n", ret);
-		return;
+		goto err;
 	}
 
 	ret = clk_enable(vop->hclk);
 	if (ret < 0) {
 		dev_err(vop->dev, "failed to enable hclk - %d\n", ret);
-		return;
+		goto err;
 	}
 
 	ret = clk_enable(vop->dclk);
@@ -458,7 +500,6 @@ static void vop_enable(struct drm_crtc *crtc)
 		dev_err(vop->dev, "failed to enable aclk - %d\n", ret);
 		goto err_disable_dclk;
 	}
-
 	/*
 	 * Slave iommu shares power, irq and clock with vop.  It was associated
 	 * automatically with this master device via common driver code.
@@ -486,7 +527,9 @@ static void vop_enable(struct drm_crtc *crtc)
 	enable_irq(vop->irq);
 
 	drm_crtc_vblank_on(crtc);
-
+	vop->vop_switch_status = 0;
+	wake_up(&vop->wait_vop_switch_queue);
+	rockchip_dmc_get(&vop->dmc_nb);
 	return;
 
 err_disable_aclk:
@@ -495,6 +538,10 @@ err_disable_dclk:
 	clk_disable(vop->dclk);
 err_disable_hclk:
 	clk_disable(vop->hclk);
+err:
+	vop->vop_switch_status = 0;
+	wake_up(&vop->wait_vop_switch_queue);
+	return;
 }
 
 static void vop_crtc_disable(struct drm_crtc *crtc)
@@ -505,6 +552,15 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 	WARN_ON(vop->event);
 
 	/*
+	 * if in dmc scaling frequency process, wait until it finish
+	 * use 100ms as timeout time.
+	 */
+	wait_event_timeout(vop->wait_dmc_queue,
+			   !vop->dmc_in_process, HZ / 5);
+
+	vop->vop_switch_status = 1;
+
+	/*
 	 * We need to make sure that all windows are disabled before we
 	 * disable that crtc. Otherwise we might try to scan from a destroyed
 	 * buffer later.
@@ -517,7 +573,6 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 		VOP_WIN_SET(vop, win, enable, 0);
 		spin_unlock(&vop->reg_lock);
 	}
-
 	drm_crtc_vblank_off(crtc);
 
 	/*
@@ -548,7 +603,6 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 	 * vop standby complete, so iommu detach is safe.
 	 */
 	rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev);
-
 	clk_disable(vop->dclk);
 	clk_disable(vop->aclk);
 	clk_disable(vop->hclk);
@@ -561,6 +615,9 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 
 		crtc->state->event = NULL;
 	}
+	vop->vop_switch_status = 0;
+	wake_up(&vop->wait_vop_switch_queue);
+	rockchip_dmc_put(&vop->dmc_nb);
 }
 
 static void vop_plane_destroy(struct drm_plane *plane)
@@ -1247,6 +1304,7 @@ static int vop_create_crtc(struct vop *vop)
 		goto err_cleanup_crtc;
 	}
 
+	vop->dmc_nb.notifier_call = dmc_notify;
 	init_completion(&vop->dsp_hold_completion);
 	init_completion(&vop->wait_update_complete);
 	crtc->port = port;
@@ -1468,6 +1526,11 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 	/* IRQ is initially disabled; it gets enabled in power_on */
 	disable_irq(vop->irq);
 
+	init_waitqueue_head(&vop->wait_vop_switch_queue);
+	vop->vop_switch_status = 0;
+	init_waitqueue_head(&vop->wait_dmc_queue);
+	vop->dmc_in_process = 0;
+
 	ret = vop_create_crtc(vop);
 	if (ret)
 		return ret;
-- 
2.6.6

  parent reply	other threads:[~2016-07-22  9:08 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-22  9:07 [PATCH v3 0/7] rk3399 support ddr frequency scaling Lin Huang
2016-07-22  9:07 ` Lin Huang
2016-07-22  9:07 ` [PATCH v3 1/7] firmware: rockchip: sip: Add rockchip SIP runtime service Lin Huang
2016-07-22  9:07   ` Lin Huang
2016-07-22  9:07   ` Lin Huang
2016-07-22 10:00   ` Heiko Stübner
2016-07-22 10:00     ` Heiko Stübner
2016-07-22 20:50   ` Heiko Stübner
2016-07-22 20:50     ` Heiko Stübner
2016-07-24  8:00     ` hl
2016-07-24  8:00       ` hl
2016-07-25 17:36     ` Sudeep Holla
2016-07-25 17:36       ` Sudeep Holla
2016-07-26  1:13       ` hl
2016-07-26  1:13         ` hl
2016-07-22 21:32   ` kbuild test robot
2016-07-22 21:32     ` kbuild test robot
2016-07-22 21:32     ` kbuild test robot
2016-07-26 18:29   ` Mark Rutland
2016-07-26 18:29     ` Mark Rutland
2016-07-22  9:07 ` [PATCH v3 2/7] clk: rockchip: add new clock-type for the ddrclk Lin Huang
2016-07-22  9:07   ` Lin Huang
2016-07-24  9:09   ` Heiko Stübner
2016-07-24  9:09     ` Heiko Stübner
2016-07-24  9:09     ` Heiko Stübner
2016-07-22  9:07 ` [PATCH v3 3/7] clk: rockchip: rk3399: add SCLK_DDRCLK ID for ddrc Lin Huang
2016-07-22  9:07   ` Lin Huang
2016-07-22 10:08   ` Heiko Stübner
2016-07-22 10:08     ` Heiko Stübner
2016-07-22  9:07 ` [PATCH v3 4/7] clk: rockchip: rk3399: add ddrc clock support Lin Huang
2016-07-22  9:07   ` Lin Huang
2016-07-22  9:07 ` [PATCH v3 5/7] PM / devfreq: event: support rockchip dfi controller Lin Huang
2016-07-22  9:07   ` Lin Huang
2016-07-22 20:28   ` Paul Gortmaker
2016-07-22 20:28     ` Paul Gortmaker
2016-07-22 20:28     ` Paul Gortmaker
2016-07-22  9:07 ` [PATCH v3 6/7] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc Lin Huang
2016-07-22  9:07   ` Lin Huang
2016-07-22 20:24   ` Paul Gortmaker
2016-07-22 20:24     ` Paul Gortmaker
2016-07-22 20:24     ` Paul Gortmaker
2016-07-24  7:54     ` hl
2016-07-24  7:54       ` hl
2016-07-24  7:54       ` hl
2016-07-25  6:01   ` Chanwoo Choi
2016-07-25  6:01     ` Chanwoo Choi
2016-07-25  8:47     ` hl
2016-07-25  8:47       ` hl
2016-07-25  9:45       ` Chanwoo Choi
2016-07-25  9:45         ` Chanwoo Choi
2016-07-26  1:15         ` hl
2016-07-26  1:15           ` hl
2016-07-22  9:07 ` Lin Huang [this message]
2016-07-22  9:07   ` [PATCH v3 7/7] drm/rockchip: Add dmc notifier in vop driver Lin Huang

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