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* [PATCH] drm/i915: Protect older gen against intel_gt_init_powersave()
@ 2016-08-02 10:15 Chris Wilson
  2016-08-02 10:41 ` ✗ Ro.CI.BAT: failure for " Patchwork
  2016-08-02 10:55 ` [PATCH] " Ville Syrjälä
  0 siblings, 2 replies; 5+ messages in thread
From: Chris Wilson @ 2016-08-02 10:15 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mika Kuoppala

In the middle of intel_gt_init_powersave() we have an if-chain that ends
with a universal else clause to read gen6+ registers. Older platforms
like Pineview that end up here do not like those registers and may even
OOPS whilst reading them!

Fixes: 3a45b05c4517 ("drm/i915: Preserve current RPS frequency across init")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1ac32428d4db..86e136c23ac2 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6493,7 +6493,7 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv)
 		cherryview_init_gt_powersave(dev_priv);
 	else if (IS_VALLEYVIEW(dev_priv))
 		valleyview_init_gt_powersave(dev_priv);
-	else
+	else if (INTEL_GEN(dev_priv) >= 6)
 		gen6_init_rps_frequencies(dev_priv);
 
 	/* Derive initial user preferences/limits from the hardware limits */
-- 
2.8.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* ✗ Ro.CI.BAT: failure for drm/i915: Protect older gen against intel_gt_init_powersave()
  2016-08-02 10:15 [PATCH] drm/i915: Protect older gen against intel_gt_init_powersave() Chris Wilson
@ 2016-08-02 10:41 ` Patchwork
  2016-08-02 10:55 ` [PATCH] " Ville Syrjälä
  1 sibling, 0 replies; 5+ messages in thread
From: Patchwork @ 2016-08-02 10:41 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Protect older gen against intel_gt_init_powersave()
URL   : https://patchwork.freedesktop.org/series/10499/
State : failure

== Summary ==

Series 10499v1 drm/i915: Protect older gen against intel_gt_init_powersave()
http://patchwork.freedesktop.org/api/1.0/series/10499/revisions/1/mbox

Test kms_cursor_legacy:
        Subgroup basic-cursor-vs-flip-varying-size:
                pass       -> FAIL       (ro-ilk1-i5-650)
        Subgroup basic-flip-vs-cursor-legacy:
                fail       -> PASS       (fi-hsw-i7-4770k)
        Subgroup basic-flip-vs-cursor-varying-size:
                fail       -> PASS       (ro-hsw-i7-4770r)
                pass       -> FAIL       (ro-snb-i7-2620M)
Test kms_flip:
        Subgroup basic-flip-vs-wf_vblank:
                pass       -> FAIL       (ro-byt-n2820)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-c:
                pass       -> INCOMPLETE (fi-hsw-i7-4770k)

fi-hsw-i7-4770k  total:213  pass:192  dwarn:0   dfail:0   fail:0   skip:20 
fi-kbl-qkkr      total:240  pass:181  dwarn:29  dfail:0   fail:3   skip:27 
fi-skl-i5-6260u  total:240  pass:224  dwarn:0   dfail:0   fail:2   skip:14 
fi-skl-i7-6700k  total:240  pass:208  dwarn:0   dfail:0   fail:4   skip:28 
fi-snb-i7-2600   total:240  pass:198  dwarn:0   dfail:0   fail:0   skip:42 
ro-bdw-i5-5250u  total:240  pass:219  dwarn:4   dfail:0   fail:1   skip:16 
ro-bdw-i7-5600u  total:240  pass:207  dwarn:0   dfail:0   fail:1   skip:32 
ro-bsw-n3050     total:240  pass:194  dwarn:0   dfail:0   fail:4   skip:42 
ro-byt-n2820     total:240  pass:196  dwarn:0   dfail:0   fail:4   skip:40 
ro-hsw-i3-4010u  total:240  pass:214  dwarn:0   dfail:0   fail:0   skip:26 
ro-hsw-i7-4770r  total:240  pass:214  dwarn:0   dfail:0   fail:0   skip:26 
ro-ilk-i7-620lm  total:240  pass:173  dwarn:1   dfail:0   fail:1   skip:65 
ro-ilk1-i5-650   total:235  pass:172  dwarn:0   dfail:0   fail:3   skip:60 
ro-ivb-i7-3770   total:240  pass:205  dwarn:0   dfail:0   fail:0   skip:35 
ro-ivb2-i7-3770  total:240  pass:209  dwarn:0   dfail:0   fail:0   skip:31 
ro-skl3-i5-6260u total:240  pass:222  dwarn:0   dfail:0   fail:4   skip:14 
ro-snb-i7-2620M  total:240  pass:197  dwarn:0   dfail:0   fail:2   skip:41 
ro-bdw-i7-5557U failed to connect after reboot

Results at /archive/results/CI_IGT_test/RO_Patchwork_1665/

6f87e85 drm-intel-nightly: 2016y-08m-01d-14h-53m-17s UTC integration manifest
442d7a4 drm/i915: Protect older gen against intel_gt_init_powersave()

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Protect older gen against intel_gt_init_powersave()
  2016-08-02 10:15 [PATCH] drm/i915: Protect older gen against intel_gt_init_powersave() Chris Wilson
  2016-08-02 10:41 ` ✗ Ro.CI.BAT: failure for " Patchwork
@ 2016-08-02 10:55 ` Ville Syrjälä
  2016-08-02 11:09   ` Chris Wilson
  2016-08-02 11:21   ` Joonas Lahtinen
  1 sibling, 2 replies; 5+ messages in thread
From: Ville Syrjälä @ 2016-08-02 10:55 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx, Mika Kuoppala

On Tue, Aug 02, 2016 at 11:15:27AM +0100, Chris Wilson wrote:
> In the middle of intel_gt_init_powersave() we have an if-chain that ends
> with a universal else clause to read gen6+ registers. Older platforms
> like Pineview that end up here do not like those registers and may even
> OOPS whilst reading them!
> 
> Fixes: 3a45b05c4517 ("drm/i915: Preserve current RPS frequency across init")

Shouldn't that be
Fixes: 773ea9a80132 ("drm/i915: Perform static RPS frequency setup before userspace") ?

Either way,
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 1ac32428d4db..86e136c23ac2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6493,7 +6493,7 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv)
>  		cherryview_init_gt_powersave(dev_priv);
>  	else if (IS_VALLEYVIEW(dev_priv))
>  		valleyview_init_gt_powersave(dev_priv);
> -	else
> +	else if (INTEL_GEN(dev_priv) >= 6)
>  		gen6_init_rps_frequencies(dev_priv);
>  
>  	/* Derive initial user preferences/limits from the hardware limits */
> -- 
> 2.8.1

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Protect older gen against intel_gt_init_powersave()
  2016-08-02 10:55 ` [PATCH] " Ville Syrjälä
@ 2016-08-02 11:09   ` Chris Wilson
  2016-08-02 11:21   ` Joonas Lahtinen
  1 sibling, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2016-08-02 11:09 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx, Mika Kuoppala

On Tue, Aug 02, 2016 at 01:55:48PM +0300, Ville Syrjälä wrote:
> On Tue, Aug 02, 2016 at 11:15:27AM +0100, Chris Wilson wrote:
> > In the middle of intel_gt_init_powersave() we have an if-chain that ends
> > with a universal else clause to read gen6+ registers. Older platforms
> > like Pineview that end up here do not like those registers and may even
> > OOPS whilst reading them!
> > 
> > Fixes: 3a45b05c4517 ("drm/i915: Preserve current RPS frequency across init")
> 
> Shouldn't that be
> Fixes: 773ea9a80132 ("drm/i915: Perform static RPS frequency setup before userspace") ?

Yes, I missed in my grep for the commit marker.

Thanks,
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Protect older gen against intel_gt_init_powersave()
  2016-08-02 10:55 ` [PATCH] " Ville Syrjälä
  2016-08-02 11:09   ` Chris Wilson
@ 2016-08-02 11:21   ` Joonas Lahtinen
  1 sibling, 0 replies; 5+ messages in thread
From: Joonas Lahtinen @ 2016-08-02 11:21 UTC (permalink / raw)
  To: Ville Syrjälä, Chris Wilson; +Cc: intel-gfx, Mika Kuoppala

On ti, 2016-08-02 at 13:55 +0300, Ville Syrjälä wrote:
> On Tue, Aug 02, 2016 at 11:15:27AM +0100, Chris Wilson wrote:
> > 
> > In the middle of intel_gt_init_powersave() we have an if-chain that ends
> > with a universal else clause to read gen6+ registers. Older platforms
> > like Pineview that end up here do not like those registers and may even
> > OOPS whilst reading them!
> > 
> > Fixes: 3a45b05c4517 ("drm/i915: Preserve current RPS frequency across init")
> Shouldn't that be
> Fixes: 773ea9a80132 ("drm/i915: Perform static RPS frequency setup before userspace") ?
> 

Me thinks so too, the patch in original Fixes: is the one that
triggered the bug in bisecting(?), but patch that Ville mentioned is
what should be followed by this patch everywhere being applied, so the
Fixes: should point to it.

So with above Fixes: updated.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Regards, Joonas

> Either way,
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 1ac32428d4db..86e136c23ac2 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -6493,7 +6493,7 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv)
> >  		cherryview_init_gt_powersave(dev_priv);
> >  	else if (IS_VALLEYVIEW(dev_priv))
> >  		valleyview_init_gt_powersave(dev_priv);
> > -	else
> > +	else if (INTEL_GEN(dev_priv) >= 6)
> >  		gen6_init_rps_frequencies(dev_priv);
> >  
> >  	/* Derive initial user preferences/limits from the hardware limits */
> > -- 
> > 2.8.1
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-08-02 11:21 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-08-02 10:15 [PATCH] drm/i915: Protect older gen against intel_gt_init_powersave() Chris Wilson
2016-08-02 10:41 ` ✗ Ro.CI.BAT: failure for " Patchwork
2016-08-02 10:55 ` [PATCH] " Ville Syrjälä
2016-08-02 11:09   ` Chris Wilson
2016-08-02 11:21   ` Joonas Lahtinen

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