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From: Rajendra Nayak <rnayak@codeaurora.org>
To: sboyd@codeaurora.org, mturquette@baylibre.com
Cc: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, tdas@codeaurora.org,
	Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v2 05/10] clk: qcom: Add support for PLLs with early output
Date: Thu, 11 Aug 2016 14:10:53 +0530	[thread overview]
Message-ID: <1470904858-11930-6-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1470904858-11930-1-git-send-email-rnayak@codeaurora.org>

Some PLLs can have an additional early output (apart from
the main and aux outputs). Add support for the PLL driver
so it can be used to initialize/configure the early output

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/clk-pll.c | 2 ++
 drivers/clk/qcom/clk-pll.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/clk/qcom/clk-pll.c b/drivers/clk/qcom/clk-pll.c
index 08d2fa2..b463432 100644
--- a/drivers/clk/qcom/clk-pll.c
+++ b/drivers/clk/qcom/clk-pll.c
@@ -268,6 +268,7 @@ static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap,
 	val |= config->mn_ena_mask;
 	val |= config->main_output_mask;
 	val |= config->aux_output_mask;
+	val |= config->early_output_mask;
 
 	mask = config->vco_mask;
 	mask |= config->pre_div_mask;
@@ -275,6 +276,7 @@ static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap,
 	mask |= config->mn_ena_mask;
 	mask |= config->main_output_mask;
 	mask |= config->aux_output_mask;
+	mask |= config->early_output_mask;
 
 	regmap_update_bits(regmap, pll->config_reg, mask, val);
 }
diff --git a/drivers/clk/qcom/clk-pll.h b/drivers/clk/qcom/clk-pll.h
index 083727e..dbe22a9 100644
--- a/drivers/clk/qcom/clk-pll.h
+++ b/drivers/clk/qcom/clk-pll.h
@@ -81,6 +81,7 @@ struct pll_config {
 	u32 mn_ena_mask;
 	u32 main_output_mask;
 	u32 aux_output_mask;
+	u32 early_output_mask;
 };
 
 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap,
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

  parent reply	other threads:[~2016-08-11  8:40 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-11  8:40 [PATCH v2 00/10] clk: qcom: PLL updates Rajendra Nayak
2016-08-11  8:40 ` [PATCH v2 01/10] clk: Fix inconsistencies in usage of data types Rajendra Nayak
2016-08-13  0:59   ` Stephen Boyd
2016-08-11  8:40 ` [PATCH v2 02/10] clk: qcom: Add support for alpha pll hwfsm ops Rajendra Nayak
2016-08-24  6:13   ` Stephen Boyd
2016-08-25  9:05     ` Rajendra Nayak
2016-08-11  8:40 ` [PATCH v2 03/10] clk: qcom: Add support to initialize alpha plls Rajendra Nayak
2016-08-11  8:40 ` [PATCH v2 04/10] clk: qcom: Add support for PLLs with alpha mode Rajendra Nayak
2016-08-24  6:15   ` Stephen Boyd
2016-08-25  9:12     ` Rajendra Nayak
2016-08-11  8:40 ` Rajendra Nayak [this message]
2016-08-11  8:40 ` [PATCH v2 06/10] clk: qcom: Add support for PLLs supporting dynamic reprogramming Rajendra Nayak
2016-08-11  8:40 ` [PATCH v2 07/10] clk: qcom: Add support to enable FSM mode for votable alpha PLLs Rajendra Nayak
2016-08-24  6:31   ` Stephen Boyd
2016-08-25  9:16     ` Rajendra Nayak
2016-08-11  8:40 ` [PATCH v2 08/10] clk: qcom: Cleanup some macro defs Rajendra Nayak
2016-08-13  0:57   ` Stephen Boyd
2016-08-11  8:40 ` [PATCH v2 09/10] clk: qcom: Add .is_enabled ops for clk-alpha-pll Rajendra Nayak
2016-08-24  6:28   ` Stephen Boyd
2016-08-25  9:15     ` Rajendra Nayak
2016-08-11  8:40 ` [PATCH v2 10/10] clk: qcom: Fix .set_rate to handle alpha PLLs w/wo dynamic update Rajendra Nayak
2016-08-24  6:26   ` Stephen Boyd
2016-08-25  9:13     ` Rajendra Nayak
2016-08-24  6:17 ` [PATCH v2 00/10] clk: qcom: PLL updates Stephen Boyd
2016-08-25  9:17   ` Rajendra Nayak

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