* [PATCH v8 01/12] drm: Add missing DP downstream port types
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 02/12] drm: Drop VGA from bpc definitions Mika Kahola
` (12 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Add missing DisplayPort downstream port types. The introduced
new port types are DP++ and Wireless.
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
include/drm/drm_dp_helper.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 63b8bd5..ba9731e 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -211,6 +211,8 @@
# define DP_DS_PORT_TYPE_DVI 2
# define DP_DS_PORT_TYPE_HDMI 3
# define DP_DS_PORT_TYPE_NON_EDID 4
+# define DP_DS_PORT_TYPE_DP_DUALMODE 5
+# define DP_DS_PORT_TYPE_WIRELESS 6
# define DP_DS_PORT_HPD (1 << 3)
/* offset 1 for VGA is maximum megapixels per second / 8 */
/* offset 2 */
--
1.9.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 02/12] drm: Drop VGA from bpc definitions
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
2016-08-17 10:16 ` [PATCH v8 01/12] drm: Add missing DP downstream port types Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 03/12] drm: Helper to read max clock rate Mika Kahola
` (11 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Drop "VGA" from bits per component definitions as these
are also used by other standards such as DVI, HDMI,
DP++.
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
include/drm/drm_dp_helper.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index ba9731e..0d84046 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -216,11 +216,11 @@
# define DP_DS_PORT_HPD (1 << 3)
/* offset 1 for VGA is maximum megapixels per second / 8 */
/* offset 2 */
-# define DP_DS_VGA_MAX_BPC_MASK (3 << 0)
-# define DP_DS_VGA_8BPC 0
-# define DP_DS_VGA_10BPC 1
-# define DP_DS_VGA_12BPC 2
-# define DP_DS_VGA_16BPC 3
+# define DP_DS_MAX_BPC_MASK (3 << 0)
+# define DP_DS_8BPC 0
+# define DP_DS_10BPC 1
+# define DP_DS_12BPC 2
+# define DP_DS_16BPC 3
/* link configuration */
#define DP_LINK_BW_SET 0x100
--
1.9.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 03/12] drm: Helper to read max clock rate
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
2016-08-17 10:16 ` [PATCH v8 01/12] drm: Add missing DP downstream port types Mika Kahola
2016-08-17 10:16 ` [PATCH v8 02/12] drm: Drop VGA from bpc definitions Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 04/12] drm: Helper to read max bits per component Mika Kahola
` (10 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Helper routine to read out maximum supported pixel rate
for DisplayPort legay VGA converter or TMDS clock rate
for other digital legacy converters. The helper returns
clock rate in kHz.
v2: Return early if detailed port cap info is not available.
Replace if-else ladder with switch-case (Ville)
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/drm_dp_helper.c | 33 +++++++++++++++++++++++++++++++++
include/drm/drm_dp_helper.h | 2 ++
2 files changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 031c4d3..7497490 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -439,6 +439,39 @@ int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
}
EXPORT_SYMBOL(drm_dp_link_configure);
+/**
+ * drm_dp_downstream_max_clock() - extract branch device max
+ * pixel rate for legacy VGA
+ * converter or max TMDS clock
+ * rate for others
+ * @dpcd: DisplayPort configuration data
+ * @port_cap: port capabilities
+ *
+ * Returns max clock in kHz on success or 0 if max clock not defined
+ */
+int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ const u8 port_cap[4])
+{
+ int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
+ bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
+ DP_DETAILED_CAP_INFO_AVAILABLE;
+
+ if (!detailed_cap_info)
+ return 0;
+
+ switch (type) {
+ case DP_DS_PORT_TYPE_VGA:
+ return port_cap[1] * 8 * 1000;
+ case DP_DS_PORT_TYPE_DVI:
+ case DP_DS_PORT_TYPE_HDMI:
+ case DP_DS_PORT_TYPE_DP_DUALMODE:
+ return port_cap[1] * 2500;
+ default:
+ return 0;
+ }
+}
+EXPORT_SYMBOL(drm_dp_downstream_max_clock);
+
/*
* I2C-over-AUX implementation
*/
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 0d84046..60dd9dc 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -815,6 +815,8 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);
+int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ const u8 port_cap[4]);
void drm_dp_aux_init(struct drm_dp_aux *aux);
int drm_dp_aux_register(struct drm_dp_aux *aux);
--
1.9.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 04/12] drm: Helper to read max bits per component
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (2 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 03/12] drm: Helper to read max clock rate Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 05/12] drm: Read DP branch device id Mika Kahola
` (9 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Helper routine to read out maximum supported bits per
component for DisplayPort legay converters.
v2: Return early if detailed port cap info is not available.
Replace if-else ladder with switch-case (Ville)
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/drm_dp_helper.c | 42 +++++++++++++++++++++++++++++++++++++++++
include/drm/drm_dp_helper.h | 2 ++
2 files changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 7497490..14e8ea0 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -472,6 +472,48 @@ int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
}
EXPORT_SYMBOL(drm_dp_downstream_max_clock);
+/**
+ * drm_dp_downstream_max_bpc() - extract branch device max
+ * bits per component
+ * @dpcd: DisplayPort configuration data
+ * @port_cap: port capabilities
+ *
+ * Returns max bpc on success or 0 if max bpc not defined
+ */
+int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ const u8 port_cap[4])
+{
+ int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
+ bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
+ DP_DETAILED_CAP_INFO_AVAILABLE;
+ int bpc;
+
+ if (!detailed_cap_info)
+ return 0;
+
+ switch (type) {
+ case DP_DS_PORT_TYPE_VGA:
+ case DP_DS_PORT_TYPE_DVI:
+ case DP_DS_PORT_TYPE_HDMI:
+ case DP_DS_PORT_TYPE_DP_DUALMODE:
+ bpc = port_cap[2] & DP_DS_MAX_BPC_MASK;
+
+ switch (bpc) {
+ case DP_DS_8BPC:
+ return 8;
+ case DP_DS_10BPC:
+ return 10;
+ case DP_DS_12BPC:
+ return 12;
+ case DP_DS_16BPC:
+ return 16;
+ }
+ default:
+ return 0;
+ }
+}
+EXPORT_SYMBOL(drm_dp_downstream_max_bpc);
+
/*
* I2C-over-AUX implementation
*/
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 60dd9dc..f3d1424 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -817,6 +817,8 @@ int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 port_cap[4]);
+int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ const u8 port_cap[4]);
void drm_dp_aux_init(struct drm_dp_aux *aux);
int drm_dp_aux_register(struct drm_dp_aux *aux);
--
1.9.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 05/12] drm: Read DP branch device id
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (3 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 04/12] drm: Helper to read max bits per component Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 06/12] drm/i915: Cleanup DisplayPort AUX channel initialization Mika Kahola
` (8 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Read DisplayPort branch device id string.
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/drm_dp_helper.c | 12 ++++++++++++
include/drm/drm_dp_helper.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 14e8ea0..01ee7af 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -514,6 +514,18 @@ int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
}
EXPORT_SYMBOL(drm_dp_downstream_max_bpc);
+/**
+ * drm_dp_downstream_id() - identify branch device
+ * @aux: DisplayPort AUX channel
+ *
+ * Returns branch device id on success or NULL on failure
+ */
+int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6])
+{
+ return drm_dp_dpcd_read(aux, DP_BRANCH_ID, id, 6);
+}
+EXPORT_SYMBOL(drm_dp_downstream_id);
+
/*
* I2C-over-AUX implementation
*/
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index f3d1424..faea76b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -445,6 +445,7 @@
#define DP_SOURCE_OUI 0x300
#define DP_SINK_OUI 0x400
#define DP_BRANCH_OUI 0x500
+#define DP_BRANCH_ID 0x503
#define DP_SET_POWER 0x600
# define DP_SET_POWER_D0 0x1
@@ -819,6 +820,7 @@ int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 port_cap[4]);
int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 port_cap[4]);
+int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6]);
void drm_dp_aux_init(struct drm_dp_aux *aux);
int drm_dp_aux_register(struct drm_dp_aux *aux);
--
1.9.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 06/12] drm/i915: Cleanup DisplayPort AUX channel initialization
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (4 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 05/12] drm: Read DP branch device id Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 07/12] drm/i915: Read DP branch device HW revision Mika Kahola
` (7 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Let's remove reference to "struct intel_connector *connector"
in intel_dp_aux_init() function as it is no longer required.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 364db90..3dab3bf 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1243,7 +1243,7 @@ intel_dp_aux_fini(struct intel_dp *intel_dp)
}
static void
-intel_dp_aux_init(struct intel_dp *intel_dp, struct intel_connector *connector)
+intel_dp_aux_init(struct intel_dp *intel_dp)
{
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
enum port port = intel_dig_port->port;
@@ -5598,7 +5598,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
connector->interlace_allowed = true;
connector->doublescan_allowed = 0;
- intel_dp_aux_init(intel_dp, intel_connector);
+ intel_dp_aux_init(intel_dp);
INIT_DELAYED_WORK(&intel_dp->panel_vdd_work,
edp_panel_vdd_work);
--
1.9.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 07/12] drm/i915: Read DP branch device HW revision
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (5 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 06/12] drm/i915: Cleanup DisplayPort AUX channel initialization Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 08/12] drm/i915: Read DP branch device SW revision Mika Kahola
` (6 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
HW revision is mandatory field for DisplayPort branch
devices. This is defined in DPCD register field 0x509.
v2: move drm_dp_ds_revision structure to be part of
drm_dp_link structure (Daniel)
v3: remove dependency to drm_dp_helper but instead parse
DPCD and print HW revision info to dmesg (Ville)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 21 +++++++++++++++++++++
include/drm/drm_dp_helper.h | 1 +
2 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3dab3bf..9aebdf6 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1419,6 +1419,25 @@ static void intel_dp_print_rates(struct intel_dp *intel_dp)
DRM_DEBUG_KMS("common rates: %s\n", str);
}
+static void intel_dp_print_hw_revision(struct intel_dp *intel_dp)
+{
+ uint8_t rev;
+ int len;
+
+ if ((drm_debug & DRM_UT_KMS) == 0)
+ return;
+
+ if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
+ DP_DWN_STRM_PORT_PRESENT))
+ return;
+
+ len = drm_dp_dpcd_read(&intel_dp->aux, DP_BRANCH_HW_REV, &rev, 1);
+ if (len < 0)
+ return;
+
+ DRM_DEBUG_KMS("sink hw revision: %d.%d\n", (rev & 0xf0) >> 4, rev & 0xf);
+}
+
static int rate_to_index(int find, const int *rates)
{
int i = 0;
@@ -4282,6 +4301,8 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
intel_dp_probe_oui(intel_dp);
+ intel_dp_print_hw_revision(intel_dp);
+
intel_dp_configure_mst(intel_dp);
if (intel_dp->is_mst) {
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index faea76b..19ac599 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -446,6 +446,7 @@
#define DP_SINK_OUI 0x400
#define DP_BRANCH_OUI 0x500
#define DP_BRANCH_ID 0x503
+#define DP_BRANCH_HW_REV 0x509
#define DP_SET_POWER 0x600
# define DP_SET_POWER_D0 0x1
--
1.9.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 08/12] drm/i915: Read DP branch device SW revision
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (6 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 07/12] drm/i915: Read DP branch device HW revision Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 09/12] Check pixel rate for DP to VGA dongle Mika Kahola
` (5 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
SW revision is mandatory field for DisplayPort branch
devices. This is defined in DPCD register field 0x50A.
v2: move drm_dp_ds_revision structure to be part of
drm_dp_link structure (Daniel)
v3: remove dependency to drm_dp_helper but instead parse
DPCD and print SW revision info to dmesg (Ville)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++++++++++
include/drm/drm_dp_helper.h | 1 +
2 files changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9aebdf6..91ffb79 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1438,6 +1438,25 @@ static void intel_dp_print_hw_revision(struct intel_dp *intel_dp)
DRM_DEBUG_KMS("sink hw revision: %d.%d\n", (rev & 0xf0) >> 4, rev & 0xf);
}
+static void intel_dp_print_sw_revision(struct intel_dp *intel_dp)
+{
+ uint8_t rev[2];
+ int len;
+
+ if ((drm_debug & DRM_UT_KMS) == 0)
+ return;
+
+ if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
+ DP_DWN_STRM_PORT_PRESENT))
+ return;
+
+ len = drm_dp_dpcd_read(&intel_dp->aux, DP_BRANCH_SW_REV, &rev, 2);
+ if (len < 0)
+ return;
+
+ DRM_DEBUG_KMS("sink sw revision: %d.%d\n", rev[0], rev[1]);
+}
+
static int rate_to_index(int find, const int *rates)
{
int i = 0;
@@ -4302,6 +4321,7 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
intel_dp_probe_oui(intel_dp);
intel_dp_print_hw_revision(intel_dp);
+ intel_dp_print_sw_revision(intel_dp);
intel_dp_configure_mst(intel_dp);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 19ac599..215202f 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -447,6 +447,7 @@
#define DP_BRANCH_OUI 0x500
#define DP_BRANCH_ID 0x503
#define DP_BRANCH_HW_REV 0x509
+#define DP_BRANCH_SW_REV 0x50A
#define DP_SET_POWER 0x600
# define DP_SET_POWER_D0 0x1
--
1.9.1
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 09/12] Check pixel rate for DP to VGA dongle
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (7 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 08/12] drm/i915: Read DP branch device SW revision Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 09/12] drm/i915: " Mika Kahola
` (4 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Filter out a mode that exceeds the max pixel rate setting
for DP to VGA dongle. This is defined in DPCD register 0x81
if detailed cap info i.e. info field is 4 bytes long and
it is available for DP downstream port.
The register defines the pixel rate divided by 8 in MP/s.
v2: DPCD read outs and computation moved to drm (Ville, Daniel)
v3: Sink pixel rate computation moved to drm_dp_max_sink_dotclock()
function (Daniel)
v4: Use of drm_dp_helper.c routines to compute max pixel clock (Ville)
v5: Use of intel_dp->downstream_ports to read out port capabilities.
Code restructuring (Ville)
v6: Move DP branch device check to drm_dp_helper.c (Daniel)
v7: Cleanup as suggested by Ville
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 27 ++++++++++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 91ffb79..25f459e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -190,6 +190,29 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes)
return (max_link_clock * max_lanes * 8) / 10;
}
+static int
+intel_dp_downstream_max_dotclock(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct intel_encoder *encoder = &intel_dig_port->base;
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ int max_dotclk = dev_priv->max_dotclk_freq;
+ int ds_max_dotclk;
+
+ int type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;
+
+ if (type != DP_DS_PORT_TYPE_VGA)
+ return max_dotclk;
+
+ ds_max_dotclk = drm_dp_downstream_max_clock(intel_dp->dpcd,
+ intel_dp->downstream_ports);
+
+ if (ds_max_dotclk != 0)
+ max_dotclk = min(max_dotclk, ds_max_dotclk);;
+
+ return max_dotclk;
+}
+
static enum drm_mode_status
intel_dp_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
@@ -199,7 +222,9 @@ intel_dp_mode_valid(struct drm_connector *connector,
struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
int target_clock = mode->clock;
int max_rate, mode_rate, max_lanes, max_link_clock;
- int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
+ int max_dotclk;
+
+ max_dotclk = intel_dp_downstream_max_dotclock(intel_dp);
if (is_edp(intel_dp) && fixed_mode) {
if (mode->hdisplay > fixed_mode->hdisplay)
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 09/12] drm/i915: Check pixel rate for DP to VGA dongle
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (8 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 09/12] Check pixel rate for DP to VGA dongle Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 10/12] drm/i915: Update bits per component for display info Mika Kahola
` (3 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Filter out a mode that exceeds the max pixel rate setting
for DP to VGA dongle. This is defined in DPCD register 0x81
if detailed cap info i.e. info field is 4 bytes long and
it is available for DP downstream port.
The register defines the pixel rate divided by 8 in MP/s.
v2: DPCD read outs and computation moved to drm (Ville, Daniel)
v3: Sink pixel rate computation moved to drm_dp_max_sink_dotclock()
function (Daniel)
v4: Use of drm_dp_helper.c routines to compute max pixel clock (Ville)
v5: Use of intel_dp->downstream_ports to read out port capabilities.
Code restructuring (Ville)
v6: Move DP branch device check to drm_dp_helper.c (Daniel)
v7: Cleanup as suggested by Ville
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 27 ++++++++++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 91ffb79..25f459e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -190,6 +190,29 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes)
return (max_link_clock * max_lanes * 8) / 10;
}
+static int
+intel_dp_downstream_max_dotclock(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct intel_encoder *encoder = &intel_dig_port->base;
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ int max_dotclk = dev_priv->max_dotclk_freq;
+ int ds_max_dotclk;
+
+ int type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;
+
+ if (type != DP_DS_PORT_TYPE_VGA)
+ return max_dotclk;
+
+ ds_max_dotclk = drm_dp_downstream_max_clock(intel_dp->dpcd,
+ intel_dp->downstream_ports);
+
+ if (ds_max_dotclk != 0)
+ max_dotclk = min(max_dotclk, ds_max_dotclk);;
+
+ return max_dotclk;
+}
+
static enum drm_mode_status
intel_dp_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
@@ -199,7 +222,9 @@ intel_dp_mode_valid(struct drm_connector *connector,
struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
int target_clock = mode->clock;
int max_rate, mode_rate, max_lanes, max_link_clock;
- int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
+ int max_dotclk;
+
+ max_dotclk = intel_dp_downstream_max_dotclock(intel_dp);
if (is_edp(intel_dp) && fixed_mode) {
if (mode->hdisplay > fixed_mode->hdisplay)
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 10/12] drm/i915: Update bits per component for display info
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (9 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 09/12] drm/i915: " Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 11/12] drm: Add DP branch device info on debugfs Mika Kahola
` (2 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
DisplayPort branch device may define max supported bits per
component. Update display info based on this value if bpc
is defined.
v2: cleanup to match the drm_dp_helper.c patches introduced
earlier in this series
v3: Fill bpc for connector's display info in separate
drm_dp_helper function (Daniel)
v4: remove updating bpc for display info as it may be overridden
when parsing EDID. Instead, check bpc for DP branch device
during compute_config
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 25f459e..17110d1 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1524,6 +1524,20 @@ void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
}
}
+int intel_dp_compute_bpp(struct intel_dp *intel_dp,
+ struct intel_crtc_state *pipe_config)
+{
+ int bpp, bpc;
+
+ bpp = pipe_config->pipe_bpp;
+ bpc = drm_dp_downstream_max_bpc(intel_dp->dpcd, intel_dp->downstream_ports);
+
+ if (bpc > 0)
+ bpp = min(bpp, 3*bpc);
+
+ return bpp;
+}
+
bool
intel_dp_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
@@ -1589,7 +1603,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
/* Walk through all bpp values. Luckily they're all nicely spaced with 2
* bpc in between. */
- bpp = pipe_config->pipe_bpp;
+ bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
+
if (is_edp(intel_dp)) {
/* Get bpp from vbt only for panels that dont have bpp in edid */
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 11/12] drm: Add DP branch device info on debugfs
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (10 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 10/12] drm/i915: Update bits per component for display info Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:16 ` [PATCH v8 12/12] drm/i915: Check TMDS clock DP to HDMI dongle Mika Kahola
2016-08-17 10:49 ` ✗ Ro.CI.BAT: failure for drm/i915: DP branch devices (rev8) Patchwork
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Read DisplayPort branch device info from through debugfs
interface.
v2: use drm_dp_helper routines to collect data
v3: cleanup to match the drm_dp_helper.c patches introduced
earlier in this series
v4: move DP branch device info to function 'intel_dp_branch_device_info()'
v5: initial step to move debugging info from intel_dp. to drm_dp_helper.c (Daniel)
v6: read hw and sw revision without using specific drm_dp_helper routines
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/drm_dp_helper.c | 81 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_debugfs.c | 3 ++
include/drm/drm_dp_helper.h | 2 +
3 files changed, 86 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 01ee7af..23cd6dc 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -526,6 +526,87 @@ int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6])
}
EXPORT_SYMBOL(drm_dp_downstream_id);
+/**
+ * drm_dp_downstream_debug() - debug DP branch devices
+ * @m: pointer for debugfs file
+ * @dpcd: DisplayPort configuration data
+ * @port_cap: port capabilities
+ * @aux: DisplayPort AUX channel
+ *
+ */
+void drm_dp_downstream_debug(struct seq_file *m, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ const u8 port_cap[4], struct drm_dp_aux *aux)
+{
+ bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
+ DP_DETAILED_CAP_INFO_AVAILABLE;
+ int clk;
+ int bpc;
+ char id[6];
+ int len;
+ uint8_t rev[2];
+ int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
+ bool branch_device = dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT;
+
+ seq_printf(m, "\tDP branch device present: %s\n", branch_device ? "yes" : "no");
+
+ if (!branch_device)
+ return;
+
+ switch (type) {
+ case DP_DS_PORT_TYPE_DP:
+ seq_printf(m, "\t\tType: DisplayPort\n");
+ break;
+ case DP_DS_PORT_TYPE_VGA:
+ seq_printf(m, "\t\tType: VGA\n");
+ break;
+ case DP_DS_PORT_TYPE_DVI:
+ seq_printf(m, "\t\tType: DVI\n");
+ break;
+ case DP_DS_PORT_TYPE_HDMI:
+ seq_printf(m, "\t\tType: HDMI\n");
+ break;
+ case DP_DS_PORT_TYPE_NON_EDID:
+ seq_printf(m, "\t\tType: others without EDID support\n");
+ break;
+ case DP_DS_PORT_TYPE_DP_DUALMODE:
+ seq_printf(m, "\t\tType: DP++\n");
+ break;
+ case DP_DS_PORT_TYPE_WIRELESS:
+ seq_printf(m, "\t\tType: Wireless\n");
+ break;
+ default:
+ seq_printf(m, "\t\tType: N/A\n");
+ }
+
+ drm_dp_downstream_id(aux, id);
+ seq_printf(m, "\t\tID: %s\n", id);
+
+ len = drm_dp_dpcd_read(aux, DP_BRANCH_HW_REV, &rev[0], 1);
+ if (len > 0)
+ seq_printf(m, "\t\tHW: %d.%d\n", (rev[0] & 0xf0) >> 4, rev[0] & 0xf);
+
+ len = drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, &rev, 2);
+ if (len > 0)
+ seq_printf(m, "\t\tSW: %d.%d\n", rev[0], rev[1]);
+
+ if (detailed_cap_info) {
+ clk = drm_dp_downstream_max_clock(dpcd, port_cap);
+
+ if (clk > 0) {
+ if (type == DP_DS_PORT_TYPE_VGA)
+ seq_printf(m, "\t\tMax dot clock: %d kHz\n", clk);
+ else
+ seq_printf(m, "\t\tMax TMDS clock: %d kHz\n", clk);
+ }
+
+ bpc = drm_dp_downstream_max_bpc(dpcd, port_cap);
+
+ if (bpc > 0)
+ seq_printf(m, "\t\tMax bpc: %d\n", bpc);
+ }
+}
+EXPORT_SYMBOL(drm_dp_downstream_debug);
+
/*
* I2C-over-AUX implementation
*/
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 01ae5ee..90c736f 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2923,6 +2923,9 @@ static void intel_dp_info(struct seq_file *m,
seq_printf(m, "\taudio support: %s\n", yesno(intel_dp->has_audio));
if (intel_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
intel_panel_info(m, &intel_connector->panel);
+
+ drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
+ &intel_dp->aux);
}
static void intel_hdmi_info(struct seq_file *m,
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 215202f..2a79882 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -823,6 +823,8 @@ int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 port_cap[4]);
int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6]);
+void drm_dp_downstream_debug(struct seq_file *m, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ const u8 port_cap[4], struct drm_dp_aux *aux);
void drm_dp_aux_init(struct drm_dp_aux *aux);
int drm_dp_aux_register(struct drm_dp_aux *aux);
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v8 12/12] drm/i915: Check TMDS clock DP to HDMI dongle
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (11 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 11/12] drm: Add DP branch device info on debugfs Mika Kahola
@ 2016-08-17 10:16 ` Mika Kahola
2016-08-17 10:49 ` ✗ Ro.CI.BAT: failure for drm/i915: DP branch devices (rev8) Patchwork
13 siblings, 0 replies; 18+ messages in thread
From: Mika Kahola @ 2016-08-17 10:16 UTC (permalink / raw)
To: dri-devel; +Cc: daniel.vetter, intel-gfx
Respect max TMDS clock frequency from DPCD for active
DP to HDMI adapters.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_drv.h | 3 +++
drivers/gpu/drm/i915/intel_hdmi.c | 27 +++++++++++++++++++++++++++
2 files changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1c700b0..b7fd551 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -817,6 +817,9 @@ struct intel_hdmi {
i915_reg_t hdmi_reg;
int ddc_bus;
struct {
+ int max_tmds_clock;
+ } dp_to_hdmi;
+ struct {
enum drm_dp_dual_mode_type type;
int max_tmds_clock;
} dp_dual_mode;
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 4df9f38..1469d00 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1204,6 +1204,9 @@ static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
int max_tmds_clock = intel_hdmi_source_max_tmds_clock(to_i915(dev));
if (respect_downstream_limits) {
+ if (hdmi->dp_to_hdmi.max_tmds_clock)
+ max_tmds_clock = min(max_tmds_clock,
+ hdmi->dp_to_hdmi.max_tmds_clock);
if (hdmi->dp_dual_mode.max_tmds_clock)
max_tmds_clock = min(max_tmds_clock,
hdmi->dp_dual_mode.max_tmds_clock);
@@ -1373,11 +1376,33 @@ intel_hdmi_unset_edid(struct drm_connector *connector)
intel_hdmi->dp_dual_mode.type = DRM_DP_DUAL_MODE_NONE;
intel_hdmi->dp_dual_mode.max_tmds_clock = 0;
+ intel_hdmi->dp_to_hdmi.max_tmds_clock = 0;
+
kfree(to_intel_connector(connector)->detect_edid);
to_intel_connector(connector)->detect_edid = NULL;
}
static void
+intel_hdmi_dp_adapter_detect(struct drm_connector *connector)
+{
+ struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
+ struct intel_digital_port *intel_dig_port =
+ hdmi_to_dig_port(intel_hdmi);
+ struct intel_dp *intel_dp = &intel_dig_port->dp;
+ int type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;
+
+ if (type != DP_DS_PORT_TYPE_HDMI)
+ return;
+
+ intel_hdmi->dp_to_hdmi.max_tmds_clock =
+ drm_dp_downstream_max_clock(intel_dp->dpcd,
+ intel_dp->downstream_ports);
+
+ DRM_DEBUG_KMS("DP HDMI adaptor detected (max TMDS clock : %d kHz\n",
+ intel_hdmi->dp_to_hdmi.max_tmds_clock);
+}
+
+static void
intel_hdmi_dp_dual_mode_detect(struct drm_connector *connector, bool has_edid)
{
struct drm_i915_private *dev_priv = to_i915(connector->dev);
@@ -1438,6 +1463,8 @@ intel_hdmi_set_edid(struct drm_connector *connector, bool force)
intel_hdmi_dp_dual_mode_detect(connector, edid != NULL);
+ intel_hdmi_dp_adapter_detect(connector);
+
intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);
}
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* ✗ Ro.CI.BAT: failure for drm/i915: DP branch devices (rev8)
2016-08-17 10:16 [PATCH v8 00/12] drm/i915: DP branch devices Mika Kahola
` (12 preceding siblings ...)
2016-08-17 10:16 ` [PATCH v8 12/12] drm/i915: Check TMDS clock DP to HDMI dongle Mika Kahola
@ 2016-08-17 10:49 ` Patchwork
13 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2016-08-17 10:49 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: DP branch devices (rev8)
URL : https://patchwork.freedesktop.org/series/6658/
State : failure
== Summary ==
Series 6658v8 drm/i915: DP branch devices
http://patchwork.freedesktop.org/api/1.0/series/6658/revisions/8/mbox
Test gem_exec_gttfill:
Subgroup basic:
skip -> PASS (fi-snb-i7-2600)
Test kms_cursor_legacy:
Subgroup basic-flip-vs-cursor-legacy:
pass -> FAIL (ro-byt-n2820)
fail -> PASS (ro-bdw-i5-5250u)
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
pass -> FAIL (ro-bdw-i7-5600u)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> SKIP (ro-bdw-i5-5250u)
Subgroup suspend-read-crc-pipe-c:
incomplete -> PASS (fi-hsw-i7-4770k)
fi-hsw-i7-4770k total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-kbl-qkkr total:244 pass:186 dwarn:29 dfail:0 fail:3 skip:26
fi-skl-i7-6700k total:244 pass:208 dwarn:4 dfail:2 fail:2 skip:28
fi-snb-i7-2600 total:244 pass:202 dwarn:0 dfail:0 fail:0 skip:42
ro-bdw-i5-5250u total:240 pass:220 dwarn:1 dfail:0 fail:0 skip:19
ro-bdw-i7-5557U total:240 pass:220 dwarn:1 dfail:0 fail:0 skip:19
ro-bdw-i7-5600u total:240 pass:205 dwarn:1 dfail:0 fail:2 skip:32
ro-bsw-n3050 total:240 pass:195 dwarn:0 dfail:0 fail:3 skip:42
ro-byt-n2820 total:240 pass:197 dwarn:0 dfail:0 fail:3 skip:40
ro-hsw-i3-4010u total:240 pass:214 dwarn:0 dfail:0 fail:0 skip:26
ro-hsw-i7-4770r total:240 pass:185 dwarn:0 dfail:0 fail:0 skip:55
ro-ilk1-i5-650 total:235 pass:174 dwarn:0 dfail:0 fail:1 skip:60
ro-ivb-i7-3770 total:240 pass:205 dwarn:0 dfail:0 fail:0 skip:35
ro-ivb2-i7-3770 total:240 pass:209 dwarn:0 dfail:0 fail:0 skip:31
ro-skl3-i5-6260u total:240 pass:222 dwarn:0 dfail:0 fail:4 skip:14
Results at /archive/results/CI_IGT_test/RO_Patchwork_1898/
a363b72 drm-intel-nightly: 2016y-08m-17d-05h-29m-02s UTC integration manifest
593c82c drm/i915: Check TMDS clock DP to HDMI dongle
0d002bc drm: Add DP branch device info on debugfs
c098567 drm/i915: Update bits per component for display info
a269993 Check pixel rate for DP to VGA dongle
29d63ce drm/i915: Read DP branch device SW revision
df65802 drm/i915: Read DP branch device HW revision
08d1b98 drm/i915: Cleanup DisplayPort AUX channel initialization
c7c0553 drm: Read DP branch device id
5408560 drm: Helper to read max bits per component
3e73e27f drm: Helper to read max clock rate
ddceb2a drm: Drop VGA from bpc definitions
d1a0fd3 drm: Add missing DP downstream port types
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