All of lore.kernel.org
 help / color / mirror / Atom feed
From: Omer Khaliq <okhaliq@caviumnetworks.com>
To: <linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<linux-crypto@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <bhelgaas@google.com>,
	<mpm@selenic.com>, <herbert@gondor.apana.org.au>,
	<Ananth.Jasty@cavium.com>, <David.Daney@cavium.com>,
	<clabbe.montjoie@gmail.com>
Cc: Omer Khaliq <okhaliq@caviumnetworks.com>
Subject: [PATCH v2 1/2] PCI: quirk fixup for cavium invalid sriov link value.
Date: Tue, 23 Aug 2016 16:27:14 -0700	[thread overview]
Message-ID: <1471994835-2423-2-git-send-email-okhaliq@caviumnetworks.com> (raw)
In-Reply-To: <1471994835-2423-1-git-send-email-okhaliq@caviumnetworks.com>

From: Ananth Jasty <Ananth.Jasty@cavium.com>

Cavium cn88xx hardware presents an incorrect SR-IOV Function
Dependency Link, add a fixup quirk for the affected devices.

Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Ananth Jasty <Ananth.Jasty@cavium.com>
Signed-off-by: Omer Khaliq <okhaliq@caviumnetworks.com>
---
 drivers/pci/quirks.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 37ff015..5980aae 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -834,6 +834,17 @@ static void quirk_amd_ioapic(struct pci_dev *dev)
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD,	PCI_DEVICE_ID_AMD_VIPER_7410,	quirk_amd_ioapic);
 #endif /* CONFIG_X86_IO_APIC */
 
+#ifdef CONFIG_ARM64
+
+static void quirk_cavium_sriov_rnm_link(struct pci_dev *dev)
+{
+	/* Fix for improper SRIOV configuration on Cavium cn88xx  RNM device */
+	if (dev->subsystem_device == 0xa118)
+		dev->sriov->link = dev->devfn;
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CAVIUM, 0xa018, quirk_cavium_sriov_rnm_link);
+#endif
+
 /*
  * Some settings of MMRBC can lead to data corruption so block changes.
  * See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: Omer Khaliq <okhaliq@caviumnetworks.com>
To: <linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<linux-crypto@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <bhelgaas@google.com>,
	<mpm@selenic.com>, <herbert@gondor.apana.org.au>,
	<Ananth.Jasty@cavium.com>, <David.Daney@cavium.com>,
	<clabbe.montjoie@gmail.com>
Cc: Omer Khaliq <okhaliq@caviumnetworks.com>
Subject: [PATCH v2 1/2] PCI: quirk fixup for cavium invalid sriov link value.
Date: Tue, 23 Aug 2016 16:27:14 -0700	[thread overview]
Message-ID: <1471994835-2423-2-git-send-email-okhaliq@caviumnetworks.com> (raw)
In-Reply-To: <1471994835-2423-1-git-send-email-okhaliq@caviumnetworks.com>

From: Ananth Jasty <Ananth.Jasty@cavium.com>

Cavium cn88xx hardware presents an incorrect SR-IOV Function
Dependency Link, add a fixup quirk for the affected devices.

Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Ananth Jasty <Ananth.Jasty@cavium.com>
Signed-off-by: Omer Khaliq <okhaliq@caviumnetworks.com>
---
 drivers/pci/quirks.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 37ff015..5980aae 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -834,6 +834,17 @@ static void quirk_amd_ioapic(struct pci_dev *dev)
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD,	PCI_DEVICE_ID_AMD_VIPER_7410,	quirk_amd_ioapic);
 #endif /* CONFIG_X86_IO_APIC */
 
+#ifdef CONFIG_ARM64
+
+static void quirk_cavium_sriov_rnm_link(struct pci_dev *dev)
+{
+	/* Fix for improper SRIOV configuration on Cavium cn88xx  RNM device */
+	if (dev->subsystem_device == 0xa118)
+		dev->sriov->link = dev->devfn;
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CAVIUM, 0xa018, quirk_cavium_sriov_rnm_link);
+#endif
+
 /*
  * Some settings of MMRBC can lead to data corruption so block changes.
  * See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide
-- 
1.9.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: okhaliq@caviumnetworks.com (Omer Khaliq)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] PCI: quirk fixup for cavium invalid sriov link value.
Date: Tue, 23 Aug 2016 16:27:14 -0700	[thread overview]
Message-ID: <1471994835-2423-2-git-send-email-okhaliq@caviumnetworks.com> (raw)
In-Reply-To: <1471994835-2423-1-git-send-email-okhaliq@caviumnetworks.com>

From: Ananth Jasty <Ananth.Jasty@cavium.com>

Cavium cn88xx hardware presents an incorrect SR-IOV Function
Dependency Link, add a fixup quirk for the affected devices.

Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Ananth Jasty <Ananth.Jasty@cavium.com>
Signed-off-by: Omer Khaliq <okhaliq@caviumnetworks.com>
---
 drivers/pci/quirks.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 37ff015..5980aae 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -834,6 +834,17 @@ static void quirk_amd_ioapic(struct pci_dev *dev)
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD,	PCI_DEVICE_ID_AMD_VIPER_7410,	quirk_amd_ioapic);
 #endif /* CONFIG_X86_IO_APIC */
 
+#ifdef CONFIG_ARM64
+
+static void quirk_cavium_sriov_rnm_link(struct pci_dev *dev)
+{
+	/* Fix for improper SRIOV configuration on Cavium cn88xx  RNM device */
+	if (dev->subsystem_device == 0xa118)
+		dev->sriov->link = dev->devfn;
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CAVIUM, 0xa018, quirk_cavium_sriov_rnm_link);
+#endif
+
 /*
  * Some settings of MMRBC can lead to data corruption so block changes.
  * See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide
-- 
1.9.1

  reply	other threads:[~2016-08-23 23:27 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-23 23:27 [PATCH v2 0/2] HWRNG/PCI: Add driver for Cavium Thunder RNG Omer Khaliq
2016-08-23 23:27 ` Omer Khaliq
2016-08-23 23:27 ` Omer Khaliq
2016-08-23 23:27 ` Omer Khaliq [this message]
2016-08-23 23:27   ` [PATCH v2 1/2] PCI: quirk fixup for cavium invalid sriov link value Omer Khaliq
2016-08-23 23:27   ` Omer Khaliq
2016-08-24 16:47   ` Bjorn Helgaas
2016-08-24 16:47     ` Bjorn Helgaas
2016-08-24 16:47     ` Bjorn Helgaas
2016-08-23 23:27 ` [PATCH v2 2/2] HWRNG: thunderx: Add Cavium HWRNG driver for ThunderX SoC Omer Khaliq
2016-08-23 23:27   ` Omer Khaliq
2016-08-23 23:27   ` Omer Khaliq
2016-08-24  5:46   ` Corentin LABBE
2016-08-24  5:46     ` Corentin LABBE
2016-08-24 23:07     ` David Daney
2016-08-24 23:07       ` David Daney
2016-08-24 23:07       ` David Daney
2016-08-31 15:17 ` [PATCH v2 0/2] HWRNG/PCI: Add driver for Cavium Thunder RNG Herbert Xu
2016-08-31 15:17   ` Herbert Xu
2016-08-31 15:17   ` Herbert Xu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1471994835-2423-2-git-send-email-okhaliq@caviumnetworks.com \
    --to=okhaliq@caviumnetworks.com \
    --cc=Ananth.Jasty@cavium.com \
    --cc=David.Daney@cavium.com \
    --cc=bhelgaas@google.com \
    --cc=clabbe.montjoie@gmail.com \
    --cc=herbert@gondor.apana.org.au \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=mpm@selenic.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.