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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: gregkh@linuxfoundation.org
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 24/28] coresight: etm4x: cleaning up default filter configuration
Date: Thu, 25 Aug 2016 15:19:14 -0600	[thread overview]
Message-ID: <1472159958-5981-25-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1472159958-5981-1-git-send-email-mathieu.poirier@linaro.org>

The default filter configuration was hard to read and included
some redundancy.  This patch attempts to stream line configuration
and improve readability.

No change of functionality is included.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm4x.c | 53 ++++++++++++++-------------
 1 file changed, 27 insertions(+), 26 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index f890d1de39e3..04462fffe8e4 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -583,39 +583,34 @@ static void etm4_set_default_config(struct etmv4_config *config)
 
 static void etm4_set_default_filter(struct etmv4_config *config)
 {
-	/*
-	 * TRCVICTLR::SSSTATUS == 1, the start-stop logic is
-	 * in the started state
-	 */
-	config->vinst_ctrl |= BIT(9);
+	u64 start, stop, access_type = 0;
 
 	/*
 	 * Configure address range comparator '0' to encompass all
 	 * possible addresses.
 	 */
+	start = 0x0;
+	stop = ~0x0;
 
-	/* First half of default address comparator: start at address 0 */
-	config->addr_val[ETM_DEFAULT_ADDR_COMP] = 0x0;
-	/* trace instruction addresses */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP] &= ~(BIT(0) | BIT(1));
-	/* EXLEVEL_NS, bits[12:15], only trace application and kernel space */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP] |= ETM_EXLEVEL_NS_HYP;
-	/* EXLEVEL_S, bits[11:8], don't trace anything in secure state */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP] |= (ETM_EXLEVEL_S_APP |
-						    ETM_EXLEVEL_S_OS |
-						    ETM_EXLEVEL_S_HYP);
-	config->addr_type[ETM_DEFAULT_ADDR_COMP] = ETM_ADDR_TYPE_RANGE;
+	/* EXLEVEL_NS, bits[12:15], always stay away from hypervisor mode. */
+	access_type = ETM_EXLEVEL_NS_HYP;
 
 	/*
-	 * Second half of default address comparator: go all
-	 * the way to the top.
-	*/
-	config->addr_val[ETM_DEFAULT_ADDR_COMP + 1] = ~0x0;
-	/* trace instruction addresses */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] &= ~(BIT(0) | BIT(1));
-	/* Address comparator type must be equal for both halves */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] =
-					config->addr_acc[ETM_DEFAULT_ADDR_COMP];
+	 * EXLEVEL_S, bits[11:8], don't trace anything happening
+	 * in secure state.
+	 */
+	access_type |= (ETM_EXLEVEL_S_APP	|
+			ETM_EXLEVEL_S_OS	|
+			ETM_EXLEVEL_S_HYP);
+
+	/* First half of default address comparator */
+	config->addr_val[ETM_DEFAULT_ADDR_COMP] = start;
+	config->addr_acc[ETM_DEFAULT_ADDR_COMP] = access_type;
+	config->addr_type[ETM_DEFAULT_ADDR_COMP] = ETM_ADDR_TYPE_RANGE;
+
+	/* Second half of default address comparator */
+	config->addr_val[ETM_DEFAULT_ADDR_COMP + 1] = stop;
+	config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] = access_type;
 	config->addr_type[ETM_DEFAULT_ADDR_COMP + 1] = ETM_ADDR_TYPE_RANGE;
 
 	/*
@@ -624,7 +619,13 @@ static void etm4_set_default_filter(struct etmv4_config *config)
 	 */
 	config->viiectlr = BIT(0);
 
-	/* no start-stop filtering for ViewInst */
+	/*
+	 * TRCVICTLR::SSSTATUS == 1, the start-stop logic is
+	 * in the started state
+	 */
+	config->vinst_ctrl |= BIT(9);
+
+	/* No start-stop filtering for ViewInst */
 	config->vissctlr = 0x0;
 }
 
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 24/28] coresight: etm4x: cleaning up default filter configuration
Date: Thu, 25 Aug 2016 15:19:14 -0600	[thread overview]
Message-ID: <1472159958-5981-25-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1472159958-5981-1-git-send-email-mathieu.poirier@linaro.org>

The default filter configuration was hard to read and included
some redundancy.  This patch attempts to stream line configuration
and improve readability.

No change of functionality is included.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm4x.c | 53 ++++++++++++++-------------
 1 file changed, 27 insertions(+), 26 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index f890d1de39e3..04462fffe8e4 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -583,39 +583,34 @@ static void etm4_set_default_config(struct etmv4_config *config)
 
 static void etm4_set_default_filter(struct etmv4_config *config)
 {
-	/*
-	 * TRCVICTLR::SSSTATUS == 1, the start-stop logic is
-	 * in the started state
-	 */
-	config->vinst_ctrl |= BIT(9);
+	u64 start, stop, access_type = 0;
 
 	/*
 	 * Configure address range comparator '0' to encompass all
 	 * possible addresses.
 	 */
+	start = 0x0;
+	stop = ~0x0;
 
-	/* First half of default address comparator: start at address 0 */
-	config->addr_val[ETM_DEFAULT_ADDR_COMP] = 0x0;
-	/* trace instruction addresses */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP] &= ~(BIT(0) | BIT(1));
-	/* EXLEVEL_NS, bits[12:15], only trace application and kernel space */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP] |= ETM_EXLEVEL_NS_HYP;
-	/* EXLEVEL_S, bits[11:8], don't trace anything in secure state */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP] |= (ETM_EXLEVEL_S_APP |
-						    ETM_EXLEVEL_S_OS |
-						    ETM_EXLEVEL_S_HYP);
-	config->addr_type[ETM_DEFAULT_ADDR_COMP] = ETM_ADDR_TYPE_RANGE;
+	/* EXLEVEL_NS, bits[12:15], always stay away from hypervisor mode. */
+	access_type = ETM_EXLEVEL_NS_HYP;
 
 	/*
-	 * Second half of default address comparator: go all
-	 * the way to the top.
-	*/
-	config->addr_val[ETM_DEFAULT_ADDR_COMP + 1] = ~0x0;
-	/* trace instruction addresses */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] &= ~(BIT(0) | BIT(1));
-	/* Address comparator type must be equal for both halves */
-	config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] =
-					config->addr_acc[ETM_DEFAULT_ADDR_COMP];
+	 * EXLEVEL_S, bits[11:8], don't trace anything happening
+	 * in secure state.
+	 */
+	access_type |= (ETM_EXLEVEL_S_APP	|
+			ETM_EXLEVEL_S_OS	|
+			ETM_EXLEVEL_S_HYP);
+
+	/* First half of default address comparator */
+	config->addr_val[ETM_DEFAULT_ADDR_COMP] = start;
+	config->addr_acc[ETM_DEFAULT_ADDR_COMP] = access_type;
+	config->addr_type[ETM_DEFAULT_ADDR_COMP] = ETM_ADDR_TYPE_RANGE;
+
+	/* Second half of default address comparator */
+	config->addr_val[ETM_DEFAULT_ADDR_COMP + 1] = stop;
+	config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] = access_type;
 	config->addr_type[ETM_DEFAULT_ADDR_COMP + 1] = ETM_ADDR_TYPE_RANGE;
 
 	/*
@@ -624,7 +619,13 @@ static void etm4_set_default_filter(struct etmv4_config *config)
 	 */
 	config->viiectlr = BIT(0);
 
-	/* no start-stop filtering for ViewInst */
+	/*
+	 * TRCVICTLR::SSSTATUS == 1, the start-stop logic is
+	 * in the started state
+	 */
+	config->vinst_ctrl |= BIT(9);
+
+	/* No start-stop filtering for ViewInst */
 	config->vissctlr = 0x0;
 }
 
-- 
2.7.4

  parent reply	other threads:[~2016-08-25 21:27 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-25 21:18 [PATCH 00/28] coresight: next v4.8-rc3 Mathieu Poirier
2016-08-25 21:18 ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 01/28] coresight: access conn->child_name only if it's initialised Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 02/28] coresight-stm: support mmapping channel regions with mmio_addr Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 03/28] coresight: always use stashed trace id value in etm4_trace_id Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 04/28] coresight: Remove erroneous dma_free_coherent in tmc_probe Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 05/28] coresight: Consolidate error handling path for tmc_probe Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 06/28] coresight: Fix csdev connections initialisation Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 07/28] coresight: tmc: Limit the trace to available data Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 08/28] coresight: etmv4: Fix ETMv4x peripheral ID table Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:18 ` [PATCH 09/28] coresight: Cleanup TMC status check Mathieu Poirier
2016-08-25 21:18   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 10/28] coresight: Add better messages for coresight_timeout Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 11/28] coresight: delay initialisation when children are missing Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 12/28] coresight: add PM runtime calls to coresight_simple_func() Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 13/28] coresight-etm3x: Add ARM ETM 3.5 Cortex-A5 peripheral ID Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 14/28] hwtracing: coresight: of_coresight: add missing of_node_put after calling of_parse_phandle Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 15/28] coresight: Use local coresight_desc instances Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 16/28] coresight: etm4x: remove duplicated include from coresight-etm4x.c Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 17/28] coresight: tmc: Delete an unnecessary check before the function call "kfree" Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 18/28] coresight: etm4x: request to retain power to the trace unit when active Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 19/28] coresight: fix handling of ETM trace register access via sysfs Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 20/28] coresight: etm-perf: pass struct perf_event to source::enable/disable() Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 21/28] coresight: remove duplicated enumeration Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 22/28] coresight: etm-perf: configuring filters from perf core Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 23/28] coresight: etm4x: split default and filter configuration Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` Mathieu Poirier [this message]
2016-08-25 21:19   ` [PATCH 24/28] coresight: etm4x: cleaning up default " Mathieu Poirier
2016-08-25 21:19 ` [PATCH 25/28] coresight: etm4x: adding range filter configuration function Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 26/28] coresight: etm4x: configuring include/exclude function Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 27/28] coresight: etm4x: adding configurable address range filtering Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-25 21:19 ` [PATCH 28/28] coresight: etm4x: adding configurable start/stop filtering Mathieu Poirier
2016-08-25 21:19   ` Mathieu Poirier
2016-08-31 11:08 ` [PATCH 00/28] coresight: next v4.8-rc3 Greg KH
2016-08-31 11:08   ` Greg KH

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