From: Lin Huang <hl@rock-chips.com>
To: heiko@sntech.de
Cc: myungjoo.ham@samsung.com, mark.yao@rock-chips.com,
cw00.choi@samsung.com, airlied@linux.ie, mturquette@baylibre.com,
dbasehore@chromium.org, sboyd@codeaurora.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
dianders@chromium.org, linux-rockchip@lists.infradead.org,
kyungmin.park@samsung.com, linux-arm-kernel@lists.infradead.org,
tixy@linaro.org, typ@rock-chips.com, sudeep.holla@arm.com,
mark.rutland@arm.com, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, Lin Huang <hl@rock-chips.com>
Subject: [PATCH 0/5] rk3399 support ddr frequency scaling
Date: Sat, 3 Sep 2016 05:08:18 +0800 [thread overview]
Message-ID: <1472850503-25232-1-git-send-email-hl@rock-chips.com> (raw)
rk3399 platform have dfi controller can monitor ddr load,
and dcf controller to handle ddr register so we can get the
right ddr frequency and make ddr controller happy work(which
will implement in bl31). So we do ddr frequency scaling with
following flow:
kernel bl31
monitor ddr load
|
|
get_target_rate
|
| pass rate to bl31
clk_set_rate(ddr) --------------------->run dcf flow
| |
| |
wait dcf interrupt<-------------------trigger dcf interrupt
|
|
return
Lin Huang (5):
Documentation: bindings: add dt documentation for dfi controller
PM / devfreq: event: support rockchip dfi controller
Documentation: bindings: add dt documentation for rk3399 dmc
PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
drm/rockchip: Add dmc notifier in vop driver
Following patch:
clk: rockchip: add new clock-type for the ddrclk
clk: rockchip: rk3399: add SCLK_DDRCLK ID for ddrc
clk: rockchip: rk3399: add ddrc clock support
have applied to:
http://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/v4.9-clk/next
.../bindings/devfreq/event/rockchip-dfi.txt | 19 +
.../devicetree/bindings/devfreq/rk3399_dmc.txt | 173 ++++++++
drivers/devfreq/Kconfig | 11 +
drivers/devfreq/Makefile | 1 +
drivers/devfreq/event/Kconfig | 7 +
drivers/devfreq/event/Makefile | 1 +
drivers/devfreq/event/rockchip-dfi.c | 256 +++++++++++
drivers/devfreq/rk3399_dmc.c | 480 +++++++++++++++++++++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 116 +++++
9 files changed, 1064 insertions(+)
create mode 100644 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt
create mode 100644 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
create mode 100644 drivers/devfreq/event/rockchip-dfi.c
create mode 100644 drivers/devfreq/rk3399_dmc.c
--
2.6.6
WARNING: multiple messages have this Message-ID (diff)
From: Lin Huang <hl-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
To: heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org
Cc: myungjoo.ham-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org,
mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org,
airlied-cv59FeDIM0c@public.gmane.org,
mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
dbasehore-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
tixy-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
typ-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
sudeep.holla-5wv7dgnIgG8@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Lin Huang <hl-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Subject: [PATCH 0/5] rk3399 support ddr frequency scaling
Date: Sat, 3 Sep 2016 05:08:18 +0800 [thread overview]
Message-ID: <1472850503-25232-1-git-send-email-hl@rock-chips.com> (raw)
rk3399 platform have dfi controller can monitor ddr load,
and dcf controller to handle ddr register so we can get the
right ddr frequency and make ddr controller happy work(which
will implement in bl31). So we do ddr frequency scaling with
following flow:
kernel bl31
monitor ddr load
|
|
get_target_rate
|
| pass rate to bl31
clk_set_rate(ddr) --------------------->run dcf flow
| |
| |
wait dcf interrupt<-------------------trigger dcf interrupt
|
|
return
Lin Huang (5):
Documentation: bindings: add dt documentation for dfi controller
PM / devfreq: event: support rockchip dfi controller
Documentation: bindings: add dt documentation for rk3399 dmc
PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
drm/rockchip: Add dmc notifier in vop driver
Following patch:
clk: rockchip: add new clock-type for the ddrclk
clk: rockchip: rk3399: add SCLK_DDRCLK ID for ddrc
clk: rockchip: rk3399: add ddrc clock support
have applied to:
http://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/v4.9-clk/next
.../bindings/devfreq/event/rockchip-dfi.txt | 19 +
.../devicetree/bindings/devfreq/rk3399_dmc.txt | 173 ++++++++
drivers/devfreq/Kconfig | 11 +
drivers/devfreq/Makefile | 1 +
drivers/devfreq/event/Kconfig | 7 +
drivers/devfreq/event/Makefile | 1 +
drivers/devfreq/event/rockchip-dfi.c | 256 +++++++++++
drivers/devfreq/rk3399_dmc.c | 480 +++++++++++++++++++++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 116 +++++
9 files changed, 1064 insertions(+)
create mode 100644 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt
create mode 100644 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
create mode 100644 drivers/devfreq/event/rockchip-dfi.c
create mode 100644 drivers/devfreq/rk3399_dmc.c
--
2.6.6
--
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WARNING: multiple messages have this Message-ID (diff)
From: hl@rock-chips.com (Lin Huang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/5] rk3399 support ddr frequency scaling
Date: Sat, 3 Sep 2016 05:08:18 +0800 [thread overview]
Message-ID: <1472850503-25232-1-git-send-email-hl@rock-chips.com> (raw)
rk3399 platform have dfi controller can monitor ddr load,
and dcf controller to handle ddr register so we can get the
right ddr frequency and make ddr controller happy work(which
will implement in bl31). So we do ddr frequency scaling with
following flow:
kernel bl31
monitor ddr load
|
|
get_target_rate
|
| pass rate to bl31
clk_set_rate(ddr) --------------------->run dcf flow
| |
| |
wait dcf interrupt<-------------------trigger dcf interrupt
|
|
return
Lin Huang (5):
Documentation: bindings: add dt documentation for dfi controller
PM / devfreq: event: support rockchip dfi controller
Documentation: bindings: add dt documentation for rk3399 dmc
PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
drm/rockchip: Add dmc notifier in vop driver
Following patch:
clk: rockchip: add new clock-type for the ddrclk
clk: rockchip: rk3399: add SCLK_DDRCLK ID for ddrc
clk: rockchip: rk3399: add ddrc clock support
have applied to:
http://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/v4.9-clk/next
.../bindings/devfreq/event/rockchip-dfi.txt | 19 +
.../devicetree/bindings/devfreq/rk3399_dmc.txt | 173 ++++++++
drivers/devfreq/Kconfig | 11 +
drivers/devfreq/Makefile | 1 +
drivers/devfreq/event/Kconfig | 7 +
drivers/devfreq/event/Makefile | 1 +
drivers/devfreq/event/rockchip-dfi.c | 256 +++++++++++
drivers/devfreq/rk3399_dmc.c | 480 +++++++++++++++++++++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 116 +++++
9 files changed, 1064 insertions(+)
create mode 100644 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt
create mode 100644 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
create mode 100644 drivers/devfreq/event/rockchip-dfi.c
create mode 100644 drivers/devfreq/rk3399_dmc.c
--
2.6.6
next reply other threads:[~2016-09-02 21:08 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-02 21:08 Lin Huang [this message]
2016-09-02 21:08 ` [PATCH 0/5] rk3399 support ddr frequency scaling Lin Huang
2016-09-02 21:08 ` Lin Huang
2016-09-02 21:08 ` [PATCH 1/5] Documentation: bindings: add dt documentation for dfi controller Lin Huang
2016-09-02 21:08 ` Lin Huang
2016-09-02 21:08 ` Lin Huang
-- strict thread matches above, loose matches on Subject: below --
2016-09-01 22:31 [PATCH 0/5] rk3399 support ddr frequency scaling Lin Huang
2016-09-01 22:31 ` Lin Huang
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