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From: John Garry <john.garry@huawei.com>
To: <jejb@linux.vnet.ibm.com>, <martin.petersen@oracle.com>
Cc: <linuxarm@huawei.com>, <zhangfei.gao@linaro.org>,
	<xuwei5@hisilicon.com>, <john.garry2@mail.dcu.ie>,
	<linux-scsi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	John Garry <john.garry@huawei.com>,
	"Xiang Chen" <chenxiang66@hisilicon.com>
Subject: [PATCH 11/15] hisi_sas: fix HBA SAS addr endianness for v1 hw
Date: Tue, 6 Sep 2016 23:36:21 +0800	[thread overview]
Message-ID: <1473176185-217808-12-git-send-email-john.garry@huawei.com> (raw)
In-Reply-To: <1473176185-217808-1-git-send-email-john.garry@huawei.com>

The endianness for the SAS address in the TX_ID_DWORD
registers is set incorrectly.
We see errors like this in the boot log for v2 hw (which would
have the same issue as v1 hw):
[    7.583284] sas: target proto 0x0 at 50000d1108e7923f:0x1f not handled

This is due to the host SAS addr not matching the PHY SAS
addr in the expander host-attached phy discovery responses.

To fix, we byte swap the SAS addr from BE to LE (which is
the endianness of the SAS controller).

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
---
 drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
index b537464..c030df0 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
@@ -490,13 +490,13 @@ static void config_id_frame_v1_hw(struct hisi_hba *hisi_hba, int phy_no)
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD0,
 			__swab32(identify_buffer[0]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD1,
-			identify_buffer[2]);
+			__swab32(identify_buffer[1]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD2,
-			identify_buffer[1]);
+			__swab32(identify_buffer[2]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD3,
-			identify_buffer[4]);
+			__swab32(identify_buffer[3]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD4,
-			identify_buffer[3]);
+			__swab32(identify_buffer[4]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD5,
 			__swab32(identify_buffer[5]));
 }
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: John Garry <john.garry@huawei.com>
To: jejb@linux.vnet.ibm.com, martin.petersen@oracle.com
Cc: linuxarm@huawei.com, zhangfei.gao@linaro.org,
	xuwei5@hisilicon.com, john.garry2@mail.dcu.ie,
	linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org,
	John Garry <john.garry@huawei.com>,
	Xiang Chen <chenxiang66@hisilicon.com>
Subject: [PATCH 11/15] hisi_sas: fix HBA SAS addr endianness for v1 hw
Date: Tue, 6 Sep 2016 23:36:21 +0800	[thread overview]
Message-ID: <1473176185-217808-12-git-send-email-john.garry@huawei.com> (raw)
In-Reply-To: <1473176185-217808-1-git-send-email-john.garry@huawei.com>

The endianness for the SAS address in the TX_ID_DWORD
registers is set incorrectly.
We see errors like this in the boot log for v2 hw (which would
have the same issue as v1 hw):
[    7.583284] sas: target proto 0x0 at 50000d1108e7923f:0x1f not handled

This is due to the host SAS addr not matching the PHY SAS
addr in the expander host-attached phy discovery responses.

To fix, we byte swap the SAS addr from BE to LE (which is
the endianness of the SAS controller).

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
---
 drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
index b537464..c030df0 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
@@ -490,13 +490,13 @@ static void config_id_frame_v1_hw(struct hisi_hba *hisi_hba, int phy_no)
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD0,
 			__swab32(identify_buffer[0]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD1,
-			identify_buffer[2]);
+			__swab32(identify_buffer[1]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD2,
-			identify_buffer[1]);
+			__swab32(identify_buffer[2]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD3,
-			identify_buffer[4]);
+			__swab32(identify_buffer[3]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD4,
-			identify_buffer[3]);
+			__swab32(identify_buffer[4]));
 	hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD5,
 			__swab32(identify_buffer[5]));
 }
-- 
1.9.1


  parent reply	other threads:[~2016-09-06 15:28 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-06 15:36 [PATCH 00/15] hisi_sas misc fixes and minor optimisations John Garry
2016-09-06 15:36 ` John Garry
2016-09-06 15:36 ` [PATCH 01/15] hisi_sas: save completion queue read pointer John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 11:46   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 02/15] hisi_sas: save delivery queue write pointer John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 11:47   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 03/15] hisi_sas: keep CHL_INT2 masked for v2 HW John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 11:48   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 04/15] hisi_sas: only zero slot memory when reused John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:45   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 05/15] hisi_sas: use safe BITS_PER_BYTE for slot tag size calculation John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:46   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 06/15] hisi_sas: disable dlvry queues once at reset for v2 hw John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:46   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 07/15] hisi_sas: fix phy8 linkrate calculation in phy_up_v2_hw() John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:47   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 08/15] hisi_sas: fix a potential warning for sata disk ejection John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:48   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 09/15] hisi_sas: set dma mask before allocate DMA memory John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:48   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 10/15] hisi_sas: fix HBA SAS addr endianness for v2 hw John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:49   ` Hannes Reinecke
2016-09-06 15:36 ` John Garry [this message]
2016-09-06 15:36   ` [PATCH 11/15] hisi_sas: fix HBA SAS addr endianness for v1 hw John Garry
2016-09-14 12:49   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 12/15] hisi_sas: remove init_id_frame_v2_hw() John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:50   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 13/15] hisi_sas: remove init_id_frame_v1_hw() John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:50   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 14/15] hisi_sas: add missing SATA pending device type to v2 hw John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:51   ` Hannes Reinecke
2016-09-06 15:36 ` [PATCH 15/15] hisi_sas: send three identify before phy up John Garry
2016-09-06 15:36   ` John Garry
2016-09-14 12:52   ` Hannes Reinecke
2016-09-14 16:54 ` [PATCH 00/15] hisi_sas misc fixes and minor optimisations Martin K. Petersen
2016-09-14 16:54   ` Martin K. Petersen

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