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From: <tthayer@opensource.altera.com>
To: <gregkh@linuxfoundation.org>, <robh+dt@kernel.org>,
	<mark.rutland@arm.com>, <lftan@altera.com>, <jslaby@suse.com>,
	<arnd@arndb.de>, <peter@hurleysoftware.com>,
	<andriy.shevchenko@linux.intel.com>, <anton.wuerfel@fau.de>,
	<phillip.raffeck@fau.de>, <yegorslists@googlemail.com>,
	<matwey@sai.msu.ru>, <mail@maciej.szmigiero.name>
Cc: <peter.ujfalusi@ti.com>, <jonathanh@nvidia.com>,
	<dongsheng.wang@nxp.com>, <luis@debethencourt.com>,
	<linux-kernel@vger.kernel.org>, <linux-serial@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <tthayer.linux@gmail.com>,
	<tthayer@opensource.altera.com>,
	<nios2-dev@lists.rocketboards.org>
Subject: [PATCH 1/4] Documentation: dt: serial: Add TX FIFO load size
Date: Thu, 8 Sep 2016 11:12:18 -0500	[thread overview]
Message-ID: <1473351141-9239-2-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1473351141-9239-1-git-send-email-tthayer@opensource.altera.com>

From: Thor Thayer <tthayer@opensource.altera.com>

Add the device tree bindings needed to support the TX FIFO
load size.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
---
 Documentation/devicetree/bindings/serial/8250.txt |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt
index f5561ac..93de5ef 100644
--- a/Documentation/devicetree/bindings/serial/8250.txt
+++ b/Documentation/devicetree/bindings/serial/8250.txt
@@ -45,6 +45,7 @@ Optional properties:
 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
   line respectively. It will use specified GPIO instead of the peripheral
   function pin for the UART feature. If unsure, don't specify this property.
+- tx-loadsz: the number of bytes that can be loaded into the TX FIFO.
 
 Note:
 * fsl,ns16550:
-- 
1.7.9.5

WARNING: multiple messages have this Message-ID (diff)
From: <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
To: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	lftan-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org,
	jslaby-IBi9RG/b67k@public.gmane.org,
	arnd-r2nGTMty4D4@public.gmane.org,
	peter-WaGBZJeGNqdsbIuE7sb01tBPR1lH4CV8@public.gmane.org,
	andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org,
	anton.wuerfel-d40JDW7QUjc@public.gmane.org,
	phillip.raffeck-d40JDW7QUjc@public.gmane.org,
	yegorslists-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org,
	matwey-TTlVxmypnbovJsYlp49lxw@public.gmane.org,
	mail-APzI5cXaD1zVlRWJc41N0YvC60bnQu0Y@public.gmane.org
Cc: peter.ujfalusi-l0cyMroinI0@public.gmane.org,
	jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	dongsheng.wang-3arQi8VN3Tc@public.gmane.org,
	luis-HiykPkW1eAzzDCI4PIEvbQC/G2K4zDHf@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	tthayer.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org,
	nios2-dev-g9ZBwUv/Ih/yUk5EbOjzuce+I+R0W71w@public.gmane.org
Subject: [PATCH 1/4] Documentation: dt: serial: Add TX FIFO load size
Date: Thu, 8 Sep 2016 11:12:18 -0500	[thread overview]
Message-ID: <1473351141-9239-2-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1473351141-9239-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

Add the device tree bindings needed to support the TX FIFO
load size.

Signed-off-by: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
 Documentation/devicetree/bindings/serial/8250.txt |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt
index f5561ac..93de5ef 100644
--- a/Documentation/devicetree/bindings/serial/8250.txt
+++ b/Documentation/devicetree/bindings/serial/8250.txt
@@ -45,6 +45,7 @@ Optional properties:
 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
   line respectively. It will use specified GPIO instead of the peripheral
   function pin for the UART feature. If unsure, don't specify this property.
+- tx-loadsz: the number of bytes that can be loaded into the TX FIFO.
 
 Note:
 * fsl,ns16550:
-- 
1.7.9.5

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  reply	other threads:[~2016-09-08 16:23 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-08 16:12 [PATCH 0/4] Add TX FIFO Threshold for Altera 16550-FIFOxx tthayer
2016-09-08 16:12 ` tthayer
2016-09-08 16:12 ` tthayer [this message]
2016-09-08 16:12   ` [PATCH 1/4] Documentation: dt: serial: Add TX FIFO load size tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-09-16 19:19   ` Rob Herring
2016-09-16 20:47     ` Thor Thayer
2016-09-16 20:47       ` Thor Thayer
2016-09-08 16:12 ` [PATCH 2/4] serial: 8250: of: Load TX FIFO Load Size from DT tthayer
2016-09-08 16:12   ` tthayer
2016-09-16 19:20   ` Rob Herring
2016-09-16 20:52     ` Thor Thayer
2016-09-16 20:52       ` Thor Thayer
2016-09-16 20:51       ` Arnd Bergmann
2016-09-16 20:51         ` Arnd Bergmann
2016-09-08 16:12 ` [PATCH 3/4] serial: 8250: Set Altera 16550 TX FIFO Threshold tthayer
2016-09-08 16:12   ` tthayer
2016-09-08 16:12 ` [PATCH 4/4] nios2: dts: 10m50: Add tx-loadsz parameter tthayer
2016-09-08 16:12   ` tthayer

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