* [PATCH 1/6] drm/amdgpu: validate size and offset of user fence BO @ 2016-09-12 14:39 Christian König [not found] ` <1473691152-1693-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 0 siblings, 1 reply; 10+ messages in thread From: Christian König @ 2016-09-12 14:39 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW From: Christian König <christian.koenig@amd.com> We need to validate the offset to make sure that we don't write after the BO. Additional to that a page should be enough and can make address space handling much easier. Signed-off-by: Christian König <christian.koenig@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 5546a8c..ca81f15 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -91,6 +91,7 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p, uint32_t *offset) { struct drm_gem_object *gobj; + unsigned long size; gobj = drm_gem_object_lookup(p->adev->ddev, p->filp, data->handle); @@ -102,6 +103,11 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p, p->uf_entry.tv.bo = &p->uf_entry.robj->tbo; p->uf_entry.tv.shared = true; p->uf_entry.user_pages = NULL; + + size = amdgpu_bo_size(p->uf_entry.robj); + if (size != PAGE_SIZE || (data->offset + 8) > size) + return -EINVAL; + *offset = data->offset; drm_gem_object_unreference_unlocked(gobj); -- 2.5.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <1473691152-1693-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>]
* [PATCH 2/6] drm/amdgpu: add AMDGPU_BO_INVALID_OFFSET [not found] ` <1473691152-1693-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> @ 2016-09-12 14:39 ` Christian König 2016-09-12 14:39 ` [PATCH 3/6] drm/amdgpu: unbind GTT only when it is bound Christian König ` (3 subsequent siblings) 4 siblings, 0 replies; 10+ messages in thread From: Christian König @ 2016-09-12 14:39 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW From: Christian König <christian.koenig@amd.com> An invalid offset to be used by custom VRAM/GGT manager when we don't have an offset for an BO. Signed-off-by: Christian König <christian.koenig@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index e503ca1..151a706 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -956,6 +956,7 @@ u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo) !amdgpu_ttm_is_bound(bo->tbo.ttm)); WARN_ON_ONCE(!ww_mutex_is_locked(&bo->tbo.resv->lock) && !bo->pin_count); + WARN_ON_ONCE(bo->tbo.mem.start == AMDGPU_BO_INVALID_OFFSET); return bo->tbo.offset; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h index 3032c54..8255034 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h @@ -31,6 +31,8 @@ #include <drm/amdgpu_drm.h> #include "amdgpu.h" +#define AMDGPU_BO_INVALID_OFFSET LONG_MAX + /** * amdgpu_mem_type_to_domain - return domain corresponding to mem_type * @mem_type: ttm memory type -- 2.5.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/6] drm/amdgpu: unbind GTT only when it is bound [not found] ` <1473691152-1693-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 2016-09-12 14:39 ` [PATCH 2/6] drm/amdgpu: add AMDGPU_BO_INVALID_OFFSET Christian König @ 2016-09-12 14:39 ` Christian König 2016-09-12 14:39 ` [PATCH 4/6] drm/amdgpu: use explicit GTT limit for evictions Christian König ` (2 subsequent siblings) 4 siblings, 0 replies; 10+ messages in thread From: Christian König @ 2016-09-12 14:39 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW From: Christian König <christian.koenig@amd.com> Doesn't make much sense to clear the GTT when it was never filled. Signed-off-by: Christian König <christian.koenig@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index c3780b9..cd5c0f8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -734,6 +734,9 @@ static int amdgpu_ttm_backend_unbind(struct ttm_tt *ttm) { struct amdgpu_ttm_tt *gtt = (void *)ttm; + if (!amdgpu_ttm_is_bound(ttm)) + return 0; + /* unbind shouldn't be done for GDS/GWS/OA in ttm_bo_clean_mm */ if (gtt->adev->gart.ready) amdgpu_gart_unbind(gtt->adev, gtt->offset, ttm->num_pages); -- 2.5.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/6] drm/amdgpu: use explicit GTT limit for evictions [not found] ` <1473691152-1693-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 2016-09-12 14:39 ` [PATCH 2/6] drm/amdgpu: add AMDGPU_BO_INVALID_OFFSET Christian König 2016-09-12 14:39 ` [PATCH 3/6] drm/amdgpu: unbind GTT only when it is bound Christian König @ 2016-09-12 14:39 ` Christian König 2016-09-12 14:39 ` [PATCH 5/6] drm/amdgpu: use expolicit limit fro VRAM<->GTT moves Christian König 2016-09-12 14:39 ` [PATCH 6/6] drm/amdgpu: add a custom GTT memory manager v2 Christian König 4 siblings, 0 replies; 10+ messages in thread From: Christian König @ 2016-09-12 14:39 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW From: Christian König <christian.koenig@amd.com> This way the address space gets allocated immediately. Signed-off-by: Christian König <christian.koenig@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index cd5c0f8..2f8aba3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -201,6 +201,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo, .lpfn = 0, .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM }; + unsigned i; if (!amdgpu_ttm_bo_is_amdgpu_bo(bo)) { placement->placement = &placements; @@ -212,10 +213,25 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo, rbo = container_of(bo, struct amdgpu_bo, tbo); switch (bo->mem.mem_type) { case TTM_PL_VRAM: - if (rbo->adev->mman.buffer_funcs_ring->ready == false) + if (rbo->adev->mman.buffer_funcs_ring->ready == false) { amdgpu_ttm_placement_from_domain(rbo, AMDGPU_GEM_DOMAIN_CPU); - else + } else { amdgpu_ttm_placement_from_domain(rbo, AMDGPU_GEM_DOMAIN_GTT); + for (i = 0; i < rbo->placement.num_placement; ++i) { + if (!(rbo->placements[i].flags & + TTM_PL_FLAG_TT)) + continue; + + if (rbo->placements[i].lpfn) + continue; + + /* set an upper limit to force directly + * allocating address space for the BO. + */ + rbo->placements[i].lpfn = + rbo->adev->mc.gtt_size >> PAGE_SHIFT; + } + } break; case TTM_PL_TT: default: -- 2.5.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 5/6] drm/amdgpu: use expolicit limit fro VRAM<->GTT moves [not found] ` <1473691152-1693-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> ` (2 preceding siblings ...) 2016-09-12 14:39 ` [PATCH 4/6] drm/amdgpu: use explicit GTT limit for evictions Christian König @ 2016-09-12 14:39 ` Christian König [not found] ` <1473691152-1693-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 2016-09-12 14:39 ` [PATCH 6/6] drm/amdgpu: add a custom GTT memory manager v2 Christian König 4 siblings, 1 reply; 10+ messages in thread From: Christian König @ 2016-09-12 14:39 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW From: Christian König <christian.koenig@amd.com> Use an explicit limit when moving things around to force address space allocation. Signed-off-by: Christian König <christian.koenig@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 2f8aba3..8e247ac 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -339,7 +339,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo, placement.num_busy_placement = 1; placement.busy_placement = &placements; placements.fpfn = 0; - placements.lpfn = 0; + placements.lpfn = adev->mc.gtt_size >> PAGE_SHIFT; placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait_gpu); @@ -386,7 +386,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo, placement.num_busy_placement = 1; placement.busy_placement = &placements; placements.fpfn = 0; - placements.lpfn = 0; + placements.lpfn = adev->mc.gtt_size >> PAGE_SHIFT; placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait_gpu); -- 2.5.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <1473691152-1693-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>]
* Re: [PATCH 5/6] drm/amdgpu: use expolicit limit fro VRAM<->GTT moves [not found] ` <1473691152-1693-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> @ 2016-09-12 21:05 ` Alex Deucher [not found] ` <CADnq5_O4RmFuHR4pBumsHnW=sfEmgnXg_HJQnPcqWV_KW4TeNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 0 siblings, 1 reply; 10+ messages in thread From: Alex Deucher @ 2016-09-12 21:05 UTC (permalink / raw) To: Christian König; +Cc: amd-gfx list On Mon, Sep 12, 2016 at 10:39 AM, Christian König <deathsimple@vodafone.de> wrote: > From: Christian König <christian.koenig@amd.com> > > Use an explicit limit when moving things around to > force address space allocation. > > Signed-off-by: Christian König <christian.koenig@amd.com> Typo in the patch title: s/expolicit/explicit/ With that fixed: Reviewed-by: Alex Deucher <alexander.deucher@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index 2f8aba3..8e247ac 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -339,7 +339,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo, > placement.num_busy_placement = 1; > placement.busy_placement = &placements; > placements.fpfn = 0; > - placements.lpfn = 0; > + placements.lpfn = adev->mc.gtt_size >> PAGE_SHIFT; > placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; > r = ttm_bo_mem_space(bo, &placement, &tmp_mem, > interruptible, no_wait_gpu); > @@ -386,7 +386,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo, > placement.num_busy_placement = 1; > placement.busy_placement = &placements; > placements.fpfn = 0; > - placements.lpfn = 0; > + placements.lpfn = adev->mc.gtt_size >> PAGE_SHIFT; > placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; > r = ttm_bo_mem_space(bo, &placement, &tmp_mem, > interruptible, no_wait_gpu); > -- > 2.5.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
[parent not found: <CADnq5_O4RmFuHR4pBumsHnW=sfEmgnXg_HJQnPcqWV_KW4TeNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH 5/6] drm/amdgpu: use expolicit limit fro VRAM<->GTT moves [not found] ` <CADnq5_O4RmFuHR4pBumsHnW=sfEmgnXg_HJQnPcqWV_KW4TeNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2016-09-13 1:32 ` Michel Dänzer 0 siblings, 0 replies; 10+ messages in thread From: Michel Dänzer @ 2016-09-13 1:32 UTC (permalink / raw) To: Alex Deucher, Christian König; +Cc: amd-gfx list On 13/09/16 06:05 AM, Alex Deucher wrote: > On Mon, Sep 12, 2016 at 10:39 AM, Christian König > <deathsimple@vodafone.de> wrote: >> From: Christian König <christian.koenig@amd.com> >> >> Use an explicit limit when moving things around to >> force address space allocation. >> >> Signed-off-by: Christian König <christian.koenig@amd.com> > > Typo in the patch title: > s/expolicit/explicit/ and s/fro/for/ -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 6/6] drm/amdgpu: add a custom GTT memory manager v2 [not found] ` <1473691152-1693-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> ` (3 preceding siblings ...) 2016-09-12 14:39 ` [PATCH 5/6] drm/amdgpu: use expolicit limit fro VRAM<->GTT moves Christian König @ 2016-09-12 14:39 ` Christian König [not found] ` <1473691152-1693-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 4 siblings, 1 reply; 10+ messages in thread From: Christian König @ 2016-09-12 14:39 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW From: Christian König <christian.koenig@amd.com> Only allocate address space when we really need it. v2: fix a typo, add correct function description, stop leaking the node in the error case. Signed-off-by: Christian König <christian.koenig@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 238 ++++++++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 20 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 9 +- 6 files changed, 265 insertions(+), 11 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index f7d84ac..f2b97cb 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -29,7 +29,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_pm.o atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \ atombios_encoders.o amdgpu_sa.o atombios_i2c.o \ amdgpu_prime.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \ - amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o + amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \ + amdgpu_gtt_mgr.o # add asic specific block amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \ diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index ca81f15..d9c006f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -649,7 +649,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p, if (!r && p->uf_entry.robj) { struct amdgpu_bo *uf = p->uf_entry.robj; - r = amdgpu_ttm_bind(uf->tbo.ttm, &uf->tbo.mem); + r = amdgpu_ttm_bind(&uf->tbo, &uf->tbo.mem); p->job->uf_addr += amdgpu_bo_gpu_offset(uf); } @@ -1193,7 +1193,7 @@ int amdgpu_cs_sysvm_access_required(struct amdgpu_cs_parser *parser) for (i = 0; i < parser->bo_list->num_entries; i++) { struct amdgpu_bo *bo = parser->bo_list->array[i].robj; - r = amdgpu_ttm_bind(bo->tbo.ttm, &bo->tbo.mem); + r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem); if (unlikely(r)) return r; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c new file mode 100644 index 0000000..6d84298 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c @@ -0,0 +1,238 @@ +/* + * Copyright 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Christian König + */ + +#include <drm/drmP.h> +#include "amdgpu.h" + +struct amdgpu_gtt_mgr { + struct drm_mm mm; + spinlock_t lock; + uint64_t available; +}; + +/** + * amdgpu_gtt_mgr_init - init GTT manager and DRM MM + * + * @man: TTM memory type manager + * @p_size: maximum size of GTT + * + * Allocate and initialize the GTT manager. + */ +static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man, + unsigned long p_size) +{ + struct amdgpu_gtt_mgr *mgr; + + mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); + if (!mgr) + return -ENOMEM; + + drm_mm_init(&mgr->mm, 0, p_size); + spin_lock_init(&mgr->lock); + mgr->available = p_size; + man->priv = mgr; + return 0; +} + +/** + * amdgpu_gtt_mgr_fini - free and destroy GTT manager + * + * @man: TTM memory type manager + * + * Destroy and free the GTT manager, returns -EBUSY if ranges are still + * allocated inside it. + */ +static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man) +{ + struct amdgpu_gtt_mgr *mgr = man->priv; + + spin_lock(&mgr->lock); + if (!drm_mm_clean(&mgr->mm)) { + spin_unlock(&mgr->lock); + return -EBUSY; + } + + drm_mm_takedown(&mgr->mm); + spin_unlock(&mgr->lock); + kfree(mgr); + man->priv = NULL; + return 0; +} + +/** + * amdgpu_gtt_mgr_alloc - allocate new ranges + * + * @man: TTM memory type manager + * @tbo: TTM BO we need this range for + * @place: placement flags and restrictions + * @mem: the resulting mem object + * + * Allocate the address space for a node. + */ +int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, + struct ttm_buffer_object *tbo, + const struct ttm_place *place, + struct ttm_mem_reg *mem) +{ + struct amdgpu_gtt_mgr *mgr = man->priv; + struct drm_mm_node *node = mem->mm_node; + enum drm_mm_search_flags sflags = DRM_MM_SEARCH_BEST; + enum drm_mm_allocator_flags aflags = DRM_MM_CREATE_DEFAULT; + unsigned long fpfn, lpfn; + int r; + + if (node->start != AMDGPU_BO_INVALID_OFFSET) + return 0; + + if (place) + fpfn = place->fpfn; + else + fpfn = 0; + + if (place && place->lpfn) + lpfn = place->lpfn; + else + lpfn = man->size; + + if (place && place->flags & TTM_PL_FLAG_TOPDOWN) { + sflags = DRM_MM_SEARCH_BELOW; + aflags = DRM_MM_CREATE_TOP; + } + + spin_lock(&mgr->lock); + r = drm_mm_insert_node_in_range_generic(&mgr->mm, node, mem->num_pages, + mem->page_alignment, 0, + fpfn, lpfn, sflags, aflags); + spin_unlock(&mgr->lock); + + if (!r) { + mem->start = node->start; + tbo->offset = (tbo->mem.start << PAGE_SHIFT) + + tbo->bdev->man[tbo->mem.mem_type].gpu_offset; + } + + return r; +} + +/** + * amdgpu_gtt_mgr_new - allocate a new node + * + * @man: TTM memory type manager + * @tbo: TTM BO we need this range for + * @place: placement flags and restrictions + * @mem: the resulting mem object + * + * Dummy, allocate the node but no space for it yet. + */ +static int amdgpu_gtt_mgr_new(struct ttm_mem_type_manager *man, + struct ttm_buffer_object *tbo, + const struct ttm_place *place, + struct ttm_mem_reg *mem) +{ + struct amdgpu_gtt_mgr *mgr = man->priv; + struct drm_mm_node *node; + int r; + + spin_lock(&mgr->lock); + if (mgr->available < mem->num_pages) { + spin_unlock(&mgr->lock); + return 0; + } + mgr->available -= mem->num_pages; + spin_unlock(&mgr->lock); + + node = kzalloc(sizeof(*node), GFP_KERNEL); + if (!node) + return -ENOMEM; + + node->start = AMDGPU_BO_INVALID_OFFSET; + mem->mm_node = node; + + if (place->fpfn || place->lpfn || place->flags & TTM_PL_FLAG_TOPDOWN) { + r = amdgpu_gtt_mgr_alloc(man, tbo, place, mem); + if (unlikely(r)) { + kfree(node); + mem->mm_node = NULL; + } + } else { + mem->start = node->start; + } + + return 0; +} + +/** + * amdgpu_gtt_mgr_del - free ranges + * + * @man: TTM memory type manager + * @tbo: TTM BO we need this range for + * @place: placement flags and restrictions + * @mem: TTM memory object + * + * Free the allocated GTT again. + */ +static void amdgpu_gtt_mgr_del(struct ttm_mem_type_manager *man, + struct ttm_mem_reg *mem) +{ + struct amdgpu_gtt_mgr *mgr = man->priv; + struct drm_mm_node *node = mem->mm_node; + + if (!node) + return; + + spin_lock(&mgr->lock); + if (node->start != AMDGPU_BO_INVALID_OFFSET) + drm_mm_remove_node(node); + mgr->available += mem->num_pages; + spin_unlock(&mgr->lock); + + kfree(node); + mem->mm_node = NULL; +} + +/** + * amdgpu_gtt_mgr_debug - dump VRAM table + * + * @man: TTM memory type manager + * @prefix: text prefix + * + * Dump the table content using printk. + */ +static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man, + const char *prefix) +{ + struct amdgpu_gtt_mgr *mgr = man->priv; + + spin_lock(&mgr->lock); + drm_mm_debug_table(&mgr->mm, prefix); + spin_unlock(&mgr->lock); +} + +const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = { + amdgpu_gtt_mgr_init, + amdgpu_gtt_mgr_fini, + amdgpu_gtt_mgr_new, + amdgpu_gtt_mgr_del, + amdgpu_gtt_mgr_debug +}; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 151a706..691707b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -675,7 +675,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, dev_err(bo->adev->dev, "%p pin failed\n", bo); goto error; } - r = amdgpu_ttm_bind(bo->tbo.ttm, &bo->tbo.mem); + r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem); if (unlikely(r)) { dev_err(bo->adev->dev, "%p bind failed\n", bo); goto error; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 8e247ac..a918f29 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -160,7 +160,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, man->default_caching = TTM_PL_FLAG_CACHED; break; case TTM_PL_TT: - man->func = &ttm_bo_manager_func; + man->func = &amdgpu_gtt_mgr_func; man->gpu_offset = adev->mc.gtt_start; man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; @@ -277,7 +277,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, switch (old_mem->mem_type) { case TTM_PL_TT: - r = amdgpu_ttm_bind(bo->ttm, old_mem); + r = amdgpu_ttm_bind(bo, old_mem); if (r) return r; @@ -290,7 +290,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, } switch (new_mem->mem_type) { case TTM_PL_TT: - r = amdgpu_ttm_bind(bo->ttm, new_mem); + r = amdgpu_ttm_bind(bo, new_mem); if (r) return r; @@ -676,7 +676,6 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm, return r; } } - gtt->offset = (u64)bo_mem->start << PAGE_SHIFT; if (!ttm->num_pages) { WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", ttm->num_pages, bo_mem, ttm); @@ -697,16 +696,25 @@ bool amdgpu_ttm_is_bound(struct ttm_tt *ttm) return gtt && !list_empty(>t->list); } -int amdgpu_ttm_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem) +int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem) { - struct amdgpu_ttm_tt *gtt = (void *)ttm; + struct ttm_tt *ttm = bo->ttm; + struct amdgpu_ttm_tt *gtt = (void *)bo->ttm; uint32_t flags; int r; if (!ttm || amdgpu_ttm_is_bound(ttm)) return 0; + r = amdgpu_gtt_mgr_alloc(&bo->bdev->man[TTM_PL_TT], bo, + NULL, bo_mem); + if (r) { + DRM_ERROR("Failed to allocate GTT address space (%d)\n", r); + return r; + } + flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, bo_mem); + gtt->offset = (u64)bo_mem->start << PAGE_SHIFT; r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages, ttm->pages, gtt->ttm.dma_address, flags); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h index 3ee825f..9812c80 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -65,6 +65,13 @@ struct amdgpu_mman { struct amdgpu_mman_lru guard; }; +extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func; + +int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, + struct ttm_buffer_object *tbo, + const struct ttm_place *place, + struct ttm_mem_reg *mem); + int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, uint64_t dst_offset, @@ -78,6 +85,6 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo, int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); bool amdgpu_ttm_is_bound(struct ttm_tt *ttm); -int amdgpu_ttm_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem); +int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem); #endif -- 2.5.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <1473691152-1693-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>]
* Re: [PATCH 6/6] drm/amdgpu: add a custom GTT memory manager v2 [not found] ` <1473691152-1693-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> @ 2016-09-12 21:22 ` Alex Deucher 2016-09-12 21:25 ` Felix Kuehling 1 sibling, 0 replies; 10+ messages in thread From: Alex Deucher @ 2016-09-12 21:22 UTC (permalink / raw) To: Christian König; +Cc: amd-gfx list On Mon, Sep 12, 2016 at 10:39 AM, Christian König <deathsimple@vodafone.de> wrote: > From: Christian König <christian.koenig@amd.com> > > Only allocate address space when we really need it. > > v2: fix a typo, add correct function description, > stop leaking the node in the error case. > > Signed-off-by: Christian König <christian.koenig@amd.com> Other than the comments on patch 5, the series is: Reviewed-by: Alex Deucher <alexander.deucher@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 3 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 238 ++++++++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 20 ++- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 9 +- > 6 files changed, 265 insertions(+), 11 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index f7d84ac..f2b97cb 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -29,7 +29,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_pm.o atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \ > atombios_encoders.o amdgpu_sa.o atombios_i2c.o \ > amdgpu_prime.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \ > - amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o > + amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \ > + amdgpu_gtt_mgr.o > > # add asic specific block > amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \ > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > index ca81f15..d9c006f 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > @@ -649,7 +649,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p, > if (!r && p->uf_entry.robj) { > struct amdgpu_bo *uf = p->uf_entry.robj; > > - r = amdgpu_ttm_bind(uf->tbo.ttm, &uf->tbo.mem); > + r = amdgpu_ttm_bind(&uf->tbo, &uf->tbo.mem); > p->job->uf_addr += amdgpu_bo_gpu_offset(uf); > } > > @@ -1193,7 +1193,7 @@ int amdgpu_cs_sysvm_access_required(struct amdgpu_cs_parser *parser) > for (i = 0; i < parser->bo_list->num_entries; i++) { > struct amdgpu_bo *bo = parser->bo_list->array[i].robj; > > - r = amdgpu_ttm_bind(bo->tbo.ttm, &bo->tbo.mem); > + r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem); > if (unlikely(r)) > return r; > } > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > new file mode 100644 > index 0000000..6d84298 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > @@ -0,0 +1,238 @@ > +/* > + * Copyright 2015 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: Christian König > + */ > + > +#include <drm/drmP.h> > +#include "amdgpu.h" > + > +struct amdgpu_gtt_mgr { > + struct drm_mm mm; > + spinlock_t lock; > + uint64_t available; > +}; > + > +/** > + * amdgpu_gtt_mgr_init - init GTT manager and DRM MM > + * > + * @man: TTM memory type manager > + * @p_size: maximum size of GTT > + * > + * Allocate and initialize the GTT manager. > + */ > +static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man, > + unsigned long p_size) > +{ > + struct amdgpu_gtt_mgr *mgr; > + > + mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); > + if (!mgr) > + return -ENOMEM; > + > + drm_mm_init(&mgr->mm, 0, p_size); > + spin_lock_init(&mgr->lock); > + mgr->available = p_size; > + man->priv = mgr; > + return 0; > +} > + > +/** > + * amdgpu_gtt_mgr_fini - free and destroy GTT manager > + * > + * @man: TTM memory type manager > + * > + * Destroy and free the GTT manager, returns -EBUSY if ranges are still > + * allocated inside it. > + */ > +static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + > + spin_lock(&mgr->lock); > + if (!drm_mm_clean(&mgr->mm)) { > + spin_unlock(&mgr->lock); > + return -EBUSY; > + } > + > + drm_mm_takedown(&mgr->mm); > + spin_unlock(&mgr->lock); > + kfree(mgr); > + man->priv = NULL; > + return 0; > +} > + > +/** > + * amdgpu_gtt_mgr_alloc - allocate new ranges > + * > + * @man: TTM memory type manager > + * @tbo: TTM BO we need this range for > + * @place: placement flags and restrictions > + * @mem: the resulting mem object > + * > + * Allocate the address space for a node. > + */ > +int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, > + struct ttm_buffer_object *tbo, > + const struct ttm_place *place, > + struct ttm_mem_reg *mem) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + struct drm_mm_node *node = mem->mm_node; > + enum drm_mm_search_flags sflags = DRM_MM_SEARCH_BEST; > + enum drm_mm_allocator_flags aflags = DRM_MM_CREATE_DEFAULT; > + unsigned long fpfn, lpfn; > + int r; > + > + if (node->start != AMDGPU_BO_INVALID_OFFSET) > + return 0; > + > + if (place) > + fpfn = place->fpfn; > + else > + fpfn = 0; > + > + if (place && place->lpfn) > + lpfn = place->lpfn; > + else > + lpfn = man->size; > + > + if (place && place->flags & TTM_PL_FLAG_TOPDOWN) { > + sflags = DRM_MM_SEARCH_BELOW; > + aflags = DRM_MM_CREATE_TOP; > + } > + > + spin_lock(&mgr->lock); > + r = drm_mm_insert_node_in_range_generic(&mgr->mm, node, mem->num_pages, > + mem->page_alignment, 0, > + fpfn, lpfn, sflags, aflags); > + spin_unlock(&mgr->lock); > + > + if (!r) { > + mem->start = node->start; > + tbo->offset = (tbo->mem.start << PAGE_SHIFT) + > + tbo->bdev->man[tbo->mem.mem_type].gpu_offset; > + } > + > + return r; > +} > + > +/** > + * amdgpu_gtt_mgr_new - allocate a new node > + * > + * @man: TTM memory type manager > + * @tbo: TTM BO we need this range for > + * @place: placement flags and restrictions > + * @mem: the resulting mem object > + * > + * Dummy, allocate the node but no space for it yet. > + */ > +static int amdgpu_gtt_mgr_new(struct ttm_mem_type_manager *man, > + struct ttm_buffer_object *tbo, > + const struct ttm_place *place, > + struct ttm_mem_reg *mem) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + struct drm_mm_node *node; > + int r; > + > + spin_lock(&mgr->lock); > + if (mgr->available < mem->num_pages) { > + spin_unlock(&mgr->lock); > + return 0; > + } > + mgr->available -= mem->num_pages; > + spin_unlock(&mgr->lock); > + > + node = kzalloc(sizeof(*node), GFP_KERNEL); > + if (!node) > + return -ENOMEM; > + > + node->start = AMDGPU_BO_INVALID_OFFSET; > + mem->mm_node = node; > + > + if (place->fpfn || place->lpfn || place->flags & TTM_PL_FLAG_TOPDOWN) { > + r = amdgpu_gtt_mgr_alloc(man, tbo, place, mem); > + if (unlikely(r)) { > + kfree(node); > + mem->mm_node = NULL; > + } > + } else { > + mem->start = node->start; > + } > + > + return 0; > +} > + > +/** > + * amdgpu_gtt_mgr_del - free ranges > + * > + * @man: TTM memory type manager > + * @tbo: TTM BO we need this range for > + * @place: placement flags and restrictions > + * @mem: TTM memory object > + * > + * Free the allocated GTT again. > + */ > +static void amdgpu_gtt_mgr_del(struct ttm_mem_type_manager *man, > + struct ttm_mem_reg *mem) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + struct drm_mm_node *node = mem->mm_node; > + > + if (!node) > + return; > + > + spin_lock(&mgr->lock); > + if (node->start != AMDGPU_BO_INVALID_OFFSET) > + drm_mm_remove_node(node); > + mgr->available += mem->num_pages; > + spin_unlock(&mgr->lock); > + > + kfree(node); > + mem->mm_node = NULL; > +} > + > +/** > + * amdgpu_gtt_mgr_debug - dump VRAM table > + * > + * @man: TTM memory type manager > + * @prefix: text prefix > + * > + * Dump the table content using printk. > + */ > +static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man, > + const char *prefix) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + > + spin_lock(&mgr->lock); > + drm_mm_debug_table(&mgr->mm, prefix); > + spin_unlock(&mgr->lock); > +} > + > +const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = { > + amdgpu_gtt_mgr_init, > + amdgpu_gtt_mgr_fini, > + amdgpu_gtt_mgr_new, > + amdgpu_gtt_mgr_del, > + amdgpu_gtt_mgr_debug > +}; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index 151a706..691707b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -675,7 +675,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, > dev_err(bo->adev->dev, "%p pin failed\n", bo); > goto error; > } > - r = amdgpu_ttm_bind(bo->tbo.ttm, &bo->tbo.mem); > + r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem); > if (unlikely(r)) { > dev_err(bo->adev->dev, "%p bind failed\n", bo); > goto error; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index 8e247ac..a918f29 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -160,7 +160,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, > man->default_caching = TTM_PL_FLAG_CACHED; > break; > case TTM_PL_TT: > - man->func = &ttm_bo_manager_func; > + man->func = &amdgpu_gtt_mgr_func; > man->gpu_offset = adev->mc.gtt_start; > man->available_caching = TTM_PL_MASK_CACHING; > man->default_caching = TTM_PL_FLAG_CACHED; > @@ -277,7 +277,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > > switch (old_mem->mem_type) { > case TTM_PL_TT: > - r = amdgpu_ttm_bind(bo->ttm, old_mem); > + r = amdgpu_ttm_bind(bo, old_mem); > if (r) > return r; > > @@ -290,7 +290,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > } > switch (new_mem->mem_type) { > case TTM_PL_TT: > - r = amdgpu_ttm_bind(bo->ttm, new_mem); > + r = amdgpu_ttm_bind(bo, new_mem); > if (r) > return r; > > @@ -676,7 +676,6 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm, > return r; > } > } > - gtt->offset = (u64)bo_mem->start << PAGE_SHIFT; > if (!ttm->num_pages) { > WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", > ttm->num_pages, bo_mem, ttm); > @@ -697,16 +696,25 @@ bool amdgpu_ttm_is_bound(struct ttm_tt *ttm) > return gtt && !list_empty(>t->list); > } > > -int amdgpu_ttm_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem) > +int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem) > { > - struct amdgpu_ttm_tt *gtt = (void *)ttm; > + struct ttm_tt *ttm = bo->ttm; > + struct amdgpu_ttm_tt *gtt = (void *)bo->ttm; > uint32_t flags; > int r; > > if (!ttm || amdgpu_ttm_is_bound(ttm)) > return 0; > > + r = amdgpu_gtt_mgr_alloc(&bo->bdev->man[TTM_PL_TT], bo, > + NULL, bo_mem); > + if (r) { > + DRM_ERROR("Failed to allocate GTT address space (%d)\n", r); > + return r; > + } > + > flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, bo_mem); > + gtt->offset = (u64)bo_mem->start << PAGE_SHIFT; > r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages, > ttm->pages, gtt->ttm.dma_address, flags); > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > index 3ee825f..9812c80 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > @@ -65,6 +65,13 @@ struct amdgpu_mman { > struct amdgpu_mman_lru guard; > }; > > +extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func; > + > +int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, > + struct ttm_buffer_object *tbo, > + const struct ttm_place *place, > + struct ttm_mem_reg *mem); > + > int amdgpu_copy_buffer(struct amdgpu_ring *ring, > uint64_t src_offset, > uint64_t dst_offset, > @@ -78,6 +85,6 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo, > > int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); > bool amdgpu_ttm_is_bound(struct ttm_tt *ttm); > -int amdgpu_ttm_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem); > +int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem); > > #endif > -- > 2.5.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 6/6] drm/amdgpu: add a custom GTT memory manager v2 [not found] ` <1473691152-1693-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 2016-09-12 21:22 ` Alex Deucher @ 2016-09-12 21:25 ` Felix Kuehling 1 sibling, 0 replies; 10+ messages in thread From: Felix Kuehling @ 2016-09-12 21:25 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW The comment header on top of amdgpu_gtt_mgr.c should say "Copyright 2016" (wrong year). With that fixed, this patch is Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>. Regards, Felix On 16-09-12 10:39 AM, Christian König wrote: > From: Christian König <christian.koenig@amd.com> > > Only allocate address space when we really need it. > > v2: fix a typo, add correct function description, > stop leaking the node in the error case. > > Signed-off-by: Christian König <christian.koenig@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 3 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 238 ++++++++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 20 ++- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 9 +- > 6 files changed, 265 insertions(+), 11 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index f7d84ac..f2b97cb 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -29,7 +29,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_pm.o atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \ > atombios_encoders.o amdgpu_sa.o atombios_i2c.o \ > amdgpu_prime.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \ > - amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o > + amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \ > + amdgpu_gtt_mgr.o > > # add asic specific block > amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \ > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > index ca81f15..d9c006f 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > @@ -649,7 +649,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p, > if (!r && p->uf_entry.robj) { > struct amdgpu_bo *uf = p->uf_entry.robj; > > - r = amdgpu_ttm_bind(uf->tbo.ttm, &uf->tbo.mem); > + r = amdgpu_ttm_bind(&uf->tbo, &uf->tbo.mem); > p->job->uf_addr += amdgpu_bo_gpu_offset(uf); > } > > @@ -1193,7 +1193,7 @@ int amdgpu_cs_sysvm_access_required(struct amdgpu_cs_parser *parser) > for (i = 0; i < parser->bo_list->num_entries; i++) { > struct amdgpu_bo *bo = parser->bo_list->array[i].robj; > > - r = amdgpu_ttm_bind(bo->tbo.ttm, &bo->tbo.mem); > + r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem); > if (unlikely(r)) > return r; > } > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > new file mode 100644 > index 0000000..6d84298 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > @@ -0,0 +1,238 @@ > +/* > + * Copyright 2015 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: Christian König > + */ > + > +#include <drm/drmP.h> > +#include "amdgpu.h" > + > +struct amdgpu_gtt_mgr { > + struct drm_mm mm; > + spinlock_t lock; > + uint64_t available; > +}; > + > +/** > + * amdgpu_gtt_mgr_init - init GTT manager and DRM MM > + * > + * @man: TTM memory type manager > + * @p_size: maximum size of GTT > + * > + * Allocate and initialize the GTT manager. > + */ > +static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man, > + unsigned long p_size) > +{ > + struct amdgpu_gtt_mgr *mgr; > + > + mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); > + if (!mgr) > + return -ENOMEM; > + > + drm_mm_init(&mgr->mm, 0, p_size); > + spin_lock_init(&mgr->lock); > + mgr->available = p_size; > + man->priv = mgr; > + return 0; > +} > + > +/** > + * amdgpu_gtt_mgr_fini - free and destroy GTT manager > + * > + * @man: TTM memory type manager > + * > + * Destroy and free the GTT manager, returns -EBUSY if ranges are still > + * allocated inside it. > + */ > +static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + > + spin_lock(&mgr->lock); > + if (!drm_mm_clean(&mgr->mm)) { > + spin_unlock(&mgr->lock); > + return -EBUSY; > + } > + > + drm_mm_takedown(&mgr->mm); > + spin_unlock(&mgr->lock); > + kfree(mgr); > + man->priv = NULL; > + return 0; > +} > + > +/** > + * amdgpu_gtt_mgr_alloc - allocate new ranges > + * > + * @man: TTM memory type manager > + * @tbo: TTM BO we need this range for > + * @place: placement flags and restrictions > + * @mem: the resulting mem object > + * > + * Allocate the address space for a node. > + */ > +int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, > + struct ttm_buffer_object *tbo, > + const struct ttm_place *place, > + struct ttm_mem_reg *mem) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + struct drm_mm_node *node = mem->mm_node; > + enum drm_mm_search_flags sflags = DRM_MM_SEARCH_BEST; > + enum drm_mm_allocator_flags aflags = DRM_MM_CREATE_DEFAULT; > + unsigned long fpfn, lpfn; > + int r; > + > + if (node->start != AMDGPU_BO_INVALID_OFFSET) > + return 0; > + > + if (place) > + fpfn = place->fpfn; > + else > + fpfn = 0; > + > + if (place && place->lpfn) > + lpfn = place->lpfn; > + else > + lpfn = man->size; > + > + if (place && place->flags & TTM_PL_FLAG_TOPDOWN) { > + sflags = DRM_MM_SEARCH_BELOW; > + aflags = DRM_MM_CREATE_TOP; > + } > + > + spin_lock(&mgr->lock); > + r = drm_mm_insert_node_in_range_generic(&mgr->mm, node, mem->num_pages, > + mem->page_alignment, 0, > + fpfn, lpfn, sflags, aflags); > + spin_unlock(&mgr->lock); > + > + if (!r) { > + mem->start = node->start; > + tbo->offset = (tbo->mem.start << PAGE_SHIFT) + > + tbo->bdev->man[tbo->mem.mem_type].gpu_offset; > + } > + > + return r; > +} > + > +/** > + * amdgpu_gtt_mgr_new - allocate a new node > + * > + * @man: TTM memory type manager > + * @tbo: TTM BO we need this range for > + * @place: placement flags and restrictions > + * @mem: the resulting mem object > + * > + * Dummy, allocate the node but no space for it yet. > + */ > +static int amdgpu_gtt_mgr_new(struct ttm_mem_type_manager *man, > + struct ttm_buffer_object *tbo, > + const struct ttm_place *place, > + struct ttm_mem_reg *mem) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + struct drm_mm_node *node; > + int r; > + > + spin_lock(&mgr->lock); > + if (mgr->available < mem->num_pages) { > + spin_unlock(&mgr->lock); > + return 0; > + } > + mgr->available -= mem->num_pages; > + spin_unlock(&mgr->lock); > + > + node = kzalloc(sizeof(*node), GFP_KERNEL); > + if (!node) > + return -ENOMEM; > + > + node->start = AMDGPU_BO_INVALID_OFFSET; > + mem->mm_node = node; > + > + if (place->fpfn || place->lpfn || place->flags & TTM_PL_FLAG_TOPDOWN) { > + r = amdgpu_gtt_mgr_alloc(man, tbo, place, mem); > + if (unlikely(r)) { > + kfree(node); > + mem->mm_node = NULL; > + } > + } else { > + mem->start = node->start; > + } > + > + return 0; > +} > + > +/** > + * amdgpu_gtt_mgr_del - free ranges > + * > + * @man: TTM memory type manager > + * @tbo: TTM BO we need this range for > + * @place: placement flags and restrictions > + * @mem: TTM memory object > + * > + * Free the allocated GTT again. > + */ > +static void amdgpu_gtt_mgr_del(struct ttm_mem_type_manager *man, > + struct ttm_mem_reg *mem) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + struct drm_mm_node *node = mem->mm_node; > + > + if (!node) > + return; > + > + spin_lock(&mgr->lock); > + if (node->start != AMDGPU_BO_INVALID_OFFSET) > + drm_mm_remove_node(node); > + mgr->available += mem->num_pages; > + spin_unlock(&mgr->lock); > + > + kfree(node); > + mem->mm_node = NULL; > +} > + > +/** > + * amdgpu_gtt_mgr_debug - dump VRAM table > + * > + * @man: TTM memory type manager > + * @prefix: text prefix > + * > + * Dump the table content using printk. > + */ > +static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man, > + const char *prefix) > +{ > + struct amdgpu_gtt_mgr *mgr = man->priv; > + > + spin_lock(&mgr->lock); > + drm_mm_debug_table(&mgr->mm, prefix); > + spin_unlock(&mgr->lock); > +} > + > +const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = { > + amdgpu_gtt_mgr_init, > + amdgpu_gtt_mgr_fini, > + amdgpu_gtt_mgr_new, > + amdgpu_gtt_mgr_del, > + amdgpu_gtt_mgr_debug > +}; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index 151a706..691707b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -675,7 +675,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, > dev_err(bo->adev->dev, "%p pin failed\n", bo); > goto error; > } > - r = amdgpu_ttm_bind(bo->tbo.ttm, &bo->tbo.mem); > + r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem); > if (unlikely(r)) { > dev_err(bo->adev->dev, "%p bind failed\n", bo); > goto error; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index 8e247ac..a918f29 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -160,7 +160,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, > man->default_caching = TTM_PL_FLAG_CACHED; > break; > case TTM_PL_TT: > - man->func = &ttm_bo_manager_func; > + man->func = &amdgpu_gtt_mgr_func; > man->gpu_offset = adev->mc.gtt_start; > man->available_caching = TTM_PL_MASK_CACHING; > man->default_caching = TTM_PL_FLAG_CACHED; > @@ -277,7 +277,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > > switch (old_mem->mem_type) { > case TTM_PL_TT: > - r = amdgpu_ttm_bind(bo->ttm, old_mem); > + r = amdgpu_ttm_bind(bo, old_mem); > if (r) > return r; > > @@ -290,7 +290,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > } > switch (new_mem->mem_type) { > case TTM_PL_TT: > - r = amdgpu_ttm_bind(bo->ttm, new_mem); > + r = amdgpu_ttm_bind(bo, new_mem); > if (r) > return r; > > @@ -676,7 +676,6 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm, > return r; > } > } > - gtt->offset = (u64)bo_mem->start << PAGE_SHIFT; > if (!ttm->num_pages) { > WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", > ttm->num_pages, bo_mem, ttm); > @@ -697,16 +696,25 @@ bool amdgpu_ttm_is_bound(struct ttm_tt *ttm) > return gtt && !list_empty(>t->list); > } > > -int amdgpu_ttm_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem) > +int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem) > { > - struct amdgpu_ttm_tt *gtt = (void *)ttm; > + struct ttm_tt *ttm = bo->ttm; > + struct amdgpu_ttm_tt *gtt = (void *)bo->ttm; > uint32_t flags; > int r; > > if (!ttm || amdgpu_ttm_is_bound(ttm)) > return 0; > > + r = amdgpu_gtt_mgr_alloc(&bo->bdev->man[TTM_PL_TT], bo, > + NULL, bo_mem); > + if (r) { > + DRM_ERROR("Failed to allocate GTT address space (%d)\n", r); > + return r; > + } > + > flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, bo_mem); > + gtt->offset = (u64)bo_mem->start << PAGE_SHIFT; > r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages, > ttm->pages, gtt->ttm.dma_address, flags); > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > index 3ee825f..9812c80 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > @@ -65,6 +65,13 @@ struct amdgpu_mman { > struct amdgpu_mman_lru guard; > }; > > +extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func; > + > +int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, > + struct ttm_buffer_object *tbo, > + const struct ttm_place *place, > + struct ttm_mem_reg *mem); > + > int amdgpu_copy_buffer(struct amdgpu_ring *ring, > uint64_t src_offset, > uint64_t dst_offset, > @@ -78,6 +85,6 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo, > > int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); > bool amdgpu_ttm_is_bound(struct ttm_tt *ttm); > -int amdgpu_ttm_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem); > +int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem); > > #endif _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-09-13 1:32 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-09-12 14:39 [PATCH 1/6] drm/amdgpu: validate size and offset of user fence BO Christian König [not found] ` <1473691152-1693-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 2016-09-12 14:39 ` [PATCH 2/6] drm/amdgpu: add AMDGPU_BO_INVALID_OFFSET Christian König 2016-09-12 14:39 ` [PATCH 3/6] drm/amdgpu: unbind GTT only when it is bound Christian König 2016-09-12 14:39 ` [PATCH 4/6] drm/amdgpu: use explicit GTT limit for evictions Christian König 2016-09-12 14:39 ` [PATCH 5/6] drm/amdgpu: use expolicit limit fro VRAM<->GTT moves Christian König [not found] ` <1473691152-1693-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 2016-09-12 21:05 ` Alex Deucher [not found] ` <CADnq5_O4RmFuHR4pBumsHnW=sfEmgnXg_HJQnPcqWV_KW4TeNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-09-13 1:32 ` Michel Dänzer 2016-09-12 14:39 ` [PATCH 6/6] drm/amdgpu: add a custom GTT memory manager v2 Christian König [not found] ` <1473691152-1693-6-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org> 2016-09-12 21:22 ` Alex Deucher 2016-09-12 21:25 ` Felix Kuehling
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