* [PATCH] crypto/qat: add Intel QuickAssist C62x device
@ 2016-08-23 14:53 Deepak Kumar Jain
2016-08-25 13:15 ` [PATCH v2] " Deepak Kumar Jain
2016-09-07 18:06 ` [PATCH] " De Lara Guarch, Pablo
0 siblings, 2 replies; 8+ messages in thread
From: Deepak Kumar Jain @ 2016-08-23 14:53 UTC (permalink / raw)
To: pablo.de.lara.guarch, fiona.trahe, john.griffin; +Cc: dev, Deepak Kumar Jain
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
doc/guides/cryptodevs/qat.rst | 82 ++++++++++++++++++++++++++++++++--
drivers/crypto/qat/rte_qat_cryptodev.c | 3 ++
2 files changed, 81 insertions(+), 4 deletions(-)
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index af66569..f6cc1fa 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -27,11 +27,12 @@
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-Quick Assist Crypto Poll Mode Driver
+Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
====================================
The QAT PMD provides poll mode crypto driver support for **Intel QuickAssist
-Technology DH895xxC** hardware accelerator.
+Technology DH895xxC** and **Intel QuickAssist Technology C62x**
+hardware accelerator.
Features
@@ -88,9 +89,13 @@ If you are running on kernel 4.4 or greater, see instructions for
`Installation using kernel.org driver`_ below. If you are on a kernel earlier
than 4.4, see `Installation using 01.org QAT driver`_.
+For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is
+needed. See instructions for `instructions using kernel.org driver`_ below.
+
Installation using 01.org QAT driver
------------------------------------
+NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org.
Download the latest QuickAssist Technology Driver from `01.org
<https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_
@@ -168,6 +173,7 @@ If the build or install fails due to mismatching kernel sources you may need to
Installation using kernel.org driver
------------------------------------
+For **Intel QuickAssist Technology DH895xxC**:
Assuming you are running on at least a 4.4 kernel, you can use the stock kernel.org QAT
driver to start the QAT hardware.
@@ -187,9 +193,9 @@ You should see the following output::
qat_dh895xcc 5626 0
intel_qat 82336 1 qat_dh895xcc
-Next, you need to expose the VFs using the sysfs file system.
+Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
-First find the bdf of the DH895xCC device::
+First find the bdf of the physical function (PF) of the DH895xCC device::
lspci -d : 435
@@ -227,10 +233,53 @@ cd to your linux source root directory and start the qat kernel modules:
``IOMMU should be enabled for SR-IOV to work correctly``
+For **Intel QuickAssist Technology C62x**:
+Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
+driver to start the QAT hardware.
+
+The steps below assume you are:
+
+* Running DPDK on a platform with one ``C62x`` device.
+* On a kernel at least version 4.5.
+
+In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+
+Ensure the QAT driver is loaded on your system, by executing::
+
+ lsmod | grep qat
+
+You should see the following output::
+
+ qat_c62x 16384 0
+ intel_qat 122880 1 qat_c62x
+
+Next, you need to expose the VFs using the sysfs file system.
+
+First find the bdf of the C62x device::
+
+ lspci -d:37c8
+You should see output similar to::
+
+ 1a:00.0 Co-processor: Intel Corporation Device 37c8
+ 3d:00.0 Co-processor: Intel Corporation Device 37c8
+ 3f:00.0 Co-processor: Intel Corporation Device 37c8
+
+For each c62x device there are 3 PFs.
+Using the sysfs, for each PF, enable the 16 VFs::
+
+ echo 16 > /sys/bus/pci/drivers/c6xx/0000\:1a\:00.0/sriov_numvfs
+
+If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5.
+
+To verify that the VFs are available for use - use ``lspci -d:37c9`` to confirm
+the bdf of the 48 VF devices are available per ``C62x`` device.
+
+To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
Binding the available VFs to the DPDK UIO driver
------------------------------------------------
+For **Intel(R) QuickAssist Technology DH895xcc** device:
The unbind command below assumes ``bdfs`` of ``03:01.00-03:04.07``, if yours are different adjust the unbind command below::
cd $RTE_SDK
@@ -247,3 +296,28 @@ The unbind command below assumes ``bdfs`` of ``03:01.00-03:04.07``, if yours are
echo "8086 0443" > /sys/bus/pci/drivers/igb_uio/new_id
You can use ``lspci -vvd:443`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+For **Intel(R) QuickAssist Technology C62x** device:
+The unbind command below assumes ``bdfs`` of ``1a:01.00-1a:02.07``, ``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``,
+if yours are different adjust the unbind command below::
+
+ cd $RTE_SDK
+ modprobe uio
+ insmod ./build/kmod/igb_uio.ko
+
+ for device in $(seq 1 2); do \
+ for fn in $(seq 0 7); do \
+ echo -n 0000:1a:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
+
+ echo -n 0000:3d:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
+
+ echo -n 0000:3f:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
+ done; \
+ done
+
+ echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
+
+You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver.
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c
index 82ab047..e606eb5 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -71,6 +71,9 @@ static struct rte_pci_id pci_id_qat_map[] = {
{
RTE_PCI_DEVICE(0x8086, 0x0443),
},
+ {
+ RTE_PCI_DEVICE(0x8086, 0x37c9),
+ },
{.device_id = 0},
};
--
2.5.5
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2] crypto/qat: add Intel QuickAssist C62x device
2016-08-23 14:53 [PATCH] crypto/qat: add Intel QuickAssist C62x device Deepak Kumar Jain
@ 2016-08-25 13:15 ` Deepak Kumar Jain
2016-08-26 8:58 ` Trahe, Fiona
` (2 more replies)
2016-09-07 18:06 ` [PATCH] " De Lara Guarch, Pablo
1 sibling, 3 replies; 8+ messages in thread
From: Deepak Kumar Jain @ 2016-08-25 13:15 UTC (permalink / raw)
To: pablo.de.lara.guarch, fiona.trahe, john.griffin; +Cc: dev, Deepak Kumar JAIN
From: Deepak Kumar JAIN <deepak.k.jain@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
Changes since V1:
Removed trialing white spaces
doc/guides/cryptodevs/qat.rst | 82 ++++++++++++++++++++++++++++++++--
drivers/crypto/qat/rte_qat_cryptodev.c | 3 ++
2 files changed, 81 insertions(+), 4 deletions(-)
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index bb62f22..f6091dd 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -27,11 +27,12 @@
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-Quick Assist Crypto Poll Mode Driver
+Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
====================================
The QAT PMD provides poll mode crypto driver support for **Intel QuickAssist
-Technology DH895xxC** hardware accelerator.
+Technology DH895xxC** and **Intel QuickAssist Technology C62x**
+hardware accelerator.
Features
@@ -86,9 +87,13 @@ If you are running on kernel 4.4 or greater, see instructions for
`Installation using kernel.org driver`_ below. If you are on a kernel earlier
than 4.4, see `Installation using 01.org QAT driver`_.
+For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is
+needed. See instructions for `instructions using kernel.org driver`_ below.
+
Installation using 01.org QAT driver
------------------------------------
+NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org.
Download the latest QuickAssist Technology Driver from `01.org
<https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_
@@ -166,6 +171,7 @@ If the build or install fails due to mismatching kernel sources you may need to
Installation using kernel.org driver
------------------------------------
+For **Intel QuickAssist Technology DH895xxC**:
Assuming you are running on at least a 4.4 kernel, you can use the stock kernel.org QAT
driver to start the QAT hardware.
@@ -185,9 +191,9 @@ You should see the following output::
qat_dh895xcc 5626 0
intel_qat 82336 1 qat_dh895xcc
-Next, you need to expose the VFs using the sysfs file system.
+Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
-First find the bdf of the DH895xCC device::
+First find the bdf of the physical function (PF) of the DH895xCC device::
lspci -d : 435
@@ -225,10 +231,53 @@ cd to your linux source root directory and start the qat kernel modules:
``IOMMU should be enabled for SR-IOV to work correctly``
+For **Intel QuickAssist Technology C62x**:
+Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
+driver to start the QAT hardware.
+
+The steps below assume you are:
+
+* Running DPDK on a platform with one ``C62x`` device.
+* On a kernel at least version 4.5.
+
+In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+
+Ensure the QAT driver is loaded on your system, by executing::
+
+ lsmod | grep qat
+
+You should see the following output::
+
+ qat_c62x 16384 0
+ intel_qat 122880 1 qat_c62x
+
+Next, you need to expose the VFs using the sysfs file system.
+
+First find the bdf of the C62x device::
+
+ lspci -d:37c8
+
+You should see output similar to::
+
+ 1a:00.0 Co-processor: Intel Corporation Device 37c8
+ 3d:00.0 Co-processor: Intel Corporation Device 37c8
+ 3f:00.0 Co-processor: Intel Corporation Device 37c8
+
+For each c62x device there are 3 PFs.
+Using the sysfs, for each PF, enable the 16 VFs::
+
+ echo 16 > /sys/bus/pci/drivers/c6xx/0000\:1a\:00.0/sriov_numvfs
+
+If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5.
+To verify that the VFs are available for use - use ``lspci -d:37c9`` to confirm
+the bdf of the 48 VF devices are available per ``C62x`` device.
+
+To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
Binding the available VFs to the DPDK UIO driver
------------------------------------------------
+For **Intel(R) QuickAssist Technology DH895xcc** device:
The unbind command below assumes ``bdfs`` of ``03:01.00-03:04.07``, if yours are different adjust the unbind command below::
cd $RTE_SDK
@@ -245,3 +294,28 @@ The unbind command below assumes ``bdfs`` of ``03:01.00-03:04.07``, if yours are
echo "8086 0443" > /sys/bus/pci/drivers/igb_uio/new_id
You can use ``lspci -vvd:443`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+For **Intel(R) QuickAssist Technology C62x** device:
+The unbind command below assumes ``bdfs`` of ``1a:01.00-1a:02.07``, ``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``,
+if yours are different adjust the unbind command below::
+
+ cd $RTE_SDK
+ modprobe uio
+ insmod ./build/kmod/igb_uio.ko
+
+ for device in $(seq 1 2); do \
+ for fn in $(seq 0 7); do \
+ echo -n 0000:1a:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
+
+ echo -n 0000:3d:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
+
+ echo -n 0000:3f:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
+ done; \
+ done
+
+ echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
+
+You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver.
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c
index 82ab047..e606eb5 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -71,6 +71,9 @@ static struct rte_pci_id pci_id_qat_map[] = {
{
RTE_PCI_DEVICE(0x8086, 0x0443),
},
+ {
+ RTE_PCI_DEVICE(0x8086, 0x37c9),
+ },
{.device_id = 0},
};
--
2.5.5
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2] crypto/qat: add Intel QuickAssist C62x device
2016-08-25 13:15 ` [PATCH v2] " Deepak Kumar Jain
@ 2016-08-26 8:58 ` Trahe, Fiona
2016-09-13 9:11 ` [PATCH v3] " Deepak Kumar Jain
2016-09-13 10:41 ` [PATCH v4] " Deepak Kumar Jain
2 siblings, 0 replies; 8+ messages in thread
From: Trahe, Fiona @ 2016-08-26 8:58 UTC (permalink / raw)
To: Jain, Deepak K, De Lara Guarch, Pablo, Griffin, John; +Cc: dev, Trahe, Fiona
-----Original Message-----
From: Jain, Deepak K
Sent: Thursday, August 25, 2016 2:15 PM
To: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>; Trahe, Fiona <fiona.trahe@intel.com>; Griffin, John <john.griffin@intel.com>
Cc: dev@dpdk.org; Jain, Deepak K <deepak.k.jain@intel.com>
Subject: [PATCH v2] crypto/qat: add Intel QuickAssist C62x device
From: Deepak Kumar JAIN <deepak.k.jain@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
Changes since V1:
Removed trialing white spaces
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] crypto/qat: add Intel QuickAssist C62x device
2016-08-23 14:53 [PATCH] crypto/qat: add Intel QuickAssist C62x device Deepak Kumar Jain
2016-08-25 13:15 ` [PATCH v2] " Deepak Kumar Jain
@ 2016-09-07 18:06 ` De Lara Guarch, Pablo
2016-09-07 19:33 ` Jain, Deepak K
1 sibling, 1 reply; 8+ messages in thread
From: De Lara Guarch, Pablo @ 2016-09-07 18:06 UTC (permalink / raw)
To: Jain, Deepak K, Trahe, Fiona, Griffin, John; +Cc: dev
Hi Deepak,
> -----Original Message-----
> From: Jain, Deepak K
> Sent: Tuesday, August 23, 2016 7:54 AM
> To: De Lara Guarch, Pablo; Trahe, Fiona; Griffin, John
> Cc: dev@dpdk.org; Jain, Deepak K
> Subject: [PATCH] crypto/qat: add Intel QuickAssist C62x device
>
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Could you send a v2 with a release notes update?
Thanks,
Pablo
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] crypto/qat: add Intel QuickAssist C62x device
2016-09-07 18:06 ` [PATCH] " De Lara Guarch, Pablo
@ 2016-09-07 19:33 ` Jain, Deepak K
0 siblings, 0 replies; 8+ messages in thread
From: Jain, Deepak K @ 2016-09-07 19:33 UTC (permalink / raw)
To: De Lara Guarch, Pablo, Trahe, Fiona, Griffin, John; +Cc: dev
HI Pablo,
> -----Original Message-----
> From: De Lara Guarch, Pablo
> Sent: Wednesday, September 7, 2016 7:07 PM
> To: Jain, Deepak K <deepak.k.jain@intel.com>; Trahe, Fiona
> <fiona.trahe@intel.com>; Griffin, John <john.griffin@intel.com>
> Cc: dev@dpdk.org
> Subject: RE: [PATCH] crypto/qat: add Intel QuickAssist C62x device
>
> Hi Deepak,
>
> > -----Original Message-----
> > From: Jain, Deepak K
> > Sent: Tuesday, August 23, 2016 7:54 AM
> > To: De Lara Guarch, Pablo; Trahe, Fiona; Griffin, John
> > Cc: dev@dpdk.org; Jain, Deepak K
> > Subject: [PATCH] crypto/qat: add Intel QuickAssist C62x device
> >
> > Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
>
> Could you send a v2 with a release notes update?
>
Agreed. I will send v2 with release notes.
> Thanks,
> Pablo
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3] crypto/qat: add Intel QuickAssist C62x device
2016-08-25 13:15 ` [PATCH v2] " Deepak Kumar Jain
2016-08-26 8:58 ` Trahe, Fiona
@ 2016-09-13 9:11 ` Deepak Kumar Jain
2016-09-13 10:41 ` [PATCH v4] " Deepak Kumar Jain
2 siblings, 0 replies; 8+ messages in thread
From: Deepak Kumar Jain @ 2016-09-13 9:11 UTC (permalink / raw)
To: dev; +Cc: pablo.de.lara.guarch, Deepak Kumar JAIN
From: Deepak Kumar JAIN <deepak.k.jain@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
Changes in v3:
Added new feature information
Changes in v2:
Removed trialing white spaces
doc/guides/cryptodevs/qat.rst | 82 ++++++++++++++++++++++++++++++++--
doc/guides/rel_notes/release_16_11.rst | 4 ++
drivers/crypto/qat/rte_qat_cryptodev.c | 3 ++
3 files changed, 85 insertions(+), 4 deletions(-)
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index bb62f22..f6091dd 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -27,11 +27,12 @@
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-Quick Assist Crypto Poll Mode Driver
+Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
====================================
The QAT PMD provides poll mode crypto driver support for **Intel QuickAssist
-Technology DH895xxC** hardware accelerator.
+Technology DH895xxC** and **Intel QuickAssist Technology C62x**
+hardware accelerator.
Features
@@ -86,9 +87,13 @@ If you are running on kernel 4.4 or greater, see instructions for
`Installation using kernel.org driver`_ below. If you are on a kernel earlier
than 4.4, see `Installation using 01.org QAT driver`_.
+For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is
+needed. See instructions for `instructions using kernel.org driver`_ below.
+
Installation using 01.org QAT driver
------------------------------------
+NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org.
Download the latest QuickAssist Technology Driver from `01.org
<https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_
@@ -166,6 +171,7 @@ If the build or install fails due to mismatching kernel sources you may need to
Installation using kernel.org driver
------------------------------------
+For **Intel QuickAssist Technology DH895xxC**:
Assuming you are running on at least a 4.4 kernel, you can use the stock kernel.org QAT
driver to start the QAT hardware.
@@ -185,9 +191,9 @@ You should see the following output::
qat_dh895xcc 5626 0
intel_qat 82336 1 qat_dh895xcc
-Next, you need to expose the VFs using the sysfs file system.
+Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
-First find the bdf of the DH895xCC device::
+First find the bdf of the physical function (PF) of the DH895xCC device::
lspci -d : 435
@@ -225,10 +231,53 @@ cd to your linux source root directory and start the qat kernel modules:
``IOMMU should be enabled for SR-IOV to work correctly``
+For **Intel QuickAssist Technology C62x**:
+Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
+driver to start the QAT hardware.
+
+The steps below assume you are:
+
+* Running DPDK on a platform with one ``C62x`` device.
+* On a kernel at least version 4.5.
+
+In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+
+Ensure the QAT driver is loaded on your system, by executing::
+
+ lsmod | grep qat
+
+You should see the following output::
+
+ qat_c62x 16384 0
+ intel_qat 122880 1 qat_c62x
+
+Next, you need to expose the VFs using the sysfs file system.
+
+First find the bdf of the C62x device::
+
+ lspci -d:37c8
+
+You should see output similar to::
+
+ 1a:00.0 Co-processor: Intel Corporation Device 37c8
+ 3d:00.0 Co-processor: Intel Corporation Device 37c8
+ 3f:00.0 Co-processor: Intel Corporation Device 37c8
+
+For each c62x device there are 3 PFs.
+Using the sysfs, for each PF, enable the 16 VFs::
+
+ echo 16 > /sys/bus/pci/drivers/c6xx/0000\:1a\:00.0/sriov_numvfs
+
+If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5.
+To verify that the VFs are available for use - use ``lspci -d:37c9`` to confirm
+the bdf of the 48 VF devices are available per ``C62x`` device.
+
+To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
Binding the available VFs to the DPDK UIO driver
------------------------------------------------
+For **Intel(R) QuickAssist Technology DH895xcc** device:
The unbind command below assumes ``bdfs`` of ``03:01.00-03:04.07``, if yours are different adjust the unbind command below::
cd $RTE_SDK
@@ -245,3 +294,28 @@ The unbind command below assumes ``bdfs`` of ``03:01.00-03:04.07``, if yours are
echo "8086 0443" > /sys/bus/pci/drivers/igb_uio/new_id
You can use ``lspci -vvd:443`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+For **Intel(R) QuickAssist Technology C62x** device:
+The unbind command below assumes ``bdfs`` of ``1a:01.00-1a:02.07``, ``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``,
+if yours are different adjust the unbind command below::
+
+ cd $RTE_SDK
+ modprobe uio
+ insmod ./build/kmod/igb_uio.ko
+
+ for device in $(seq 1 2); do \
+ for fn in $(seq 0 7); do \
+ echo -n 0000:1a:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
+
+ echo -n 0000:3d:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
+
+ echo -n 0000:3f:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
+ done; \
+ done
+
+ echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
+
+You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver.
diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst
index 9b2c775..5db495e 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -36,6 +36,10 @@ New Features
This section is a comment. Make sure to start the actual text at the margin.
+* ** Added support of C62XX Device in QAT PMD.**
+ Support for Device c62xx has been enabled in QAT PMD.
+
+
* **Updated the QAT PMD.**
The QAT PMD was updated with changes including the following:
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c
index 82ab047..e606eb5 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -71,6 +71,9 @@ static struct rte_pci_id pci_id_qat_map[] = {
{
RTE_PCI_DEVICE(0x8086, 0x0443),
},
+ {
+ RTE_PCI_DEVICE(0x8086, 0x37c9),
+ },
{.device_id = 0},
};
--
2.5.5
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v4] crypto/qat: add Intel QuickAssist C62x device
2016-08-25 13:15 ` [PATCH v2] " Deepak Kumar Jain
2016-08-26 8:58 ` Trahe, Fiona
2016-09-13 9:11 ` [PATCH v3] " Deepak Kumar Jain
@ 2016-09-13 10:41 ` Deepak Kumar Jain
2016-09-20 0:01 ` De Lara Guarch, Pablo
2 siblings, 1 reply; 8+ messages in thread
From: Deepak Kumar Jain @ 2016-09-13 10:41 UTC (permalink / raw)
To: dev; +Cc: pablo.de.lara.guarch, Deepak Kumar JAIN
From: Deepak Kumar JAIN <deepak.k.jain@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
Changes in v4:
Fixed the issues in qat.rst file.
Changes in v3:
Added new feature information
Changes in v2:
Removed trialing white spaces
doc/guides/cryptodevs/qat.rst | 86 ++++++++++++++++++++++++++++++++--
doc/guides/rel_notes/release_16_11.rst | 4 ++
drivers/crypto/qat/rte_qat_cryptodev.c | 3 ++
3 files changed, 88 insertions(+), 5 deletions(-)
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index bb62f22..3ee2312 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -27,11 +27,12 @@
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-Quick Assist Crypto Poll Mode Driver
-====================================
+Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
+==================================================
The QAT PMD provides poll mode crypto driver support for **Intel QuickAssist
-Technology DH895xxC** hardware accelerator.
+Technology DH895xxC** and **Intel QuickAssist Technology C62x**
+hardware accelerator.
Features
@@ -86,10 +87,15 @@ If you are running on kernel 4.4 or greater, see instructions for
`Installation using kernel.org driver`_ below. If you are on a kernel earlier
than 4.4, see `Installation using 01.org QAT driver`_.
+For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is
+needed. See instructions for `Installation using kernel.org driver`_ below.
+
Installation using 01.org QAT driver
------------------------------------
+NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org.
+
Download the latest QuickAssist Technology Driver from `01.org
<https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_
Consult the *Getting Started Guide* at the same URL for further information.
@@ -166,6 +172,7 @@ If the build or install fails due to mismatching kernel sources you may need to
Installation using kernel.org driver
------------------------------------
+For **Intel QuickAssist Technology DH895xxC**:
Assuming you are running on at least a 4.4 kernel, you can use the stock kernel.org QAT
driver to start the QAT hardware.
@@ -185,9 +192,9 @@ You should see the following output::
qat_dh895xcc 5626 0
intel_qat 82336 1 qat_dh895xcc
-Next, you need to expose the VFs using the sysfs file system.
+Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
-First find the bdf of the DH895xCC device::
+First find the bdf of the physical function (PF) of the DH895xCC device::
lspci -d : 435
@@ -225,10 +232,54 @@ cd to your linux source root directory and start the qat kernel modules:
``IOMMU should be enabled for SR-IOV to work correctly``
+For **Intel QuickAssist Technology C62x**:
+Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
+driver to start the QAT hardware.
+
+The steps below assume you are:
+
+* Running DPDK on a platform with one ``C62x`` device.
+* On a kernel at least version 4.5.
+
+In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+
+Ensure the QAT driver is loaded on your system, by executing::
+
+ lsmod | grep qat
+
+You should see the following output::
+
+ qat_c62x 16384 0
+ intel_qat 122880 1 qat_c62x
+
+Next, you need to expose the VFs using the sysfs file system.
+
+First find the bdf of the C62x device::
+
+ lspci -d:37c8
+
+You should see output similar to::
+
+ 1a:00.0 Co-processor: Intel Corporation Device 37c8
+ 3d:00.0 Co-processor: Intel Corporation Device 37c8
+ 3f:00.0 Co-processor: Intel Corporation Device 37c8
+
+For each c62x device there are 3 PFs.
+Using the sysfs, for each PF, enable the 16 VFs::
+
+ echo 16 > /sys/bus/pci/drivers/c6xx/0000\:1a\:00.0/sriov_numvfs
+
+If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5.
+
+To verify that the VFs are available for use - use ``lspci -d:37c9`` to confirm
+the bdf of the 48 VF devices are available per ``C62x`` device.
+
+To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
Binding the available VFs to the DPDK UIO driver
------------------------------------------------
+For **Intel(R) QuickAssist Technology DH895xcc** device:
The unbind command below assumes ``bdfs`` of ``03:01.00-03:04.07``, if yours are different adjust the unbind command below::
cd $RTE_SDK
@@ -245,3 +296,28 @@ The unbind command below assumes ``bdfs`` of ``03:01.00-03:04.07``, if yours are
echo "8086 0443" > /sys/bus/pci/drivers/igb_uio/new_id
You can use ``lspci -vvd:443`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+For **Intel(R) QuickAssist Technology C62x** device:
+The unbind command below assumes ``bdfs`` of ``1a:01.00-1a:02.07``, ``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``,
+if yours are different adjust the unbind command below::
+
+ cd $RTE_SDK
+ modprobe uio
+ insmod ./build/kmod/igb_uio.ko
+
+ for device in $(seq 1 2); do \
+ for fn in $(seq 0 7); do \
+ echo -n 0000:1a:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
+
+ echo -n 0000:3d:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
+
+ echo -n 0000:3f:0${device}.${fn} > \
+ /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
+ done; \
+ done
+
+ echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
+
+You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver.
diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst
index 9b2c775..5db495e 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -36,6 +36,10 @@ New Features
This section is a comment. Make sure to start the actual text at the margin.
+* ** Added support of C62XX Device in QAT PMD.**
+ Support for Device c62xx has been enabled in QAT PMD.
+
+
* **Updated the QAT PMD.**
The QAT PMD was updated with changes including the following:
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c
index 82ab047..e606eb5 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -71,6 +71,9 @@ static struct rte_pci_id pci_id_qat_map[] = {
{
RTE_PCI_DEVICE(0x8086, 0x0443),
},
+ {
+ RTE_PCI_DEVICE(0x8086, 0x37c9),
+ },
{.device_id = 0},
};
--
2.5.5
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v4] crypto/qat: add Intel QuickAssist C62x device
2016-09-13 10:41 ` [PATCH v4] " Deepak Kumar Jain
@ 2016-09-20 0:01 ` De Lara Guarch, Pablo
0 siblings, 0 replies; 8+ messages in thread
From: De Lara Guarch, Pablo @ 2016-09-20 0:01 UTC (permalink / raw)
To: Jain, Deepak K, dev
> -----Original Message-----
> From: Jain, Deepak K
> Sent: Tuesday, September 13, 2016 3:42 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo; Jain, Deepak K
> Subject: [PATCH v4] crypto/qat: add Intel QuickAssist C62x device
>
> From: Deepak Kumar JAIN <deepak.k.jain@intel.com>
>
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Applied to dpdk-next-crypto.
Thanks,
Pablo
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2016-09-20 0:01 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-08-23 14:53 [PATCH] crypto/qat: add Intel QuickAssist C62x device Deepak Kumar Jain
2016-08-25 13:15 ` [PATCH v2] " Deepak Kumar Jain
2016-08-26 8:58 ` Trahe, Fiona
2016-09-13 9:11 ` [PATCH v3] " Deepak Kumar Jain
2016-09-13 10:41 ` [PATCH v4] " Deepak Kumar Jain
2016-09-20 0:01 ` De Lara Guarch, Pablo
2016-09-07 18:06 ` [PATCH] " De Lara Guarch, Pablo
2016-09-07 19:33 ` Jain, Deepak K
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