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From: CK Hu <ck.hu@mediatek.com>
To: YT Shen <yt.shen@mediatek.com>
Cc: <dri-devel@lists.freedesktop.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Daniel Kurtz <djkurtz@chromium.org>,
	Mao Huang <littlecvr@chromium.org>,
	Bibby Hsieh <bibby.hsieh@mediatek.com>,
	"Daniel Vetter" <daniel.vetter@ffwll.ch>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jie Qiu <jie.qiu@mediatek.com>,
	Maxime Ripard <maxime.ripard@free-electrons.com>,
	Chris Wilson <chris@chris-wilson.co.uk>,
	shaoming chen <shaoming.chen@mediatek.com>,
	Jitao Shi <jitao.shi@mediatek.com>,
	Boris Brezillon <boris.brezillon@free-electrons.com>,
	Dan Carpenter <dan.carpenter@oracle.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <srv_heupstream@mediatek.com>,
	Sascha Hauer <kernel@pengutronix.de>, <yingjoe.chen@mediatek.com>,
	<emil.l.velikov@gmail.com>
Subject: Re: [PATCH v8 9/9] drm/mediatek: add support for Mediatek SoC MT2701
Date: Mon, 19 Sep 2016 09:08:48 +0800	[thread overview]
Message-ID: <1474247328.24685.9.camel@mtksdaap41> (raw)
In-Reply-To: <1473681672-47144-10-git-send-email-yt.shen@mediatek.com>

Hi, YT:

On Mon, 2016-09-12 at 20:01 +0800, YT Shen wrote:
> This patch add support for the Mediatek MT2701 DISP subsystem.
> There is only one OVL engine in MT2701.
> 
> Signed-off-by: YT Shen <yt.shen@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c     |  6 ++++++
>  drivers/gpu/drm/mediatek/mtk_disp_rdma.c    |  6 ++++++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c      | 17 +++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  7 +++++++
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c      | 29 +++++++++++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_dsi.c          |  1 +
>  drivers/gpu/drm/mediatek/mtk_mipi_tx.c      |  6 ++++++
>  7 files changed, 72 insertions(+)
> 

[snip...]

> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 4b4e449..465819b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -112,6 +112,7 @@ struct mtk_ddp_comp_match {
>  
>  static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
>  	[DDP_COMPONENT_AAL]	= { MTK_DISP_AAL,	0, NULL },
> +	[DDP_COMPONENT_BLS]	= { MTK_DISP_PWM,	0, NULL },

I would like to move this modification to the patch of "Add BLS
component". Just like 'shadow register', even we first introduce it in
MT2701, we separate it in another independent patch because it may be
included in other Mediatek Soc. I prefer modification of this patch is
something which exist in MT8173 but is different in MT2701. 

Regards,
CK

>  	[DDP_COMPONENT_COLOR0]	= { MTK_DISP_COLOR,	0, &ddp_color },
>  	[DDP_COMPONENT_COLOR1]	= { MTK_DISP_COLOR,	1, &ddp_color },
>  	[DDP_COMPONENT_DPI0]	= { MTK_DPI,		0, NULL },
> @@ -130,11 +131,17 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
>  	[DDP_COMPONENT_WDMA1]	= { MTK_DISP_WDMA,	1, NULL },
>  };
>  

WARNING: multiple messages have this Message-ID (diff)
From: CK Hu <ck.hu@mediatek.com>
To: YT Shen <yt.shen@mediatek.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Jie Qiu <jie.qiu@mediatek.com>,
	Mao Huang <littlecvr@chromium.org>,
	yingjoe.chen@mediatek.com,
	Dan Carpenter <dan.carpenter@oracle.com>,
	Jitao Shi <jitao.shi@mediatek.com>,
	Sascha Hauer <kernel@pengutronix.de>,
	linux-mediatek@lists.infradead.org,
	dri-devel@lists.freedesktop.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	shaoming chen <shaoming.chen@mediatek.com>,
	linux-arm-kernel@lists.infradead.org,
	srv_heupstream@mediatek.com, emil.l.velikov@gmail.com,
	linux-kernel@vger.kernel.org,
	Maxime Ripard <maxime.ripard@free-electrons.com>
Subject: Re: [PATCH v8 9/9] drm/mediatek: add support for Mediatek SoC MT2701
Date: Mon, 19 Sep 2016 09:08:48 +0800	[thread overview]
Message-ID: <1474247328.24685.9.camel@mtksdaap41> (raw)
In-Reply-To: <1473681672-47144-10-git-send-email-yt.shen@mediatek.com>

Hi, YT:

On Mon, 2016-09-12 at 20:01 +0800, YT Shen wrote:
> This patch add support for the Mediatek MT2701 DISP subsystem.
> There is only one OVL engine in MT2701.
> 
> Signed-off-by: YT Shen <yt.shen@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c     |  6 ++++++
>  drivers/gpu/drm/mediatek/mtk_disp_rdma.c    |  6 ++++++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c      | 17 +++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  7 +++++++
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c      | 29 +++++++++++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_dsi.c          |  1 +
>  drivers/gpu/drm/mediatek/mtk_mipi_tx.c      |  6 ++++++
>  7 files changed, 72 insertions(+)
> 

[snip...]

> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 4b4e449..465819b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -112,6 +112,7 @@ struct mtk_ddp_comp_match {
>  
>  static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
>  	[DDP_COMPONENT_AAL]	= { MTK_DISP_AAL,	0, NULL },
> +	[DDP_COMPONENT_BLS]	= { MTK_DISP_PWM,	0, NULL },

I would like to move this modification to the patch of "Add BLS
component". Just like 'shadow register', even we first introduce it in
MT2701, we separate it in another independent patch because it may be
included in other Mediatek Soc. I prefer modification of this patch is
something which exist in MT8173 but is different in MT2701. 

Regards,
CK

>  	[DDP_COMPONENT_COLOR0]	= { MTK_DISP_COLOR,	0, &ddp_color },
>  	[DDP_COMPONENT_COLOR1]	= { MTK_DISP_COLOR,	1, &ddp_color },
>  	[DDP_COMPONENT_DPI0]	= { MTK_DPI,		0, NULL },
> @@ -130,11 +131,17 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
>  	[DDP_COMPONENT_WDMA1]	= { MTK_DISP_WDMA,	1, NULL },
>  };
>  

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: ck.hu@mediatek.com (CK Hu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 9/9] drm/mediatek: add support for Mediatek SoC MT2701
Date: Mon, 19 Sep 2016 09:08:48 +0800	[thread overview]
Message-ID: <1474247328.24685.9.camel@mtksdaap41> (raw)
In-Reply-To: <1473681672-47144-10-git-send-email-yt.shen@mediatek.com>

Hi, YT:

On Mon, 2016-09-12 at 20:01 +0800, YT Shen wrote:
> This patch add support for the Mediatek MT2701 DISP subsystem.
> There is only one OVL engine in MT2701.
> 
> Signed-off-by: YT Shen <yt.shen@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c     |  6 ++++++
>  drivers/gpu/drm/mediatek/mtk_disp_rdma.c    |  6 ++++++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c      | 17 +++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  7 +++++++
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c      | 29 +++++++++++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_dsi.c          |  1 +
>  drivers/gpu/drm/mediatek/mtk_mipi_tx.c      |  6 ++++++
>  7 files changed, 72 insertions(+)
> 

[snip...]

> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 4b4e449..465819b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -112,6 +112,7 @@ struct mtk_ddp_comp_match {
>  
>  static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
>  	[DDP_COMPONENT_AAL]	= { MTK_DISP_AAL,	0, NULL },
> +	[DDP_COMPONENT_BLS]	= { MTK_DISP_PWM,	0, NULL },

I would like to move this modification to the patch of "Add BLS
component". Just like 'shadow register', even we first introduce it in
MT2701, we separate it in another independent patch because it may be
included in other Mediatek Soc. I prefer modification of this patch is
something which exist in MT8173 but is different in MT2701. 

Regards,
CK

>  	[DDP_COMPONENT_COLOR0]	= { MTK_DISP_COLOR,	0, &ddp_color },
>  	[DDP_COMPONENT_COLOR1]	= { MTK_DISP_COLOR,	1, &ddp_color },
>  	[DDP_COMPONENT_DPI0]	= { MTK_DPI,		0, NULL },
> @@ -130,11 +131,17 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
>  	[DDP_COMPONENT_WDMA1]	= { MTK_DISP_WDMA,	1, NULL },
>  };
>  

  reply	other threads:[~2016-09-19  1:08 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-12 12:01 [PATCH v8 0/9] MT2701 DRM support YT Shen
2016-09-12 12:01 ` YT Shen
2016-09-12 12:01 ` YT Shen
2016-09-12 12:01 ` [PATCH v8 1/9] drm/mediatek: rename macros, add chip prefix YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01 ` [PATCH v8 2/9] drm/mediatek: add *driver_data for different hardware settings YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01 ` [PATCH v8 3/9] drm/mediatek: add shadow register support YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01 ` [PATCH v8 4/9] drm/mediatek: update display module connections YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-13  9:41   ` CK Hu
2016-09-13  9:41     ` CK Hu
2016-09-13  9:41     ` CK Hu
2016-09-12 12:01 ` [PATCH v8 5/9] drm/mediatek: cleaning up and refine YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01 ` [PATCH v8 6/9] drm/mediatek: add dsi interrupt control YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-13  8:55   ` CK Hu
2016-09-13  8:55     ` CK Hu
2016-09-13  8:55     ` CK Hu
2016-09-12 12:01 ` [PATCH v8 7/9] drm/mediatek: add dsi transfer function YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01 ` [PATCH v8 8/9] drm/mediatek: update DSI sub driver flow YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-14  5:42   ` CK Hu
2016-09-14  5:42     ` CK Hu
2016-09-14  5:42     ` CK Hu
2016-09-12 12:01 ` [PATCH v8 9/9] drm/mediatek: add support for Mediatek SoC MT2701 YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-12 12:01   ` YT Shen
2016-09-19  1:08   ` CK Hu [this message]
2016-09-19  1:08     ` CK Hu
2016-09-19  1:08     ` CK Hu

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