* [U-Boot] [RFC Patch 1/5] armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A
2016-09-21 22:51 [U-Boot] [RFC Patch 0/5] Resolve conflict for merging York Sun
@ 2016-09-21 22:51 ` York Sun
2016-09-21 22:57 ` Tom Rini
2016-09-21 22:51 ` [U-Boot] [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters through data structure York Sun
` (4 subsequent siblings)
5 siblings, 1 reply; 15+ messages in thread
From: York Sun @ 2016-09-21 22:51 UTC (permalink / raw)
To: u-boot
Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
---
arch/arm/Kconfig | 4 ++++
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 ++
arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 +-
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 2 +-
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 ++-
drivers/net/fm/Makefile | 2 +-
include/configs/ls1046a_common.h | 1 -
8 files changed, 12 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/Kconfig
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1560bcc..aed89c9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -843,6 +843,7 @@ config TARGET_LS1043ARDB
config TARGET_LS1046AQDS
bool "Support ls1046aqds"
+ select ARCH_LS1046A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
@@ -855,6 +856,7 @@ config TARGET_LS1046AQDS
config TARGET_LS1046ARDB
bool "Support ls1046ardb"
+ select ARCH_LS1046A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
@@ -951,6 +953,8 @@ source "arch/arm/cpu/armv7/mx5/Kconfig"
source "arch/arm/cpu/armv7/omap-common/Kconfig"
+source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
+
source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/mach-rmobile/Kconfig"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
new file mode 100644
index 0000000..c234eff
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -0,0 +1,2 @@
+config ARCH_LS1046A
+ bool "Freescale Layerscape LS1046A SoC"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index 8c1317f..f9590af 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -34,6 +34,6 @@ ifneq ($(CONFIG_LS1012A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o
endif
-ifneq ($(CONFIG_LS1046A),)
+ifneq ($(CONFIG_ARCH_LS1046A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index 6451a36..5d0b7a4 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -180,7 +180,7 @@ ENTRY(lowlevel_init)
dsb sy
#endif
-#ifdef CONFIG_LS1046A
+#ifdef CONFIG_ARCH_LS1046A
/* Initialize the L2 RAM latency */
mrs x1, S3_1_c11_c0_2
mov x0, #0x1C7
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 5ca721d..463d1e3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -228,7 +228,7 @@ int sata_init(void)
{
struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
-#ifdef CONFIG_LS1046A
+#ifdef CONFIG_ARCH_LS1046A
/* Disable SATA ECC */
out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000);
#endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 81a5e7c..e7c7d98 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -7,6 +7,7 @@
#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_
#define _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_
+#include <linux/kconfig.h>
#include <fsl_ddrc_version.h>
#define CONFIG_STANDALONE_LOAD_ADDR 0x80300000
@@ -213,7 +214,7 @@
#define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000
-#elif defined(CONFIG_LS1046A)
+#elif defined(CONFIG_ARCH_LS1046A)
#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_NUM_FMAN 1
diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index 344fbe2..316fef4 100644
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -39,4 +39,4 @@ obj-$(CONFIG_PPC_T4080) += t4240.o
obj-$(CONFIG_PPC_B4420) += b4860.o
obj-$(CONFIG_PPC_B4860) += b4860.o
obj-$(CONFIG_LS1043A) += ls1043.o
-obj-$(CONFIG_LS1046A) += ls1046.o
+obj-$(CONFIG_ARCH_LS1046A) += ls1046.o
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 5856de8..7c5e635 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -10,7 +10,6 @@
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_FSL_LSCH2
-#define CONFIG_LS1046A
#define CONFIG_MP
#define CONFIG_SYS_FSL_CLK
#define CONFIG_GICV2
--
2.7.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters through data structure
2016-09-21 22:51 [U-Boot] [RFC Patch 0/5] Resolve conflict for merging York Sun
2016-09-21 22:51 ` [U-Boot] [RFC Patch 1/5] armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A York Sun
@ 2016-09-21 22:51 ` York Sun
2016-09-21 22:57 ` Tom Rini
2016-09-22 3:04 ` Prabhakar Kushwaha
2016-09-21 22:51 ` [U-Boot] [RFC Patch 3/5] armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021A York Sun
` (3 subsequent siblings)
5 siblings, 2 replies; 15+ messages in thread
From: York Sun @ 2016-09-21 22:51 UTC (permalink / raw)
To: u-boot
Instead of using multiple macros, a data structure is used to pass
board-specific parameters to MMDC DDR driver.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
---
board/freescale/ls1012afrdm/ls1012afrdm.c | 18 ++++++++++++++-
board/freescale/ls1012aqds/ls1012aqds.c | 18 ++++++++++++++-
board/freescale/ls1012ardb/ls1012ardb.c | 18 ++++++++++++++-
drivers/ddr/fsl/fsl_mmdc.c | 38 +++++++++++++++----------------
include/configs/ls1012afrdm.h | 16 -------------
include/configs/ls1012aqds.h | 16 -------------
include/configs/ls1012ardb.h | 15 ------------
include/fsl_mmdc.h | 21 +++++++++++++----
8 files changed, 87 insertions(+), 73 deletions(-)
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
index d644e94..b03bdb8 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -26,7 +26,23 @@ int checkboard(void)
int dram_init(void)
{
- mmdc_init();
+ static const struct fsl_mmdc_info mparam = {
+ 0x04180000, /* mdctl */
+ 0x00030035, /* mdpdc */
+ 0x12554000, /* mdotc */
+ 0xbabf7954, /* mdcfg0 */
+ 0xdb328f64, /* mdcfg1 */
+ 0x01ff00db, /* mdcfg2 */
+ 0x00001680, /* mdmisc */
+ 0x0f3c8000, /* mdref */
+ 0x00002000, /* mdrwd */
+ 0x00bf1023, /* mdor */
+ 0x0000003f, /* mdasp */
+ 0x0000022a, /* mpodtctrl */
+ 0xa1390003, /* mpzqhwctrl */
+ };
+
+ mmdc_init(&mparam);
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 188b6bc..94440b3 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -54,7 +54,23 @@ int checkboard(void)
int dram_init(void)
{
- mmdc_init();
+ static const struct fsl_mmdc_info mparam = {
+ 0x05180000, /* mdctl */
+ 0x00030035, /* mdpdc */
+ 0x12554000, /* mdotc */
+ 0xbabf7954, /* mdcfg0 */
+ 0xdb328f64, /* mdcfg1 */
+ 0x01ff00db, /* mdcfg2 */
+ 0x00001680, /* mdmisc */
+ 0x0f3c8000, /* mdref */
+ 0x00002000, /* mdrwd */
+ 0x00bf1023, /* mdor */
+ 0x0000003f, /* mdasp */
+ 0x0000022a, /* mpodtctrl */
+ 0xa1390003, /* mpzqhwctrl */
+ };
+
+ mmdc_init(&mparam);
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 50f9187..778434d 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -58,7 +58,23 @@ int checkboard(void)
int dram_init(void)
{
- mmdc_init();
+ static const struct fsl_mmdc_info mparam = {
+ 0x05180000, /* mdctl */
+ 0x00030035, /* mdpdc */
+ 0x12554000, /* mdotc */
+ 0xbabf7954, /* mdcfg0 */
+ 0xdb328f64, /* mdcfg1 */
+ 0x01ff00db, /* mdcfg2 */
+ 0x00001680, /* mdmisc */
+ 0x0f3c8000, /* mdref */
+ 0x00002000, /* mdrwd */
+ 0x00bf1023, /* mdor */
+ 0x0000003f, /* mdasp */
+ 0x0000022a, /* mpodtctrl */
+ 0xa1390003, /* mpzqhwctrl */
+ };
+
+ mmdc_init(&mparam);
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
diff --git a/drivers/ddr/fsl/fsl_mmdc.c b/drivers/ddr/fsl/fsl_mmdc.c
index 1e35967..52eec0f 100644
--- a/drivers/ddr/fsl/fsl_mmdc.c
+++ b/drivers/ddr/fsl/fsl_mmdc.c
@@ -26,7 +26,7 @@ static void set_wait_for_bits_clear(void *ptr, u32 value, u32 bits)
printf("Error: %p wait for clear timeout.\n", ptr);
}
-void mmdc_init(void)
+void mmdc_init(const struct fsl_mmdc_info *priv)
{
struct mmdc_regs *mmdc = (struct mmdc_regs *)CONFIG_SYS_FSL_DDR_ADDR;
unsigned int tmp;
@@ -35,26 +35,26 @@ void mmdc_init(void)
out_be32(&mmdc->mdscr, MDSCR_ENABLE_CON_REQ);
/* 2. configure the desired timing parameters */
- out_be32(&mmdc->mdotc, CONFIG_MMDC_MDOTC);
- out_be32(&mmdc->mdcfg0, CONFIG_MMDC_MDCFG0);
- out_be32(&mmdc->mdcfg1, CONFIG_MMDC_MDCFG1);
- out_be32(&mmdc->mdcfg2, CONFIG_MMDC_MDCFG2);
+ out_be32(&mmdc->mdotc, priv->mdotc);
+ out_be32(&mmdc->mdcfg0, priv->mdcfg0);
+ out_be32(&mmdc->mdcfg1, priv->mdcfg1);
+ out_be32(&mmdc->mdcfg2, priv->mdcfg2);
/* 3. configure DDR type and other miscellaneous parameters */
- out_be32(&mmdc->mdmisc, CONFIG_MMDC_MDMISC);
+ out_be32(&mmdc->mdmisc, priv->mdmisc);
out_be32(&mmdc->mpmur0, MMDC_MPMUR0_FRC_MSR);
- out_be32(&mmdc->mdrwd, CONFIG_MMDC_MDRWD);
- out_be32(&mmdc->mpodtctrl, CONFIG_MMDC_MPODTCTRL);
+ out_be32(&mmdc->mdrwd, priv->mdrwd);
+ out_be32(&mmdc->mpodtctrl, priv->mpodtctrl);
/* 4. configure the required delay while leaving reset */
- out_be32(&mmdc->mdor, CONFIG_MMDC_MDOR);
+ out_be32(&mmdc->mdor, priv->mdor);
/* 5. configure DDR physical parameters */
/* set row/column address width, burst length, data bus width */
- tmp = CONFIG_MMDC_MDCTL & ~(MDCTL_SDE0 | MDCTL_SDE1);
+ tmp = priv->mdctl & ~(MDCTL_SDE0 | MDCTL_SDE1);
out_be32(&mmdc->mdctl, tmp);
/* configure address space partition */
- out_be32(&mmdc->mdasp, CONFIG_MMDC_MDASP);
+ out_be32(&mmdc->mdasp, priv->mdasp);
/* 6. perform a ZQ calibration - not needed here, doing in #8b */
@@ -84,7 +84,7 @@ void mmdc_init(void)
out_be32(&mmdc->mdscr, CMD_ADDR_MSB_MR_OP(0x4) | MDSCR_ENABLE_CON_REQ |
CMD_ZQ_CALIBRATION | CMD_BANK_ADDR_0);
- set_wait_for_bits_clear(&mmdc->mpzqhwctrl, CONFIG_MMDC_MPZQHWCTRL,
+ set_wait_for_bits_clear(&mmdc->mpzqhwctrl, priv->mpzqhwctrl,
MPZQHWCTRL_ZQ_HW_FORCE);
/* 9a. calibrations now, wr lvl */
@@ -116,11 +116,11 @@ void mmdc_init(void)
out_be32(&mmdc->mppdcmpr2, MPPDCMPR2_MPR_COMPARE_EN);
/* set absolute read delay offset */
-#if defined(CONFIG_MMDC_MPRDDLCTL)
- out_be32(&mmdc->mprddlctl, CONFIG_MMDC_MPRDDLCTL);
-#else
- out_be32(&mmdc->mprddlctl, MMDC_MPRDDLCTL_DEFAULT_DELAY);
-#endif
+ if (priv->mprddlctl)
+ out_be32(&mmdc->mprddlctl, priv->mprddlctl);
+ else
+ out_be32(&mmdc->mprddlctl, MMDC_MPRDDLCTL_DEFAULT_DELAY);
+
set_wait_for_bits_clear(&mmdc->mpdgctrl0,
AUTO_RD_DQS_GATING_CALIBRATION_EN,
AUTO_RD_DQS_GATING_CALIBRATION_EN);
@@ -142,13 +142,13 @@ void mmdc_init(void)
CMD_BANK_ADDR_3);
/* 10. configure power-down, self-refresh entry, exit parameters */
- out_be32(&mmdc->mdpdc, CONFIG_MMDC_MDPDC);
+ out_be32(&mmdc->mdpdc, priv->mdpdc);
out_be32(&mmdc->mapsr, MMDC_MAPSR_PWR_SAV_CTRL_STAT);
/* 11. ZQ config again? do nothing here */
/* 12. refresh scheme */
- set_wait_for_bits_clear(&mmdc->mdref, CONFIG_MMDC_MDREF,
+ set_wait_for_bits_clear(&mmdc->mdref, priv->mdref,
MDREF_START_REFRESH);
/* 13. disable CON_REQ */
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index 136d648..612f243 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -20,22 +20,6 @@
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
-/* DDR board-specific timing parameters */
-#define CONFIG_MMDC_MDCTL 0x04180000
-#define CONFIG_MMDC_MDPDC 0x00030035
-#define CONFIG_MMDC_MDOTC 0x12554000
-#define CONFIG_MMDC_MDCFG0 0xbabf7954
-#define CONFIG_MMDC_MDCFG1 0xdb328f64
-#define CONFIG_MMDC_MDCFG2 0x01ff00db
-#define CONFIG_MMDC_MDMISC 0x00001680
-#define CONFIG_MMDC_MDREF 0x0f3c8000
-#define CONFIG_MMDC_MDRWD 0x00002000
-#define CONFIG_MMDC_MDOR 0x00bf1023
-#define CONFIG_MMDC_MDASP 0x0000003f
-#define CONFIG_MMDC_MPODTCTRL 0x0000022a
-#define CONFIG_MMDC_MPZQHWCTRL 0xa1390003
-
-
/*
* USB
*/
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index b6d12dd..54abf30 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -19,22 +19,6 @@
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
-/* DDR board-specific timing parameters */
-#define CONFIG_MMDC_MDCTL 0x05180000
-#define CONFIG_MMDC_MDPDC 0x00030035
-#define CONFIG_MMDC_MDOTC 0x12554000
-#define CONFIG_MMDC_MDCFG0 0xbabf7954
-#define CONFIG_MMDC_MDCFG1 0xdb328f64
-#define CONFIG_MMDC_MDCFG2 0x01ff00db
-#define CONFIG_MMDC_MDMISC 0x00001680
-#define CONFIG_MMDC_MDREF 0x0f3c8000
-#define CONFIG_MMDC_MDRWD 0x00002000
-#define CONFIG_MMDC_MDOR 0x00bf1023
-#define CONFIG_MMDC_MDASP 0x0000003f
-#define CONFIG_MMDC_MPODTCTRL 0x0000022a
-#define CONFIG_MMDC_MPZQHWCTRL 0xa1390003
-
-
/*
* QIXIS Definitions
*/
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 2076ce5..0c13dde 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -19,21 +19,6 @@
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
-/* DDR board-specific timing parameters */
-#define CONFIG_MMDC_MDCTL 0x05180000
-#define CONFIG_MMDC_MDPDC 0x00030035
-#define CONFIG_MMDC_MDOTC 0x12554000
-#define CONFIG_MMDC_MDCFG0 0xbabf7954
-#define CONFIG_MMDC_MDCFG1 0xdb328f64
-#define CONFIG_MMDC_MDCFG2 0x01ff00db
-#define CONFIG_MMDC_MDMISC 0x00001680
-#define CONFIG_MMDC_MDREF 0x0f3c8000
-#define CONFIG_MMDC_MDRWD 0x00002000
-#define CONFIG_MMDC_MDOR 0x00bf1023
-#define CONFIG_MMDC_MDASP 0x0000003f
-#define CONFIG_MMDC_MPODTCTRL 0x0000022a
-#define CONFIG_MMDC_MPZQHWCTRL 0xa1390003
-
/*
* USB
*/
diff --git a/include/fsl_mmdc.h b/include/fsl_mmdc.h
index 1d09ff4..d5c4f8d 100644
--- a/include/fsl_mmdc.h
+++ b/include/fsl_mmdc.h
@@ -150,10 +150,23 @@ struct mmdc_regs {
u32 mpdccr;
};
-void mmdc_init(void);
+struct fsl_mmdc_info {
+ u32 mdctl;
+ u32 mdpdc;
+ u32 mdotc;
+ u32 mdcfg0;
+ u32 mdcfg1;
+ u32 mdcfg2;
+ u32 mdmisc;
+ u32 mdref;
+ u32 mdrwd;
+ u32 mdor;
+ u32 mdasp;
+ u32 mpodtctrl;
+ u32 mpzqhwctrl;
+ u32 mprddlctl;
+};
-#if !defined(CONFIG_MMDC_MDCTL)
-#error Must configure board-specific timing CONFIG_MMDC_* in <board>.h for MMDC
-#endif
+void mmdc_init(const struct fsl_mmdc_info *);
#endif /* FSL_MMDC_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [RFC Patch 3/5] armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021A
2016-09-21 22:51 [U-Boot] [RFC Patch 0/5] Resolve conflict for merging York Sun
2016-09-21 22:51 ` [U-Boot] [RFC Patch 1/5] armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A York Sun
2016-09-21 22:51 ` [U-Boot] [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters through data structure York Sun
@ 2016-09-21 22:51 ` York Sun
2016-09-21 22:57 ` Tom Rini
2016-09-21 22:51 ` [U-Boot] [RFC Patch 4/5] Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig option York Sun
` (2 subsequent siblings)
5 siblings, 1 reply; 15+ messages in thread
From: York Sun @ 2016-09-21 22:51 UTC (permalink / raw)
To: u-boot
Move this config to Kconfig option and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Calvin Johnson <calvin.johnson@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
---
arch/arm/Kconfig | 3 +++
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 +++++++
arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 +-
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 4 ++--
arch/arm/include/asm/arch-fsl-layerscape/config.h | 6 ++----
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 +-
include/configs/ls1012a_common.h | 1 -
include/linux/usb/xhci-fsl.h | 2 +-
8 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index aed89c9..c974db4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -788,6 +788,7 @@ config TARGET_HIKEY
config TARGET_LS1012AQDS
bool "Support ls1012aqds"
+ select ARCH_LS1012A
select ARM64
help
Support for Freescale LS1012AQDS platform.
@@ -797,6 +798,7 @@ config TARGET_LS1012AQDS
config TARGET_LS1012ARDB
bool "Support ls1012ardb"
+ select ARCH_LS1012A
select ARM64
help
Support for Freescale LS1012ARDB platform.
@@ -806,6 +808,7 @@ config TARGET_LS1012ARDB
config TARGET_LS1012AFRDM
bool "Support ls1012afrdm"
+ select ARCH_LS1012A
select ARM64
help
Support for Freescale LS1012AFRDM platform.
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index c234eff..a823d39 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -1,2 +1,9 @@
+config ARCH_LS1012A
+ bool "Freescale Layerscape LS1012A SoC"
+ select SYS_FSL_MMDC
+
config ARCH_LS1046A
bool "Freescale Layerscape LS1046A SoC"
+
+config SYS_FSL_MMDC
+ bool "Freescale Multi Mode DDR Controller"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index f9590af..51c1cee 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -30,7 +30,7 @@ ifneq ($(CONFIG_LS1043A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o
endif
-ifneq ($(CONFIG_LS1012A),)
+ifneq ($(CONFIG_ARCH_LS1012A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o
endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 8922197..55005f0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -60,7 +60,7 @@ void get_sys_info(struct sys_info *sys_info)
sys_info->freq_ddrbus = sysclk;
#endif
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >>
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_SHIFT) &
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_MASK;
@@ -91,7 +91,7 @@ void get_sys_info(struct sys_info *sys_info)
freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
}
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
sys_info->freq_systembus = sys_info->freq_ddrbus / 2;
sys_info->freq_ddrbus *= 2;
#endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index e7c7d98..a7fda18 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -18,9 +18,7 @@
#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 /* Enable Freescale ARM DDR3 driver */
#endif
-#ifdef CONFIG_LS1012A
-#define CONFIG_SYS_FSL_MMDC /* Freescale MMDC driver */
-#else
+#ifndef CONFIG_ARCH_LS1012A
#define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
#endif
@@ -208,7 +206,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A009942
#define CONFIG_SYS_FSL_ERRATUM_A009660
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
-#elif defined(CONFIG_LS1012A)
+#elif defined(CONFIG_ARCH_LS1012A)
#define CONFIG_MAX_CPUS 1
#undef CONFIG_SYS_FSL_DDRC_ARM_GEN3
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 95a4293..df51871 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -60,7 +60,7 @@
#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x4800000000ULL
#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x5000000000ULL
/* LUT registers */
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
#define PCIE_LUT_BASE 0xC0000
#else
#define PCIE_LUT_BASE 0x10000
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index fba2fac..5fb6c47 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -9,7 +9,6 @@
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_FSL_LSCH2
-#define CONFIG_LS1012A
#define CONFIG_GICV2
#define CONFIG_SYS_HAS_SERDES
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 199f366..d04e3cc 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -51,7 +51,7 @@ struct fsl_xhci {
struct dwc3 *dwc3_reg;
};
-#if defined(CONFIG_LS102XA) || defined(CONFIG_LS1012A)
+#if defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
--
2.7.4
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