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* [Qemu-devel] [PULL 0/9] target-mips queue
@ 2016-09-23  7:20 Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 1/9] target-mips: add 24KEc CPU definition Leon Alrae
                   ` (9 more replies)
  0 siblings, 10 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien

Hi,

Here's my queue with the MIPS patches I've accumulated so far.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit 430da7a81d356e368ccd88dcca60f38da9aa5b9a:

  Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20160915' into staging (2016-09-22 15:39:54 +0100)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20160923

for you to fetch changes up to fea55615b2f924128e115ceb2265069561b03ef8:

  linux-user: Add missing Mips syscalls items in strace.list (2016-09-23 07:07:36 +0100)

----------------------------------------------------------------
MIPS patches 2016-09-23

Changes:
* 24KEc CPU definition
* SYNC instructions make use of tcg memory barrier ops
* various MIPS linux-user bug fixes

----------------------------------------------------------------
Aleksandar Markovic (7):
      linux-user: Fix TARGET_SIOCATMARK definition for Mips
      linux-user: Fix TARGET_F_GETOWN definition for Mips
      linux-user: Fix structure target_flock definition for Mips
      linux-user: Fix structure target_semid64_ds definition for Mips
      linux-user: Fix certain argument alignment cases for Mips64
      linux-user: Add missing TARGET_EDQUOT error code for Mips
      linux-user: Add missing Mips syscalls items in strace.list

André Draszik (1):
      target-mips: add 24KEc CPU definition

Leon Alrae (1):
      target-mips: generate fences

 linux-user/mips/target_structs.h   |  16 ++++++
 linux-user/mips/target_syscall.h   |   2 +
 linux-user/mips64/target_syscall.h |   2 +
 linux-user/strace.list             | 114 +++++++++++++++++++++++++++++++++++++
 linux-user/syscall.c               |   3 +-
 linux-user/syscall_defs.h          |  12 +++-
 target-mips/translate.c            |  32 ++++++++++-
 target-mips/translate_init.c       |  22 +++++++
 8 files changed, 199 insertions(+), 4 deletions(-)

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 1/9] target-mips: add 24KEc CPU definition
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 2/9] target-mips: generate fences Leon Alrae
                   ` (8 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien, André Draszik

From: André Draszik <git@andred.net>

Define a new CPU definition supporting 24KEc cores, similar to
the existing 24Kc, but with added support for DSP instructions
and MIPS16e (and without FPU).

Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 target-mips/translate_init.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index 39ed5c4..6ae23e4 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -256,6 +256,28 @@ static const mips_def_t mips_defs[] =
         .mmu_type = MMU_TYPE_R4000,
     },
     {
+        .name = "24KEc",
+        .CP0_PRid = 0x00019600,
+        .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
+                       (MMU_TYPE_R4000 << CP0C0_MT),
+        .CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
+                       (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+                       (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) |
+                       (1 << CP0C1_CA),
+        .CP0_Config2 = MIPS_CONFIG2,
+        .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSPP) | (0 << CP0C3_VInt),
+        .CP0_LLAddr_rw_bitmask = 0,
+        .CP0_LLAddr_shift = 4,
+        .SYNCI_Step = 32,
+        .CCRes = 2,
+        /* we have a DSP, but no FPU */
+        .CP0_Status_rw_bitmask = 0x1378FF1F,
+        .SEGBITS = 32,
+        .PABITS = 32,
+        .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP,
+        .mmu_type = MMU_TYPE_R4000,
+    },
+    {
         .name = "24Kf",
         .CP0_PRid = 0x00019300,
         .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 2/9] target-mips: generate fences
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 1/9] target-mips: add 24KEc CPU definition Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 3/9] linux-user: Fix TARGET_SIOCATMARK definition for Mips Leon Alrae
                   ` (7 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien

Make use of memory barrier TCG opcode in MIPS front end.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
 target-mips/translate.c | 32 ++++++++++++++++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index bab52cb..55c2ca0 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -13109,6 +13109,34 @@ static void gen_ldst_pair (DisasContext *ctx, uint32_t opc, int rd,
     tcg_temp_free(t1);
 }
 
+static void gen_sync(int stype)
+{
+    TCGBar tcg_mo = TCG_BAR_SC;
+
+    switch (stype) {
+    case 0x4: /* SYNC_WMB */
+        tcg_mo |= TCG_MO_ST_ST;
+        break;
+    case 0x10: /* SYNC_MB */
+        tcg_mo |= TCG_MO_ALL;
+        break;
+    case 0x11: /* SYNC_ACQUIRE */
+        tcg_mo |= TCG_MO_LD_LD | TCG_MO_LD_ST;
+        break;
+    case 0x12: /* SYNC_RELEASE */
+        tcg_mo |= TCG_MO_ST_ST | TCG_MO_LD_ST;
+        break;
+    case 0x13: /* SYNC_RMB */
+        tcg_mo |= TCG_MO_LD_LD;
+        break;
+    default:
+        tcg_mo |= TCG_MO_ALL;
+        break;
+    }
+
+    tcg_gen_mb(tcg_mo);
+}
+
 static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
 {
     int extension = (ctx->opcode >> 6) & 0x3f;
@@ -13384,7 +13412,7 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
     case 0x2d:
         switch (minor) {
         case SYNC:
-            /* NOP */
+            gen_sync(extract32(ctx->opcode, 16, 5));
             break;
         case SYSCALL:
             generate_exception_end(ctx, EXCP_SYSCALL);
@@ -17201,7 +17229,7 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
         break;
     case OPC_SYNC:
         check_insn(ctx, ISA_MIPS2);
-        /* Treat as NOP. */
+        gen_sync(extract32(ctx->opcode, 6, 5));
         break;
 
 #if defined(TARGET_MIPS64)
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 3/9] linux-user: Fix TARGET_SIOCATMARK definition for Mips
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 1/9] target-mips: add 24KEc CPU definition Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 2/9] target-mips: generate fences Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 4/9] linux-user: Fix TARGET_F_GETOWN " Leon Alrae
                   ` (6 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien, Aleksandar Markovic

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

This patch fixes wrong definition of TARGET_SIOCATMARK for mips,
alpha, and sh4.

The current definition is:

  #define SIOCATMARK      0x8905

while the correct definition is:

  #define SIOCATMARK      TARGET_IOR('s', 7, int)

See Linux kernel source file arch/mips/include/uapi/asm/sockios.h#L19
for reference.

This patch also a fixes LTP test failure for test sockioctl01, for
mips, alpha, and sh4.

Signed-off-by: Aleksandar Rikalo <aleksandar.rikalo@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Acked-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 linux-user/syscall_defs.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index 5c19c5c..d50878b 100644
--- a/linux-user/syscall_defs.h
+++ b/linux-user/syscall_defs.h
@@ -898,7 +898,11 @@ struct target_pollfd {
 #define TARGET_KDSETLED        0x4B32	/* set led state [lights, not flags] */
 #define TARGET_KDSIGACCEPT     0x4B4E
 
+#if defined(TARGET_ALPHA) || defined(TARGET_MIPS) || defined(TARGET_SH4)
+#define TARGET_SIOCATMARK      TARGET_IOR('s', 7, int)
+#else
 #define TARGET_SIOCATMARK      0x8905
+#endif
 
 /* Networking ioctls */
 #define TARGET_SIOCADDRT       0x890B          /* add routing table entry */
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 4/9] linux-user: Fix TARGET_F_GETOWN definition for Mips
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
                   ` (2 preceding siblings ...)
  2016-09-23  7:20 ` [Qemu-devel] [PULL 3/9] linux-user: Fix TARGET_SIOCATMARK definition for Mips Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 5/9] linux-user: Fix structure target_flock " Leon Alrae
                   ` (5 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien, Aleksandar Markovic

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

For some reason, Qemu's TARGET_F_GETOWN constant for Mips does not
match the correct value of correspondent F_GETOWN. This patch fixes
this problem.

For reference, see Mips' F_GETOWN definition in Linux kernel at
arch/mips/include/uapi/asm/fcntl.h#L44.

This patch also fixes some fcntl()-related LTP tests for Qemu
user mode for Mips.

Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Acked-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 linux-user/syscall_defs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index d50878b..925feda 100644
--- a/linux-user/syscall_defs.h
+++ b/linux-user/syscall_defs.h
@@ -2164,7 +2164,7 @@ struct target_statfs64 {
 #define TARGET_F_SETLK         6
 #define TARGET_F_SETLKW        7
 #define TARGET_F_SETOWN        24       /*  for sockets. */
-#define TARGET_F_GETOWN        25       /*  for sockets. */
+#define TARGET_F_GETOWN        23       /*  for sockets. */
 #else
 #define TARGET_F_GETLK         5
 #define TARGET_F_SETLK         6
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 5/9] linux-user: Fix structure target_flock definition for Mips
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
                   ` (3 preceding siblings ...)
  2016-09-23  7:20 ` [Qemu-devel] [PULL 4/9] linux-user: Fix TARGET_F_GETOWN " Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 6/9] linux-user: Fix structure target_semid64_ds " Leon Alrae
                   ` (4 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien, Aleksandar Markovic

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

Structure flock is defined for Mips in a way different from any
other platform. For reference, see Linux kernel source code files:

arch/mips/include/uapi/asm/fcntl.h, line 63 (for Mips)
include/uapi/asm-generic/fcntl.h, line 195 (for all other platforms)

This patch fix this problem, by amending structure target_flock,
for Mips only.

Besides, this patch fixes LTP tests fcntl11, fcntl17, fcntl19, fcntl20,
and fcntl21, which are currently failing, if executed in Qemu user mode
for Mips platforms.

Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Acked-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 linux-user/syscall_defs.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index 925feda..9fdbe86 100644
--- a/linux-user/syscall_defs.h
+++ b/linux-user/syscall_defs.h
@@ -2333,7 +2333,13 @@ struct target_flock {
     short l_whence;
     abi_long l_start;
     abi_long l_len;
+#if defined(TARGET_MIPS)
+    abi_long l_sysid;
+#endif
     int l_pid;
+#if defined(TARGET_MIPS)
+    abi_long pad[4];
+#endif
 };
 
 struct target_flock64 {
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 6/9] linux-user: Fix structure target_semid64_ds definition for Mips
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
                   ` (4 preceding siblings ...)
  2016-09-23  7:20 ` [Qemu-devel] [PULL 5/9] linux-user: Fix structure target_flock " Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 7/9] linux-user: Fix certain argument alignment cases for Mips64 Leon Alrae
                   ` (3 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien, Aleksandar Markovic

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

This patch corrects target_semid64_ds structure definition for Mips.

See, for example definition of semid64_ds for Mips in Linux kernel:
arch/mips/include/uapi/asm/sembuf.h#L13.

This patch will also fix certain semaphore-related LTP tests for Mips,
if they are executed in Qemu user mode for any Mips platform.

Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Acked-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 linux-user/mips/target_structs.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/linux-user/mips/target_structs.h b/linux-user/mips/target_structs.h
index fbd9955..909ba89 100644
--- a/linux-user/mips/target_structs.h
+++ b/linux-user/mips/target_structs.h
@@ -45,4 +45,20 @@ struct target_shmid_ds {
     abi_ulong __unused2;
 };
 
+#define TARGET_SEMID64_DS
+
+/*
+ * The semid64_ds structure for the MIPS architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ */
+struct target_semid64_ds {
+    struct target_ipc_perm sem_perm;
+    abi_ulong sem_otime;
+    abi_ulong sem_ctime;
+    abi_ulong sem_nsems;
+    abi_ulong __unused1;
+    abi_ulong __unused2;
+};
+
 #endif
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 7/9] linux-user: Fix certain argument alignment cases for Mips64
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
                   ` (5 preceding siblings ...)
  2016-09-23  7:20 ` [Qemu-devel] [PULL 6/9] linux-user: Fix structure target_semid64_ds " Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 8/9] linux-user: Add missing TARGET_EDQUOT error code for Mips Leon Alrae
                   ` (2 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien, Aleksandar Markovic

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

The function that is changed in this patch is supposed to indicate that
there was certain argument rearrangement related to 64-bit arguments on
32-bit platforms. The background on such rearrangements can be found,
for example, in the man page for syscall(2).

However, for 64-bit Mips architectures there is no such rearrangement,
and this patch reflects it.

Signed-off-by: Aleksandar Rikalo <aleksandar.rikalo@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Acked-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 linux-user/syscall.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 7aa2c1d..116e463 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -658,7 +658,7 @@ static inline int next_free_host_timer(void)
 static inline int regpairs_aligned(void *cpu_env) {
     return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
 }
-#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MIPS) && (TARGET_ABI_BITS == 32)
 static inline int regpairs_aligned(void *cpu_env) { return 1; }
 #elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
 /* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 8/9] linux-user: Add missing TARGET_EDQUOT error code for Mips
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
                   ` (6 preceding siblings ...)
  2016-09-23  7:20 ` [Qemu-devel] [PULL 7/9] linux-user: Fix certain argument alignment cases for Mips64 Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23  7:20 ` [Qemu-devel] [PULL 9/9] linux-user: Add missing Mips syscalls items in strace.list Leon Alrae
  2016-09-23 15:15 ` [Qemu-devel] [PULL 0/9] target-mips queue Peter Maydell
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien, Aleksandar Markovic

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

EDQUOT is defined for Mips platform in Linux kernel in such a way
that it has different value than on most other platforms. However,
correspondent TARGET_EDQUOT for Mips is missing in Qemu code. Moreover,
TARGET_EDQUOT is missing from the table for conversion of error codes
from host to target. This patch fixes these problems.

Without this patch, syscalls add_key(), keyctl(), link(), mkdir(), mknod(),
open(), rename(), request_key(), setxattr(), symlink(), and write() will not
be able to return the right error code in some scenarios on Mips platform.
(Some of these syscalls are not yet supported in Qemu, but once they are
supported, they will need correct EDQUOT handling.)

Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Acked-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 linux-user/mips/target_syscall.h   | 2 ++
 linux-user/mips64/target_syscall.h | 2 ++
 linux-user/syscall.c               | 1 +
 3 files changed, 5 insertions(+)

diff --git a/linux-user/mips/target_syscall.h b/linux-user/mips/target_syscall.h
index 6c666dc..0b64b73 100644
--- a/linux-user/mips/target_syscall.h
+++ b/linux-user/mips/target_syscall.h
@@ -221,6 +221,8 @@ struct target_pt_regs {
 #undef TARGET_ENOTRECOVERABLE
 #define TARGET_ENOTRECOVERABLE 166     /* State not recoverable */
 
+#undef TARGET_EDQUOT
+#define TARGET_EDQUOT          1133    /* Quota exceeded */
 
 #define UNAME_MACHINE "mips"
 #define UNAME_MINIMUM_RELEASE "2.6.32"
diff --git a/linux-user/mips64/target_syscall.h b/linux-user/mips64/target_syscall.h
index a9c17f7..6692917 100644
--- a/linux-user/mips64/target_syscall.h
+++ b/linux-user/mips64/target_syscall.h
@@ -218,6 +218,8 @@ struct target_pt_regs {
 #undef TARGET_ENOTRECOVERABLE
 #define TARGET_ENOTRECOVERABLE 166     /* State not recoverable */
 
+#undef TARGET_EDQUOT
+#define TARGET_EDQUOT          1133    /* Quota exceeded */
 
 #define UNAME_MACHINE "mips64"
 #define UNAME_MINIMUM_RELEASE "2.6.32"
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 116e463..0815f30 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -757,6 +757,7 @@ static uint16_t host_to_target_errno_table[ERRNO_TABLE_SIZE] = {
     [ENAVAIL]		= TARGET_ENAVAIL,
     [EISNAM]		= TARGET_EISNAM,
     [EREMOTEIO]		= TARGET_EREMOTEIO,
+    [EDQUOT]            = TARGET_EDQUOT,
     [ESHUTDOWN]		= TARGET_ESHUTDOWN,
     [ETOOMANYREFS]	= TARGET_ETOOMANYREFS,
     [ETIMEDOUT]		= TARGET_ETIMEDOUT,
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [Qemu-devel] [PULL 9/9] linux-user: Add missing Mips syscalls items in strace.list
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
                   ` (7 preceding siblings ...)
  2016-09-23  7:20 ` [Qemu-devel] [PULL 8/9] linux-user: Add missing TARGET_EDQUOT error code for Mips Leon Alrae
@ 2016-09-23  7:20 ` Leon Alrae
  2016-09-23 15:15 ` [Qemu-devel] [PULL 0/9] target-mips queue Peter Maydell
  9 siblings, 0 replies; 11+ messages in thread
From: Leon Alrae @ 2016-09-23  7:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: peter.maydell, aurelien, Aleksandar Markovic

From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

Without this patch, a number of Mips syscalls will be logged in the following
way (in this example, this is an invocation of accept4()):

  86906 Unknown syscall 4334

This patch provides standard Qemu's strace output for such cases, like this:

  95861 accept4(3,1996486000,1996486016,128,0,0) = 5

Such output may be further improved by providing strace-related functions
that handle only particular syscalls, but this is beyond the scope of
this patch.

Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Acked-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 linux-user/strace.list | 114 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 114 insertions(+)

diff --git a/linux-user/strace.list b/linux-user/strace.list
index aa967a2..608f7e0 100644
--- a/linux-user/strace.list
+++ b/linux-user/strace.list
@@ -6,6 +6,9 @@
 #ifdef TARGET_NR_accept
 { TARGET_NR_accept, "accept" , NULL, print_accept, NULL },
 #endif
+#ifdef TARGET_NR_accept4
+{ TARGET_NR_accept4, "accept4" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_access
 { TARGET_NR_access, "access" , NULL, print_access, NULL },
 #endif
@@ -39,6 +42,9 @@
 #ifdef TARGET_NR_bind
 { TARGET_NR_bind, "bind" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_bpf
+{ TARGET_NR_bpf, "bpf" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_break
 { TARGET_NR_break, "break" , NULL, NULL, NULL },
 #endif
@@ -123,18 +129,30 @@
 #ifdef TARGET_NR_epoll_ctl_old
 { TARGET_NR_epoll_ctl_old, "epoll_ctl_old" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_epoll_pwait
+{ TARGET_NR_epoll_pwait, "epoll_pwait" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_epoll_wait
 { TARGET_NR_epoll_wait, "epoll_wait" , NULL, NULL, NULL },
 #endif
 #ifdef TARGET_NR_epoll_wait_old
 { TARGET_NR_epoll_wait_old, "epoll_wait_old" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_eventfd
+{ TARGET_NR_eventfd, "eventfd" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_eventfd2
+{ TARGET_NR_eventfd2, "eventfd2" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_execv
 { TARGET_NR_execv, "execv" , NULL, print_execv, NULL },
 #endif
 #ifdef TARGET_NR_execve
 { TARGET_NR_execve, "execve" , NULL, print_execve, NULL },
 #endif
+#ifdef TARGET_NR_execveat
+{ TARGET_NR_execveat, "execveat" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_exec_with_loader
 { TARGET_NR_exec_with_loader, "exec_with_loader" , NULL, NULL, NULL },
 #endif
@@ -156,6 +174,15 @@
 #ifdef TARGET_NR_fadvise64_64
 { TARGET_NR_fadvise64_64, "fadvise64_64" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_fallocate
+{ TARGET_NR_fallocate, "fallocate" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_fanotify_init
+{ TARGET_NR_fanotify_init, "fanotify_init" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_fanotify_mark
+{ TARGET_NR_fanotify_mark, "fanotify_mark" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_fchdir
 { TARGET_NR_fchdir, "fchdir" , NULL, NULL, NULL },
 #endif
@@ -186,6 +213,9 @@
 #ifdef TARGET_NR_fgetxattr
 { TARGET_NR_fgetxattr, "fgetxattr" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_finit_module
+{ TARGET_NR_finit_module, "finit_module" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_flistxattr
 { TARGET_NR_flistxattr, "flistxattr" , NULL, NULL, NULL },
 #endif
@@ -231,6 +261,9 @@
 #ifdef TARGET_NR_futimesat
 { TARGET_NR_futimesat, "futimesat" , NULL, print_futimesat, NULL },
 #endif
+#ifdef TARGET_NR_getcpu
+{ TARGET_NR_getcpu, "getcpu" , "%s(%p,%d)", NULL, NULL },
+#endif
 #ifdef TARGET_NR_getcwd
 { TARGET_NR_getcwd, "getcwd" , "%s(%p,%d)", NULL, NULL },
 #endif
@@ -306,6 +339,9 @@
 #ifdef TARGET_NR_getpriority
 { TARGET_NR_getpriority, "getpriority", "%s(%#x,%#x)", NULL, NULL },
 #endif
+#ifdef TARGET_NR_getrandom
+{ TARGET_NR_getrandom, "getrandom", NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_getresgid
 { TARGET_NR_getresgid, "getresgid" , NULL, NULL, NULL },
 #endif
@@ -379,6 +415,9 @@
 #ifdef TARGET_NR_inotify_init
 { TARGET_NR_inotify_init, "inotify_init" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_inotify_init1
+{ TARGET_NR_inotify_init1, "inotify_init1" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_inotify_rm_watch
 { TARGET_NR_inotify_rm_watch, "inotify_rm_watch" , NULL, NULL, NULL },
 #endif
@@ -415,6 +454,9 @@
 #ifdef TARGET_NR_ipc
 { TARGET_NR_ipc, "ipc" , NULL, print_ipc, NULL },
 #endif
+#ifdef TARGET_NR_kcmp
+{ TARGET_NR_kcmp, "kcmp" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_kexec_load
 { TARGET_NR_kexec_load, "kexec_load" , NULL, NULL, NULL },
 #endif
@@ -484,6 +526,12 @@
 #ifdef TARGET_NR_mbind
 { TARGET_NR_mbind, "mbind" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_membarrier
+{ TARGET_NR_membarrier, "membarrier" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_memfd_create
+{ TARGET_NR_memfd_create, "memfd_create" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_memory_ordering
 { TARGET_NR_memory_ordering, "memory_ordering" , NULL, NULL, NULL },
 #endif
@@ -511,6 +559,9 @@
 #ifdef TARGET_NR_mlock
 { TARGET_NR_mlock, "mlock" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_mlock2
+{ TARGET_NR_mlock2, "mlock2" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_mlockall
 { TARGET_NR_mlockall, "mlockall" , NULL, NULL, NULL },
 #endif
@@ -583,6 +634,9 @@
 #ifdef TARGET_NR_munmap
 { TARGET_NR_munmap, "munmap" , NULL, print_munmap, NULL },
 #endif
+#ifdef TARGET_NR_name_to_handle_at
+{ TARGET_NR_name_to_handle_at, "name_to_handle_at" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_nanosleep
 { TARGET_NR_nanosleep, "nanosleep" , NULL, NULL, NULL },
 #endif
@@ -952,6 +1006,9 @@
 #ifdef TARGET_NR_pciconfig_write
 { TARGET_NR_pciconfig_write, "pciconfig_write" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_perf_event_open
+{ TARGET_NR_perf_event_open, "perf_event_open" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_perfctr
 { TARGET_NR_perfctr, "perfctr" , NULL, NULL, NULL },
 #endif
@@ -976,6 +1033,18 @@
 #ifdef TARGET_NR_pread64
 { TARGET_NR_pread64, "pread64" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_preadv
+{ TARGET_NR_preadv, "preadv" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_prlimit64
+{ TARGET_NR_prlimit64, "prlimit64" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_process_vm_readv
+{ TARGET_NR_process_vm_readv, "process_vm_readv" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_process_vm_writev
+{ TARGET_NR_process_vm_writev, "process_vm_writev" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_prof
 { TARGET_NR_prof, "prof" , NULL, NULL, NULL },
 #endif
@@ -994,6 +1063,9 @@
 #ifdef TARGET_NR_pwrite64
 { TARGET_NR_pwrite64, "pwrite64" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_pwritev
+{ TARGET_NR_pwritev, "pwritev" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_query_module
 { TARGET_NR_query_module, "query_module" , NULL, NULL, NULL },
 #endif
@@ -1027,6 +1099,9 @@
 #ifdef TARGET_NR_recvfrom
 { TARGET_NR_recvfrom, "recvfrom" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_recvmmsg
+{ TARGET_NR_recvmmsg, "recvmmsg" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_recvmsg
 { TARGET_NR_recvmsg, "recvmsg" , NULL, NULL, NULL },
 #endif
@@ -1042,9 +1117,18 @@
 #ifdef TARGET_NR_renameat
 { TARGET_NR_renameat, "renameat" , NULL, print_renameat, NULL },
 #endif
+#ifdef TARGET_NR_renameat2
+{ TARGET_NR_renameat2, "renameat2" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_request_key
 { TARGET_NR_request_key, "request_key" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_reserved177
+{ TARGET_NR_reserved177, "reserved177" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_reserved193
+{ TARGET_NR_reserved193, "reserved193" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_reserved221
 { TARGET_NR_reserved221, "reserved221" , NULL, NULL, NULL },
 #endif
@@ -1078,12 +1162,18 @@
 #ifdef TARGET_NR_rt_sigtimedwait
 { TARGET_NR_rt_sigtimedwait, "rt_sigtimedwait" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_rt_tgsigqueueinfo
+{ TARGET_NR_rt_tgsigqueueinfo, "rt_tgsigqueueinfo" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_sched_getaffinity
 { TARGET_NR_sched_getaffinity, "sched_getaffinity" , NULL, NULL, NULL },
 #endif
 #ifdef TARGET_NR_sched_get_affinity
 { TARGET_NR_sched_get_affinity, "sched_get_affinity" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_sched_getattr
+{ TARGET_NR_sched_getattr, "sched_getattr" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_sched_getparam
 { TARGET_NR_sched_getparam, "sched_getparam" , NULL, NULL, NULL },
 #endif
@@ -1102,6 +1192,9 @@
 #ifdef TARGET_NR_sched_setaffinity
 { TARGET_NR_sched_setaffinity, "sched_setaffinity" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_sched_setatt
+{ TARGET_NR_sched_setatt, "sched_setatt" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_sched_set_affinity
 { TARGET_NR_sched_set_affinity, "sched_set_affinity" , NULL, NULL, NULL },
 #endif
@@ -1114,6 +1207,9 @@
 #ifdef TARGET_NR_sched_yield
 { TARGET_NR_sched_yield, "sched_yield" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_seccomp
+{ TARGET_NR_seccomp, "seccomp" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_security
 { TARGET_NR_security, "security" , NULL, NULL, NULL },
 #endif
@@ -1141,6 +1237,9 @@
 #ifdef TARGET_NR_sendfile64
 { TARGET_NR_sendfile64, "sendfile64" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_sendmmsg
+{ TARGET_NR_sendmmsg, "sendmmsg" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_sendmsg
 { TARGET_NR_sendmsg, "sendmsg" , NULL, NULL, NULL },
 #endif
@@ -1280,6 +1379,12 @@
 #ifdef TARGET_NR_signal
 { TARGET_NR_signal, "signal" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_signalfd
+{ TARGET_NR_signalfd, "signalfd" , NULL, NULL, NULL },
+#endif
+#ifdef TARGET_NR_signalfd4
+{ TARGET_NR_signalfd4, "signalfd4" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_sigpending
 { TARGET_NR_sigpending, "sigpending" , NULL, NULL, NULL },
 #endif
@@ -1352,6 +1457,9 @@
 #ifdef TARGET_NR_sync_file_range
 { TARGET_NR_sync_file_range, "sync_file_range" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_syncfs
+{ TARGET_NR_syncfs, "syncfs" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_syscall
 { TARGET_NR_syscall, "syscall" , NULL, NULL, NULL },
 #endif
@@ -1409,6 +1517,9 @@
 #ifdef TARGET_NR_timer_settime
 { TARGET_NR_timer_settime, "timer_settime" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_timerfd
+{ TARGET_NR_timerfd, "timerfd" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_timerfd_create
 { TARGET_NR_timerfd_create, "timerfd_create" , NULL, NULL, NULL },
 #endif
@@ -1460,6 +1571,9 @@
 #ifdef TARGET_NR_unshare
 { TARGET_NR_unshare, "unshare" , NULL, NULL, NULL },
 #endif
+#ifdef TARGET_NR_userfaultfd
+{ TARGET_NR_userfaultfd, "userfaultfd" , NULL, NULL, NULL },
+#endif
 #ifdef TARGET_NR_unused109
 { TARGET_NR_unused109, "unused109" , NULL, NULL, NULL },
 #endif
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [Qemu-devel] [PULL 0/9] target-mips queue
  2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
                   ` (8 preceding siblings ...)
  2016-09-23  7:20 ` [Qemu-devel] [PULL 9/9] linux-user: Add missing Mips syscalls items in strace.list Leon Alrae
@ 2016-09-23 15:15 ` Peter Maydell
  9 siblings, 0 replies; 11+ messages in thread
From: Peter Maydell @ 2016-09-23 15:15 UTC (permalink / raw)
  To: Leon Alrae; +Cc: QEMU Developers, Aurelien Jarno

On 23 September 2016 at 08:20, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> Here's my queue with the MIPS patches I've accumulated so far.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit 430da7a81d356e368ccd88dcca60f38da9aa5b9a:
>
>   Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20160915' into staging (2016-09-22 15:39:54 +0100)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20160923
>
> for you to fetch changes up to fea55615b2f924128e115ceb2265069561b03ef8:
>
>   linux-user: Add missing Mips syscalls items in strace.list (2016-09-23 07:07:36 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2016-09-23
>
> Changes:
> * 24KEc CPU definition
> * SYNC instructions make use of tcg memory barrier ops
> * various MIPS linux-user bug fixes
>
> ----------------------------------------------------------------

Applied, thanks.

-- PMM

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2016-09-23 15:15 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-09-23  7:20 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 1/9] target-mips: add 24KEc CPU definition Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 2/9] target-mips: generate fences Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 3/9] linux-user: Fix TARGET_SIOCATMARK definition for Mips Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 4/9] linux-user: Fix TARGET_F_GETOWN " Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 5/9] linux-user: Fix structure target_flock " Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 6/9] linux-user: Fix structure target_semid64_ds " Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 7/9] linux-user: Fix certain argument alignment cases for Mips64 Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 8/9] linux-user: Add missing TARGET_EDQUOT error code for Mips Leon Alrae
2016-09-23  7:20 ` [Qemu-devel] [PULL 9/9] linux-user: Add missing Mips syscalls items in strace.list Leon Alrae
2016-09-23 15:15 ` [Qemu-devel] [PULL 0/9] target-mips queue Peter Maydell

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